High-frequency module and communication device

Abstract

The present invention increases an area occupied by a first circuit and a second circuit, while ensuring isolation between the first circuit and the second circuit. A ground electrode (3) is disposed on a second main surface (102) of a mounting substrate (1), and is located between the second main surface (102) of the mounting substrate (1) and an IC chip (2). The IC chip (2) has a first circuit (21), a second circuit (22), a boundary region (B1), and a ground terminal (G1). The boundary region (B1) is a region between the first circuit (21) and the second circuit (22). The ground terminal (G1) overlaps a portion of the boundary region (B1) when viewed in plan view from a thickness direction of the mounting substrate (1), and is connected to the ground electrode (3). The ground electrode (3) overlaps the boundary region (B1) between the first circuit (21) and the second circuit (22) when viewed in plan view from the thickness direction of the mounting substrate (1).

Description

High frequency module and communication device

[0001] The present invention generally relates to a high-frequency module and a communication device, and more particularly to a high-frequency module including a mounting board, and a communication device including the high-frequency module.

[0002] Japanese Patent Application Laid-Open No. 2003-124222 discloses a high frequency power module including a semiconductor chip having a power amplifier circuit and a module substrate disposed opposite the semiconductor chip.

[0003] In a high-frequency power module, a semiconductor chip has planar, strip-shaped (L-shaped or T-shaped) protruding electrodes. Ground potential is applied to the planar, strip-shaped protruding electrodes. The semiconductor chip is mounted on the main surface of the module substrate via the protruding electrodes, with the main surface of the semiconductor chip facing the main surface of the module substrate.

[0004] Japanese Patent Application Laid-Open No. 2007-194305

[0005] In a high-frequency module including a mounting substrate and an IC chip, if the IC chip has a first circuit and a second circuit that can operate simultaneously, it may be necessary to increase the area occupied by the first circuit and the second circuit within the IC chip while ensuring isolation between the first circuit and the second circuit.

[0006] An object of the present invention is to provide a high-frequency module and a communication device that can increase the area occupied by the first circuit and the second circuit while ensuring isolation between the first circuit and the second circuit.

[0007] A high-frequency module according to one aspect of the present invention includes a mounting substrate, an IC chip, and a ground electrode. The mounting substrate has a first main surface and a second main surface facing each other. The IC chip is disposed on the second main surface of the mounting substrate. The ground electrode is disposed on the second main surface of the mounting substrate and is located between the second main surface of the mounting substrate and the IC chip. The IC chip includes a first circuit, a second circuit, a boundary region, and a ground terminal. The second circuit can operate simultaneously with the first circuit. The boundary region is a region between the first circuit and the second circuit, and has a length in a direction along both the first circuit and the second circuit that is longer than a width in a direction in which the first circuit and the second circuit are aligned. The ground terminal overlaps a portion of the boundary region in a plan view from the thickness direction of the mounting substrate and is connected to the ground electrode. The ground electrode overlaps the boundary region between the first circuit and the second circuit when viewed in a plan view from the thickness direction of the mounting substrate, and has a length in a direction along both the first circuit and the second circuit that is longer than a width in a direction in which the first circuit and the second circuit are aligned.

[0008] A communication device according to one aspect of the present invention includes the high-frequency module according to the above aspect and a signal processing circuit, wherein the signal processing circuit is connected to the high-frequency module.

[0009] The high-frequency module and communication device according to the above aspects of the present invention can increase the area occupied by the first circuit and the second circuit while ensuring isolation between the first circuit and the second circuit.

[0010] FIG. 1 is a bottom view of a high-frequency module according to a first embodiment. FIG. 2 is a cross-sectional view of the high-frequency module taken along line II-II in FIG. 1 . FIG. 3 is a cross-sectional view of the high-frequency module taken along line III-III in FIG. 1 . FIG. 4 is an enlarged view of a main portion of the high-frequency module shown in FIG. 2 . FIG. 5 is an enlarged view of a main portion of the high-frequency module shown in FIG. 3 . FIG. 6 is a cross-sectional view of a main portion of the high-frequency module shown in FIG. 7 . FIG. 8 is a cross-sectional view of a main portion of the high-frequency module shown in FIG. 9 . FIG. 10 is a circuit layout diagram of an IC chip in the high-frequency module shown in FIG. 10 . FIG. 11 is a bottom view of a high-frequency module according to a second embodiment. FIG. 12 is a cross-sectional view of the high-frequency module taken along line XII-XII in FIG. 11 . FIG. 13 is a circuit block diagram of a communication device including a high-frequency module according to a third embodiment. FIG. 14 is a bottom view of the high-frequency module shown in FIG. Fig. 15 shows the high-frequency module of the same, and is a cross-sectional view taken along line XV-XV in Fig. 14. Fig. 16 is a bottom view of the high-frequency module according to embodiment 4. Fig. 17 shows the high-frequency module of the same, and is a cross-sectional view taken along line XVII-XVII in Fig. 16. Fig. 18 is a circuit block diagram of a communication device including the high-frequency module of the same.

[0011] Hereinafter, embodiments 1 to 4 will be described with reference to the drawings. The drawings referred to in the following embodiments 1 to 4 are schematic diagrams, and the sizes and thicknesses of the components in the drawings do not necessarily reflect the actual dimensions, and the size ratios and thickness ratios between the components do not necessarily reflect the actual dimensional ratios.

[0012] First Embodiment A high-frequency module 100 and a communication device 300 according to a first embodiment will be described with reference to FIGS.

[0013] The high-frequency module 100 according to the first embodiment is used in a communication device 300, as shown in FIG. 10 . The communication device 300 is, for example, a mobile phone (e.g., a smartphone), but is not limited to a mobile phone. For example, the communication device 300 may be a wearable device (e.g., a smartwatch). The high-frequency module 100 is a module that is compatible with, for example, the 4G (fourth generation mobile communication) standard, the 5G (fifth generation mobile communication) standard, etc. The 4G standard is, for example, the 3GPP (Third Generation Partnership Project, registered trademark) LTE (Long Term Evolution, registered trademark) standard. The 5G standard is, for example, the 5G NR (New Radio) standard. The high-frequency module 100 is a module that is compatible with, for example, carrier aggregation and dual connectivity.

[0014] Before describing the structure of the high-frequency module 100 with reference to FIGS. 1 to 9, the circuit configuration of the high-frequency module 100 will be described with reference to FIG.

[0015] (1) Circuit Configuration of High-Frequency Module The circuit configuration of the high-frequency module 100 will be described below with reference to FIG.

[0016] The radio-frequency module 100 according to the first embodiment includes a plurality of (two in the illustrated example) low-noise amplifiers A1 and A2 and a plurality of (ten in the illustrated example) receive filters F1 to F10. The radio-frequency module 100 also includes a first switch 12, a second switch 13a, a third switch 13b, a fourth switch 15, a first low-pass filter 17, a second low-pass filter 18, and an attenuator 19. The radio-frequency module 100 also includes a digital control circuit 71 and a power supply circuit 72. The radio-frequency module 100 also includes a plurality of external connection terminals 7 (see FIG. 1 ). The plurality of external connection terminals 7 include a first antenna terminal T1, a second antenna terminal T2, a signal output terminal T4, and an external ground terminal (not shown).

[0017] (1.1) Low-Noise Amplifiers The two low-noise amplifiers A1 and A2 amplify received signals in different frequency bands. The input terminal of the low-noise amplifier A1 is connected to the second switch 13a via a matching circuit 141 for impedance matching, and can be connected to N (N=8 in the illustrated example) receive filters F1 to F8 out of the multiple receive filters F1 to F10 via the second switch 13a. The input terminal of the low-noise amplifier A2 is connected to the third switch 13b via a matching circuit 142 for impedance matching. The output terminals of the two low-noise amplifiers A1 and A2 are connected to the signal output terminal T4 via a second low-pass filter 18 and an attenuator 19.

[0018] (1.2) Receiving Filters: The receiving filters F1 to F10 are filters that pass received signals in different communication bands. Of the ten receiving filters F1 to F10, eight receiving filters F1 to F8 are provided between the first switch 12 and the second switch 13a, and the remaining two receiving filters F9 and F10 are provided between the first switch 12 and the third switch 13b. The input terminals of the N receiving filters F1 to F8 (N=8 in the illustrated example) are connected in a one-to-one relationship to the N selection terminals 121 to 128 of the first switch 12 (N=8 in the illustrated example). The output terminals of the eight receiving filters F1 to F8 are connected to the selection terminals 131 to 138 of the second switch 13a, respectively. The input terminals of the two receiving filters F9 and F10 are connected in a one-to-one relationship to the two selection terminals 129 and 130 of the first switch 12. The output terminals of the two receiving filters F9 and F10 are connected to the selection terminals 139 and 140 of the third switch 13b, respectively.

[0019] (1.3) First Switch The first switch 12 switches between the receive filters F1 to F10 and connects them to the first antenna terminal T1 and the second antenna terminal T2. The first switch 12 is an antenna switch. The first switch 12 has two common terminals 120a and 120b and a plurality of selection terminals 121 to 130 (ten in the illustrated example). The common terminal 120a is connected to the first antenna terminal T1 via a matching circuit 111 for impedance matching. The common terminal 120b is connected to the second antenna terminal T2 via a matching circuit 112 for impedance matching. Each of the selection terminals 121 to 130 is connected to one of the receive filters F1 to F10.

[0020] The first switch 12 switches the connection state between the common terminals 120a, 120b and the plurality of selection terminals 121 to 130. The first switch 12 is controlled by, for example, a digital control circuit 71. The first switch 12 electrically connects each of the common terminals 120a, 120b to one of the plurality of selection terminals 121 to 130 in accordance with a control signal from the digital control circuit 71.

[0021] (1.4) Second Switch The second switch 13a switches between eight receive filters F1 to F8 to be connected to the low-noise amplifier A1. The second switch 13a has a common terminal 130a and multiple (eight in the illustrated example) selection terminals 131 to 138. The common terminal 130a is connected to the input terminal of the low-noise amplifier A1 via a matching circuit 141 for impedance matching. The eight selection terminals 131 to 138 are connected to one of the eight receive filters F1 to F8.

[0022] The second switch 13a switches the connection state between the common terminal 130a and the plurality of (eight) selection terminals 131 to 138. The second switch 13a is controlled by, for example, a digital control circuit 71. The second switch 13a electrically connects the common terminal 130a to one of the plurality of selection terminals 131 to 138 in accordance with a control signal from the digital control circuit 71.

[0023] (1.5) Third Switch The third switch 13b switches between two receive filters F9 and F10 to be connected to the low-noise amplifier A2. The third switch 13b has a common terminal 130b and multiple (two in the illustrated example) selection terminals 139 and 140. The common terminal 130b is connected to the input terminal of the low-noise amplifier A2 via a matching circuit 142 for impedance matching. The two selection terminals 139 and 140 are connected to one of the two receive filters F9 and F10.

[0024] The third switch 13b switches the connection state between the common terminal 130b and the multiple (two) selection terminals 139 and 140. The third switch 13b is controlled by the digital control circuit 71. The third switch 13b electrically connects the common terminal 130b to one of the multiple selection terminals 139 and 140 in accordance with a control signal from the digital control circuit 71.

[0025] (1.6) Fourth Switch The fourth switch 15 has a common terminal 150 and two selection terminals 151 and 152. The common terminal 150 is connected to a node N1 on a path between the output terminals of the two low-noise amplifiers A1 and A2 and the second low-pass filter 18 via the first low-pass filter 17. The selection terminal 151 is connected to the common terminal 130a of the second switch 13a, and the selection terminal 152 is connected to the common terminal 130b of the third switch 13b.

[0026] The fourth switch 15 is controlled by a digital control circuit 71 .

[0027] The fourth switch 15 electrically connects the common terminal 150 to one of the selection terminals 151 and 152 in accordance with a control signal from the digital control circuit 71. The fourth switch 15 is controlled by the digital control circuit 71, for example.

[0028] (1.7) Second Low-Pass Filter The second low-pass filter 18 is connected between the output terminals of the two low-noise amplifiers A1 and A2 and the attenuator 19.

[0029] (1.8) Attenuator The attenuator 19 is connected between the second low-pass filter 18 and the signal output terminal T4.

[0030] (1.9) Digital Control Circuit The digital control circuit 71 controls the first switch 12 , the second switch 13 a , the third switch 13 b , and the fourth switch 15 in accordance with a control signal from the RF signal processing circuit 302 of the signal processing circuit 301 .

[0031] (1.10) Power Supply Circuit The power supply circuit 72 is powered, for example, by a DC power supply (not shown) of the communication device 300, and supplies a power supply voltage to the two low-noise amplifiers A1 and A2. The DC power supply is, for example, a rechargeable battery. Note that the DC power supply is not limited to a rechargeable battery and may be another type of battery.

[0032] (1.11) External Connection Terminals The external connection terminals 7 (see FIG. 1) are terminals for electrically connecting to an external circuit (e.g., the signal processing circuit 301). The external connection terminals 7 include a first antenna terminal T1, a second antenna terminal T2, a signal output terminal T4, a control terminal (not shown), and a ground terminal (not shown).

[0033] The first antenna terminal T1 is connected to a first antenna 311 of the communication device 300. The second antenna terminal T2 is connected to a second antenna 312 of the communication device 300.

[0034] The signal output terminal T4 is a terminal through which the received signals from the low noise amplifiers A1 and A2 are output to an external circuit (for example, the signal processing circuit 301).

[0035] (2) Structure of the High-Frequency Module The structure of the high-frequency module 100 will be described with reference to FIGS.

[0036] 1 to 3, the high-frequency module 100 according to the first embodiment includes a mounting substrate 1, an IC chip 2, and a ground electrode 3. The mounting substrate 1 has a first main surface 101 and a second main surface 102 that face each other. The IC chip 2 is disposed on the second main surface 102 of the mounting substrate 1. The ground electrode 3 is disposed on the second main surface 102 of the mounting substrate 1 and is located between the second main surface 102 of the mounting substrate 1 and the IC chip 2. The IC chip 2 includes a first circuit 21, a second circuit 22, a boundary region B1, and a ground terminal G1 (hereinafter also referred to as the first ground terminal G1). The second circuit 22 can operate simultaneously with the first circuit 21. The boundary region B1 (hereinafter also referred to as the first boundary region B1) is a region between the first circuit 21 and the second circuit 22, and is longer in a direction parallel to both the first circuit 21 and the second circuit 22 than in a width direction in which the first circuit 21 and the second circuit 22 are arranged. The first ground terminal G1 overlaps a part of the boundary region B1 in a plan view from the thickness direction D1 of the mounting substrate 1 (see FIGS. 2 and 3 ), and is connected to the ground electrode 3. The ground electrode 3 overlaps the boundary region B1 between the first circuit 21 and the second circuit 22 in a plan view from the thickness direction D1 of the mounting substrate 1, and is longer in a direction parallel to both the first circuit 21 and the second circuit 22 than in a width direction in which the first circuit 21 and the second circuit 22 are arranged. The high-frequency module 100 further includes a second ground electrode 3A different from the ground electrode 3 (hereinafter also referred to as the first ground electrode 3). The second ground electrode 3A is disposed on the second main surface 102 of the mounting substrate 1, and is located between the second main surface 102 of the mounting substrate 1 and the IC chip 2. The first circuit 21, indicated by a dashed dotted line in Fig. 1, is shown as an area (formation area of ​​the first circuit 21) that includes a plurality of wiring portions and a plurality of circuit elements included in the first circuit 21. The second circuit 22, indicated by a dashed dotted line in Fig. 1, is shown as an area (formation area of ​​the second circuit 22) that includes a plurality of wiring portions and a plurality of circuit elements included in the second circuit 22.

[0037] The IC chip 2 has a plurality of external terminals 26. The plurality of external terminals 26 includes a first ground terminal G1, a second ground terminal G2, a third ground terminal G3, a fourth ground terminal G4, a plurality of first external terminals E1, a plurality of second external terminals E2, and a plurality of third external terminals E3. In this embodiment, the first circuit 21 includes, for example, a DC circuit shown in FIG. 10. The DC circuit includes a digital control circuit 71 and a power supply circuit 72. When the first circuit 21 includes the digital control circuit 71 and the power supply circuit 72, the first circuit 21 of the IC chip 2 is provided with a plurality of first external terminals E1 as shown in FIG. 9. Note that the number of first external terminals E1 is reduced in FIG. 1.

[0038] In this embodiment, the second circuit 22 includes, for example, a high-frequency circuit having a circuit configuration shown in FIG. 10 . The high-frequency circuit includes a receiving circuit 160. As shown in FIG. 10 , the receiving circuit 160 of the second circuit 22 includes two low-noise amplifiers A1 and A2, a fourth switch 15, a first low-pass filter 17, a second low-pass filter 18, and an attenuator 19. When the second circuit 22 includes the two low-noise amplifiers A1 and A2, the fourth switch 15, the first low-pass filter 17, the second low-pass filter 18, and the attenuator 19, the second circuit 22 of the IC chip 2 is provided with, for example, a plurality of second external terminals E2 as shown in FIG. 9 . Note that the number of second external terminals E2 is reduced in FIG. 1 .

[0039] In this embodiment, the IC chip 2 further includes a third circuit 23, as shown in FIG. 1 . The third circuit 23 includes a first switch 12, a second switch 13a, and a third switch 13b, as shown in FIG. 10 . When the third circuit 23 includes the first switch 12, the second switch 13a, and the third switch 13b, the third circuit 23 of the IC chip 2 includes, for example, a plurality of third external terminals E3, as shown in FIG. 9 . Note that in FIG. 9 , the second switch 13a and the third switch 13b are collectively depicted as the switch circuit 13. Also, in FIG. 1 , the number of third external terminals E3 is reduced.

[0040] 2 and 3, the high-frequency module 100 further includes a plurality of electronic components 4. The plurality of electronic components 4 are arranged on the first main surface 101 of the mounting substrate 1.

[0041] The high-frequency module 100 further includes a first resin layer 5 and an outer shielding layer 6. The first resin layer 5 is disposed on the first main surface 101 of the mounting substrate 1 and covers the plurality of electronic components 4. The outer shielding layer 6 covers the first resin layer 5 and an outer peripheral surface 103 of the mounting substrate 1.

[0042] The high-frequency module 100 further includes a plurality of external connection terminals 7 arranged on the second main surface 102 of the mounting substrate 1 .

[0043] The high-frequency module 100 further includes a second resin layer 8. The second resin layer 8 is disposed on the second main surface 102 of the mounting substrate 1, and covers the outer peripheral surface of the IC chip 2 and a portion of each of the plurality of external connection terminals 7. Note that the second resin layer 8 and the external shielding layer 6 are not shown in FIG.

[0044] (2.1) Mounting Board As shown in FIGS. 2 and 3 , the mounting board 1 has a first main surface 101 and a second main surface 102. The first main surface 101 and the second main surface 102 face each other. More specifically, the first main surface 101 and the second main surface 102 face each other in the thickness direction D1 of the mounting board 1. The mounting board 1 is a substrate on which multiple electronic components 4 are arranged, and is, for example, a rectangular plate. The first main surface 101 and the second main surface 102 are, for example, rectangular. When the high-frequency module 100 is arranged on an external board (e.g., a motherboard), the second main surface 102 of the mounting board 1 faces the external board. The mounting board 1 also has an outer peripheral surface 103. The outer peripheral surface 103 of the mounting board 1 includes four side surfaces connecting the outer edge of the first main surface 101 and the outer edge of the second main surface 102, but does not include the first main surface 101 or the second main surface 102.

[0045] The mounting substrate 1 has a plurality of dielectric layers (not shown) and a plurality of conductive layers (not shown). The mounting substrate 1 is, for example, a multilayer substrate having a plurality of dielectric layers and a plurality of conductive layers. The plurality of dielectric layers and the plurality of conductive layers are stacked in a thickness direction D1 of the mounting substrate 1.

[0046] Each of the plurality of conductive layers includes one or more conductor portions in a plane perpendicular to the thickness direction D1 of the mounting substrate 1. The plurality of conductive layers are formed in a predetermined pattern determined for each layer. Each conductive layer is made of, for example, copper. The mounting substrate 1 also has a plurality of via conductors.

[0047] The multiple conductive layers include a ground layer (not shown). The ground layer is a layer to which a ground potential (reference potential) is applied and is provided inside the mounting substrate 1. When the high-frequency module 100 is placed on an external substrate (e.g., a motherboard), the ground layer is connected to the ground of the external substrate through via conductors or the like that the mounting substrate 1 has and is maintained at the ground potential.

[0048] The mounting substrate 1 is, for example, a low temperature co-fired ceramic (LTCC) substrate. Note that the mounting substrate 1 is not limited to an LTCC substrate, and may be, for example, a printed wiring board, a high temperature co-fired ceramic (HTCC) substrate, or a resin multilayer substrate.

[0049] 2 and 3 is disposed on the second main surface 102 of the mounting substrate 1 so that the thickness direction D2 (see FIG. 4) of the IC chip 2 is parallel to the thickness direction D1 of the mounting substrate 1. "The thickness direction D2 of the IC chip 2 is parallel to the thickness direction D1 of the mounting substrate 1" is not limited to the case where they are strictly parallel, but also includes the case where the acute angle between the thickness direction D2 of the IC chip 2 and the thickness direction D1 of the mounting substrate 1 is 10 degrees or less.

[0050] The outer edge of the IC chip 2 is rectangular in plan view from the thickness direction D1 of the mounting substrate 1. The IC chip 2 is smaller than the mounting substrate 1 in plan view from the thickness direction D1 of the mounting substrate 1.

[0051] 4 and 5 , the IC chip 2 includes a substrate 20 having a first main surface 201 and a second main surface 202 facing each other, a multilayer structure 204 formed on the first main surface 201 of the substrate 20, and a plurality of external terminals 26. The first main surface 201 and the second main surface 202 face each other in the thickness direction D2 of the IC chip 2. In the IC chip 2, the first circuit 21, the second circuit 22, and the third circuit 23 are formed in the thickness direction D2 of the IC chip 2 across a region of the first main surface 201 and the second main surface 202 of the substrate 20 that includes only the first main surface 201 and the multilayer structure 204.

[0052] The substrate 20 is, for example, a semiconductor substrate. The semiconductor substrate is, for example, a silicon substrate. The semiconductor substrate is not limited to a silicon substrate, but may be an SOI (Silicon On Insulator) substrate. Furthermore, the semiconductor substrate is not limited to a silicon substrate, but may be a compound semiconductor substrate (for example, a GaAs substrate or a SiC substrate).

[0053] The multilayer structure 204 is formed on the first main surface 201 of the substrate 20. The multilayer structure 204 includes, for example, a plurality of wiring layers (not shown), an interlayer insulating film (not shown), a passivation film 241 (see FIG. 6 ), a pad electrode 243, and a resist layer 242. The plurality of wiring layers are formed in a predetermined pattern determined for each layer. Each of the plurality of wiring layers includes one or more wiring portions in a plane perpendicular to the thickness direction D2 of the IC chip 2.

[0054] 1, in addition to the first boundary region B1, the IC chip 2 has a second boundary region B2 and a third boundary region B3. The second boundary region B2 is a region between the first circuit 21 and the third circuit 23, and is longer in a direction along both the first circuit 21 and the third circuit 23 than it is wide in the direction in which the first circuit 21 and the third circuit 23 are arranged. The third boundary region B3 is a region between the second circuit 22 and the third circuit 23, and is longer in a direction along both the second circuit 22 and the third circuit 23 than it is wide in the direction in which the second circuit 22 and the third circuit 23 are arranged.

[0055] The plurality of external terminals 26 include a plurality of ground terminals G1 to G4, a plurality of first external terminals E1 connected to the first circuit 21, a plurality of second external terminals E2 connected to the second circuit 22, and a plurality of third external terminals E3 connected to the third circuit 23. In addition, in the IC chip 2 shown in Fig. 1, in a plan view from the thickness direction D1 of the mounting substrate 1, the ground terminal G2 overlaps a part of the first boundary region B1, the ground terminal G3 overlaps a part of the second boundary region B2, and the ground terminal G4 overlaps a part of the third boundary region B3.

[0056] Each of the external terminals 26 includes, for example, solder. In a plan view from the thickness direction D2 of the IC chip 2, the outer edge of each of the external terminals 26 is circular. As shown in FIG. 7 , each of the external terminals 26 includes, for example, a Ni layer 261 on a pad electrode 243 of the multilayer structure 204 (see FIG. 4 ), a Cu layer 262 on the Ni layer 261, and a solder portion 263 on the Cu layer 262. The solder is, for example, SnAg, but is not limited to SnAg and may be, for example, SnAgCu. Each of the external terminals 26 is a solder bump. Of the external terminals 26, the first external terminals E1, the second external terminals E2, and the third external terminals E3 are connected to conductor portions that overlap with each other in the thickness direction D1 of the mounting substrate 1. As shown in FIG. 6 , the ground terminal G1 is connected to a ground electrode 3 disposed on the second main surface 102 of the mounting substrate 1. 8 , the ground terminal G1 is brought into contact with the ground electrode 3 disposed on the second main surface 102 of the mounting substrate 1, and the solder portion 263 of the ground terminal G1 is melted by reflow to join the ground electrode 3 and the solder portion 263. The ground terminals G2 and G3 are connected to the ground electrode 3, similar to the ground terminal G1. The ground terminal G4 is connected to the second ground electrode 3A disposed on the second main surface 102 of the mounting substrate 1. Each of the multiple external terminals 26 is not limited to a solder bump, and may be, for example, a copper bump.

[0057] (2.3) Ground Electrode The first ground electrode 3 is disposed on the second main surface 102 of the mounting substrate 1, as shown in FIGS. 1 to 4 . The first ground electrode 3 overlaps a boundary region B1 between the first circuit 21 and the second circuit 22 in a plan view from the thickness direction D1 of the mounting substrate 1, and has a length in a direction parallel to both the first circuit 21 and the second circuit 22 that is longer than a width in a direction in which the first circuit 21 and the second circuit 22 are aligned. Furthermore, the first ground electrode 3 overlaps with the ground terminal G1 and the ground terminal G2 in a plan view from the thickness direction D1 of the mounting substrate 1. The first ground electrode 3 is connected to the ground terminal G1 and the ground terminal G2.

[0058] The first ground electrode 3 is L-shaped in a plan view from the thickness direction D1 of the mounting substrate 1. More specifically, in a plan view from the thickness direction D1 of the mounting substrate 1, the first ground electrode 3 not only overlaps a first boundary region B1 between the first circuit 21 and the second circuit 22, but also overlaps a second boundary region B2 between the first circuit 21 and the third circuit 23. In a plan view from the thickness direction D1 of the mounting substrate 1, the first ground electrode 3 surrounds the first circuit 21. In a plan view from the thickness direction D1 of the mounting substrate 1, the first ground electrode 3 overlaps the second boundary region B2 between the first circuit 21 and the third circuit 23, and has a length in a direction parallel to both the first circuit 21 and the third circuit 23 that is longer than a width in a direction parallel to the first circuit 21 and the third circuit 23. The first ground electrode 3 overlaps with the ground terminal G3. The first ground electrode 3 is connected to the ground terminal G3.

[0059] 1 and 3 , the second ground electrode 3A is disposed on the second main surface 102 of the mounting substrate 1. The second ground electrode 3A overlaps a third boundary region B3 between the second circuit 22 and the third circuit 23 in a plan view from the thickness direction D1 of the mounting substrate 1, and has a length in a direction along both the second circuit 22 and the third circuit 23 that is longer than a width in a direction in which the second circuit 22 and the third circuit 23 are aligned. The second ground electrode 3A also overlaps with the ground terminal G4 in a plan view from the thickness direction D1 of the mounting substrate 1. The second ground electrode 3A is connected to the ground terminal G4.

[0060] In this embodiment, the second ground electrode 3A is seamlessly connected to the first ground electrode 3. In this embodiment, the shape of the electrode including the first ground electrode 3 and the second ground electrode 3A is T-shaped when viewed from above in the thickness direction D1 of the mounting substrate 1. The second ground electrode 3A may be separated from the first ground electrode 3.

[0061] As shown in FIG. 4 , the first ground electrode 3 has a base end 31 and a tip end 32. The base end 31 contacts the second main surface 102 of the mounting substrate 1 in the thickness direction D1 of the mounting substrate 1. The tip end 32 has a width narrower than the width of the base end 31 in the direction in which the first circuits 21 and the second circuits 22 are aligned. In the first ground electrode 3, the tip end 32 contacts the multilayer structure 204 of the IC chip 2 in a region that does not overlap with the ground terminals G1 to G3, but it does not have to contact the multilayer structure 204 of the IC chip 2. As shown in FIG. 5 , the second ground electrode 3A has a base end 31A and a tip end 32A. The base end 31A contacts the second main surface 102 of the mounting substrate 1 in the thickness direction D1 of the mounting substrate 1. The tip end 32A has a width narrower than the width of the base end 31A in the direction in which the second circuits 22 and the third circuits 23 are aligned. In the second ground electrode 3A, in the area that does not overlap with the ground terminal G4, the tip 32A of the second ground electrode 3A is in contact with the multilayer structure portion 204 of the IC chip 2, but it does not have to be in contact with the multilayer structure portion 204 of the IC chip 2.

[0062] Each of the first ground electrode 3 and the second ground electrode 3A includes solder, and is a solder bump, but may also be a plated bump.

[0063] 2 and 3, a plurality of electronic components 4 are arranged on the first main surface 101 of the mounting substrate 1. "Electronic components 4 are arranged on the first main surface 101 of the mounting substrate 1" means that the electronic components 4 are mounted on (mechanically connected to) the first main surface 101 of the mounting substrate 1, and that the electronic components 4 are electrically connected to (appropriate conductor portions of) the mounting substrate 1.

[0064] In a plan view from the thickness direction D1 of the mounting substrate 1, the outer edge of each of the multiple electronic components 4 is, for example, rectangular. The multiple electronic components 4 include two matching circuits 141, 142 (see FIG. 10 ) and multiple receive filters F1 to F10 (see FIG. 10 ). Each of the multiple receive filters F1 to F10 is, for example, a SAW (Saw Acoustic Wave) filter, but is not limited to a SAW filter and may also be a BAW (Bulk Acoustic Wave) filter. Furthermore, at least one electronic component 4 of the multiple electronic components 4 may include two or more of the multiple receive filters F1 to F10.

[0065] (2.5) First Resin Layer The first resin layer 5 is disposed on the first main surface 101 of the mounting substrate 1, as shown in Figures 2 and 3, and covers the multiple electronic components 4. The first resin layer 5 has electrical insulation properties. The first resin layer 5 contains a resin (e.g., an epoxy resin). The first resin layer 5 may contain a filler in addition to the resin.

[0066] (2.6) External Shield Layer The external shield layer 6 covers the first resin layer 5 and the outer peripheral surface 103 of the mounting substrate 1. More specifically, the external shield layer 6 covers the main surface 51 of the first resin layer 5 opposite the mounting substrate 1 side, the outer peripheral surface 53 of the first resin layer 5, and the outer peripheral surface 103 of the mounting substrate 1. The external shield layer 6 also covers the outer peripheral surface 83 of the second resin layer 8. In the high-frequency module 100, the main surface 81 of the second resin layer 8 opposite the mounting substrate 1 side is not covered by the external shield layer 6 and is exposed.

[0067] The external shield layer 6 is electrically conductive. In the high-frequency module 100, the external shield layer 6 is provided, for example, for the purpose of electromagnetic shielding between the inside and outside of the high-frequency module 100. The external shield layer 6 has a multilayer structure in which multiple metal layers are stacked, but it may also be a single metal layer. The metal layer contains one or more types of metal. When the external shield layer 6 has a multilayer structure in which multiple metal layers are stacked, it includes, for example, a first stainless steel layer, a Cu layer on the first stainless steel layer, and a second stainless steel layer on the Cu layer. The material of each of the first stainless steel layer and the second stainless steel layer is an alloy containing Fe, Ni, and Cr. When the external shield layer 6 is a single metal layer, it is, for example, a Cu layer.

[0068] The external shield layer 6 is connected to an external ground terminal included in the plurality of external connection terminals 7 via a ground layer or the like of the mounting substrate 1 .

[0069] 1 and 2, the plurality of external connection terminals 7 are arranged on the second main surface 102 of the mounting substrate 1. "The external connection terminals 7 are arranged on the second main surface 102 of the mounting substrate 1" means that the external connection terminals 7 are mechanically connected to the mounting substrate 1, and that the external connection terminals 7 are electrically connected to (appropriate conductor portions of) the mounting substrate 1.

[0070] The external connection terminals 7 include an external ground terminal. The external ground terminal is, for example, a terminal electrically connected to a ground conductor portion of a motherboard included in the communication device 300 (see FIG. 10 ) and supplied with a ground potential. The external connection terminals 7 also include a first antenna terminal T1, a second antenna terminal T2, a signal output terminal T4, and a control terminal.

[0071] (2.8) Second Resin Layer As shown in FIGS. 2 and 3 , the second resin layer 8 is disposed on the second main surface 102 of the mounting substrate 1 and covers the IC chip 2. The second resin layer 8 also covers the side surfaces of each of the external connection terminals 7. The second resin layer 8 has electrical insulation properties. The second resin layer 8 contains a resin (e.g., epoxy resin). The second resin layer 8 may contain a filler in addition to the resin. The material of the second resin layer 8 is the same as the material of the first resin layer 5, but may be a different material. The second resin layer 8 does not cover the second main surface 202 (see FIG. 4 ) of the substrate 20 in the IC chip 2, but may cover the second main surface 202.

[0072] (3) Communication Device As shown in FIG. 10 , the communication device 300 includes, for example, a high-frequency module 100 and a signal processing circuit 301 to which the high-frequency module 100 is connected. The communication device 300 further includes a first antenna 311 and a second antenna 312. The communication device 300 further includes a motherboard (not shown) on which the high-frequency module 100 is mounted. The motherboard is, for example, a printed wiring board. The motherboard has a ground electrode to which a ground potential is applied. The high-frequency module 100 is configured to amplify received signals input from the first antenna 311 and the second antenna 312 and output the amplified signals to the signal processing circuit 301. The high-frequency module 100 is controlled, for example, by the signal processing circuit 301 included in the communication device 300.

[0073] The signal processing circuit 301 includes an RF signal processing circuit 302 and a baseband signal processing circuit 303. The RF signal processing circuit 302 is, for example, an RFIC (Radio Frequency Integrated Circuit) and performs signal processing on a high-frequency signal. The RF signal processing circuit 302 performs signal processing, such as up-conversion, on a high-frequency signal (transmission signal) output from the baseband signal processing circuit 303 and outputs the processed high-frequency signal. The RF signal processing circuit 302 also performs signal processing, such as down-conversion, on a high-frequency signal (reception signal) output from the high-frequency module 100 and outputs the processed high-frequency signal to the baseband signal processing circuit 303. The baseband signal processing circuit 303 is, for example, a BBIC (Baseband Integrated Circuit). The baseband signal processing circuit 303 generates an I-phase signal and a Q-phase signal from the baseband signal. The baseband signal is, for example, an audio signal or an image signal input from an external device. The baseband signal processing circuit 303 performs IQ modulation processing by combining the I-phase signal and the Q-phase signal, and outputs a transmission signal. At this time, the transmission signal is generated as a modulated signal (IQ signal) in which a carrier signal of a predetermined frequency is amplitude-modulated at a period longer than the period of the carrier signal. The received signal processed by the baseband signal processing circuit 303 is used, for example, as an image signal for image display or as an audio signal for a user call on the communication device 300.

[0074] (4) Effects The high-frequency module 100 according to the first embodiment includes a mounting substrate 1, an IC chip 2, and a ground electrode 3. The mounting substrate 1 has a first main surface 101 and a second main surface 102 that face each other. The IC chip 2 is disposed on the second main surface 102 of the mounting substrate 1. The ground electrode 3 is disposed on the second main surface 102 of the mounting substrate 1 and is located between the second main surface 102 of the mounting substrate 1 and the IC chip 2. The IC chip 2 includes a first circuit 21, a second circuit 22, a boundary region B1, and a ground terminal G1. The second circuit 22 can operate simultaneously with the first circuit 21. The boundary region B1 is a region between the first circuit 21 and the second circuit 22, and has a length in a direction parallel to both the first circuit 21 and the second circuit 22 that is longer than a width in a direction in which the first circuit 21 and the second circuit 22 are aligned. The ground terminal G1 overlaps a part of the boundary region B1 in a plan view from the thickness direction D1 of the mounting substrate 1, and is connected to the ground electrode 3. The ground electrode 3 overlaps the boundary region B1 between the first circuit 21 and the second circuit 22 in a plan view from the thickness direction D1 of the mounting substrate 1, and has a length in a direction along both the first circuit 21 and the second circuit 22 that is longer than a width in a direction in which the first circuit 21 and the second circuit 22 are arranged side by side.

[0075] According to the above configuration, it is possible to increase the area occupied by the first circuit 21 and the second circuit 22 while ensuring isolation between the first circuit 21 and the second circuit 22. More specifically, according to the above configuration, the ground electrode 3 overlaps the boundary region B1 between the first circuit 21 and the second circuit 22 in a plan view from the thickness direction D1 of the mounting substrate 1, and the length in the direction along both the first circuit 21 and the second circuit 22 is longer than the width in the direction in which the first circuit 21 and the second circuit 22 are aligned, thereby ensuring isolation between the first circuit 21 and the second circuit 22. Furthermore, because the ground electrode 3 is disposed on the second main surface 102 of the mounting substrate 1, the width of the boundary region B1 between the first circuit 21 and the second circuit 22 of the IC chip 2 can be narrower than in the case where a ground electrode is provided on the IC chip 2, and it is possible to increase the area occupied by each of the first circuit 21 and the second circuit 22 without increasing the chip size of the IC chip 2. Therefore, with the above configuration, it is possible to increase the area occupied by the first circuit 21 and the second circuit 22 while ensuring isolation between the first circuit 21 and the second circuit 22 .

[0076] In the high-frequency module 100 according to the first embodiment, the ground electrode 3 is L-shaped when viewed from above in the thickness direction D1 of the mounting substrate 1.

[0077] According to the above configuration, the first circuit 21 can be surrounded by the ground electrode 3, and it is possible to improve isolation between the first circuit 21 and the circuits (second circuit 22, third circuit 23) adjacent to the first circuit 21 via the ground electrode 3.

[0078] The high-frequency module 100 according to the first embodiment further includes an electronic component 4. The electronic component 4 is disposed on the first main surface 101 of the mounting substrate 1.

[0079] According to the above configuration, the high-frequency module 100 can be made smaller.

[0080] The communication device 300 according to the first embodiment includes the high-frequency module 100 and a signal processing circuit 301. The signal processing circuit 301 is connected to the high-frequency module 100.

[0081] According to the above configuration, it is possible to increase the area occupied by the first circuit 21 and the second circuit 22 while ensuring isolation between the first circuit 21 and the second circuit 22 .

[0082] Second Embodiment A high-frequency module 100A according to a second embodiment will be described with reference to Figures 11 and 12. Regarding the high-frequency module 100A according to the second embodiment, the same components as those in the high-frequency module 100 according to the first embodiment (see Figures 1 to 10) are denoted by the same reference numerals, and description thereof will be omitted.

[0083] (1) Structure of the High-Frequency Module The high-frequency module 100A according to the second embodiment differs from the high-frequency module 100 according to the first embodiment in that it further includes an external ground terminal T0 connected to the ground electrode 3.

[0084] The external ground terminal T0 is disposed on the second main surface 102 of the mounting substrate 1, does not overlap the IC chip 2 in the thickness direction D1 of the mounting substrate 1, and is connected to the ground electrode 3. The external ground terminal T0 is directly connected to the ground electrode 3 on the second main surface 102 of the mounting substrate 1.

[0085] (2) Effect: Like the high-frequency module 100 according to the first embodiment, the high-frequency module 100A according to the second embodiment can increase the area occupied by the first circuit 21 and the second circuit 22 while ensuring isolation between the first circuit 21 and the second circuit 22.

[0086] The high-frequency module 100A according to the second embodiment further includes an external ground terminal T0 connected to the ground electrode 3.

[0087] According to the above configuration, the potential of the ground electrode 3 can be further stabilized.

[0088] A high-frequency module 100B according to a third embodiment will be described with reference to Figures 13 to 15. With respect to the high-frequency module 100B according to the third embodiment, the same components as those in the high-frequency module 100 according to the first embodiment (see Figures 1 to 10) are denoted by the same reference numerals, and description thereof will be omitted.

[0089] (1) Circuit Configuration of High-Frequency Module The circuit configuration of the high-frequency module 100B will be described below with reference to FIG.

[0090] The high-frequency module 100B according to the third embodiment includes a plurality of low-noise amplifiers 61-64 (four in the illustrated example), a plurality of receive filters F11-F16 (six in the illustrated example), and a plurality of matching circuits 141-144 (four in the illustrated example). The high-frequency module 100B also includes an antenna switch 12, a plurality of input switches 41-44 (four in the illustrated example), and an output switch 9. The high-frequency module 100B also includes a digital control circuit 71 and a power supply circuit 72. The digital control circuit 71 controls the plurality of low-noise amplifiers 61-64, the antenna switch 12, the plurality of input switches 41-44, and the output switch 9 in accordance with, for example, a control signal from an RF signal processing circuit 302 of a communication device 300B. The power supply circuit 72 supplies power supply voltage to the plurality of low-noise amplifiers 61-64. The high-frequency module 100B also includes a plurality of external connection terminals 7 (see FIG. 1). The external connection terminals 7 include a first antenna terminal T1, a second antenna terminal T2, a plurality of (four in the illustrated example) signal output terminals T41 to T44, and an external ground terminal (not shown).

[0091] (1.1) Low-Noise Amplifiers The multiple low-noise amplifiers 61 to 64 amplify received signals in different frequency bands. The input terminal of the low-noise amplifier 61 is connected to the input switch 41 via a matching circuit 141 for impedance matching, and can be connected to the receive filters F11 to F16 via the input switch 41. The output terminal of the low-noise amplifier 61 is connected to a common terminal 90a of the output switch 9. The input terminal of the low-noise amplifier 62 is connected to the input switch 42 via a matching circuit 142 for impedance matching. The output terminal of the low-noise amplifier 62 is connected to a common terminal 90b of the output switch 9. The input terminal of the low-noise amplifier 63 is connected to the input switch 43 via a matching circuit 143 for impedance matching. The output terminal of the low-noise amplifier 63 is connected to a common terminal 90c of the output switch 9. The input terminal of the low-noise amplifier 64 is connected to the input switch 44 via a matching circuit 144 for impedance matching. The output terminal of the low-noise amplifier 64 is connected to a common terminal 90d of the output switch 9.

[0092] (1.2) Receiving Filters The receiving filters F11, ..., F16 are filters that pass received signals of different communication bands. The input terminals of the six receiving filters F11, ..., F16 are connected to the antenna switch 12.

[0093] (1.3) Antenna Switch The antenna switch 12 is a switch for switching the signal paths connected to the first antenna terminal T1 and the second antenna terminal T2. The antenna switch 12 has two common terminals 120a and 120b and a plurality of selection terminals 121 to 127 (seven in the illustrated example). The common terminal 120a is connected to the first antenna terminal T1. The common terminal 120b is connected to the second antenna terminal T2. The plurality of selection terminals 121 to 127 are connected to one of a plurality of reception filters F11 to F16.

[0094] The antenna switch 12 switches the connection state between the plurality of common terminals 120a, 120b and the plurality of selection terminals 121 to 127. The antenna switch 12 is controlled by a digital control circuit 71. The antenna switch 12 switches the connection state between the plurality of common terminals 120a, 120b and the plurality of selection terminals 121 to 127 in accordance with a control signal from the digital control circuit 71.

[0095] (1.4) Input Switch The input switch 41 has a common terminal 410 and a plurality of (two in the illustrated example) selection terminals 411 and 412. The common terminal 410 is connected to the low-noise amplifier 61 via a matching circuit 141. Each of the plurality of selection terminals 411 to 412 is connected to one of the plurality of receive filters F11 to F16. The input switch 42 has a common terminal 420 and a plurality of (three in the illustrated example) selection terminals 421 to 423. The common terminal 420 is connected to the low-noise amplifier 62 via a matching circuit 142. Each of the plurality of selection terminals 421 to 423 is connected to one of the plurality of receive filters F11 to F16. The input switch 43 has a common terminal 430 and a plurality of (two in the illustrated example) selection terminals 431 and 432. The common terminal 430 is connected to the low-noise amplifier 63 via a matching circuit 143. Each of the multiple selection terminals 431 to 432 is connected to one of the multiple reception filters F11 to F16. The input switch 44 has a common terminal 440 and multiple (three in the illustrated example) selection terminals 441 to 443. The common terminal 440 is connected to the low-noise amplifier 64 via a matching circuit 144. Each of the multiple selection terminals 441 to 443 is connected to one of the multiple reception filters F11 to F16.

[0096] The plurality of input switches 41 to 44 are controlled by a digital control circuit 71 .

[0097] (1.5) Matching Circuits Each of the multiple matching circuits 141 to 144 is a matching circuit for impedance matching. The matching circuit 141 is connected between the common terminal 410 of the input switch 41 and the input terminal of the low-noise amplifier 61. The matching circuit 142 is connected between the common terminal 420 of the input switch 42 and the input terminal of the low-noise amplifier 62. The matching circuit 143 is connected between the common terminal 430 of the input switch 43 and the input terminal of the low-noise amplifier 63. The matching circuit 144 is connected between the common terminal 440 of the input switch 44 and the input terminal of the low-noise amplifier 64.

[0098] (1.6) Output Switch The output switch 9 has a plurality of (four in the illustrated example) common terminals 90a to 90d and a plurality of (four in the illustrated example) selection terminals 91 to 94. The common terminals 90a to 90d are connected to the output terminals of the low-noise amplifiers 61 to 64, respectively. The selection terminals 91 to 94 are connected to the signal output terminals T41 to T44, respectively.

[0099] The output switch 9 switches the connection state between the plurality of common terminals 90a to 90d and the plurality of selection terminals 91 to 94. The output switch 9 is controlled by the digital control circuit 71. The output switch 9 switches the connection state between the plurality of common terminals 90a to 90d and the plurality of selection terminals 91 to 94 in accordance with a control signal from the digital control circuit 71.

[0100] (2) Structure of the High-Frequency Module As shown in Figures 14 and 15, the high-frequency module 100B includes a mounting substrate 1, an IC chip 2, and a ground electrode 3. The mounting substrate 1 has a first main surface 101 and a second main surface 102 that face each other. The IC chip 2 is disposed on the second main surface 102 of the mounting substrate 1. The ground electrode 3 is disposed on the second main surface 102 of the mounting substrate 1 and is located between the second main surface 102 of the mounting substrate 1 and the IC chip 2. The IC chip 2 includes a first circuit 21, a second circuit 22, a boundary region B1, and a ground terminal G1 (hereinafter also referred to as the first ground terminal G1). The second circuit 22 can operate simultaneously with the first circuit 21. The boundary region B1 (hereinafter also referred to as the first boundary region B1) is a region between the first circuit 21 and the second circuit 22, and has a length in a direction along both the first circuit 21 and the second circuit 22 longer than its width in the direction in which the first circuit 21 and the second circuit 22 are arranged. The first ground terminal G1 overlaps a part of the boundary region B1 in a plan view from the thickness direction D1 of the mounting substrate 1 (see FIG. 15 ), and is connected to the ground electrode 3. The ground electrode 3 overlaps the boundary region B1 between the first circuit 21 and the second circuit 22 in a plan view from the thickness direction D1 of the mounting substrate 1, and has a length in a direction along both the first circuit 21 and the second circuit 22 longer than its width in the direction in which the first circuit 21 and the second circuit 22 are arranged. The high-frequency module 100B further includes a ground electrode 3A (hereinafter also referred to as a second ground electrode 3A), a ground electrode 3B (hereinafter also referred to as a third ground electrode 3B), a ground electrode 3C (hereinafter also referred to as a fourth ground electrode 3C), a ground electrode 3D (hereinafter also referred to as a fifth ground electrode 3D), and a ground electrode 3E (hereinafter also referred to as a sixth ground electrode 3E), which are different from the ground electrode 3 (hereinafter also referred to as a first ground electrode 3). The second ground electrode 3A, the third ground electrode 3B, the fourth ground electrode 3C, the fifth ground electrode 3D, and the sixth ground electrode 3E are disposed on the second main surface 102 of the mounting substrate 1 and are positioned between the second main surface 102 of the mounting substrate 1 and the IC chip 2.

[0101] The IC chip 2 has a plurality of external terminals 26. The plurality of external terminals 26 include a first ground terminal G1, a second ground terminal G2, a third ground terminal G3, a fourth ground terminal G4, a fifth ground terminal G5, a sixth ground terminal G6, a seventh ground terminal G7, an eighth ground terminal G8, and a ninth ground terminal G9. In this embodiment, the first circuit 21 includes, for example, a DC circuit shown in FIG. 13 . The DC circuit includes a digital control circuit 71 and a power supply circuit 72.

[0102] In this embodiment, the second circuit 22 includes, for example, a high-frequency circuit having a circuit configuration shown in Fig. 13. The high-frequency circuit includes an antenna switch circuit 168. The antenna switch circuit 168 of the second circuit 22 includes an antenna switch 12 as shown in Fig. 13.

[0103] In this embodiment, the IC chip 2 further includes a plurality of (four in the illustrated example) receiving circuits 161 to 164 and an output switch 9. In this embodiment, each of the plurality of receiving circuits 161 to 164 constitutes a high-frequency circuit. The receiving circuit 161 includes an input switch 41, a matching circuit 141, and a low-noise amplifier 61, as shown in FIG. 13 . The receiving circuit 162 includes an input switch 42, a matching circuit 142, and a low-noise amplifier 62. The receiving circuit 163 includes an input switch 43, a matching circuit 143, and a low-noise amplifier 63. The receiving circuit 164 includes an input switch 44, a matching circuit 144, and a low-noise amplifier 64.

[0104] 15, the high-frequency module 100B further includes a plurality of electronic components 4. The plurality of electronic components 4 are arranged on the first main surface 101 of the mounting substrate 1.

[0105] The high-frequency module 100B further includes a first resin layer 5 and an outer shielding layer 6. The first resin layer 5 is disposed on the first main surface 101 of the mounting substrate 1 and covers the plurality of electronic components 4. The outer shielding layer 6 covers the first resin layer 5 and an outer peripheral surface 103 of the mounting substrate 1.

[0106] The high-frequency module 100B further includes a plurality of external connection terminals 7 arranged on the second main surface 102 of the mounting substrate 1 .

[0107] The high-frequency module 100B further includes a second resin layer 8. The second resin layer 8 is disposed on the second main surface 102 of the mounting substrate 1, and covers the outer peripheral surface of the IC chip 2 and a portion of each of the plurality of external connection terminals 7. Note that the second resin layer 8 and the external shielding layer 6 are not shown in FIG.

[0108] (2.1) Mounting Substrate As shown in FIG. 15, the mounting substrate 1 has a first main surface 101 and a second main surface 102 that face each other.

[0109] The mounting substrate 1 is, for example, an LTCC substrate. However, the mounting substrate 1 is not limited to an LTCC substrate, and may be, for example, a printed wiring board, an HTCC substrate, or a resin multilayer substrate.

[0110] 14 and 15 is disposed on the second main surface 102 of the mounting substrate 1 so that the thickness direction D2 of the IC chip 2 is parallel to the thickness direction D1 of the mounting substrate 1. "The thickness direction D2 of the IC chip 2 is parallel to the thickness direction D1 of the mounting substrate 1" is not limited to the case where they are strictly parallel, but also includes the case where the acute angle formed between the thickness direction D2 of the IC chip 2 and the thickness direction D1 of the mounting substrate 1 is 10 degrees or less.

[0111] The outer edge of the IC chip 2 is rectangular in plan view from the thickness direction D1 of the mounting substrate 1. The IC chip 2 is smaller than the mounting substrate 1 in plan view from the thickness direction D1 of the mounting substrate 1.

[0112] (2.3) Ground Electrodes In addition to the ground electrode 3, the high-frequency module 100B further includes a second ground electrode 3A, a third ground electrode 3B, a fourth ground electrode 3C, a fifth ground electrode 3D, and a sixth ground electrode 3E, which are arranged on the second main surface 102 of the mounting substrate 1.

[0113] In this embodiment, the first ground electrode 3 is L-shaped in a plan view from the thickness direction D1 of the mounting substrate 1, as in the first embodiment. The first ground electrode 3 is connected to the first ground terminal G1. The first ground electrode 3 overlaps not only a first boundary region B1 between the first circuit 21 and the second circuit 22, but also a second boundary region B1 between the first circuit 21 and the receiving circuit 161. The first ground electrode 3 surrounds the first circuit 21 in a plan view from the thickness direction D1 of the mounting substrate 1. The first ground electrode 3 overlaps the second boundary region B1 between the first circuit 21 and the receiving circuit 161 in a plan view from the thickness direction D1 of the mounting substrate 1, and has a length in a direction parallel to both the first circuit 21 and the receiving circuit 161 that is longer than a width in a direction in which the first circuit 21 and the receiving circuit 161 are aligned. The first ground electrode 3 overlaps with the ground terminals G2 and G3. The first ground electrode 3 is connected to the ground terminals G2 and G3.

[0114] The second ground electrode 3A is arranged to overlap a third boundary region between the second circuit 22 and the receiving circuit 164 in a plan view from the thickness direction D1 of the mounting substrate 1. The second ground electrode 3A overlaps the third boundary region between the first circuit 21 and the receiving circuit 164 in a plan view from the thickness direction D1 of the mounting substrate 1, and has a length in a direction along both the first circuit 21 and the receiving circuit 164 that is longer than a width in a direction in which the first circuit 21 and the receiving circuit 164 are aligned. The second ground electrode 3A overlaps with the ground terminal G4. The second ground electrode 3A is connected to the ground terminal G4.

[0115] The third ground electrode 3B is arranged so as to overlap a fourth boundary region between the receiving circuits 161 and 164 in a plan view from the thickness direction D1 of the mounting substrate 1. The third ground electrode 3B overlaps the fourth boundary region between the receiving circuits 161 and 164 in a plan view from the thickness direction D1 of the mounting substrate 1, and has a length in a direction along both the receiving circuits 161 and 164 that is longer than a width in a direction in which the receiving circuits 161 and 164 are aligned. The third ground electrode 3B overlaps with the ground terminal G5. The third ground electrode 3B is connected to the ground terminal G5.

[0116] The fourth ground electrode 3C is arranged so as to overlap a fifth boundary region between the receiving circuits 161 and 162 in a plan view from the thickness direction D1 of the mounting substrate 1. The fourth ground electrode 3C overlaps the fifth boundary region between the receiving circuits 161 and 162 in a plan view from the thickness direction D1 of the mounting substrate 1, and has a length in a direction along both the receiving circuits 161 and 162 that is longer than a width in a direction in which the receiving circuits 161 and 162 are aligned. The fourth ground electrode 3C overlaps with the ground terminal G6. The fourth ground electrode 3C is connected to the ground terminal G6.

[0117] The fifth ground electrode 3D is arranged so as to overlap a sixth boundary region between the receiving circuits 162 and 163 in a plan view from the thickness direction D1 of the mounting substrate 1. The fifth ground electrode 3D overlaps the sixth boundary region between the receiving circuits 162 and 163 in a plan view from the thickness direction D1 of the mounting substrate 1, and has a length in a direction along both the receiving circuits 162 and 163 that is longer than a width in a direction in which the receiving circuits 162 and 163 are aligned. The fifth ground electrode 3D overlaps with the ground terminals G7 and G8. The fifth ground electrode 3D is connected to the ground terminals G7 and G8.

[0118] The sixth ground electrode 3E is arranged so as to overlap a seventh boundary region between the receiving circuits 163 and 164 in a plan view from the thickness direction D1 of the mounting substrate 1. The sixth ground electrode 3E overlaps the seventh boundary region between the receiving circuits 163 and 164 in a plan view from the thickness direction D1 of the mounting substrate 1, and has a length in a direction along both the receiving circuits 163 and 164 that is longer than a width in a direction in which the receiving circuits 163 and 164 are aligned. The sixth ground electrode 3E overlaps with the ground terminal G9. The sixth ground electrode 3E is connected to the ground terminal G9.

[0119] (2.4) Electronic Components The electronic components 4 include a plurality of receiving filters F11 to F16.

[0120] (3) Communication Device The communication device 300B includes, for example, a high-frequency module 100B and a signal processing circuit 301 to which the high-frequency module 100B is connected, as shown in FIG. 13 . The communication device 300B further includes a first antenna 311 and a second antenna 312. The communication device 300B further includes a motherboard (not shown) on which the high-frequency module 100B is mounted. The motherboard is, for example, a printed wiring board. The motherboard has a ground electrode to which a ground potential is applied.

[0121] The high-frequency module 100B is configured, for example, to amplify received signals input from the first antenna 311 and the second antenna 312 and output the amplified signals to the signal processing circuit 301. The high-frequency module 100B is also configured, for example, to output a transmission signal input from an external high-frequency module to the first antenna 311. The high-frequency module 100B is controlled, for example, by the signal processing circuit 301 included in the communication device 300B.

[0122] The signal processing circuit 301 includes an RF signal processing circuit 302 and a baseband signal processing circuit 303. The RF signal processing circuit 302 is, for example, an RFIC (Radio Frequency Integrated Circuit) and performs signal processing on a high-frequency signal. The RF signal processing circuit 302 performs signal processing, such as up-conversion, on a high-frequency signal (transmission signal) output from the baseband signal processing circuit 303 and outputs the processed high-frequency signal. The RF signal processing circuit 302 also performs signal processing, such as down-conversion, on a high-frequency signal (reception signal) output from the high-frequency module 100B and outputs the processed high-frequency signal to the baseband signal processing circuit 303. The baseband signal processing circuit 303 is, for example, a BBIC (Baseband Integrated Circuit). The baseband signal processing circuit 303 generates an I-phase signal and a Q-phase signal from the baseband signal. The baseband signal is, for example, an audio signal or an image signal input from an external device. The baseband signal processing circuit 303 performs IQ modulation processing by combining the I-phase signal and the Q-phase signal, and outputs a transmission signal. At this time, the transmission signal is generated as a modulated signal (IQ signal) in which a carrier signal of a predetermined frequency is amplitude-modulated at a period longer than the period of the carrier signal. The received signal processed by the baseband signal processing circuit 303 is used, for example, as an image signal for image display or as an audio signal for a call by the user of the communication device 300B.

[0123] (4) Effect: Like the high-frequency module 100 according to the first embodiment, the high-frequency module 100B according to the third embodiment can increase the area occupied by the first circuit 21 and the second circuit 22 while ensuring isolation between the first circuit 21 and the second circuit 22.

[0124] Fourth Embodiment A high-frequency module 100C according to a fourth embodiment will be described with reference to Figures 16 to 18. With respect to the high-frequency module 100C according to the fourth embodiment, the same components as those in the high-frequency module 100 according to the first embodiment (see Figures 1 to 10) are denoted by the same reference numerals, and description thereof will be omitted.

[0125] (1) Circuit Configuration of High-Frequency Module The high-frequency module 100C is used in a communication device 300C, for example, as shown in Fig. 18. The communication device 300C is, for example, a mobile phone (e.g., a smartphone), but is not limited to a mobile phone and may be, for example, a wearable device (e.g., a smart watch).

[0126] The high-frequency module 100C includes a receiving circuit 181, a receiving filter circuit 182, a transmitting circuit 191, a transmitting filter circuit 192, an antenna switch 12, a first antenna terminal T1, a second antenna terminal T2, a first matching circuit 171, a second matching circuit 172, a digital control circuit 71, and a power supply circuit 72.

[0127] The receiving circuit 181 includes a plurality of low-noise amplifiers. Output terminals of the plurality of low-noise amplifiers are connected to the signal processing circuit 301. The receiving filter circuit 182 includes a plurality of receiving filters. The transmitting circuit 191 includes a plurality of power amplifiers. Input terminals of the plurality of power amplifiers are connected to the signal processing circuit 301. The transmitting filter circuit 192 includes a plurality of transmitting filters. The first matching circuit 171 includes an inductor for impedance matching. The second matching circuit 172 includes an inductor for impedance matching.

[0128] (2) Structure of the High-Frequency Module As shown in FIGS. 16 and 17 , the high-frequency module 100C includes a mounting substrate 1, an IC chip 2, and a ground electrode 3. The mounting substrate 1 has a first main surface 101 and a second main surface 102 that face each other. The IC chip 2 is disposed on the second main surface 102 of the mounting substrate 1. The ground electrode 3 is disposed on the second main surface 102 of the mounting substrate 1 and is located between the second main surface 102 of the mounting substrate 1 and the IC chip 2. The IC chip 2 includes a first circuit 21, a second circuit 22, a boundary region B1, and a ground terminal G1 (hereinafter also referred to as the first ground terminal G1). The second circuit 22 can operate simultaneously with the first circuit 21. The boundary region B1 (hereinafter also referred to as the first boundary region B1) is a region between the first circuit 21 and the second circuit 22, and is longer in a direction parallel to both the first circuit 21 and the second circuit 22 than in a width direction in which the first circuit 21 and the second circuit 22 are arranged. The first ground terminal G1 overlaps a part of the boundary region B1 in a plan view from the thickness direction D1 of the mounting substrate 1 (see FIG. 17 ), and is connected to the ground electrode 3. The ground electrode 3 overlaps the boundary region B1 between the first circuit 21 and the second circuit 22 in a plan view from the thickness direction D1 of the mounting substrate 1, and is longer in a direction parallel to both the first circuit 21 and the second circuit 22 than in a width direction in which the first circuit 21 and the second circuit 22 are arranged. The high-frequency module 100C further includes a second ground electrode 3A different from the ground electrode 3 (hereinafter also referred to as the first ground electrode 3). The second ground electrode 3A is disposed on the second main surface 102 of the mounting substrate 1 and is located between the second main surface 102 of the mounting substrate 1 and the IC chip 2 .

[0129] In the high-frequency module 100C, the first circuit 21 includes a receiving circuit 181 (see FIG. 18 ). The second circuit 22 includes a transmitting circuit 191 (see FIG. 18 ). The third circuit 23 includes a digital control circuit 71 and a power supply circuit 72, as shown in FIG. 18 .

[0130] 18 , the communication device 300C includes a high-frequency module 100C, a first antenna 311, a second antenna 312, and a signal processing circuit 301. The communication device 300C is configured to, for example, amplify a transmission signal input from the signal processing circuit 301 to the transmission circuit 191 and output the amplified signal to the first antenna 311 or the second antenna 312. The communication device 300C is also configured to amplify a reception signal input from the first antenna 311 or the second antenna 312 to the high-frequency module 100C by the reception circuit 181 and output the amplified signal to the signal processing circuit 301.

[0131] The signal processing circuit 301 includes, for example, an RF signal processing circuit 302 and a baseband signal processing circuit 303 .

[0132] (4) Effect: Like the high-frequency module 100 according to the first embodiment, the high-frequency module 100C according to the fourth embodiment can increase the area occupied by the first circuit 21 and the second circuit 22 while ensuring isolation between the first circuit 21 and the second circuit 22.

[0133] (Modifications) The above-described first to fourth embodiments are merely examples of various embodiments of the present invention. The above-described first to fourth embodiments can be modified in various ways depending on the design and the like, and may be combined as appropriate, as long as the object of the present invention can be achieved.

[0134] For example, in the high-frequency modules 100, 100A, 100B, and 100C, the width of the ground electrode 3 in the direction in which the first circuit 21 and the second circuit 22 are arranged may be narrower than the width of the ground terminal G1.

[0135] In the high-frequency modules 100, 100A, and 100C, the first circuit 21, the second circuit 22, and the third circuit 23 may be interchanged, and the ground electrode 3 and the ground electrode 3A may be interchanged. In the high-frequency module 100B, one of the receiving circuits 161 to 164 in FIG. 14 may constitute the first circuit 21, and an adjacent receiving circuit may constitute the second circuit 22. In this case, the first circuit 21 and the second circuit 22 each include a high-frequency circuit, the high-frequency circuit included in the first circuit 21 includes a receiving circuit, and the high-frequency circuit included in the second circuit 22 includes a receiving circuit. In this case, instead of the ground electrode 3, one of the ground electrodes 3B to 3E constitutes a ground electrode overlapping the boundary region between the first circuit 21 and the second circuit 22.

[0136] Furthermore, in the high-frequency modules 100 , 100 A, 100 B, and 100 C, the second main surface 202 of the substrate 20 in the IC chip 2 is exposed, but may be covered with the second resin layer 8 .

[0137] The external connection terminals 7 may have a cylindrical shape. In this case, the material of the external connection terminals 7 includes, for example, copper.

[0138] Furthermore, the high-frequency modules 100, 100A, 100B, and 100C are double-sided mounting modules in which a plurality of electronic components 4 are arranged on the first main surface 101 of the mounting substrate 1, and an IC chip 2 and a plurality of external connection terminals 7 are arranged on the second main surface 102 of the mounting substrate 1, but they may also be single-sided mounting modules in which a plurality of electronic components 4 are arranged together with the IC chip 2 on the second main surface 102 of the mounting substrate 1, and a plurality of external connection terminals 7 are arranged on the first main surface 101 of the mounting substrate 1.

[0139] (Aspects) The present specification discloses the following aspects.

[0140] A high-frequency module (100; 100A; 100B; 100C) according to a first aspect includes a mounting substrate (1), an IC chip (2), and a ground electrode (3). The mounting substrate (1) has a first main surface (101) and a second main surface (102) that face each other. The IC chip (2) is disposed on the second main surface (102) of the mounting substrate (1). The ground electrode (3) is disposed on the second main surface (102) of the mounting substrate (1) and is located between the second main surface (102) of the mounting substrate (1) and the IC chip (2). The IC chip (2) includes a first circuit (21), a second circuit (22), a boundary region (B1), and a ground terminal (G1). The second circuit (22) can operate simultaneously with the first circuit (21). The boundary region (B1) is a region between the first circuit (21) and the second circuit (22), and its length in a direction along both the first circuit (21) and the second circuit (22) is longer than its width in the direction in which the first circuit (21) and the second circuit (22) are arranged. The ground terminal (G1) overlaps a part of the boundary region (B1) in a plan view from the thickness direction (D1) of the mounting substrate (1), and is connected to the ground electrode (3). The ground electrode (3) overlaps the boundary region (B1) between the first circuit (21) and the second circuit (22) in a plan view from the thickness direction (D1) of the mounting substrate (1), and its length in a direction along both the first circuit (21) and the second circuit (22) is longer than its width in the direction in which the first circuit (21) and the second circuit (22) are arranged.

[0141] According to this aspect, it is possible to increase the area occupied by the first circuit (21) and the second circuit (22) while ensuring isolation between the first circuit (21) and the second circuit (22).

[0142] In the high-frequency module (100; 100A; 100B; 100C) according to the second aspect, in the first aspect, the ground electrode (3) is L-shaped when viewed in a plan view from the thickness direction (D1) of the mounting substrate (1).

[0143] According to this aspect, it is possible to further improve the isolation between the first circuit (21) and the second circuit (22).

[0144] A high-frequency module (100A) according to a third aspect is the high-frequency module (100A) according to the first or second aspect, further comprising an external ground terminal (T0). The external ground terminal (T0) is disposed on the second main surface (102) of the mounting substrate (1), does not overlap the IC chip (2) in the thickness direction (D1) of the mounting substrate (1), and is connected to the ground electrode (3).

[0145] According to this aspect, the potential of the ground electrode (3) can be further stabilized.

[0146] In a high-frequency module (100; 100A) according to a fourth aspect, in any one of the first to third aspects, the ground electrode (3) has a base end (31) and a tip end (32). The base end (31) is in contact with the second main surface (102) of the mounting substrate (1) in the thickness direction (D1) of the mounting substrate (1). The tip end (32) has a width narrower than the width of the base end (31) in the direction in which the first circuit (21) and the second circuit (22) are aligned.

[0147] According to this aspect, it is possible to increase the area occupied by each of the first circuit (21) and the second circuit (22) in plan view in the thickness direction (D1) of the mounting board (1).

[0148] In a high-frequency module (100) according to a fifth aspect, in the fourth aspect, the ground electrode (3) includes solder.

[0149] According to this aspect, the ground electrode (3) can be easily formed.

[0150] In the high-frequency module (100; 100A; 100B; 100C) according to the sixth aspect, in any one of the first to third aspects, the width of the ground electrode (3) in the direction in which the first circuit (21) and the second circuit (22) are arranged is narrower than the width of the ground terminal (G1).

[0151] According to this aspect, it is possible to increase the area occupied by each of the first circuit (21) and the second circuit (22) in plan view in the thickness direction (D1) of the mounting board (1).

[0152] In a high-frequency module (100; 100A) according to a seventh aspect, in any one of the first to sixth aspects, the first circuit (21) includes a DC circuit (a digital control circuit 71, a power supply circuit 72), and the second circuit (22) includes a high-frequency circuit (a receiving circuit 160, an antenna switch circuit 168, and receiving circuits 161 to 164).

[0153] According to this aspect, it is possible to ensure isolation between the DC circuits (digital control circuit 71, power supply circuit 72) included in the first circuit (21) and the high-frequency circuits (receiving circuit 160; antenna switch circuit 168; receiving circuits 161 to 164) included in the second circuit (22).

[0154] In a high-frequency module (100) according to an eighth aspect, in the seventh aspect, the DC circuit includes a digital control circuit (71). The high-frequency circuit includes a receiving circuit (160; 161 to 164).

[0155] According to this aspect, it is possible to ensure isolation between the digital control circuit (71) included in the first circuit (21) and the receiving circuit (160; 161 to 164) included in the second circuit (22).

[0156] In a high-frequency module (100) according to a ninth aspect, in the seventh aspect, the DC circuit includes a digital control circuit (71). The high-frequency circuit includes an antenna switch circuit (168).

[0157] According to this aspect, it is possible to ensure isolation between the digital control circuit (71) included in the first circuit (21) and the antenna switch circuit (168) included in the second circuit (22).

[0158] In a high-frequency module (100; 100A; 100B; 100C) according to a tenth aspect, in any one of the first to sixth aspects, the first circuit (21) includes a first high-frequency circuit (receiving circuit 181). The second circuit (22) includes a second high-frequency circuit (transmitting circuit 191).

[0159] According to this aspect, it is possible to ensure isolation between the first high-frequency circuit (receiving circuit 181) included in the first circuit (21) and the second high-frequency circuit (transmitting circuit 191) included in the second circuit (22).

[0160] In a high-frequency module (100B) according to an eleventh aspect, in the tenth aspect, the first circuit (21) includes a first receiving circuit (161; 162; 163; 164). The second circuit (22) includes a second receiving circuit (162, 163; 161, 163; 162, 164; 161, 163).

[0161] According to this aspect, it is possible to ensure isolation between the first receiving circuit (161; 162; 163; 164) included in the first circuit (21) and the second receiving circuit (162, 163; 161, 163; 162, 164; 161, 163) included in the second circuit (22).

[0162] In a high-frequency module (100B) according to a twelfth aspect, in the tenth aspect, the first circuit (21) includes a receiving circuit (161; 162; 163; 164), and the second circuit (22) includes an antenna switch circuit (168).

[0163] According to this aspect, it is possible to ensure isolation between the receiving circuit included in the first circuit (21) and the antenna switch circuit (168) included in the second circuit (22).

[0164] In a high-frequency module (100C) according to a thirteenth aspect, in the tenth aspect, the first circuit (21) includes a receiving circuit (181), and the second circuit (22) includes a transmitting circuit (191).

[0165] According to this aspect, it is possible to ensure isolation between the receiving circuit (181) included in the first circuit (21) and the transmitting circuit (191) included in the second circuit (22).

[0166] A high-frequency module (100; 100A; 100B) according to a fourteenth aspect is any one of the first to thirteenth aspects, further comprising an electronic component (4). The electronic component (4) is disposed on the first main surface (101) of the mounting substrate (1).

[0167] According to this aspect, it is possible to reduce the size of the high frequency module (100; 100A; 100B).

[0168] A communication device (300; 300B; 300C) according to a fifteenth aspect includes the high-frequency module (100; 100A; 100B; 100C) according to any one of the first to fourteenth aspects, and a signal processing circuit (301). The signal processing circuit (301) is connected to the high-frequency module (100; 100A; 100B; 100C).

[0169] According to this aspect, it is possible to increase the area occupied by the first circuit (21) and the second circuit (22) while ensuring isolation between the first circuit (21) and the second circuit (22).

[0170] DESCRIPTION OF SYMBOLS 1 Mounting substrate 101 First main surface 102 Second main surface 103 Outer peripheral surface 2 IC chip 21 First circuit 22 Second circuit 23 Third circuit 26 External terminal 201 First main surface 202 Second main surface 3 Ground electrode (first ground electrode) 31 Base end 32 Tip 3A Second ground electrode 3B Third ground electrode 3C Fourth ground electrode 3D Fifth ground electrode 3E Sixth ground electrode 4 Electronic component 5 First resin layer 51 Main surface 53 Outer peripheral surface 6 External shield layer 7 External connection terminal 8 Second resin layer 81 Main surface 83 Outer peripheral surface 111, 112 Matching circuit 12 First switch (antenna switch) 120a, 120b Common terminal 121 to 130 Selection terminal 13a Second switch 130a Common terminal 131 to 138 Selection terminals 13b Third switch 130b Common terminal 139, 140 Selection terminal 15 Fourth switch 150 Common terminal 151, 152 Selection terminal 17 First low-pass filter 18 Second low-pass filter 19 Attenuator 71 Digital control circuit 72 Power supply circuit 100, 100A, 100B, 100C High-frequency module 141 to 144 Matching circuit 160 Receiving circuit 161, 162, 163, 164 Receiving circuit 168 Antenna switch circuit 181 Receiving circuit 182 Receiving filter circuit 191 Transmitting circuit 192 Transmitting filter circuit 300, 300B, 300C Communication device 301 Signal processing circuit 302 RF signal processing circuit 303 Baseband signal processing circuit 311 First antenna 312 Second antenna A1 Low noise amplifier A2 Low noise amplifier B1 Boundary area D1 Thickness direction D2 Thickness direction G1 Ground terminal G2 Ground terminal G3 Ground terminal G4 Ground terminal T0 External ground terminal T1 First antenna terminal T2 Second antenna terminal T4 Signal output terminal E1 First external terminal E2 Second external terminal E3 Third external terminal

Claims

1. A high-frequency module comprising: a mounting board having first and second main surfaces opposing each other; an IC chip disposed on the second main surface of the mounting board; and a ground electrode disposed on the second main surface of the mounting board and located between the second main surface of the mounting board and the IC chip, wherein the IC chip has: a first circuit; a second circuit capable of operating simultaneously with the first circuit; a boundary region between the first circuit and the second circuit, the boundary region having a length along both the first circuit and the second circuit longer than its width in the direction in which the first circuit and the second circuit are aligned; and a ground terminal overlapping part of the boundary region in a plan view from the thickness direction of the mounting board and connected to the ground electrode, wherein the ground electrode overlaps the boundary region between the first circuit and the second circuit in a plan view from the thickness direction of the mounting board, and has a length along both the first circuit and the second circuit longer than its width in the direction in which the first circuit and the second circuit are aligned.

2. The high-frequency module according to claim 1, wherein the ground electrode is L-shaped when viewed from above in the thickness direction of the mounting board.

3. The high-frequency module according to claim 1 or 2, further comprising an external ground terminal that is disposed on the second main surface of the mounting substrate, does not overlap the IC chip in the thickness direction of the mounting substrate, and is connected to the ground electrode.

4. A high-frequency module according to any one of claims 1 to 3, wherein the ground electrode has a base end that contacts the second main surface of the mounting board in the thickness direction of the mounting board, and a tip end that has a width narrower than the width of the base end in the direction in which the first circuit and the second circuit are aligned.

5. The high frequency module according to claim 4, wherein the ground electrode includes solder.

6. The high-frequency module according to any one of claims 1 to 3, wherein the width of the ground electrode in the direction in which the first circuit and the second circuit are arranged is narrower than the width of the ground terminal.

7. The high frequency module according to any one of claims 1 to 6, wherein the first circuit includes a DC circuit, and the second circuit includes a high frequency circuit.

8. The high-frequency module according to claim 7, wherein the DC circuit includes a digital control circuit, and the high-frequency circuit includes a receiving circuit.

9. The high-frequency module according to claim 7, wherein the DC circuit includes a digital control circuit, and the high-frequency circuit includes an antenna switch circuit.

10. The high frequency module according to any one of claims 1 to 6, wherein the first circuit includes a first high frequency circuit, and the second circuit includes a second high frequency circuit.

11. The high frequency module according to claim 10, wherein the first circuit includes a first receiving circuit, and the second circuit includes a second receiving circuit.

12. The high frequency module according to claim 10, wherein the first circuit includes a receiving circuit, and the second circuit includes an antenna switch circuit.

13. The high frequency module according to claim 10, wherein the first circuit includes a receiving circuit, and the second circuit includes a transmitting circuit.

14. The high-frequency module according to any one of claims 1 to 13, further comprising an electronic component disposed on the first main surface of the mounting substrate.

15. A communication device comprising: a high-frequency module according to any one of claims 1 to 14; and a signal processing circuit connected to the high-frequency module.

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