Circuit board

Abstract

This circuit board comprises: a build-up structure in which a plurality of insulating layers are stacked; and bonding parts disposed on one surface of the build-up structure, wherein each bonding part comprises a first portion, a second portion disposed on one surface of the first portion, and a third portion disposed on one surface of the second portion, and the horizontal width of the second portion is smaller than the horizontal width of each of the first portion and the third portion.

Description

circuit board

[0001] This embodiment relates to a circuit board.

[0002]

[0003] Electronic components employed in electronic devices include various active and passive circuit elements, and these circuit elements may be integrated into semiconductor chips or dies. Furthermore, the semiconductor chips or dies may be provided in the form of electronic packages mounted on a substrate including circuit wiring, such as a printed circuit board (PCB).

[0004] Meanwhile, flip-chip connection structures, which utilize connection structures to mount and electrically connect semiconductor chips on printed circuit boards, are widely used in electronic packages. For example, flip-chip connection structures utilizing bumps are advantageous for implementing stacked structures of various semiconductor chips. Furthermore, flip-chip connection structures facilitate the use of multiple connection structures to secure a large number of input / output (I / O) terminals.

[0005] Among the methods for forming such connection structures, there is the Solder-On-Pad (SOP) method. The SOP method manufactures connection structures by printing metallic paste or mounting ball-shaped solder on the connection pads on the upper surface of a printed circuit board exposed by a solder mask pattern, and then reflowing to form a spherical solder portion through the surface tension effect. However, as the integration level of semiconductor chips increases and their size decreases, there is a problem that the SOP method has limitations in implementing connection members with fine pitches.

[0006] Recently, a method of introducing a post-shaped bump as a connecting member has been proposed, but as the spacing between multiple pads is increasingly reduced for integration, the short-circuit defect rate between adjacent pads is increasing.

[0007]

[0008] The present invention provides a circuit board in which fine pitch implementation is easy in a plurality of bonding portion arrangement structures in which electrical connections are made.

[0009]

[0010] A circuit board according to the present embodiment includes a build-up structure in which a plurality of insulating layers are laminated; and a bonding portion arranged on one surface of the build-up structure, wherein the bonding portion includes a first portion, a second portion arranged on one surface of the first portion, and a third portion arranged on one surface of the second portion, and a horizontal width of the second portion is smaller than a horizontal width of the first portion and a horizontal width of the third portion.

[0011] A groove is arranged on the side of the above bonding portion, and the groove can overlap with the second portion in a horizontal direction.

[0012] The horizontal width of the first part may be greater than the horizontal width of the third part.

[0013] The horizontal width of the first part may be the same as the horizontal width of the third part.

[0014] The surface of the third part may be a curved surface with an outwardly protruding shape.

[0015] The surface of the third section may be a curved surface with a concave shape toward the second section.

[0016] The vertical length of the second part may be longer than the vertical length of the first part and the vertical length of the third part.

[0017] The vertical length of the third part may be shorter than the vertical length of the first part and the vertical length of the second part.

[0018] The second part and the third part are each provided in multiples and can be spaced apart horizontally from the surface of the first part.

[0019] The second part and the third part may have an area that overlaps in the horizontal direction.

[0020]

[0021] This embodiment has the advantage of easily implementing a plurality of fine pitch bonding portions on the surface of a build-up structure through a plurality of regions having different horizontal widths of the bonding portions.

[0022]

[0023] Figure 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention.

[0024] FIG. 2 is an enlarged view showing the bonding structure of a build-up structure and a bonding portion according to an embodiment of the present invention.

[0025] Figures 3 to 9 are drawings illustrating the shape of a bonding portion according to various embodiments of the present invention.

[0026] Figures 10 to 18 are drawings for explaining the process of forming a bonding portion in a circuit board according to an embodiment of the present invention.

[0027] FIG. 19 is a drawing showing the arrangement structure of semiconductor elements in a circuit board according to an embodiment of the present invention.

[0028]

[0029] Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the attached drawings.

[0030] However, the technical idea of ​​the present invention is not limited to some of the embodiments described, but can be implemented in various different forms, and within the scope of the technical idea of ​​the present invention, one or more of the components between the embodiments can be selectively combined or substituted for use.

[0031] In addition, terms (including technical and scientific terms) used in the embodiments of the present invention may be interpreted as having a meaning that can be generally understood by a person of ordinary skill in the technical field to which the present invention belongs, unless explicitly and specifically defined and described, and terms that are commonly used, such as terms defined in a dictionary, may be interpreted in consideration of the contextual meaning of the relevant technology.

[0032] In addition, the terms used in the embodiments of the present invention are for the purpose of describing the embodiments and are not intended to limit the present invention. In this specification, the singular may also include the plural unless specifically stated in the phrase, and when it is described as “A and / or at least one (or more) of B, C,” it may include one or more of all combinations that can be combined with A, B, and C.

[0033] Additionally, in describing components of embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used.

[0034] These terms are intended only to distinguish one component from another, and are not intended to limit the nature, order, or sequence of the component.

[0035] And, when a component is described as being 'connected', 'coupled' or 'connected' to another component, it may include not only cases where the component is directly connected, coupled or connected to the other component, but also cases where the component is 'connected', 'coupled' or 'connected' by another component between the component and the other component.

[0036] Furthermore, when a component is described as being "exposed," it should not only mean that it is exposed to the exterior of the invention as defined in the present invention, but also that it is exposed to another component other than that component. That is, when it is described that B contained in A is exposed from A, it should not only mean that B is exposed to the exterior of the invention as defined in the present invention, but also that it is covered by another component, C, unless there are special circumstances.

[0037] Additionally, when it is described as being formed or arranged "above or below" each component, "above" or "below" includes not only cases where the two components are in direct contact with each other, but also cases where one or more other components are formed or arranged between the two components. Also, when it is expressed as "above" or "below", it can include the meaning of the downward direction as well as the upward direction based on one component.

[0038] Additionally, the expression that configuration A is positioned between configurations B and C should also include the meaning that configuration A is positioned so that it overlaps configurations B and C at least partially in the horizontal and / or vertical directions.

[0039] Expressions referring to directions include horizontal directions, vertical directions, and include a first horizontal direction and a second horizontal direction perpendicular to the first horizontal direction. These are referred to as a first horizontal direction (X-axis), a second horizontal direction (Y-axis), and a vertical direction (Z-axis) according to the Cartesian coordinate system, and the meaning of overlapping along the horizontal direction should also include the meaning of overlapping along the first horizontal direction and / or overlapping along the second horizontal direction.

[0040] Furthermore, with respect to a single component, the terms "one side" and "the other side" should refer to the upper and lower surfaces, respectively, or should include the side surfaces between the upper and lower surfaces. Furthermore, when "one side" refers to a side surface, unless otherwise specified, it should be understood that there are multiple sides. For example, if a rectangular solid has four sides between the upper and lower surfaces, for convenience of explanation, "one side" and / or "the other side" should be understood to refer to one of the four sides.

[0041] FIG. 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention, and FIG. 2 is an enlarged view of the bonding structure of a build-up structure and a bonding portion according to an embodiment of the present invention.

[0042] Referring to FIGS. 1 and 2, a circuit board (10) according to an embodiment of the present invention may include a build-up structure (100) and a bonding portion (200).

[0043] The build-up structure (100) may include a plurality of insulating layers. The plurality of insulating layers may be arranged in a vertical direction. For example, the plurality of insulating layers may include a first insulating layer (101), a second insulating layer (102) arranged on an upper surface of the first insulating layer (101), a third insulating layer (103) arranged on an upper surface of the second insulating layer (102), a fourth insulating layer (104) arranged on an upper surface of the third insulating layer (103), a fifth insulating layer (105) arranged on an upper surface of the fourth insulating layer (104), a sixth insulating layer (106) arranged on an upper surface of the fifth insulating layer (105), a seventh insulating layer (107) arranged on an upper surface of the sixth insulating layer (106), and an eighth insulating layer (108) arranged on an upper surface of the seventh insulating layer (107). The first to eighth insulating layers (101, 102, 103, 104, 105, 106, 107, 108) can be laminated along the vertical direction.

[0044] The first to eighth insulating layers (101, 102, 103, 104, 105, 106, 107, 108) may each be any insulator, such as photocurable and / or thermosetting. As the thermosetting insulator, an insulator in which inorganic and / or organic fillers are dispersed in a resin, such as ABF (Ajinomoto Build-up Film), a product released by Ajinomoto Co., Ltd., may be used, and a prepreg (PPG) including glass fibers in a resin may be used. In addition, the resin described above may be, for example, an epoxy resin, a bismaleimide triazine resin (BT resin), a phenol resin, etc., and the inorganic and / or organic fillers may be provided with a material such as silica or plastic. When an insulating resin is used as a core, a reinforcing material provided with glass fibers or aramid fibers may be included. When the first to eighth insulating layers (101, 102, 103, 104, 105, 106, 107, 108) are photocurable insulators, the first to eighth insulating layers (101, 102, 103, 104, 105, 106, 107, 108) may each be a PID (Photo Imageable Dielectric).

[0045] The plurality of insulating layers may be formed of the same material, but alternatively, the material of at least one insulating layer among the plurality of insulating layers may be different from the material of the other insulating layers. Here, the meaning of the material being different includes the meaning of the composition or the content of a specific material being different. In addition, although not illustrated, a core layer (not illustrated) may be provided at the vertical center of the plurality of insulating layers to form the basis of the circuit board (10). The core layer may be omitted.

[0046] A circuit board (10) may include a circuit pattern for transmitting electrical signals and / or power to electronic devices such as semiconductor devices. The circuit pattern may include a plurality of wiring portions and a plurality of via portions.

[0047] A plurality of wiring portions may be respectively arranged on the surfaces of the plurality of insulating layers. Here, "arranged on the surface" may not only mean that the plurality of wiring portions are respectively arranged on the surfaces of the plurality of insulating layers, but may also mean that at least a portion of the plurality of wiring portions are buried within the plurality of insulating layers or protective layers and exposed to the outside from the surface. Since the wiring portions have the function of transmitting electrical signals or power, they may also be called conductive layers. "Arranged on the surface" means that the wiring portions are respectively arranged on at least one of one surface, the other surface, and the side surfaces of the plurality of insulating layers. The structure may have wiring portions arranged on one surface and the other surface of some of the plurality of insulating layers, and the structure may have wiring portions arranged on only one surface or the other surface of other portion of the plurality of insulating layers.

[0048] The plurality of wiring portions may include a first wiring portion (111) disposed on the upper surface of the first insulating layer (101), a second wiring portion (112) disposed on the upper surface of the second insulating layer (102), a third wiring portion (113) disposed on the upper surface of the third insulating layer (103), a fourth wiring portion (114) disposed on the upper surface of the fourth insulating layer (104), a fifth wiring portion (115) disposed on the upper surface of the fifth insulating layer (105), a sixth wiring portion (116) disposed on the upper surface of the sixth insulating layer (106), a seventh wiring portion (117) disposed on the upper surface of the seventh insulating layer (107), and an eighth wiring portion (118) disposed on the upper surface of the eighth insulating layer (108). The first to eighth wiring sections (111, 112, 113, 114, 115, 116, 117, 118) may each be arranged to vertically overlap at least one other wiring section. The eighth wiring section (118) arranged on the upper surface of the build-up structure (100) may be referred to as a pad section. The eighth wiring section (118) may be provided in multiple numbers and may be arranged to be spaced apart from each other in the horizontal direction on the upper surface of the build-up structure (100).

[0049] The via portion may be a metal material arranged in a via hole formed in each of a plurality of insulating layers to connect a plurality of wiring portions or wiring portions and a bonding portion (200) facing each other in a vertical direction. Here, the via hole may vertically penetrate at least a portion of each of the plurality of insulating layers, and the via portion may be arranged within the via hole.

[0050] The via portion may include a first via portion (121) penetrating at least a portion of the first insulating layer (101), a second via portion (122) penetrating at least a portion of the second insulating layer (102), a third via portion (123) penetrating at least a portion of the third insulating layer (103), a fourth via portion (124) penetrating at least a portion of the fourth insulating layer (104), a fifth via portion (125) penetrating at least a portion of the fifth insulating layer (105), a sixth via portion (126) penetrating at least a portion of the sixth insulating layer (106), a seventh via portion (127) penetrating at least a portion of the seventh insulating layer (107), and an eighth via portion (128) penetrating at least a portion of the eighth insulating layer (108).

[0051] The first via portion (121) can electrically connect the first wiring portion (111) and the bonding portion (200). The second via portion (122) can electrically connect the first wiring portion (111) and the second wiring portion (112). The third via portion (123) can electrically connect the second wiring portion (112) and the third wiring portion (113). The fourth via portion (124) can electrically connect the third wiring portion (113) and the fourth wiring portion (114). The fifth via portion (125) can electrically connect the fourth wiring portion (114) and the fifth wiring portion (115). The sixth via portion (126) can electrically connect the fifth wiring portion (115) and the sixth wiring portion (116). The seventh via section (127) can electrically connect the sixth wiring section (116) and the seventh wiring section (117). The eighth via section (128) can electrically connect the seventh wiring section (117) and the eighth wiring section (118).

[0052] The first to fourth via sections (121, 122, 123, 124) may each have a shape in which the horizontal width increases as they go downward. The fifth to eighth via sections (125, 126, 127, 128) may each have a shape in which the horizontal width decreases as they go downward.

[0053] The circuit board (10) may include a bonding portion (200). The bonding portion (200) may be arranged on one surface of the build-up structure (100). For example, the bonding portion (200) may be arranged on the lower surface of the build-up structure (100), but is not limited thereto, and the bonding portion (200) may also be arranged on the upper surface of the build-up structure (100). The bonding portion (200) may be coupled to a semiconductor element. The bonding portion (200) may be electrically connected to the first wiring portion (111) through the first via portion (121).

[0054] As illustrated in Fig. 2, a plurality of bonding portions (200) may be provided and spaced apart horizontally. In this case, a pattern portion (290) may be arranged between a plurality of adjacent bonding portions (200). When the plurality of bonding portions (200) arranged on both sides of the pattern portion (290) are respectively named a first bonding portion and a second bonding portion, the horizontal separation distance between the first bonding portion and the pattern portion (290) may be the same as the horizontal separation distance between the second bonding portion and the pattern portion (290). Accordingly, the separation distance between the pattern portion (290) and the plurality of bonding portions is secured, thereby preventing an electrical short circuit from occurring.

[0055] The bonding portion (200) may include a first portion (210), a second portion (220) arranged on one side of the first portion (210), and a third portion (230) arranged on one side of the second portion (220). The first to third portions (210, 220, 230) may be arranged sequentially along the vertical direction. The second portion (220) may be arranged between the first portion (210) and the third portion (230).

[0056] The first part (210) can be arranged to overlap the pattern part (290) in a horizontal direction.

[0057] In this case, the horizontal width (d2) of the second part (220) may be smaller than the horizontal width (d1) of the first part (210) or the horizontal width (d3) of the third part (230).

[0058] In a circuit board according to the prior art, a single bonding portion having a certain width is provided on a pad placed on the surface of a build-up structure, and since a certain width of the pad is required for forming the bonding portion, there was a problem in that it was difficult to secure a pitch between adjacent pads.

[0059] According to the present embodiment, by arranging a second portion (220) having a smaller width than the first portion (210) on the first portion (210) and arranging a third portion (230) having a larger width than the second portion (220) on the second portion (220), a wide bonding area with a semiconductor element can be secured through the surface of the third portion (230), and the horizontal width of the first portion (210) can also be reduced compared to the prior art, so there is an advantage in that it is easy to implement fine misalignment of a plurality of first portions (210) arranged on the surface of the build-up structure (100).

[0060] On the side connecting one side and the other side of the bonding portion (200), a groove (229) having a concave shape compared to the other area can be arranged corresponding to the formation area of ​​the second portion (220).

[0061] The surface of the third portion (230) may be flat, but alternatively, a plurality of step surfaces having different vertical lengths from one surface of the build-up structure (100) may be arranged on the surface of the third portion (230). In this case, the bonding portion (200) may have improved bonding strength with the molding portion, which will be described later, due to an increase in the contact area with the molding portion that surrounds the bonding portion (200).

[0062] The vertical length (H2) of the second portion (220) may be longer than the vertical length (H1) of the first portion (210) or the vertical length (H3) of the third portion (230). Accordingly, by adjusting the length of the bonding portion (200) through the second portion (220) having a relatively small horizontal width, a sufficient horizontal separation distance from the adjacent pattern portion (290) or bonding portion (200) can be secured.

[0063] The vertical length (H1) of the first part (210) may be the same as the vertical length (H3) of the third part (230).

[0064] In FIG. 2, a single second part (220) and a single third part (230) are formed on a single first part (210) as an example, but this is not limited thereto, and as shown in FIG. 1, a plurality of second parts (220) and third parts (230) spaced apart in the horizontal direction may be arranged on a single first part (210), and in this case, a wider bonding area with a semiconductor element may be secured.

[0065] A seed layer (260) may be disposed between the insulating layer of the build-up structure (100) and the bonding portion (200). The seed layer (260) may be disposed on one surface of the first insulating layer (101) on which the bonding portion (200) is disposed, and within the via hole. The bonding portion (200) and the first via portion (121) may be formed through the seed layer (260). The seed layer (260) may include a surface area (262) disposed on the surface of the first insulating layer (101), and a via area (264) disposed within the via hole of the first insulating layer (101). The surface area (262) and the via area (264) may be connected.

[0066] The surface area (262) may be arranged to overlap vertically with the first portion (210) or the third portion (230). The via area (264) may be arranged to overlap vertically with the second portion (220).

[0067] The horizontal width of the seed layer (260) may be formed to be equal to or smaller than the horizontal width of the first portion (210) of the bonding portion (200). When the horizontal width of the seed layer (260) is smaller than the horizontal width of the first portion (210), a concave groove may be formed on the side surface of the first portion (210). The groove formed on the side surface of the first portion (210) may be arranged to overlap the seed layer (260) in the horizontal direction.

[0068] FIGS. 3 to 9 are drawings illustrating the shapes of bonding portions according to various embodiments of the present invention. For convenience of explanation, various embodiments of the bonding portion (200) will be described by taking as an example a case where the bonding portion (200) is arranged on the upper surface of the build-up structure (100).

[0069] Referring to Fig. 3, the upper surface of the third portion (230) may be a curved surface. For example, the upper surface of the third portion (230) may be a convex surface (232) that is convex upward. In this case, the vertical length of the third portion (230) may be longer than the vertical length of the first portion (210) or the vertical length of the second portion (220). Due to the shape of the convex surface (232) of the third portion (230), the bonding portion (200) may include a plurality of regions having different vertical lengths from the semiconductor element.

[0070] A connecting member such as solder for electrical and physical bonding may be placed between the bonding member (200) and the semiconductor element. In this case, the bonding strength may be improved as the contact area between the connecting member and the bonding member (200) increases due to the shape of the convex surface (232) of the bonding member (200).

[0071] As a variation, the upper surface of the third portion (230) may be a concave surface that is concave in the direction toward the build-up structure (100), in which case the concave surface may be arranged at the horizontal center of the upper surface of the third portion (230). Accordingly, a bonding surface with a semiconductor element can be implemented through the edge of the upper surface of the third portion (230), and the bonding strength with the semiconductor element can be improved by securing an area for arranging a connecting member within the concave surface.

[0072] Referring to FIG. 4, the horizontal length (d1) of the first portion (210) may be formed to be longer than the horizontal length (d3) of the third portion (230). Accordingly, the horizontal length (d3) of the third portion (230) may be longer than the horizontal length (d2) of the second portion (220) and shorter than the horizontal length (d1) of the first portion (210). Accordingly, the horizontal distance between the plurality of third portions (230) forming the bonding surface of the semiconductor element may be formed to be long, and a bonding space for forming the second portion (220) and the third portion (230) on the first portion (210) may be secured more widely.

[0073] Referring to FIG. 5, the vertical length (H3) of the third portion (230) may be shorter than the vertical length (H1) of the first portion (210) or the vertical length (H2) of the second portion (220). Accordingly, when viewed from the side, the formation area of ​​the third portion (230) may have a shape that protrudes horizontally from the upper end of the formation area of ​​the second portion (220). Accordingly, compared to the various shapes of the bonding portion (200) described above, when the semiconductor element is bonded to the third portion (230), deformation of the third portion (230) may be minimized, thereby improving bonding strength with the semiconductor element.

[0074] Referring to Fig. 6, the second part (220) and the third part (230) may have an area that overlaps in a horizontal direction. A first protrusion (225) that protrudes upward is disposed on the upper surface of the second part (220), and the first protrusion (225) may be disposed to overlap at least a portion of the third part (230) in a horizontal direction. A first groove (235) to which the first protrusion (225) is coupled may be disposed on the lower surface of the third part (230) facing the first protrusion (225). The upper surface of the first protrusion (225) and the first groove (235) may each have a curved shape.

[0075] Referring to Fig. 7, a second protrusion (236) having a downwardly protruding shape may be arranged on the lower surface of the third portion (230). The second protrusion (236) may be arranged to overlap at least a portion of the second portion (220) in a horizontal direction. A second groove (226) to which the second protrusion (236) is coupled may be arranged on the upper surface of the second portion (220) facing the second protrusion (236). The lower surface of the second protrusion (236) and the second groove (226) may each have a curved shape.

[0076] Referring to Fig. 8, the first part (210) and the second part (220) may have an area that overlaps in a horizontal direction. A third protrusion (227) having a shape that protrudes downward is arranged on the lower surface of the second part (220), and the third protrusion (227) may be arranged to overlap horizontally with at least a portion of the first part (210). A third groove (217) to which the third protrusion (227) is coupled may be arranged on the upper surface of the first part (210) facing the third protrusion (227). The lower surface of the third protrusion (227) and the third groove (217) may each have a curved shape.

[0077] Referring to Fig. 9, a fourth protrusion (218) protruding upwardly may be arranged on the upper surface of the first portion (210). The fourth protrusion (218) may be arranged to overlap at least a portion of the second portion (220) in a horizontal direction. A fourth groove (228) to which the fourth protrusion (218) is coupled may be arranged on the lower surface of the second portion (220) facing the fourth protrusion (218). The fourth protrusion (218) and the fourth groove (228) may each have a curved shape.

[0078] Accordingly, as in each of the embodiments illustrated in FIGS. 6 to 9, the bonding strength between a plurality of regions arranged in the vertical direction can be improved through the horizontal overlapping region between the first part (210) and the second part (220) or the second part (220) and the third part (230).

[0079] FIGS. 10 to 18 are drawings for explaining the process of forming a bonding portion in a circuit board according to an embodiment of the present invention.

[0080] Referring to FIG. 10, as described above, the build-up structure (100) may include a plurality of insulating layers. For example, the build-up structure (100) includes a first insulating layer (101) and a second insulating layer (102), and the first insulating layer (101) may be formed on the surface of the second insulating layer (102) on which the first wiring portion (111) and the second via portion (122) are formed.

[0081] Referring to Fig. 11, a via hole (310) may be formed for forming a first via portion (121) within the first insulating layer (111). The via holes (310) may be formed in an area vertically overlapping with the first wiring portion (111). Next, as illustrated in Fig. 12, a surface of the first insulating layer (101) and a seed layer (320) within the via hole (310) may be plated for forming the bonding portion (200) and the first via portion (121).

[0082] Referring to FIG. 13, a first portion (210) and a first via portion (121) may be formed on the surface of the first insulating layer (101) on which the seed layer (320) is formed. The first portion (210) and the first via portion (121) may be formed through a first mask (330) attached to the surface of the first insulating layer (101). In this case, a groove pattern corresponding to the arrangement area of ​​the first portion (210) and the pattern portion (290) is implemented in the first mask (330), and as illustrated in FIG. 14, the first portion (210) and the first via portion (121) may be formed in the first insulating layer (101), respectively, through plating within the groove pattern of the first mask (330).

[0083] Next, as illustrated in FIG. 15, a second mask (340) is attached to the surface of the build-up structure (100) on which the first portion (210) is formed, and the second mask (340) may include a hole pattern (342) corresponding to the formation area of ​​the second portion (220). In this case, the horizontal width of the hole of the second mask (340) may be smaller than the horizontal width of the hole of the first mask (330) described above. Thereafter, as illustrated in FIG. 16, the second portion (220) may be formed on the first portion (210) by surface plating of the build-up structure (100) on which the second mask (340) is attached.

[0084] Next, as illustrated in FIG. 17, a third mask (350) is attached to the surface of the build-up structure (100) on which the second portion (220) is formed, and the third mask (350) may include a hole pattern (352) corresponding to the formation area of ​​the third portion (230). In this case, the horizontal width of the hole of the third mask (350) may be larger than the horizontal width of the hole of the second mask (340) described above. Thereafter, as illustrated in FIG. 18, the third portion (230) may be formed on the second portion (220) by surface plating of the build-up structure (100) on which the third mask (350) is attached.

[0085] FIG. 19 is a drawing showing the arrangement structure of semiconductor elements in a circuit board according to an embodiment of the present invention.

[0086] Referring to Fig. 19, semiconductor elements may be arranged on the circuit board (10). For example, the semiconductor elements may include a first semiconductor element (1000), a second semiconductor element (200), a third semiconductor element (3000), and a fourth semiconductor element (4000). Among these, the first semiconductor element (1000) may be arranged on one surface of the build-up structure (100) on which the bonding portion (200) is arranged, and the second to fourth semiconductor elements (2000, 3000, 4000) may be arranged on the other surface of the build-up structure (100). At least one of the second to fourth semiconductor elements (2000, 3000, 4000) arranged on the other surface of the build-up structure (100) may have a region that vertically overlaps the bonding portion (200).

[0087] The first semiconductor element (1000) may be coupled to a connection pad disposed on one surface of the build-up structure (100). The first semiconductor element (1000) may be coupled to the connection pad via a connecting member such as a solder ball. In this case, a plurality of bonding portions (2000) disposed on one surface of the build-up structure (100) may be disposed around the first semiconductor element (1000). For example, the first semiconductor element (1000) may be disposed between the plurality of bonding portions (200), and may be disposed such that at least a portion of the first semiconductor element (1000) overlaps the bonding portions (200) along a horizontal direction.

[0088] Molding parts (191, 192) may be arranged on one side and the other side of the build-up structure (100), respectively. The molding parts (191, 192) may be made of a different material from the insulating layer.

[0089] The molding portion (191, 192) may include a first molding portion (192) arranged on one surface of the build-up structure (100) and a second molding portion (191) arranged on the other surface of the build-up structure (100). The first molding portion (192) has a predetermined thickness in the vertical direction, and the bonding portion (200) and the first semiconductor element (1000) may be wrapped by the first molding portion (192). The second molding portion (191) has a predetermined thickness in the vertical direction, and the second to fourth semiconductor elements (2000, 3000, 4000) may be wrapped by the second molding portion (191).

[0090] Although all components constituting the embodiments of the present invention have been described above as being combined or operating in combination, the present invention is not necessarily limited to these embodiments. That is, within the scope of the purpose of the present invention, all components may be selectively combined and operated one or more times. In addition, terms such as "include," "comprise," or "have" described above, unless specifically stated to the contrary, mean that the corresponding component may be inherent, and therefore should be interpreted as including other components rather than excluding other components. All terms, including technical or scientific terms, have the same meaning as generally understood by a person of ordinary skill in the art to which the present invention pertains, unless otherwise defined. Commonly used terms, such as terms defined in a dictionary, should be interpreted as being consistent with the contextual meaning of the related technology, and shall not be interpreted in an ideal or excessively formal sense, unless explicitly defined in the present invention.

[0091] The above description is merely an illustrative description of the technical idea of ​​the present invention, and those skilled in the art will appreciate that various modifications and variations may be made without departing from the essential characteristics of the present invention. Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the technical idea of ​​the present invention, and the scope of the technical idea of ​​the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted by the following claims, and all technical ideas within a scope equivalent thereto should be interpreted as being included in the scope of the rights of the present invention.

[0092] Meanwhile, when a circuit board having the characteristics of the invention described above is used in IT devices such as smartphones, server computers, TVs, or home appliances, it can stably perform functions such as signal transmission or power supply. For example, when a circuit board having the characteristics of the invention performs a semiconductor package function, it can safely protect semiconductor chips from external moisture or contaminants, and can solve problems such as leakage current or electrical shorts between terminals, or electrical open circuits in terminals supplying semiconductor chips. Furthermore, when it performs a signal transmission function, it can solve noise problems. Through this, the circuit board having the characteristics of the invention described above can maintain the stable function of IT devices or home appliances, thereby enabling the entire product and the circuit board to which the invention is applied to achieve functional integration or technical interoperability with each other.

[0093] When a circuit board having the characteristics of the invention described above is used in a transportation device such as a vehicle, it can solve the problem of signal distortion transmitted to the transportation device, safely protect the semiconductor chip controlling the transportation device from external sources, and solve the problem of leakage current or electrical short circuit between terminals, or electrical open of the terminal supplying the semiconductor chip, thereby further improving the stability of the transportation device. Accordingly, the transportation device and the circuit board to which the present invention is applied can achieve functional integration or technical interoperability with each other.

Claims

1. A build-up structure in which multiple insulating layers are laminated; and Including a bonding portion arranged on one side of the above build-up structure, The bonding portion includes a first portion, a second portion arranged on one side of the first portion, and a third portion arranged on one side of the second portion. A circuit board in which the horizontal width of the second part is smaller than the horizontal width of the first part and the horizontal width of the third part.

2. In paragraph 1, A groove is arranged on the side of the above bonding portion, The above home is a circuit board that is horizontally overlapped with the second part.

3. In paragraph 1, A circuit board in which the horizontal width of the first part is greater than the horizontal width of the third part.

4. In paragraph 1, A circuit board in which the horizontal width of the first part is the same as the horizontal width of the third part.

5. In paragraph 1, The surface of the third part above is a circuit board having a curved shape that protrudes outward.

6. In paragraph 1, A circuit board in which the surface of the third section is a curved surface with a concave shape toward the second section.

7. In paragraph 1, A circuit board in which the vertical length of the second part is longer than the vertical length of the first part and the vertical length of the third part.

8. In paragraph 1, A circuit board in which the vertical length of the third part is shorter than the vertical length of the first part and the vertical length of the second part.

9. In paragraph 1, A circuit board having the second and third sections respectively in multiples and spaced apart in a horizontal direction from the surface of the first section.

10. In paragraph 1, A circuit board having the second and third sections overlapping in a horizontal direction.

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