Waveguide and heater containing membrane located over etched trench and method of making thereof
The SSC with a tapered waveguide core and cladding materials addresses high coupling losses in optical systems by matching mode sizes, achieving low-loss optical signal transport in quantum computing systems.
Patent Information
- Application Number
- PCT/US2025/044155
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-08-30
- Filing Date
- 2025-08-29
- Publication Date
- 2026-03-05
AI Technical Summary
Existing optical systems face high coupling losses at interfaces between optical fibers and photonic integrated circuits, which are unsuitable for transporting optical signals in quantum computing systems where single photons or entangled photons are generated, manipulated, and detected.
A spot size converter (SSC) with a cantilever having a tapered waveguide core surrounded by primary and secondary cladding materials is used to match the mode sizes of optical fibers and waveguides, reducing coupling losses through thermal control and mechanical support.
The SSC achieves coupling losses of less than 30 mdB/facet, enabling low-loss optical signal transport in quantum computing systems and maintaining mechanical robustness at cryogenic temperatures.
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Figure US2025044155_05032026_PF_FP_ABST
Abstract
Description
Attorney Docket No.: 35113-0613WOWAVEGUIDE AND HEATER CONTAINING MEMBRANE LOCATED OVER ETCHED TRENCH AND METHOD OF MAKING THEREOFInventors: Alexey VERT; Stanley BURGOS; and Vimal KAMINENIBACKGROUND
[0001] Photonic integrated circuits (“PIC”), such as silicon photonic integrated circuits, can be used in many systems, such as quantum communication systems and optical quantum computing systems. These quantum mechanics-based systems are distinguished from “classical” systems by their reliance on quantum states, such as quantum bits (qubits). To achieve the desired functions and performance, a quantum mechanics-based system may integrate many passive and active photonic devices, modules, and subsystems into the same system. For example, an optical quantum computer may need to integrate passive and active photonic integrated circuits and other optical and electrical components, such as optical fibers or other low-loss optical interconnects, control circuits, and classical processing units, into a same system, to reliably generate, manipulate (e.g., entangle), and detect hundreds, thousands, or even millions of qubits for computing and error corrections, while achieving the desired functions and performance.SUMMARY
[0002] In one embodiment, an optical device includes a substrate, a membrane located over the substrate, a first waveguide core and at least one heater element embedded in the membrane, trenches extending parallel to the membrane on opposite lateral sides of membrane, and an undercut located under at least a portion of the membrane and connected to the trenches. In another embodiment, a method includes forming a waveguide core and a heater element in a membrane layer on a substrate; forming trenches in the membrane layer parallel to the waveguide core and the heater element, the trenches extending through the membrane to the substrate; and removing a portion of the substrate under the membrane layer containing the waveguide core and the heater element via the trenches to form an undercut in the substrate and to pattern the membrane layer into a membrane containing the waveguide core and the heater element suspended over the undercut.
[0003] This summary is neither intended to identify key or essential features of the claimed subject matter, nor is it intended to be used in isolation to determine the scope of the claimed subject matter. The subject matter should be understood by reference to appropriateAttorney Docket No.: 35113-0613WO portions of the entire specification of this disclosure, any or all drawings, and each claim. The foregoing, together with other features and examples, will be described in more detail below in the following specification, claims, and accompanying drawings.BRIEF DESCRIPTION OF THE DRAWINGS
[0004] Aspects of the present disclosure are illustrated by way of example. Non-limiting and non-exhaustive aspects are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various figures unless otherwise specified.
[0005] FIG. 1 A is a top view of an example of an optical module including a photonic integrated circuit die coupled to optical fibers according to certain embodiments.
[0006] FIG. IB is a cross-sectional view of the example package shown in FIG. 1 A according to certain embodiments.
[0007] FIG. 1C is another across-sectional view of the example package shown in FIG.1 A according to certain embodiments.
[0008] FIG. 2 is a simplified block diagram of an example of a quantum computing system according to some embodiments.
[0009] FIG. 3 illustrates an example of a subsystem for generating entangled quantum states (e.g., resource states or logical qubits) according to certain embodiments.
[0010] FIG. 4A is a top view of an example of a wafer-scale module including multiple EPIC die stacks on a handle wafer according to certain embodiments.
[0011] FIG. 4B illustrates an example of a system including multiple wafer-scale modules interconnected using optical fibers according to certain embodiments.
[0012] FIG. 5 is a cross-sectional view of an example of a wafer-scale module according to certain embodiments.
[0013] FIGS. 6A-6C illustrate an example of a structure including a spot size converter according to certain embodiments.
[0014] FIG. 7A illustrates an example of a spot size converter according to certain embodiments.Attorney Docket No.: 35113-0613WO
[0015] FIG. 7B illustrates simulated coupling efficiencies of examples of spot size converters having different core sizes according to certain embodiments.
[0016] FIG. 8 illustrates an example of a structure that includes a spot size converter having a lower-index secondary cladding layer according to certain embodiments.
[0017] FIGS. 9A-9C illustrate an example of a structure including a spot size converter according to certain embodiments.
[0018] FIGS. 10 A- 10C illustrate another example of a structure including a spot size converter according to certain embodiments.
[0019] FIG. 11 A illustrates an example of a mode field of a guided optical mode in an optical fiber according to certain embodiments.
[0020] FIG. 1 IB illustrates an example of a mode field of a guided optical mode converted by a spot size converter according to certain embodiments.
[0021] FIG. 12A illustrates an example of a spot size converter including a lower-index secondary cladding layer according to certain embodiments.
[0022] FIG. 12B includes a curve showing the simulated coupling efficiency of an example of a spot size converter as a function of the primary cladding layer thickness.
[0023] FIG. 13 A illustrates the simulated coupling efficiency of an example of a spot size converter as a function of the width of a tapered core of the spot size converter at the smaller end and the height (and width) of a primary cladding layer of the spot size converter according to certain embodiments.
[0024] FIG. 13B illustrates the simulated coupling efficiency of an example of a spot size converter as a function of the width of a tapered core of the spot size converter at the smaller end according to certain embodiments.
[0025] FIG. 13C illustrates the simulated coupling efficiency of an example of a spot size converter as a function of the height (and width) of a primary cladding layer of the spot size converter according to certain embodiments.
[0026] FIG. 14 illustrates the simulated coupling efficiency of an example of a spot size converter as a function of the refractive index contrast between the primary cladding layer and the secondary cladding layer of the spot size converter according to certain embodiments.Attorney Docket No.: 35113-0613WO
[0027] FIGS. 15A and 15B illustrate an example of a spot size converter including a lower-index secondary cladding layer according to certain embodiments. FIG. 15C illustrates the simulated coupling efficiency of an example of a spot size converter as a function of a gap between an optical fiber and the spot size converter or the recess of a tapered core of the spot size converter from the tip of spot size converter according to certain embodiments.
[0028] FIGS. 16A-16C illustrate examples of spot size converters according to certain embodiments.
[0029] FIG. 17A illustrates an example of an array of spot size converters for coupling light between an array of optical fibers and an array of waveguides according to certain embodiments.
[0030] FIGS. 17B and 17C illustrate an example of a spot size converter in the array of spot size converters of FIG. 17A according to certain embodiments.
[0031] FIG. 18 illustrates an example of a structure including a spot size converter and a heater according to certain embodiments.
[0032] FIG. 19 is a flowchart illustrating an example of a process for fabricating a low- loss spot size converter for optically coupling an optical fiber to an optical waveguide according to certain embodiments.
[0033] FIG. 20 is a simplified block diagram of an example of a system including two or more dies or wafers according to certain embodiments.
[0034] FIGS. 21 A to 21C illustrate side cross-sectional views of steps in an etching process for a waveguide membrane according to certain embodiments.
[0035] FIGS. 22 A to 22B illustrate top views of a waveguide membrane with heater elements according to certain embodiments.
[0036] FIG. 23 illustrates a vertical cross sectional view of a portion of the waveguide membrane and a heater element with connectors according to certain embodiments.
[0037] FIG. 24 illustrates a top view of the waveguide membrane with an inset of the connection arrangement of the waveguide and heater elements according to certain embodiments.
[0038] FIG. 25 illustrates a partially see-through top view of the waveguide membrane according to certain embodiments.Attorney Docket No.: 35113-0613WO
[0039] FIG. 26 illustrates a perspective view of the waveguide membrane and undercut according to certain embodiments.
[0040] FIG. 27 illustrates a plot of temperature versus distance according to certain embodiments.
[0041] FIG. 28 illustrates a schematic view of a photon phase shifter according to various embodiments.DETAILED DESCRIPTION
[0042] Techniques disclosed herein relate generally to coupling light between optical fibers and photonic integrated circuits. More specifically, disclosed herein are techniques for reducing coupling losses at interfaces between optical fibers and components in the photonic integrated circuits (e.g., waveguides) to, for example, about 30 mdB / facet or lower, in order to reduce the total loss in a system (e.g., an optical quantum computing system) that may include many fiber links between modules. Various inventive embodiments are described herein, including methods, processes, systems, devices, circuits, packages, modules, units, wafers, dies, networks, cells, and the like.
[0043] Many optical systems may integrate passive and active photonic integrated circuits and other optical and electrical components, such as optical fibers or other low-loss optical interconnects. These circuits and components may have different dimensions and other properties (e.g., refractive indices). Therefore, light may propagate in these circuits and components in optical modes having different mode sizes. Optical couplers, such as spot size converters or other mode converters, may be used to connect these circuits and components. In a system that may include many of these optical couplers on a same signal path, the total loss caused by these couplers may be high. Thus, these optical couplers may not be suitable for transporting optical signals in, for example, optical quantum computing systems where single photons or entangled photons are generated, manipulated, transported, and detected.
[0044] According to certain embodiments, to match the mode sizes of an optical fiber (e.g., a single mode fiber) and a waveguide thereby reducing the coupling loss at the interface between the optical fiber and the waveguide, a coupler including a spot size converter (SSC) that includes a cantilever having a tapered waveguide core (e.g., SiN or Si) surrounded by a primary cladding material (e.g., oxide) layer and a secondary cladding material (e.g., an epoxy or a low K dielectric) having a slightly lower refractive index than the primaryAttorney Docket No.: 35113-0613WO cladding material may be used to gradually change the mode size of the optical mode to match the mode sizes of the optical fiber and the waveguide. The tapered waveguide core of the cantilever may be tapered linearly or nonlinearly. In some embodiments, the refractive index contrast between the primary cladding material and the secondary cladding material may be within a certain range (e.g., between about 0.0015 and about 0.01 or higher).
[0045] In some embodiments, the SSC may have an inversely tapered (or straight and then inversely tapered) primary cladding layer for the waveguide. In some embodiments, the SSC may include a thermal controller (e.g., a heater) configured to adjust the local temperature and thus the index contrast between the primary cladding material and the secondary cladding material at a room temperature or at cryogenic temperatures. In some embodiments, additional oxide structures may be used to connect the tip of the cantilever to other oxide regions to provide better mechanical support and reliability. In some embodiments, the waveguide (e.g., SiN waveguide) can be vertically off-centered in an oxide (e.g., SiCh) slab or a square-shaped waveguide. Parameters such as dimensions of the tapered waveguide, dimensions of the primary cladding, and the index contrast can be selected to achieve better performance.
[0046] Techniques disclosed herein can drastically reduce the coupling loss, for example, to less than about 30 mdB / facet or lower (e.g., about 7 mdB / facet). The SSC disclosed herein can also achieve polarization independent coupling, can be used at cryogenic temperatures, and can be mechanically robust, and thus can be used in optical quantum computing systems, optical quantum communication systems, or other systems that need very low-loss coupling between fibers and waveguides. The SSC disclosed herein may be used to couple photons from an optical fiber to a waveguide, from a waveguide to an optical fiber, from one waveguide to another waveguide, and the like, by matching the optical mode fields of the optical components to be connected.
[0047] As used herein, a “qubit” (or quantum bit) refers to a quantum system with an associated quantum state that can be used to encode information. A quantum state can be used to encode one bit of information if the quantum state space can be modeled as a (complex) two-dimensional vector space, with one dimension in the vector space being mapped to logical value 0 and the other to logical value 1. In contrast to classical bits, a qubit can have a state that is a superposition of logical values 0 and 1. More generally, a “qudit” can be any quantum system having a quantum state space that can be modeled as a (complex) n-dimensional vector space (for any integer n), which can be used to encode n bits ofAttorney Docket No.: 35113-0613WO information. For the sake of clarity of description, the term “qubit” is used herein, although in some embodiments the system can also employ quantum information carriers that encode information in a manner that is not necessarily associated with a binary bit, such as a qudit. Qubits (or qudits) can be implemented in a variety of quantum systems. Examples of qubits include: polarization states of photons; presence of photons in waveguides; or energy states of atoms, ions, nuclei, or photons. Other examples may include other engineered quantum systems such as flux qubits, phase qubits, or charge qubits (e.g., formed from a superconducting Josephson junction); topological qubits (e.g., Majorana fermions); or spin qubits formed from vacancy centers (e.g., nitrogen vacancies in diamond). A physical qubit may be a physical device that behaves as a two-state quantum system. In one example, a qubit can be “dual-rail encoded” such that the logical value of the qubit is encoded by the occupation of one of two modes of the quantum system.
[0048] As used herein, a “resource state” refers to an entangled state of a number of qubits in a non-separable entangled state (which is an entangled state that cannot be decomposed into smaller separate entangled states). In various embodiments, the number of qubits of a resource state can be a small number (e.g., two or more, or any number up to about 20) or a larger number (as large as desired).
[0049] As used herein, a "logical qubit" refers to a physical or abstract qubit that has a long enough coherence time to be usable by quantum logic gates. A logical qubit may specify how a single qubit should behave in a quantum algorithm, subject to quantum logic operations by quantum logic gates. Due to issues such as stability, decoherence, fault tolerance, and scalability associated with a physical qubit that includes a single two-state quantum system, physical qubits may not be used to reliably encode and retain information for a sufficiently long period of time to be useful. Therefore, quantum error correction may need to be used to produce scalable quantum computers, where many physical qubits may be used to create a single, error-tolerant logical qubit. Depending on the error-correction scheme used and the error rates of each physical qubit, a single logical qubit may be formed using a large number (e.g., tens, hundreds, thousands, or more) of physical qubits. As used in the following sections, the term “qubit” generally refers to a physical qubit, whereas all references to logical qubits include the qualifier “logical.”
[0050] As used herein, a "quantum system" may include particles (such as atoms, ions, nuclei, and / or photons) or engineered quantum systems, such as flux qubits, phase qubits, or charge qubits (e.g., formed from a superconducting Josephson junction), topological qubitsAttorney Docket No.: 35113-0613WO(e.g., majorana fermions), spin qubits formed from vacancy centers (e.g., nitrogen vacancies in diamond), qubits otherwise encoded in multiple quantum systems (e.g., Gottesman-Kitaev- Preskill (GKP) encoded qubits), entangled states of qubits, and the like.
[0051] As used herein, “fusion” (or “a fusion operation” or “fusing”) refers to a two-qubit entangling measurement. A “fusion gate” is a structure that receives two input qubits, each of which is typically part of an entangled state of qubits. The fusion gate may perform a projective measurement operation on the input qubits to produce either one (e.g., in “type I fusion”) or zero (e.g., in “type II fusion”) output qubit in a manner such that the initial two entangled states of qubits are fused into a single entangled state of qubits. Fusion gates are specific examples of a general class of two-qubit entangling measurements and are particularly suited for photonic architectures.
[0052] Several illustrative embodiments will now be described with respect to the accompanying drawings. The ensuing description provides embodiment(s) only and is not intended to limit the scope, applicability, or configuration of the disclosure. Rather, the ensuing description of the embodiment s) will provide those skilled in the art with an enabling description for implementing one or more embodiments. It is understood that various changes may be made in the function and arrangement of elements without departing from the spirit and scope of this disclosure. In the following description, for the purposes of explanation, specific details are set forth in order to provide a thorough understanding of certain inventive embodiments. However, it will be apparent that various embodiments may be practiced without these specific details. The figures and description are not intended to be restrictive. The word “example” or “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any embodiment or design described herein as “exemplary” or “example” is not necessarily to be construed as preferred or advantageous over other embodiments or designs.
[0053] An optical system, such as an optical quantum computing system or an optical quantum communication system, may integrate passive and active photonic integrated circuits and other optical and electrical components, such as optical fibers or other low-loss optical interconnects, control circuits, and processing units, into a same system to reliably generate, manipulate (e.g., entangle), and detect hundreds, thousands, or even millions of qubits for computing and error corrections.Attorney Docket No.: 35113-0613WO
[0054] FIG. 1A is a top view of an example of an optical module 100 including a photonic integrated circuit (PIC) die 130 coupled to optical fibers 150 according to certain embodiments. In the illustrated example, optical module 100 includes PIC die 130, an electrical integrated circuit (EIC) die 140, a printed circuit board (PCB) 120, one or more electrical connectors 122, and optical fibers 150 on a silicon handle wafer 110. Even though FIG. 1 A only shows one PICZEIC (EPIC) die stack, multiple EPIC die stacks may be included in optical module 100. PCB 120 may be attached to silicon handle wafer 110, e.g., using an epoxy or through fusion bonding or hybrid bonding, depending on the material of PCB 120. In some embodiments, one or more PCBs 120 may be attached to silicon handle wafer 110 at different horizontal and / or vertical locations. An EPIC die stack includes EIC die 140 bonded face-to-face with PIC die 130 (e.g., by fusion bonding or hybrid bonding) such that the PICs may directly face the EICs and the substrates of PIC die 130 and EIC die 140 are on opposite sides of the EPIC die stack. The EPIC die stack may be bonded to silicon handle wafer 110 by, for example, fusion bonding. EIC die 140 may be electrically connected to PCB 120 through bonding wires 142, where the bonding pads and bonding wires may only be at the top (north) and bottom (south) sides of the EPIC die stack. The left (west) and right (east) sides of the EPIC die stack may be coupled with optical fibers 150, where optical fibers 150 may be attached to PCB 120 through harnesses 152. PCB 120 may also include electrical connectors 122 and some other electronic components, such as voltage regulators, power management ICs, decoupling capacitors, etc.
[0055] FIG. IB is a cross-sectional view of optical module 100 along a line A-A shown in FIG. 1 A according to certain embodiments. In the example shown in FIG. IB, PCB 120 and the PICZEIC die stack are bonded to a top surface of silicon handle wafer 110. PCB 120 may include multiple layers of interconnect traces or planes connected through vias. Electronic components, such as electrical connector 122 and decoupling capacitors 124 may be soldered on the top surface of PCB 120. PCB 120 may also include solder pads 126 on the top surface of PCB 120. The PICZEIC die stack may include PIC die 130 and EIC die 140. PIC die 130 may include a back surface 133 bonded to silicon handle wafer 110. PIC die 130 may also include a front surface 131 that may include circuits or pads. EIC die 140 may include a back surface 143 that may include a redistribution layers and bonding pads 148. EIC die 140 may also include a front surface 141 that may include circuits or pads. EIC die 140 and PIC die 130 may be bonded face-to-face with each other such that front surface 131 of PIC die 130 and front surface 141 of EIC die 140 may directly face each other and theAttorney Docket No.: 35113-0613WO interconnections can be short. PIC die 130 may include waveguides 132 and 136, and other photonic integrated circuits, such as single photon generators, switches, waveguide couplers, and photodetectors 134. EIC die 140 may include some through-silicon vias (TSVs) 146 and control logic circuits 144. For example, a photodetector 134 may detect a single photon from waveguide 132, and send the detection result to control logic circuit 144, which may determine whether and how to tune waveguide 136 (e.g., to turn on or off an optical switch). Bonding pads 148 may be connected to control logic circuits 144 through TSVs, and may also be connected to solder pads 126 on PCB 120 through bonding wires 142.
[0056] FIG. 1C is another cross-sectional view of optical module 100 along a line B-B shown in FIG. 1 A according to certain embodiments. In the example shown in FIG. 1C, in the B-B direction, optical fibers 150 may be attached to PCB 120 through harnesses 152. Optical fibers 150 may fit in V-grooves formed on PIC die 130, where the V-grooves may align with the waveguides on PIC die 130. Therefore, when assembled, the cores of optical fibers may align with corresponding cores of the waveguides on PIC die 130. Optical fibers 150 may be used to send photons into optical module 100, couple photons out of optical module 100, or loop photons from optical module 100 back into optical module 100. The photons may include pump photons, data communication signals (e.g., control signals), quantum states, and the like.
[0057] FIG. 2 is a simplified block diagram of an example of a quantum computing system 200 according to some embodiments. Quantum computing system 200 may include one or more optical modules 100 described above. Quantum computing system 200 may implement, for example, measurement-based quantum computing (MBQC) or fusion-based quantum computing (FBQC). Some embodiments of quantum computing system 200 may use photonic physical qubits to generate a fault-tolerant cluster state that can be used to represent logical qubits for MBQC, while other embodiments of quantum computing system 200 may generate measurement data reflecting entanglement structures for fault-tolerant FBQC. In the illustrated example, quantum computing system 200 may include resource state generator(s) 210, delay circuits 220, switch circuits 230, detectors 240, and one or more classical processing units 250.
[0058] Resource state generators 210 may include one or more resource state generators (RSGs). The RSGs may autonomously operate, with no data input needed. Each RSG may generate one resource state per clock cycle (which can be, e.g., shorter than about Ins, about 1 ns, or longer than about 1 ns). Each resource state may include multiple (e.g., 7 or 9)Attorney Docket No.: 35113-0613WO entangled physical qubits. The resource state can be output to delay circuits 220 at a rate of, for example, about n*N photons per clock cycle, where n is the number of qubits in each resource state and N is the number of RSGs. Resource state generators 210 can also send classical data output (e.g., indicating success or failure of various elements of the resource state generation process) to classical processing unit 250 via a data path 222. In some embodiments, resource state generators 210 can be maintained at cryogenic temperatures (e.g., 4 K). Delay circuit 220 can include optical fibers, other waveguides, optical memory, or other components to delay or store photons corresponding to particular qubits by appropriate delay times, such as 1 clock cycle, L clock cycles, and L2clock cycles, where L may be any integer number. Delay circuits 220 may not need to operate at cryogenic temperatures. Photons exiting delay circuits 220 can be delivered to switch circuits 230 via, for example, optical fibers, on-chip waveguides, or any other type of waveguides or optical interconnects.
[0059] Switch circuits 230 may include active switches and waveguides to perform mode coupling, mode swapping, phase shift, and other operations on the qubits. In various embodiments, switch circuits 230 may perform mode coupling operations associated with fusion operations as described below and / or basis selection operations associated with measurement of individual qubits. In some embodiments, switch circuits 230 may be dynamically reconfigurable in response to control signals from classical processing units 250, and thus quantum computing system 200 may perform different computations by reconfiguring switches in switch circuits 230. Switch circuits 230 may deliver output photons to detectors 240 via, for example, optical fibers, on-chip waveguides, or any other type of optical interconnects.
[0060] Detectors 240 may include photon detectors capable of detecting single or multiple photons. Each photon detector may be coupled to one waveguide and may generate an output (classical) signal indicating whether a photon was detected. In some embodiments, some or all detectors 240 may be capable of counting photons, and the output signal from each detector 240 may indicate the number of photons detected by the detector 240. In some embodiments, detectors 240 may operate at cryogenic temperatures. Detectors 240 may provide classical output signals indicating the number of photons, or binary signals indicating whether a photon was detected, to classical processing unit 250 via a signal path 224, such as optical fibers.
[0061] Classical processing unit 250 may be a classical computer system that is capable of communicating with resource state generator(s) 210, switch circuits 230, and detectors 240Attorney Docket No.: 35113-0613WO using classical digital logic signals. In some embodiments, classical processing unit 250 may determine appropriate settings for switch circuits 230 based on a particular quantum computation (or program) to be executed. Classical processing unit 250 may receive feedback signals (e.g., measurement outcomes) from resource state generators 210 and detectors 240 and can determine the result of the computation based on the feedback signals. In some embodiments, classical processing unit 250 can use feedback signals to modify subsequent control signals sent to switch circuits 230. Operation of classical processing unit 250 may incorporate error correction algorithms and other techniques.
[0062] Quantum computing system 200 of FIG. 2 is illustrative, and variations and modifications are possible. Blocks shown separately can be combined, or a single block can be implemented using multiple distinct components. Resource state generator(s) 210, delay circuits 220, switch circuits 230, and detectors 240 can implement the circuits descried above and below for generating entanglement structures. For instance, delay circuits 220 may implement delay lines for resource state fusion, while switch circuits 230 may implement reconfigurable switches and mode couplers associated with reconfigurable fusion, and detectors 240 may implement destructive measurements associated with fusion operations. Quantum computing system 200 is just one example of a quantum computing system or another photonic system that can use the wafer-scale modules described herein. Those skilled in the art will appreciate that many different systems can be implemented using the waferscale modules that each include PIC or EPIC dies bonded to and optically coupled to an optical backplane having low-loss waveguides.
[0063] A qubit used in a quantum system may be physically realized using a pair of waveguides into which a single photon is introduced. Qubits can be operated upon using mode couplers (e.g., beam splitters), variable phase shifters, photon detectors, and the like. For instance, entanglement between two (or more) qubits can be created by providing mode couplers between waveguides associated with different qubits. As also described above, physical qubits may suffer from loss and / or noise. Consequently, relying on single physical qubits (e.g., a photon propagating in a pair of waveguides) when performing a quantum computation may result in an unacceptably high error rate. To provide fault tolerance, photonic quantum computers can be designed to operate on one or more logical qubits, where a logical qubit is a multi-qubit quantum system in an entangled state that enables error correction (also referred to herein as an error correcting code). For example, in some embodiments, the structure of the error correcting code can be represented as a graph in threeAttorney Docket No.: 35113-0613WO dimensions. In the context of quantum computing, logical qubits can improve robustness by supporting error detection and error correction. Logical qubits may also be used in other contexts, such as quantum communication.
[0064] FIG. 3 illustrates an example of a subsystem 300 for generating entangled quantum states (e.g., resource states or logical qubits) according to certain embodiments. Subsystem 300 may include a wafer-scale module 310 that includes multiple EPIC die stacks 312 bonded to an optical backplane 316. Wafer-scale module 310 may be an example of optical module 100 or resource state generator 210. EPIC die stacks 312 may be manufactured and bonded to optical backplane 316 as described in details above and below. Wafer-scale module 310 may also include a plurality of PCBs 314 (e.g., an electrical backplane). The EIC dies in EPIC die stacks 312 may be electrically connected to PCBs 314 using, for example, wire bonding. EPIC die stacks 312 may be used to, for example, generate, manipulate, transport, and detect qubits or entangled states of qubits for optical quantum computing or optical quantum communication. For example, EPIC die stacks 312 may include single photon generators, mode couplers, fusion gates, beam splitters, switches, single photon detectors or multi-photon detectors, waveguides, delay lines, modulators, optical switches, ring oscillators, couplers, photodiode-based photodetectors for receiving data and timing signals, and the like, as described above and below. EPIC die stacks 312 may be optically connected together through optical fibers, optical waveguides in optical backplane 316, free-space optical interconnects, and / or other optical interconnects.
[0065] Wafer-scale module 310 may be connected to a distribution network 320 through optical fibers 360. Optical fibers 360 may be coupled to EPIC die stacks 312 through grating couplers (or edge couplers) and / or optical backplane 316. Distribution network 320 may be connected to one or more pump laser sources 340 and a control unit 330 (e.g., through an optical transceiver 350). Control unit 330 may include, for example, a classical computing system. In some embodiments, control unit 330 and / or distribution network 320 may be used to control two or more wafer-scale modules 310. Optical fibers 360 may be used to, for example, send pump laser pulses from pump laser sources 340 to EPIC die stacks 312 for single photon generation, send control data from control unit 330 and optical transceiver 350 to EPIC die stacks 312 (e.g., to control the switches), send measurement data from EPIC die stacks 312 to optical transceiver 350 and control unit 330, and the like.
[0066] In one example, each EPIC die stack 312 may include a single photon generator that includes waveguides, ring oscillators, interferometers, couplers, optical switches, WDMAttorney Docket No.: 35113-0613WO filters, single photon detectors, and the like that form multiple multiplexed photon pair sources to deterministically generate single photons through a nonlinear optical process (e.g., spontaneous four-wave mixing (SFWM), spontaneous parametric down-conversion (SPDC), second harmonic generation, etc.). In one embodiment, each photon pair source may include a micro-ring-based SFWM heralded photon source (HPS), where the detection of one photon of a pair of photons generated during the nonlinear process by a single photon detector (e.g., a superconductive nanowire single photon detector (SNSPD)) may herald the existence of the other photon in the pair that may be used to implement a qubit or generate an entangled resource state. Other classes of photon sources that do not use a nonlinear material may also be employed, such as those that employ atomic and / or artificial atomic systems (e.g., quantum dot sources, color centers in crystals, etc.). The operations of some photon sources may be non-deterministic (also sometimes referred to as “stochastic”) such that a given pump pulse may or may not produce a pair of photons. In such photon sources, coherent spatial and / or temporal multiplexing of several non-deterministic photon sources may be performed to increase the probability of having one photon in any given cycle. When the number of multiplexed non-deterministic photon sources is large, the probability of having one photon in any given cycle may be about 100%.
[0067] As illustrated in FIG. 3, wafer-scale module 310 may also be coupled to one or more optical fibers 362. The one or more optical fibers 362 may be used to transmit single photons, qubits, or entangled states of qubits between different wafer-scale modules 310 or may be used to loop qubits back to the same wafer-scale module after a delay. As described above and below, in some embodiments, optical fibers 362 may be coupled to waveguides in optical backplane 316 through low-loss couplers. In some embodiments, optical fibers 362 may be used as a long delay line for delaying the qubits to perform time-like resource state fusion operations. In some embodiments, optical fibers 362 may also be used for data communication or for transmitting pump laser pulses.
[0068] As described above, a plurality of EPIC die stacks may be bonded to a handle wafer, for example, by fusion bonding or oxide bonding, to form a wafer-scale module. The plurality of EPIC die stacks may be used to, for example, generate, manipulate, and detect qubits for optical quantum computing. In some embodiments, multiple wafer-scale modules may be connected through fiber cables, free-space optical interconnects, or other optical interconnects to form a subsystem or a system for larger scale quantum state generation, manipulation, and detection.Attorney Docket No.: 35113-0613WO
[0069] FIG. 4A is a top view of an example of a wafer-scale module 410 including multiple EPIC die stacks 414 on a handle wafer 412 according to certain embodiments. Wafer-scale module 410 may be an example of optical module 100, resource state generator 210, or subsystem 300. EPIC die stacks 414 may each include a PIC die and an EIC die, and may be manufactured and bonded to handle wafer 412 (e.g., including an optical backplane or another optical interposer) as described above. An EPIC die stack 414 may be optically connected to another EPIC die stack 414 through one or more optical fibers, one or more optical waveguides in the optical interposer, one or more free-space optical interconnects, or other optical interconnects. Wafer-scale module 410 may also include a plurality of PCBs 416. The EIC dies in EPIC die stacks 414 may be electrically connected to PCBs 416 using, for example, wire bonding. EPIC die stacks 414 may be used to, for example, generate, manipulate, and / or detect qubits (e.g., photonic qubits that employ one or more photons) or entangled states of qubits for optical quantum computing.
[0070] FIG. 4B illustrates an example of a system 400 including multiple wafer-scale modules 410 interconnected using optical fibers according to certain embodiments. As described above with respect to FIG. 4 A, each wafer-scale module 410 may include multiple EPIC die stacks. Optical fibers may be used to provide inter-wafer and / or intra-wafer optical interconnects. For example, optical fibers 420 may be used to connect EPIC die stacks 414 on a same wafer-scale module 410, while optical fibers 430 may be used as interconnects between wafer-scale modules 410. System 400 may be used to perform, for example, qubit generation, manipulation, and / or detection at a larger scale.
[0071] FIG. 5 is a cross-sectional view of an example of a wafer-scale module 500 (e.g., subsystem 300 or wafer-scale module 410) according to certain embodiments. As shown in FIG. 5, wafer-scale module 500 may include multiple EPIC die stacks 512, multiple PCBs 514, and optical fiber bundles. EPIC die stacks 512 may be optically connected to each other or other wafer-scale modules through an optical backplane 516, and may be electrically connected to PCBs 514 through bonding wires 522. Optical backplane 516 may include a dielectric layer 518 that includes one or more waveguide layers formed therein. The one or more waveguide layers may include low-loss waveguides 524 for transmitting, delaying, or storing single photons, qubits, qudits, resource states, or other entangled states. For example, waveguides 524 may include pairs of waveguides used to implement or transmit qubits and / or entangled qubits (e.g., resource states or larger entangled states of qubits). Photons may be coupled from one waveguide to another waveguide or from one waveguide layer toAttorney Docket No.: 35113-0613WO another waveguide layer through, for example, waveguide couplers. Photons may also be coupled from waveguides 524 in optical backplane 516 to waveguides in EPIC die stacks 512 through other waveguide layers and waveguide couplers in optical backplane 516 and / or EPIC die stacks 512. The waveguide couplers can be any type of waveguide coupler, e.g., adiabatic and / or evanescent waveguide couplers.
[0072] In the illustrated example, each EPIC die stack 512 may include a grating coupler for receiving pump light and / or data communication signals from an optical fiber 560. Optical fibers 562 may be coupled to waveguides 524 in optical backplane 516 through optical input / output ports that may include, for example, V-groove alignment structures and low-loss couplers, such as a tapered structure, a subwavelength grating, an edge coupler, and the like.. Optical fibers 562 may be connected to other wafer-scale modules 500 or may be connected to different portions of wafer-scale module 500 (e.g., loop photons or qubits from wafer-scale module 500 back to wafer-scale module 500 after a delay).
[0073] FIGS. 6A-6C illustrate an example of a structure 600 including a spot size converter 622 (also referred to as herein an optical mode transformer, a fiber-to-waveguide coupler, or a coupler) according to certain embodiments. Spot size converter 622 can be used to, for example, couple light between EPIC die stacks 312 of FIG. 3, couple light between wafer-scale modules 410 of FIG. 4, couple light between two ports of a wafer-scale module 410 of FIG. 4, or couple light from optical fibers 562 to waveguides 524 or from waveguides 524 to optical fibers 562 in wafer-scale module 500 of FIG. 5. FIG. 6A shows an x-y crosssection of structure 600. FIG. 6B shows a y-z cross-section of structure 600. FIG. 6C shows an x-z cross-section of structure 600. In the illustrated example, structure 600 includes a substrate 610 (e.g., a silicon substrate) that may include a V-groove 612 formed therein. Oxide layers 620, waveguides (e.g., a waveguide 628), and other photonic integrated circuits may be formed on substrate 610 using semiconductor processing techniques. Oxide layers 620 may include one or more oxide layers (e.g., SiO?) deposited on substrate 610. The waveguides may include a waveguide core (e.g., SiN or Si) and waveguide cladding layers (e.g., one or more oxide layers 620). An optical fiber 630 may be coupled to waveguide 628 through spot size converter 622. Optical fiber 630 may include a fiber core 632 and a fiber cladding layer 634, where fiber core 632 and fiber cladding layer 634 may both have a circular-shaped cross-section. Fiber core 632 may have a refractive index higher than the refractive index of fiber cladding layer 634, such that light may propagate within fiber core 632 through total internal reflection. Optical fiber 630 may be positioned in V-groove 612.Attorney Docket No.: 35113-0613WO
[0074] Spot size converter 622 may include a core 624 and a cladding layer 626. Core 624 may include a high index material (e.g., SiN or Si). Cladding layer 626 may include a low-index material, such as silicon oxide. The size of core 624 at one end of spot size converter 622 may match the size of the waveguide core of waveguide 628. Core 624 of spot size converter 622 may be inversely tapered from the fib er- waveguide interface to waveguide 628, where the size of core 624 in the x direction may gradually increase along the z direction as shown in FIG. 6C. The size of core 624 in the y direction may be constant or may vary along the z direction. The height of cladding layer 626 (in the y direction) may be constant, and the width of cladding layer 626 (in the x direction) may be constant or may vary along the z direction. Spot size converter 622 may include a cantilever portion. The cantilever portion may be formed by, for example, forming cladding layer 626 and core 624 on a buried oxide layer formed on substrate 610, and then selectively etching substrate 610 under spot size converter 622 to form an undercut region that may have a V-shape, the undercut region may be a part of the V-groove 612 or may be aligned with V-groove 612, such that fiber core 632 may align with core 624 of spot size converter 622.
[0075] Fiber core 632 of optical fiber 630 may have a cross-sectional area greater than the cross-sectional area of waveguide core of waveguide 628. The guided mode in optical fiber 630 may have a mode size (e.g., diameter) about a few microns, while the waveguide core may have a sub-micron linear dimension. Due to the large mode size mismatch, coupling losses from optical fiber 630 directly to waveguide 628 can be about 15 dB or higher. Spot size converter 622 may be used to reduce the coupling loss. Due to the small size of the tapered portion of core 624, the optical mode at the tapered portion may be weakly confined in core 624, and thus the size of the optical mode may increase in both the horizontal and vertical directions. At the interface between optical fiber 630 and spot size converter 622, core 624 may have the smallest size, and thus the optical mode may be less confined and thus may have a large size that may match the size of the optical mode of optical fiber 630. As the size of core 624 gradually increases along the z direction, the optical mode may be more and more confined in core 624 and thus the mode size may gradually decrease. At the interface between spot size converter 622 and waveguide 628, the optical mode may be reduced to have a size matching the mode size of waveguide 628. Therefore, the coupling efficiency between optical fiber 630 and waveguide 628 may be improved by spot size converter 622.
[0076] FIG. 7A illustrates an example of a spot size converter 700. Spot size converter 700 may be an example of spot size converter 622. FIG. 7A shows a cross-section of aAttorney Docket No.: 35113-0613WO cantilever portion of spot size converter 700, which may include a core 712 embedded in a cladding layer 710. Cladding layer 710 may include an oxide, such as silicon oxide. Core 712 may include a high-index material, such as SiN or Si. FIG. 7A also shows a fiber core 720, which may have a size much larger than core 712.
[0077] FIG. 7B includes a diagram 705 illustrating simulated coupling efficiencies of examples of spot size converters 700 having different core sizes. In the illustrated example, the fiber may be an SMF-28 fiber, core 712 of spot size converter 700 may include SiN, cladding layer 710 of spot size converter 700 may include silicon oxide, and the optical mode guided by the optical fiber may be transverse electric (TE) mode and may have a wavelength about 1550 nm. FIG. 7B shows the simulated coupling efficiencies of spot size converters 700 with a width of core 712 varying from about 50 nm to about 500nm and a height of core 712 varying from about 50 nm to about 500 nm. FIG. 7B shows that the maximum coupling efficiency of spot size converter 700 may be about 94.4%, and thus the minimum coupling loss is about 250 mdB.
[0078] As described above, optical quantum computing systems, such as system 400, may include waveguides, delay lines, switches, filters, photodetectors, single photon generation circuits, single photon detectors, resource state generation circuits, logical qubit detection circuits, and the like. Therefore, there may be many transitions between fibers and waveguides on a signal path. For example, pump photons may be coupled from a fiber to a waveguide that is coupled to a heralded single photon source (HSPS). The HSPS may generate a photon pair through a nonlinear process (e.g., SFWM). The two photons in the photon pair may be separated by, for example, a wavelength-division multiplexer (WDM), where one photon (heralding photon) of the photon pair detected by a single photon detector (e.g., an SNSPD) may herald the existence of the other photon (signal photon) in the pair. The signal photons may be used to implement qubits or to generate various entangled resource states and error-corrected photonic logical qubits. The qubits, resource states, and logic qubits may be delayed, fused, switched, and detected. The connections between die stacks or wafer-scale modules and the long delay lines may be implemented using low-loss optical fibers. Because of the many transitions between fibers and waveguides on a signal path, the total coupling loss can be high even if the coupling efficiency at each facet between a fiber and a waveguide can be as high as shown in FIG. 7B. In order to reduce the total loss, the coupling loss between a fiber and a waveguide may need to be further reduced.Attorney Docket No.: 35113-0613WO
[0079] According to certain embodiments, to better match the mode sizes of an optical fiber (e.g., a single mode fiber) and a waveguide thereby reducing the coupling loss at the interface between the optical fiber and the waveguide, a spot size converter that includes a cantilever having a tapered core (e.g., SiN or Si) surrounded by a primary cladding material (e.g., oxide) layer and a layer of a secondary cladding material (e.g., an epoxy, such as NTT E3810) having a slightly lower refractive index than the primary cladding material may be used to gradually change the mode size of the optical mode to match the mode sizes of the optical fiber and the waveguide. The tapered core may be tapered linearly or nonlinearly. The index contrast between the primary cladding material and the secondary cladding material may be within a certain range (e.g., between about 0.0015 and about 0.01 or higher). The spot size converter may have an inversely tapered (or straight and then inversely tapered, or sectionally changed) primary cladding layer for the waveguide. Parameters such as dimensions of the tapered core, dimensions of the primary cladding, and the index contrast between the primary cladding material and the secondary cladding material can be selected to achieve better performance.
[0080] FIG. 8 illustrates an example of a structure 800 that includes a spot size converter 822 having a lower-index secondary cladding layer 840 according to certain embodiments. Structure 800 may include a substrate 810 (e.g., a silicon substrate) with a V-groove 812 formed thereon by, for example, selectively etching regions of substrate 810 under spot size converter 822 to form an isotropic undercut region. Spot size converter 822 may be formed in one or more oxide layers 820 and may be used to couple light from an optical fiber 830 into a waveguide in oxide layers 820, where the core of the waveguide may be smaller than a fiber core 832 of optical fiber 830. As illustrated, spot size converter 822 may include a core 824 surrounded by a primary cladding layer 826. Core 824 may be tapered as described above and below. Primary cladding layer 826 may have a cross-sectional size greater than the cross- sectional size of fiber core 832. Primary cladding layer 826 may be surrounded by a secondary cladding layer 840, which may include a material having a refractive index slightly lower than the refractive index of primary cladding layer 826. Secondary cladding layer 840 may include an organic material, such as an epoxy (e.g., NTT E3810), and may be applied (e.g., injected or otherwise deposited) after optical fiber 830 is positioned on V-groove 812 and aligned with spot size converter 822. Secondary cladding layer 840 may fill gaps in the vicinity of spot size converter 822, and may also help to secure optical fiber 830 on V-groove 812.Attorney Docket No.: 35113-0613WO
[0081] Compared with structure 600 where air gaps may surround cladding layer 626, structure 800 may have a low refractive index contrast between primary cladding layer 826 and its surrounding media (e.g., secondary cladding layer 840). Therefore, the optical mode field size in spot size converter 822 may be larger than the optical mode field size in spot size converter 622, and thus may better match with optical mode field size of optical fiber 830.
[0082] FIGS. 9A-9C illustrate an example of a structure 900 including a spot size converter 922 according to certain embodiments. Spot size converter 922 can be used to, for example, couple light between EPIC die stacks 312 of FIG. 3, couple light between waferscale modules 410 of FIG. 4, couple light between two ports of a wafer-scale module 410 of FIG. 4, or couple light from optical fibers 562 to waveguides 524 or from waveguides 524 to optical fibers 562 in wafer-scale module 500 of FIG. 5. FIG. 9A shows an x-y cross-section of a portion of structure 900. FIG. 9B shows a y-z cross-section of a portion of structure 900. FIG. 9C shows an x-z cross-section of a portion of structure 900. In the illustrated example, structure 900 includes a substrate 910 (e.g., a silicon handle wafer). Oxide layers 920, waveguides (e.g., a waveguide 950), and other photonic integrated circuits may be formed on substrate 910 using semiconductor processing techniques. Oxide layers 920 may include one or more oxide layers (e.g., SiO?) deposited on substrate 910, such as a buried oxide (BOX) layer 926 and an oxide layer 928 deposited on substrate 910 before the deposition of the waveguide core layer, and an oxide layer 927 and an oxide layer 925 deposited after the formation of waveguide cores (e.g., after patterning the waveguide core layer). Waveguide 950 may include a waveguide core (e.g., SiN or Si) and waveguide cladding layers (e.g., oxide layers 925-928).
[0083] An optical fiber 930 may be coupled to waveguide 950 through spot size converter 922. Optical fiber 930 may include a fiber core 932 and may be positioned in a V- groove (an undercut region) formed in substrate 910 under spot size converter 922 such that fiber core 932 may be aligned with spot size converter 922. Fiber core 932 may have a diameter about a few microns, whereas waveguide core of waveguide 950 may have a linear dimension about a few hundred nanometers. Therefore, direct coupling between optical fiber 930 and waveguide 950 may have a low coupling efficiency.
[0084] Spot size converter 922 may include a core 924 and a cladding layer formed by oxide layers 920 (e.g., oxide layers 925-928). Core 924 may be formed in the waveguide core layer and may include a high index material (e.g., SiN or Si). The cladding layer may be formed by etching oxide layers 925-928. The size of core 924 at one end of spot sizeAttorney Docket No.: 35113-0613WO converter 922 may match the size of the waveguide core of waveguide 950. Core 924 of spot size converter 922 may be inversely tapered from an end closer to optical fiber 930 to an end closer to waveguide 950, where the width of core 924 in the x direction may gradually increase along the z direction as shown in FIG. 9C. The height of core 924 in the y direction may be constant along the z direction as shown in FIG. 9B or may vary along the z direction. The height of the cladding layer (in the y direction) of spot size converter 922 may also be constant along the z direction as shown in FIG. 9B or may vary along the z direction. Spot size converter 922 may include a cantilever portion above the undercut region of substrate 910. The cantilever portion may be formed by, for example, forming oxide layers 920 and core 924 on substrate 910 and selectively etching substrate 910 under spot size converter 922 to form an undercut region that may have a V-shape. The width of the cladding layer (in the x direction) of the cantilever portion of spot size converter 922 may also be inversely tapered along the z direction as shown in FIG. 9C. The cantilever portion of spot size converter 922 may have a non-zero distance from optical fiber 930. In some embodiments, core 924 may be recessed from the end of spot size converter 922 that is close to optical fiber 930.
[0085] In the example shown in FIGS. 9A-9C, the cladding layer of spot size converter 922 may be surrounded by a secondary cladding layer 940, which may include a material having a refractive index slightly lower than the refractive index of the cladding layer (e.g., oxide layers 920). Secondary cladding layer 940 may include an organic material, such as an epoxy, and may be applied (e.g., injected or otherwise deposited) after optical fiber 930 is positioned on the V-groove and aligned with spot size converter 922. Secondary cladding layer 940 may fill gaps in the vicinity of spot size converter 922 and may also secure optical fiber 930 on the V-groove.
[0086] As described above, due to the small size of the tapered portion of core 924 and the low index contrast between oxide layers 920 and secondary cladding layer 940, the optical mode at the cantilever portion of spot size converter 922 may be weakly confined in core 924, and thus the size of the optical mode may increase in both the horizontal and vertical directions. Core 924 of spot size converter 922 at the end closer to optical fiber 930 may have the smallest size, and thus the optical mode may be less confined and thus may have a large size that may match the size of the optical mode of optical fiber 930. As the size of core 924 gradually increases along the z direction, the optical mode may be more and more confined in core 924 and thus the mode size may gradually decrease. At the interface between spot size converter 922 and waveguide 950, the optical mode may be reduced to have a sizeAttorney Docket No.: 35113-0613WO matching the mode size of waveguide 950. Therefore, the coupling efficiency between optical fiber 930 and waveguide 950 may be improved by spot size converter 922.
[0087] FIGS. 10A-10C illustrate another example of a structure 1000 including a spot size converter 1022 according to certain embodiments. FIG. 10A shows an x-y cross-section of a portion of structure 1000 and a zoom-in view of a smaller portion. FIG. 10B shows an x- z cross-section of a portion of structure 1000. FIG. 10C shows a y-z cross-section of a portion of structure 1000. In the illustrated example, structure 1000 includes a substrate 1010 (e.g., a silicon handle wafer). One or more oxide layers 1020, waveguides (e.g., a waveguide 1050), and other photonic integrated circuits may be formed on substrate 1010 using semiconductor processing techniques. Waveguide 1050 may include a waveguide core (e.g., SiN or Si) and waveguide cladding layers (e.g., oxide layers 1020).
[0088] An optical fiber 1030 may be coupled to waveguide 1050 through spot size converter 1022. Optical fiber 1030 may include a fiber core 1032 and may be positioned in a V-groove or U-groove (e.g., an undercut region 1012) formed in substrate 1010 under spot size converter 1022, such that fiber core 1032 may be aligned with spot size converter 1022. Fiber core 1032 may have a diameter about a few microns, whereas waveguide core of waveguide 1050 may have a linear dimension about a few hundred nanometers. Therefore, direct coupling between optical fiber 1030 and waveguide 1050 may have a low coupling efficiency.
[0089] Spot size converter 1022 may include a core 1024 and a cladding layer (e.g., oxide layers 1020). Core 1024 may be formed in a waveguide core layer and may include a high index material (e.g., SiN or Si). The size of core 1024 at one end of spot size converter 1022 may match the size of the waveguide core of waveguide 1050. Core 1024 of spot size converter 1022 may be inversely tapered from an end closer to optical fiber 1030 to an end closer to waveguide 1050, where the width of core 1024 in the x direction may gradually increase along the z direction as shown in FIG. 10B. The height of core 1024 in the y direction may be constant along the z direction as shown in FIG. 10C or may vary along the z direction. The height of the cladding layer (in the y direction) of spot size converter 1022 may also be constant along the z direction as shown in FIG. 10C or may vary along the z direction. Spot size converter 1022 may include a cantilever portion above the undercut region 1012 of substrate 1010. The cantilever portion may be formed by, for example, forming oxide layers 1020 and core 1024 on substrate 1010, and then selectively etching substrate 1010 under spot size converter 1022 to form an undercut region 1012 that may haveAttorney Docket No.: 35113-0613WO a V-shape or U-shape. The width of the cladding layer (in the x direction) of the cantilever portion of spot size converter 1022 may be constant at a first portion of spot size converter 1022 that is closer to optical fiber 1030, and may also be inversely tapered along the z direction in a second portion 1026 of spot size converter 1022 as shown in FIG. 10B. The cantilever portion of spot size converter 1022 may have a non-zero distance from optical fiber 1030. In some embodiments, core 1024 may be recessed from the end of spot size converter 1022 that is close to optical fiber 1030. In the illustrated example, oxide ribs 1028 may be formed in oxide layers 1020 between the cantilever portion of spot size converter 1022 and other regions of oxide layers 1020 to provide mechanical support for spot size converter 1022.
[0090] In the example shown in FIGS. 10A-10C, the cladding layer (e.g., oxide layers 1020) of spot size converter 1022 may be surrounded by a secondary cladding layer 1040, which may include a material having a refractive index slightly lower than the refractive index of the cladding layer. Secondary cladding layer 1040 may include an organic material, such as an epoxy, and may be applied (e.g., injected or otherwise deposited) after optical fiber 1030 is positioned on the V-groove or U-groove and aligned with spot size converter 1022. Secondary cladding layer 1040 may fill gaps in the vicinity of spot size converter 1022, including undercut region 1012.
[0091] As described above, due to the small size of the tapered core 1024 and the low index contrast between cladding layer (e.g., oxide layers 1020) and secondary cladding layer 1040, the optical mode at the cantilever portion of spot size converter 1022 may be weakly confined in core 1024, and thus the size of the optical mode may increase in both the horizontal and vertical directions. Core 1024 of spot size converter 1022 at the end closer to optical fiber 1030 may have the smallest size, and thus the optical mode may be less confined and thus may have a large size that may match the size of the optical mode of optical fiber 1030. As the size of core 1024 gradually increases along the z direction, the optical mode may be more and more confined in core 1024 and thus the mode size may gradually decrease. At the interface between spot size converter 1022 and waveguide 1050, the optical mode may be reduced to have a size matching the mode size of waveguide 1050. Therefore, the coupling efficiency between optical fiber 1030 and waveguide 1050 may be improved by spot size converter 1022.
[0092] FIG. 11A illustrates an example of a mode field 1110 of a guided optical mode in an optical fiber according to certain embodiments. In the illustrated example, the optical fiberAttorney Docket No.: 35113-0613WO may include an SMF-28 fiber, and the wavelength of the guided optical mode may be about 1550 nm. FIG. 11 A shows that the diameter of mode field 1110 may be about a few microns.
[0093] FIG. 11B illustrates an example of a mode field 1120 of a guided optical mode converted by a spot size converter (e.g., spot size converter 822, 922, or 1022) according to certain embodiments. In the illustrated example, the cross-sectional area of the primary cladding layer (SiCh) of the spot size converter may be about 7.7 pm x 7.7 pm. The tapered waveguide core (SiN) of the spot size converter may be in the center of primary cladding layer. The tip of the tapered waveguide core (SiN) of the spot size converter may have a size about 80 nm x 80 nm. The refractive index difference between the primary cladding layer and the secondary cladding layer may be about 0.003. FIG. 1 IB shows that the spot size (diameter) of the guided optical mode may be about less than about 500 nm x 500 nm. The coupling efficiency may be as high as 99.8% (or a loss about 8 mdB), which may be further optimized by tuning, for example, the dimension of the primary cladding layer and the dimension of the core of the spot size converter, and the refractive indices of the core, the primary cladding layer, and the secondary cladding layer.
[0094] FIG. 12A illustrates an example of a spot size converter 1200 including a lower- index secondary cladding layer 1220 according to certain embodiments. As described above and shown in FIG. 12 A, spot size converter 1200 may be used to couple light from an optical fiber having a fiber core 1230 to a waveguide (e.g., a SiN waveguide) in a primary cladding layer 1210 (e.g., SiCh). Primary cladding layer 1210 may be surrounded by secondary cladding layer 1220, such as an epoxy or another organic or inorganic material having a lower refractive index than primary cladding layer 1210. Primary cladding layer 1210 may have a width Woand a height Ho. A tapered core 1212 of spot size converter 1200 may have a height Hcand a width Wcat the smaller end.
[0095] FIG. 12B includes a curve 1250 showing the simulated coupling efficiency of spot size converter 1200 as a function of the primary cladding layer thickness. In the illustrated example, the optical fiber may include an SMF-28 fiber, the guided optical mode may be TE mode, and the wavelength of the guided optical mode may be about 1550 nm. The width Wcof tapered core 1212 at the smaller end may be about 210 nm, and the height Hcof tapered core 1212 may be about 350 nm. The width Woand the height Hoof primary cladding layer 1210 (SiCh) may be about the same. The refractive index contrast between primary cladding layer 1210 and secondary cladding layer 1220 may be about 0.003. FIG. 12B shows that, when the width Woand the height Hoof primary cladding layer 1210 (SiCh) is about 18Attorney Docket No.: 35113-0613WO pm, the coupling efficiency may be about 96.5% (or a loss about 150 mdB), which may be further optimized by tuning other parameters. The performance of spot size converter 1200 for TM mode may be about the same.
[0096] FIG. 13A includes a diagram 1300 illustrating the simulated coupling efficiency of spot size converter 1200 as a function of the width Wcof tapered core 1212 at the smaller end and the height Ho(and width Wo) of primary cladding layer 1210 (SiCh) of spot size converter 1200. In the illustrated example, the optical fiber may include an SMF-28 fiber, the guided optical mode may be TE mode, and the wavelength of the guided optical mode may be about 1550 nm. The height Hcof tapered core 1212 may be about 350 nm. The width Woand the height Hoof primary cladding layer 1210 (SiCh) may be about the same. The refractive index contrast between primary cladding layer 1210 and secondary cladding layer 1220 may be about 0.003. FIG. 13 A shows that, when the width Wcof tapered core 1212 at the smaller end is about 120 nm and the width Woand the height Hoof primary cladding layer 1210 (SiCh) is about 8.8 pm, the coupling efficiency can be greater than 99% (or a loss less than about 43 mdB).
[0097] FIG. 13B includes a curve 1310 illustrating the simulated coupling efficiency of spot size converter 1200 as a function of the width Wcof tapered core 1212 at the smaller end when the height Hoand width Woof primary cladding layer 1210 are fixed (e.g., about 8.8 pm) and the height Hcof tapered core 1212 is fixed (e.g., about 350 nm). Curve 1310 shows that, when the height Hoand width Woof primary cladding layer 1210 are fixed at about 8.8 pm, the coupling efficiency of spot size converter 1200 may be the highest (e.g., greater than about 99.5%) when the width Wcof tapered core 1212 at the smaller end is about 120 nm.
[0098] FIG. 13C includes a curve 1320 illustrating the simulated coupling efficiency of spot size converter 1200 as a function of the height Ho(and width Wo) of primary cladding layer 1210 when the width Wcof tapered core 1212 at the smaller end is fixed (e.g., about 120 nm) and the height Hcof tapered core 1212 is fixed (e.g., about 350 nm). Curve 1320 shows that, when the width Wcof tapered core 1212 at the smaller end is fixed at about 120 nm and the height Hcof tapered core 1212 is about 350 nm, the coupling efficiency of spot size converter 1200 may be the highest (e.g., greater than about 99.6%) when the height Ho(and width Wo) of primary cladding layer 1210 is between about 8 and about 9.5 pm.
[0099] FIG. 14 includes a chart 1400 illustrating the simulated coupling efficiency of spot size converter 1200 as a function of the refractive index contrast between the primaryAttorney Docket No.: 35113-0613WO cladding layer 1210 and the secondary cladding layer 1220. In the illustrated example, the optical fiber may include an SMF-28 fiber, the guided optical mode may be TE mode, and the wavelength of the guided optical mode may be about 1550 nm. The width Wcof tapered core 1212 at the smaller end may be about 120 nm, and the height Hcof tapered core 1212 may be about 350 nm. The width Woand the height Hoof primary cladding layer 1210 (SiCh) may be about the same. A curve 1410 shows the simulated coupling efficiency of spot size converter 1200 as a function of the refractive index contrast between the primary cladding layer 1210 and the secondary cladding layer 1220 when the width Woand the height Hoof primary cladding layer 1210 is about 6 pm. A curve 1420 shows the simulated coupling efficiency of spot size converter 1200 as a function of the refractive index contrast between the primary cladding layer 1210 and the secondary cladding layer 1220 when the width Woand the height Ho of primary cladding layer 1210 is about 9 pm. A curve 1430 shows the simulated coupling efficiency of spot size converter 1200 as a function of the refractive index contrast between the primary cladding layer 1210 and the secondary cladding layer 1220 when the width Woand the height Hoof primary cladding layer 1210 is about 12 pm.
[0100] Curves 1410-1430 show that the maximum coupling efficiency may be achieved when the refractive index contrast is between about 0.0015 and about 0.01 or higher, where the peak coupling efficiency may be achieved when the refractive index contrast is about 0.003. The peak coupling efficiency may be achieved when the width Woand the height Hoof primary cladding layer 1210 is about 9 pm. A flatter coupling efficiency as a function of the refractive index contrast may be obtained when the width Woand the height Hoof primary cladding layer 1210 is larger, at the cost of a lower peak coupling efficiency. Even though not shown in FIGS. 12B-14, the performance of spot size converter 1200 may be about the same for TM mode and TE mode.
[0101] FIGS. 15A and 15B illustrate an example of a spot size converter 1500 including a lower-index secondary cladding layer 1520 according to certain embodiments. Spot size converter 1500 may be used to couple light from an optical fiber 1530 having a fiber core 1532 to a waveguide core (e.g., SiN) in a primary cladding layer 1510 (e.g., SiCh). Primary cladding layer 1510 may be surrounded by secondary cladding layer 1520, such as an epoxy or another organic or inorganic material having a lower refractive index than primary cladding layer 1510. In the illustrated example, there may be a gap between an optical fiber 1530 and the tip of spot size converter 1500, and a tapered core 1512 of spot size converter 1500 may be recessed from the tip of spot size converter 1500.Attorney Docket No.: 35113-0613WO
[0102] FIG. 15C illustrates the simulated coupling efficiency of spot size converter 1500 as a function of a gap between optical fiber 1530 and spot size converter 1500 or the recess of tapered core 1512 from the tip of spot size converter 1500. A curve 1550 in FIG. 15C shows the simulated coupling efficiency of spot size converter 1500 as a function of the recess of tapered core 1512 from the tip of spot size converter 1500. A curve 1560 in FIG. 15C shows the simulated coupling efficiency of spot size converter 1500 as a function of the gap between optical fiber 1530 and spot size converter 1500. FIG. 15C shows that the coupling efficiency may be reduced when the gap and / or the recess increase.
[0103] FIGS. 16A-16C illustrate examples of spot size converters according to certain embodiments. FIG. 16A shows a spot size converter 1600 including a tapered core 1620 in the center of an oxide slab 1610 (the primary cladding layer). Below and above oxide slab 1610 is secondary cladding layers 1630, which may have a refractive index lower than the refractive index of oxide slab 1610. A fiber core 1640 may be aligned with tapered core 1620, where the center of fiber core 1640 may align with the center of tapered core 1620.
[0104] FIG. 16B shows a spot size converter 1602 including a tapered core 1622 in a primary cladding layer 1612. Primary cladding layer 1612 is surrounded by a secondary cladding layer 1632. Primary cladding layer 1612 may have a square or a rectangular cross- sectional area. Secondary cladding layer 1632 may have a refractive index slightly lower (e.g., about 0.003)) than the refractive index of primary cladding layer 1612. The center of tapered core 1622 may be vertically (in the y direction) offset from the center of primary cladding layer 1612. The center of a fiber core 1642 may align with the center of primary cladding layer 1612. Fiber core 1642 may be aligned with tapered core 1622 in the x direction, but may be offset from tapered core 1622 in the y direction.
[0105] FIG. 16C shows a spot size converter 1604 including a tapered core 1624 in an oxide slab 1614 (the primary cladding layer). Below and above oxide slab 1614 is secondary cladding layers 1634, which may have a refractive index slightly lower (e.g., about 0.003) than the refractive index of the primary cladding layer (e.g., oxide slab 1614). The center of tapered core 1624 may be vertically (in the y direction) offset from the center of the primary cladding layer. The center of a fiber core 1644 may align with the center of the primary cladding layer, but may be offset from the center of tapered core 1622 in the y direction.
[0106] FIG. 17A illustrates an example of a structure 1700 including an array of spot size converters 1740 for coupling light between an array of optical fibers and an array ofAttorney Docket No.: 35113-0613WO waveguides according to certain embodiments. FIG. 17B is a zoom-in top view of an example of a spot size converter 1740 in the array of spot size converters 1740 of FIG. 17 A. FIG. 17C is a cross-sectional view of an example of a spot size converter 1740 in the array of spot size converters 1740 of FIG. 17 A. Structure 1700 may include a substrate 1710 (e.g., a silicon handle wafer), one or more oxide layers 1730 formed on substrate 1710, an array of waveguide cores 1760 formed on a waveguide core layer within oxide layers 1730. Structure 1700 may also include an array of spot size converters 1740 formed in oxide layers 1730.
[0107] Each spot size converter 1740 may include a cantilever portion formed by etching regions 1732 of the one or more oxide layers 1730 and etching portions of substrate 1710 under spot size converters 1740 to form undercut regions 1720, where each undercut region 1720 may have a V-shape or U-shape and may be used as a fiber alignment structure to align and position an optical fiber. Each spot size converter 1740 may include a core 1750 formed in the waveguide core layer, where the width of core 1750 in the x direction may be inversely tapered (e.g., increase linearly or nonlinearly) in the z direction. The width of oxide layers 1730 in the x direction in the cantilever portion may also be inversely tapered (e.g., gradually increase) in the z direction or may be constant first and then inversely tapered (as shown by regions 1744) along the z direction. A region 1734 of oxide layers 1730 may not be etched, and thus may mechanically connect the cantilever portions of spot size converters 1740 to other unetched portions of oxide layers 1730 supported by substrate 1710 to provide mechanical support for the cantilever portions of spot size converters 1740, thereby increasing the stability and reliability of spot size converters 1740.
[0108] As shown in FIG. 17C, a secondary cladding material may be deposited on a spot size converter 1740 to fill the gaps surrounding oxide layers 1730 (primary cladding layer) to form a secondary cladding layer 1770. As described above, the secondary cladding material may include an epoxy or another organic or inorganic material that has a refractive index slightly lower than the refractive index of oxide layers 1730, such as about 0.003 lower than the refractive index of oxide layers 1730. The secondary cladding material may at least partially fill the undercut regions 1720 and may help to secure optical fibers on the V-grooves or U-grooves.
[0109] FIG. 18 illustrates an example of a structure 1800 including a spot size converter 1840 and a heater 1860 according to certain embodiments. Structure 1800 may be similar to, for example, structure 800, 900, 1000, or 1700 described above. Structure 1800 may include a substrate 1810 and a plurality of oxide layers 1830 formed on substrate 1810. Spot sizeAttorney Docket No.: 35113-0613WO converter 1840 may be formed in oxide layers 1830 by etching through oxide layers 1830 in some regions and further etching substrate 1810 through an isotropic etching process to form an undercut region 1820. Thus, spot size converter 1840 may include a cantilever portion on top of undercut region 1820. Undercut region 1820 may have a V-shape or a U-shape and may be used as a fiber alignment structure for positioning and aligning an optical fiber. Spot size converter 1840 may include a tapered core 1842 having a higher refractive index than oxide layers 1830, which may be a primary cladding layer for spot size converter 1840. A secondary cladding layer 1850 may be deposited on spot size converter 1840 after an optical fiber is positioned and aligned with spot size converter 1840. Secondary cladding layer 1850 may include an organic or inorganic material having a refractive index slightly lower than the refractive index of oxide layers 1830 as described above. Secondary cladding layer 1850 may surround spot size converter 1840 and may at least partially fill undercut region 1820.
[0110] As described above, the coupling efficiency of spot size converter 1840 may be improved by tuning the refractive index contrast between oxide layers 1830 and secondary cladding layer 1850. In some optical quantum computing systems, at least some of the photonic integrated circuits may need to operate at cryogenic temperature (e.g., at about 4K). According to certain embodiments, a heater 1860 (e.g., a Ni-Si heater) may be formed in oxide layers 1830 to control the local temperature at spot size converter 1840, thereby tuning the refractive index of secondary cladding layer 1850 (and / or the primary cladding layer) and thus the refractive index contrast. In the illustrated example, heater 1860 may be formed on a buried oxide layer 1832 formed on substrate 1810 and may be controlled by a controller through metal layers and vias formed in oxide layers 1830.
[0111] FIG. 19 is a flowchart 1900 illustrating an example of a process for fabricating a low-loss spot size converter for optically coupling an optical fiber to an optical waveguide according to certain embodiments. It should be appreciated that the specific operations illustrated in FIG. 19 provide a particular process of fabricating a spot size converter for optically coupling two optical components having different optical mode sizes. Other sequences of steps may also be performed according to alternative embodiments. For example, alternative embodiments may perform the operations outlined above in a different order. Moreover, the individual operations illustrated in FIG. 19 may include multiple substeps that may be performed in various sequences as appropriate to the individual operation. Furthermore, additional operations may be added or some operations may not need to beAttorney Docket No.: 35113-0613WO performed, depending on the particular applications. One of ordinary skill in the art would recognize many variations, modifications, and alternatives.
[0112] Operations at block 1910 may include forming one or more oxide layers on a substrate. The substrate may include, for example, a silicon substrate, and the one or more oxide layers may include silicon oxide. The silicon oxide may be deposited on the substrate, or may be formed on the substrate by oxidizing a layer of the silicon substrate, such as by implanting oxygen ions into the silicon substrate. For example, the one or more oxide layers may include a buried oxide layer. In some embodiments, the silicon oxide may be deposited by high-density plasma chemical vapor deposition (HDP-CVD) of silicon-based dielectric materials, such as tetraorthosilicate (TEOS).
[0113] Operations at block 1920 may include forming a patterned waveguide core layer on the one or more oxide layers. The patterned waveguide core layer may include a high refractive index material, such as SiN or Si, and may be formed by depositing a layer of the high refractive index material using various deposition techniques and then patterning the layer of the high refractive index material using photolithography techniques. The patterned waveguide core layer may form the core of waveguides or other photonic integrated circuits described above. The patterned waveguide core layer may include a tapered portion, where the width of the tapered portion may gradually change (increase or decrease), either linearly or nonlinearly.
[0114] At block 1930, additional oxide layers may be deposited on the patterned waveguide layer to cover the waveguide layer. As described above, the oxide layers may be deposited, for example, by high-density plasma chemical vapor deposition of silicon-based dielectric materials, such as tetraorthosilicate. The oxide layers above and below the patterned waveguide core layer and the patterned waveguide core layer may form waveguides on the substrate, where the oxide layers may be the primary cladding layer of the waveguides. The oxide layers and the tapered portion of the patterned waveguide core layer may form a spot size converter. In some embodiments, other structures, such as heaters, single photon generators, scattering mitigation structures, switches, photon detectors, and other photonic integrated circuits, may be formed in the oxide layers.
[0115] At block 1940, portions of the oxide layers may be etched to form apertures in the oxide layers. For example, a patterned etch mask layer may be formed on the oxide layers and dry or wet etching processes may be performed to remove the exposed portions of theAttorney Docket No.: 35113-0613WO oxide layers. In some embodiments, after the oxide etching, the oxide layers surrounding the tapered portion of the waveguide core layer may have a tapered shape where the width of the oxide layers may gradually increase as shown in, for example, FIG. 9C. In some embodiments, after the oxide etching, the oxide layers surrounding the tapered portion of the waveguide core layer may be constant in one section and may be tapered in another section as shown in, for example, FIG. 10B, 17A, or 17B.
[0116] At block 1950, portions of the substrate may be etched to form undercut regions in the substrate. For example, the undercut regions may be formed by isotropic etching (e.g., wet etching) of the substrate through the apertures in the oxide layers. An undercut region may have a V-shape or U-shape and may be used as a fiber alignment structure. The tapered waveguide core layer and the surrounding oxide layers on an undercut region may form a cantilever portion of a spot size converter. As described above with respect to, for example, FIG. 10B, 17A, or 17B, in some embodiments, the oxide layers may be patterned such that some portions of the oxide layers may connect the cantilever portion to other portions of the oxide layers supported by the substrate to provide mechanical support for the cantilever portion.
[0117] At block 1960, an optical fiber may be positioned on the fiber alignment structure. Because the fiber alignment structure may align with the cantilever portion of the spot size converter, the optical fiber on the fiber alignment structure may align with the spot size converter as well. In some embodiments, there may be a gap between the tip of the optical fiber and the tip of the cantilever portion.
[0118] At block 1970, a secondary cladding material (e.g., an epoxy such as NTT E3810) having a refractive index lower than a refractive index of the oxide layers may be deposited on the cantilever portion of the spot size converter and may fill gaps in the etched regions. The secondary cladding material may be on top and bottom of the cantilever portion or may surround the cantilever portion, and may help to shape (e.g., expand) the optical field of the optical mode in the spot size converter to better match the optical fields of the optical modes in the optical fiber and the waveguides.
[0119] FIG. 20 is a simplified block diagram of an example of a system 2000 including two or more dies or wafers according to certain embodiments. In the illustrated example, a first die 2010 (or a wafer or another module) may include a photonic integrated circuit 2012 that may include, for example, single photon generators, mode couplers, fusion gates, beamAttorney Docket No.: 35113-0613WO splitters, switches, single photon detectors or multi-photon detectors, waveguides, delay lines, modulators, optical switches, ring oscillators, couplers, photodiode-based photodetectors for receiving data and timing signals, and the like, as described above. First die 2010 may also include multiple low-loss spot size converters 2014 optically coupled to photonic integrated circuit 2012. Low-loss spot size converters 2014 may be examples of low-loss spot size converters described above and may be used to couple light from a fiber (e.g., a fiber 2015, 2016, or 2018) to photonic integrated circuit 2012 or from photonic integrated circuit 2012 to a fiber (e.g., fiber 2015, 2016, or 2018). For example, a low-loss spot size converter 2014 may be used to couple light between photonic integrated circuit 2012 and fiber 2016, which may be connected to another die, wafer, or module. Two low-loss spot size converters 2014 may be used to couple light between two portions of photonic integrated circuit 2012 through a fiber 2018.
[0120] Similarly, a second die 2020 (or a wafer or another module) may include a photonic integrated circuit 2022 that may include, for example, single photon generators, mode couplers, fusion gates, beam splitters, switches, single photon detectors or multi-photon detectors, waveguides, delay lines, modulators, optical switches, ring oscillators, couplers, photodiode-based photodetectors for receiving data and timing signals, and the like, as described above. Second die 2020 may also include multiple low-loss spot size converters 2024 optically coupled to photonic integrated circuit 2022. Low-loss spot size converters 2024 may be examples of low-loss spot size converters described above and may be used to couple light from a fiber (e.g., fiber 2015, 2026, or 2028) to photonic integrated circuit 2022 or from photonic integrated circuit 2022 to a fiber (e.g., fiber 2015, 2026, or 2028). For example, a low-loss spot size converter 2024 may be used to couple light between photonic integrated circuit 2022 and fiber 2026, which may be connected to another die, wafer, or module. Two low-loss spot size converters 2024 may be used to couple light between two portions of photonic integrated circuit 2022 through a fiber 2028. A low-loss spot size converters 2024 and a low-loss spot size converters 2014 may both be coupled to a fiber 2015, and thus may optically couple photonic integrated circuit 2012 to photonic integrated circuit 2022.
[0121] In the alternative embodiments described below, the above descried secondary cladding may comprise an oxide material, such as an inorganic oxide material, for example silicon oxide. The silicon oxide may comprise stoichiometric silicon dioxide or non- stoichiometric silicon oxide in which the atomic ratio of silicon to oxygen is different thanAttorney Docket No.: 35113-0613WO1 :2, such as silicon rich silicon oxide in which the atomic ratio of silicon to oxygen is greater than 1 :2, such as 1.01 to 2 to 1 : 1. The secondary cladding is first formed in a trench in a substrate. The primary cladding and the waveguide core of the spot size converter are then formed over the oxide secondary cladding. The methods of the alternative embodiments avoid performing the difficult undercut etch under the primary cladding to form the V-groove and forming the cantilevered spot size converter which may be subject to mechanical strain. These method also permit use of an inorganic oxide secondary cladding, such as a silicon oxide secondary cladding, in place of an organic secondary cladding.
[0122] In another embodiment, a waveguide and at least one heater element are located in membrane disposed over a trench. FIG. 21A illustrates several components that are deposited over a substrate, such as a silicon substrate 2110 as described above. With reference to FIG. 21A, a waveguide may include a waveguide core (e.g., silicon nitride “SiN” or silicon “Si”)) 2124 surrounded by a primary cladding material (e.g., silicon oxide) membrane layer 2126L having a slightly lower refractive index than the waveguide core so as to guide and retain radiation (e.g., visible light, ultraviolet radiation and / or infrared radiation) within the waveguide core 2124. As described above, various additional claddings may be used to surround the waveguide core. The waveguide core and cladding may be formed over the substrate 2110 by any of the methods described above (e.g., regarding formation of the core 624 and cladding 626 of the spot size converter 622). In this embodiment, the index of refraction of the core and / or cladding may have a constant respective index of refraction such that the waveguide retains the light passing through it. The core 2124 may have a uniform size along its length.
[0123] The membrane layer 2126L may be formed of silicon oxide or another insulating material, and may operate as a cladding of the waveguide 2124. The membrane layer 2126L may be deposited as separate sublayers. For example, the lower portion of the membrane layer 2126L may comprise a first silicon oxide sublayer deposited over the substrate 2110, the waveguide core layer and heater layers may be deposited over the first silicon oxide sublayer, patterned by photolithography and etching into the waveguide core 2124 and heater elements 2210A and 2210B, followed by depositing a second silicon oxide sublayer which comprises an upper portion of the membrane layer 2126L over the waveguide core and heater elements.
[0124] The first heater element 2210A may include a resistive layer 2132A, such as a metal silicide layer (e.g., nickel silicide or another metal silicide layer), and an underlying base layer 2134A, such as a polysilicon layer. The second heater element 2210B may includeAttorney Docket No.: 35113-0613WO a resistive layer 2132B, such as a metal silicide layer (e.g., nickel silicide or another metal silicide layer), and an underlying base layer 2134B, such as a polysilicon or single crystal silicon layer. Alternatively, the heater elements 2210A and 221 OB may omit the base layer and / or may include a resistive layer other than a metal silicide layer. While two heater elements are shown, in alternative embodiments, one heater element or more than two heater elements may be provided in the membrane. The first and second heater elements may be arranged equidistant from the waveguide core 2124 so as to evenly or homogeneously heat the waveguide core 2124. The first and second heater elements may be arranged above, below and / or to the sides of the waveguide core 2124 within the membrane layer 2126L. For example, the heater elements may be disposed below and laterally to the sides of the waveguide core, as shown in FIG. 21A.
[0125] Referring to FIG. 21B, the sides of the membrane layer 2126 may be patterned into a membrane 2126 isolated by trenches 2135A and 2135B etched parallel to the waveguide core 2124 length (i.e., elongation direction). A remaining portion of the membrane layer 2126L comprises a peripheral insulating layer 2140. The peripheral insulating layer 2140 is at least partially laterally separated from the membrane 2126 by the trenches. A recess 2137 in the membrane 2126 may also be etched above the waveguide core 2124. The trenches and the recess may be formed by photolithography and etching. While two trenches are shown for clarity, more than trenches may be formed. The volume of the membrane 2126 (i.e., waveguide cladding) may be sized according to provide desired heating and cooling rates which may correspond to ON / OFF switching rates for a an optical device, such as a photonic phase shifter described below. The heater elements 2210A and 221 OB may be positioned on opposite sides of the waveguide 2124 and spaced apart from the sides of the membrane 2126 and spaced apart from the substrate 2110. Etching the trenches 2135A and 2135B and the additional material 2137 may increase the efficiency of the heater elements and reduce heat dissipation to the rest of the membrane 2126.
[0126] Referring to FIG. 21C, an undercut 2112 may be etched in the substrate 2110 below the membrane 2126. As described above regarding FIGS. 6A, 8, 10A, 10C, and 18, the undercut may be etched by various processes, such as by selective etching of the silicon material of the substrate 2110 selective to the silicon oxide material of the membrane 2126. For example, a selective silicon etchant, such as sulfur hexafluoride, is provided through the trenches 2135 A and 2135B to the silicon substrate 2110 to remove a portion the silicon substrate 2110 underlying the trenches without significantly etching the silicon oxide material of the membrane 2126. The undercut 2112 may extend in a plane under the waveguide coreAttorney Docket No.: 35113-0613WO and heater elements. Two or more trenches may be formed on each side of the membrane 2126, such that portion of the silicon oxide layer overlying the undercut 2112 between the trenches form supports that that comprises a webbing of the membrane that is suspended over the undercut 2112 as will be described below and as illustrated in FIG. 25. The trenches and undercut may be left empty or open such that a vacuum, in which the waveguide operates, is allowed to fill the trenches and the undercut 2112. In some implementations, the undercut 2112 may contain a vacuum or substantially a vacuum at cryogenic operating temperatures.
[0127] In some embodiments, additional layers may be formed over the trenches 2135 A and 2135B as well as over the recess 2137. To deposit layers above these voids, the voids (e.g., 2135A, 2135B, 2112, and 2137) may be backfilled with a filler material, such as photoresist material or another ashable carbon-based material to allow for deposition of further layers above the membrane 2126. After deposition of these layers, an opening (e.g., “chimney”) may be formed (e.g., etched) through the overlying layers, and the carbon -based material (e.g., photoresist material) may be ashed (i.e., vaporized by annealing in an oxygen containing ambient) so that the voids that circumferentially surround the membrane 2125 are re-opened. This ashing process may remove the backfilled material as a gas through the chimney. The chimney may also allow the voids under the additional layers to be under vacuum during cryogenic operation.
[0128] In alternative embodiments, the undercut 2112 and trenches 2135 A and 2135B may be filled with a thermally insulating material in place of the voids (i.e., instead of the vacuum gaps or air gaps). Low thermal conductivity underfills or porous dielectrics may backfill the undercut 2112, the recess 2137, and trenches 2135 A and 2135B in order to simplify the deposition of additional layers that may be part of the completed optical device. In some embodiments, the undercut 2112 and trenches 2135 A and 2135B may be sealed by depositing a sealing layer over their upper openings before sending the substrate 2110 into downstream processing for further layer deposition or packaging.
[0129] FIG. 22A illustrates a top view of the waveguide core 2124 and two heater elements 2210A and 2210B in a membrane 2126, as formed by the method shown in FIGS. 21 A - 21C. The heater elements 2210A and 2210B may be laterally spaced apart equidistant from the waveguide 2124. The heater elements 2210A and 2210B may be formed in a same horizontal plane of the membrane 2126 as the waveguide 2124 or a different horizontal plane. In some implementations, the top layer of the heater elements 2210A and 2210B may be the resistive layer 2134A and 2134B (e.g., nickel silicide). As shown, the waveguide core 2124 may extend longitudinally further than the heater elements 2210A and 2210B. For example,Attorney Docket No.: 35113-0613WO the waveguide core 2124 may extend beyond the trench at each end to optically connect with an optical fiber or anther radiation source or receiver. Any of the optical connectors described above for the spot size converter above may be applied to the ends of the waveguide core 2124 to input and receive radiation at respective ends of the waveguide core 2124.
[0130] FIG. 22B illustrates a top view the waveguide core 2124 and two heater elements 2210A and 221 OB with additional heater element connecting layers. The heater elements 2210A and 2210B are electrically connected to a respective interconnect 2212 at both ends. The interconnect 2212 may be an electrically conductive layer, such as copper, aluminum or alloys thereof. At least one of the interconnects 2212 may be electrically connected to a power source (e.g., a voltage or current source) which provides a current through the heater elements to resistively heat the heating elements and to provide heat to the waveguide core 2124 during operating of the optical device. The connection between the heater element (e.g., 2210A) and the interconnect 2212 may be subjected to repeated heating and cooling as the heater element turns on and off. In addition, where the optical device is operated in cryogenic temperatures, these temperature fluctuations and the heat from the heater element may cause deformations, separations or diffusion of the copper interconnect into the surrounding membrane 2126 (i.e., electromigration). Such deformations, separations, and electromigration of the interconnects 2212 can degrade performance and lead to failures of the heater elements (e.g., 2210A).
[0131] To prevent or reduce these issues, the interconnect 2212 may be separated from the resistive layers (e.g., 2132A / 2134A) of the heater elements 2210A and 2210B by an intermediate contact layer 2214 which may be formed of a high temperature stable, electrically conductive material. For example, the intermediate contact layer 2214 may be formed of tungsten or any other refractory metal (e.g., molybdenum, tantalum, etc.) and / or a high-temperature stable alloy (e.g., a refractory metal nitride, such as titanium nitride, tungsten nitride, tantalum nitride, etc.). Other materials may be used for the intermediate contact layer 2214 that have high electrical conductivity, temperature stability for low (e.g., cryogenic temperatures) and high temperatures (e.g., over 425 °C), and resistance to electromigration. As illustrated, the interconnects 2212 may connect to both heater elements 2210A and 2210B via a respective intermediate contact layer 2214 at both ends in the vicinity of the edge of the undercut 2112 which is shown below the heater elements 2210A and 2210B and waveguide core 2124.Attorney Docket No.: 35113-0613WO
[0132] FIG. 23 illustrates a vertical cross section of one end of a heater element (e.g., 2210A) along vertical plane A - A’ shown in FIG. 22B. In one embodiment, the heater element 2210A is located below the intermediate contact layer 2214 and the interconnect 2212 is located above the intermediate contact layer 2214. The intermediate contact layer 2214 contacts the top surface of the heater element 2210A (e.g., the resistive layer 2132A), and the interconnect 2212 contacts the top surface of the intermediate contact layer 2214. Thus, the intermediate contact layer 2214 may extend vertically from the heater element 2210A to the interconnect 2212 forming a conductive thermal buffer of thermally stable, electrically conductive material. The intermediate contact layer 2214 may extend horizontally and form contact surfaces directly adjacent with a top side of the heater element 2210A (and a resistive layer thereof). In alternative embodiments, the interconnect 2212 may be located below or to the side of the intermediate contact layer 2214, while the heater element 2210A may be located above or to the side of the intermediate contact layer 2214. Thus, the interconnect 2212 and the heater element 2210A both contact the intermediate contact layer 2214, but do not directly contact each other.
[0133] FIG. 23 shows a substrate 2110 with the undercut 2112 that tapers to an end of the longitudinal extension of the undercut 2112. In some implementations, the undercut 2112 may be trough-shaped, tapering upward at the lateral and longitudinal edges (see also FIG. 21C). The undercut 2112 may extend along the full length of the heater element 2210A or may terminate under the intermediate contact layer 2214 or before the intermediate contact layer 2214.
[0134] The heating element 2210A may include a resistive layer 2132B, such as nickel silicide layer, and a base layer 2134B, which may be polysilicon, single crystal silicon or another material. The resistive layer 2132B and the base layer 2134B may co-extend as illustrated in FIGS. 21C, 22B and 23. The interconnect 2212, the intermediate conductive layer 2214, and the heating element 2210A may be completely surrounded or substantially surrounded by the membrane 2126.
[0135] FIG. 24 illustrates a schematic top view of an optical device 2400 including a portion of the interconnects 2112 and the trenches 2135 (e.g., 2135A, 2315B, 2135C, 2135D, 2135E and 2135F), according to some embodiments. The membrane 2126 is the area illustrated with hatched lines and may extend as a layer beyond the hatched area. The trenches 2135 may extend in the direction parallel to an extension direction of the waveguide core 2124. The trenches 2135 may be spaced apart so as to form support bridges 2438. For example, some support bridges 2438 may be located at substantially the midpoint of theAttorney Docket No.: 35113-0613WO heater elements 2210A and 2210B and waveguide core 2124. The support bridges 2438 may extend between two trenches 2135 (e.g., 2135A and 2135C, and 2135B and 2135D) on each side of the heater elements 2210A and 221 OB to provide lateral support for the membrane 2126 which may be suspended over the undercut 2112. The support bridges 2438 may structurally laterally connect the membrane 2126 the peripheral insulating layer 2140 which is located over the substrate 2110. The support bridges 2438, the membrane 2126 and the peripheral insulating layer 2140 may comprise patterned portions of the same silicon oxide layer which is etched to form the trenches 2135.
[0136] The trenches 2135 may extend to the undercut 2112 in the substrate 2110 such that the heater elements 2210A and 2210B and waveguide core 2124 are thermally isolated in the membrane 2126 between the trenches 2135 and the undercut 2112. In some implementations, the undercut 2112 may be optional with trenches 2135 operating to partially isolate the membrane 2126 containing the heater elements 2210A and 2210B and waveguide core 2124.
[0137] In the inset of FIG. 24, the heater element 2210B is shown together with the extent of the intermediate contact layer 2214 between the interconnect 2212 and the heater element 2210B. For example, the extent of the intermediate contact layer 2214 may be between 10 and 50 microns long, such as 20 to 30 microns long.
[0138] FIG. 25 is a top view and FIG. 26 is a schematic cut-away perspective view of the optical device 2400 showing the location of the undercut 2112 outlined against the membrane 2126 and the peripheral insulating layer 2140 of FIG. 24. The trenches 2135 may extend the length of the undercut 2112 on both sides of the membrane 2126. The undercut and the trenches may shape the membrane 2126 into an elongated block that is supported at each end by the substrate 2110 and suspended over the undercut 2112. The trenches 2135 and the undercut 2212 thermally isolate the membrane 2126 containing the heater elements and the waveguide core. The support bridge 2438 may support the center of the membrane 2126 suspended over the undercut 2112. The outline of the undercut 2112 shown is not intended to be limiting and other shapes are contemplated. The outline of the undercut 2112 may be adapted to the shape of the membrane 2126 or the shape of the membrane 2126 may be adapted to the shape of the undercut 2112. The membrane 2126 may be arranged as a bridge or cantilever over the undercut 2112.
[0139] The heater elements 2210A and 2210B and the waveguide 2124 may extend beyond the undercut 2112 and the membrane 2126 for coupling with other system components (e.g., interconnects 2212 and radiation source or receiver) at each of theirAttorney Docket No.: 35113-0613WO respective ends. A midline 2520 of the waveguide core 2124 and the membrane 2126 is illustrated. The staggered trenches 2135 perpendicular to the undercut 2112 may operate to slow or prevent the spread of thermal energy (i.e., heat from heater elements) away from the center of the membrane 2126 containing the waveguide core. When current runs through the resistive heater element 2620, it may heat the membrane 2126 and the waveguide core 2124 such that a speed of radiation in the waveguide core changes.
[0140] FIG. 27 is a graph of temperature versus waveguide core half-length in an nonlimiting simulated example according to an embodiment of the present disclosure. The line 2720 corresponds to heater element temperature in degrees kelvin from a zero on the x-axis at the midline 2500 of the waveguide core to 100 microns away from the midline 2500. The heater may heat the waveguide core to a waveguide temperature shown by line 2710. As shown in the graph, the heater element is configured to heat the waveguide core to substantially the same temperature as the heater element itself. While the waveguide temperature 2710 is shown for only half the waveguide core length (e.g., full length of 200pm), the other half of the waveguide core and heater element beyond the midline 2500 may be heated and operate in substantially the same way. For example, for over half of the length of the waveguide core, the waveguide temperature 2710 may be above 550 °K. The rest of the system including the ends of the waveguide may be at a temperature 300 °K. In cryogenic temperatures for example, the temperature difference may similarly range from 120 °K at a maximum to a low system temperature of 15 °K. The waveguide temperature 2710 drops at the midline 2500 due to the presence of the bridge region 2438 which laterally dissipates heating element heat away from the waveguide core.
[0141] For example, with no undercut and no trenches on the sides of the membrane, the heater element may require a current over 6 mA and over 200 mW of power to achieve a maximum local temperature of 425 °C. For example, with trenches on the sides of the membrane but no undercut, the heater element may require 3.4mA and 63mW to achieve a maximum local temperature of 425 °C. For example, with trenches on the sides of the membrane but no undercut, the heater element may require a current over 3 mA and over 50 mW of power to achieve a maximum local temperature of 425 °C. In contrast, with trenches on the sides of the membrane and with the undercut, the heater element may require a current of less than 2 mA and less than 20 mW of power to achieve a maximum local temperature of 425 °C. Unfilled (i.e., open) trenches and undercut improve thermal efficiency by greater than 14 times compared to a non-insulated structure. Accordingly, given the much lower power requirements of the heater that is configured to heat a membrane with trenches and anAttorney Docket No.: 35113-0613WO undercut isolating the membrane, the optical device may be made more compact and the heating element may be made thinner.
[0142] FIG. 27 also depicts the region along the waveguide core where the intermediate contact layer 2214 is located region 2730. The intermediate contact layer may provide thermal durability across this region so that the contact between the heater element and the interconnect is maintained long term. As shown, by the end of the waveguide core and the termination of the intermediate contact layer, the temperature is decreased to the normal operating temperature of the system (e.g., room temperature of 300 °K for a non-cryogenic operating environment) so that the interconnect 2212 is protected and separated from the heat by the intermediate contact layer 2214 in the intermediate contact layer region 2730. This reduces the electromigration damage to the interconnect 2212.
[0143] In one embodiment shown in FIG. 28, the optical device 2400 may be a photonic phase shifter, where the waveguide core 2124 is configured to run parallel to another waveguide core 2824 carrying light from the same radiation source (e.g., a laser) 2802. The radiation passing through waveguide core 2124 may be phase shifted relative to the radiation in the other waveguide core 2824 by heater elements 2210A and 2210B. The optical device 2400 and both waveguides cores 2124 and 2824 are integrated in a photonic integrated circuit (PIC) die. The heater elements may alter the speed of radiation through the heated waveguide core 2124 relative to the speed of the radiation through the unheated waveguide core 2824 and shift the photons within the heated waveguide core 2124 out of phase with photons in the unheated waveguide core 2824 due to the difference in speed over the length of the waveguide cores.
[0144] The common radiation source 2802 (e.g., a laser) may emit radiation that is received by separate optical fibers or other waveguides 2804A and 2804B that split the radiation into two separate paths (e.g., using a beam splitter or another optical component). The radiation in each path may be in phase due to the common coherent radiation source. The radiation from each path may be coupled into the respective heated and unheated waveguide cores 2124 and 2824 by optical couplers 2806 A and 2606B. The heated waveguide core 2124 may be heated by parallel heater elements 2210A and 2210B as described above. The heated waveguide core 2124 may be undercut and otherwise thermally isolated or insulated so that the local temperature is higher than the temperature of the unheated waveguide core 2824 The difference in the temperatures of the waveguide cores 2124 and 2824 may introduce a phase shift in the photons of one path relative to the other path. The separate paths may then be coupled back to optical fibers or other optical carriersAttorney Docket No.: 35113-0613WO so that the phase shifted radiation may be used. The two waveguide cores 2124 and 2824 may be integrated with the optical couplers 2806A and 2806B in a photonic integrated circuit (PIC) die 2800. For example, the phase shifted radiation may be recombined with the unshifted radiation from the common radiation source 2802 to generate interference and permit the photonic phase shifter 2400 to operate as an interferometer.
[0145] In one embodiment, an optical device includes a substrate, a membrane located over the substrate, a first waveguide core and at least one heater element embedded in the membrane, trenches extending parallel to the membrane on opposite lateral sides of membrane, and an undercut located under at least a portion of the membrane and connected to the trenches.
[0146] According to any one or more embodiments above, the least one heater element extends parallel to the first waveguide.
[0147] According to any one or more embodiments above, a refractive index of the membrane is lower than a refractive index of the first waveguide core, and wherein the membrane functions as a cladding for the first waveguide core.
[0148] According to any one or more embodiments above, the first waveguide core comprises silicon nitride or silicon; and the membrane comprises silicon oxide.
[0149] According to any one or more embodiments above, the undercut has tapered sidewalls such that the top of the undercut closest to the membrane is wider than a bottom of the undercut furthest from the membrane; the substrate comprises a silicon substrate or a silicon on insulator substrate; and the undercut is located in the substrate.
[0150] According to any one or more embodiments above, an interconnect is connected to a power source; and an intermediate contact layer is electrically connected to the interconnect and the at least one heater element, the intermediate contact layer extending between the interconnect and the at least one heater element parallel to the first waveguide core.
[0151] According to any one or more embodiments above, the at least one heater element comprises a resistive layer; the intermediate contact layer comprises a refractory metal or an electrically conductive refractory metal nitride; and the interconnect comprises copper or aluminum.
[0152] According to any one or more embodiments above, the undercut and the trenches are unfilled.Attorney Docket No.: 35113-0613WO
[0153] According to any one or more embodiments above, the undercut is filled with a thermally insulating material.
[0154] According to any one or more embodiments above, the membrane laterally extends past sidewalls of the undercut; and a first end and a second end of the first waveguide core laterally extend past sidewalls of the undercut such that the first waveguide core is suspended in the membrane over the undercut by the first end and the second end.
[0155] According to any one or more embodiments above, the at least one heater element comprises a first heater embedded in the membrane on a first side of the first waveguide core and a second heater embedded in the membrane on a second side of the first waveguide core.
[0156] According to any one or more embodiments above, a peripheral insulating layer surrounds the trenches, and support bridges laterally connect the membrane to the peripheral insulating layer over the undercut.
[0157] According to any one or more embodiments above, the support bridges, the membrane and the peripheral insulating layer comprise patterned portions of a silicon oxide layer which is etched to form the trenches.
[0158] According to any one or more embodiments above, the optical device further comprises an unheated second waveguide core that is located over a top surface of the substrate and that is laterally spaced from the first waveguide core; and a laser optically connected to the first and the second waveguide cores, wherein the at least one heater is configured to heat the first waveguide core causing a phase shift in laser radiation in the first waveguide core relative to the laser radiation in the second waveguide core.
[0159] It will be apparent to those skilled in the art that substantial variations may be made in accordance with specific implementations. For example, customized hardware might also be used, and / or particular elements might be implemented in hardware, software (including portable software, such as applets, etc.), or both. Further, connection to other computing devices such as network input / output devices may be employed.
[0160] With reference to the appended figures, components that can include memory can include non-transitory machine-readable media. The terms “machine-readable medium” and “computer-readable medium” as used herein refer to any storage medium that participates in providing data that causes a machine to operate in a specific fashion. In embodiments provided hereinabove, various machine-readable media might be involved in providing instructions / code to processors and / or other device(s) for execution. Additionally orAttorney Docket No.: 35113-0613WO alternatively, the machine-readable media might be used to store and / or carry such instructions / code. In many implementations, a computer-readable medium is a physical and / or tangible storage medium. Such a medium may take many forms, including, but not limited to, non-volatile media, volatile media, and transmission media. Common forms of computer-readable media include, for example, magnetic and / or optical media, punch cards, paper tape, any other physical medium with patterns of holes, a RAM, a programmable readonly memory (PROM), an erasable programmable read-only memory (EPROM), a FLASH- EPROM, any other memory chip or cartridge, a carrier wave as described hereinafter, or any other medium from which a computer can read instructions and / or code.
[0161] The methods, systems, and devices discussed herein are examples. Various embodiments may omit, substitute, or add various procedures or components as appropriate. For instance, features described with respect to certain embodiments may be combined in various other embodiments. Different aspects and elements of the embodiments may be combined in a similar manner. The various components of the figures provided herein can be embodied in hardware and / or software. Also, technology evolves and, thus, many of the elements are examples that do not limit the scope of the disclosure to those specific examples.
[0162] It has proven convenient at times, principally for reasons of common usage, to refer to such signals as bits, information, values, elements, symbols, characters, variables, terms, numbers, numerals, or the like. It should be understood, however, that all of these or similar terms are to be associated with appropriate physical quantities and are merely convenient labels. Unless specifically stated otherwise, as is apparent from the discussion above, it is appreciated that throughout this specification discussions utilizing terms such as “processing,” “computing,” “calculating,” “determining,” “ascertaining,” “identifying,” “associating,” “measuring,” “performing,” or the like refer to actions or processes of a specific apparatus, such as a special purpose computer or a similar special purpose electronic computing device. In the context of this specification, therefore, a special purpose computer or a similar special purpose electronic computing device is capable of manipulating or transforming signals, typically represented as physical electronic, electrical, or magnetic quantities within memories, registers, or other information storage devices, transmission devices, or display devices of the special purpose computer or similar special purpose electronic computing device.
[0163] Those of skill in the art will appreciate that information and signals used to communicate the messages described herein may be represented using any of a variety ofAttorney Docket No.: 35113-0613WO different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.
[0164] Terms “and,” “or,” and “an / or,” as used herein, may include a variety of meanings that also is expected to depend at least in part upon the context in which such terms are used. Typically, “or” if used to associate a list, such as A, B, or C, is intended to mean A, B, and C, here used in the inclusive sense, as well as A, B, or C, here used in the exclusive sense. In addition, the term “one or more” as used herein may be used to describe any feature, structure, or characteristic in the singular or may be used to describe some combination of features, structures, or characteristics. However, it should be noted that this is merely an illustrative example and claimed subject matter is not limited to this example. Furthermore, the term “at least one of’ if used to associate a list, such as A, B, or C, can be interpreted to mean A, B, C, or any combination of A, B, and / or C, such as AB, AC, BC, AA, AAB, ABC, AABBCCC, and the like.
[0165] Reference throughout this specification to “one example,” “an example,” “certain examples,” or “exemplary implementation” means that a particular feature, structure, or characteristic described in connection with the feature and / or example may be included in at least one feature and / or example of claimed subject matter. Thus, the appearances of the phrase “in one example,” “an example,” “in certain examples,” “in certain implementations,” or other like phrases in various places throughout this specification are not necessarily all referring to the same feature, example, and / or limitation. Furthermore, the particular features, structures, or characteristics may be combined in one or more examples and / or features.
[0166] In some implementations, operations or processing may involve physical manipulation of physical quantities. Typically, although not necessarily, such quantities may take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, or otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to such signals as bits, data, values, elements, symbols, characters, terms, numbers, numerals, or the like. It should be understood, however, that all of these or similar terms are to be associated with appropriate physical quantities and are merely convenient labels. Unless specifically stated otherwise, as apparent from the discussion herein, it is appreciated that throughout this specification discussions utilizing terms such as “processing,” “computing,” “calculating,” “determining,” or the like refer toAttorney Docket No.: 35113-0613WO actions or processes of a specific apparatus, such as a special purpose computer, special purpose computing apparatus or a similar special purpose electronic computing device. In the context of this specification, therefore, a special purpose computer or a similar special purpose electronic computing device is capable of manipulating or transforming signals, typically represented as physical electronic or magnetic quantities within memories, registers, or other information storage devices, transmission devices, or display devices of the special purpose computer or similar special purpose electronic computing device.
[0167] In the preceding detailed description, numerous specific details have been set forth to provide a thorough understanding of claimed subject matter. However, it will be understood by those skilled in the art that claimed subject matter may be practiced without these specific details. In other instances, methods and apparatuses that would be known by one of ordinary skill have not been described in detail so as not to obscure claimed subject matter. Therefore, it is intended that the claimed subject matter is not limited to the particular examples disclosed, but that such claimed subject matter may also include all aspects falling within the scope of appended claims, and equivalents thereof.
Claims
Attorney Docket No.: 35113-0613WOClaims1. An optical device, comprising: a substrate; a membrane located over the substrate; a first waveguide core and at least one heater element embedded in the membrane; trenches extending parallel to the membrane on opposite lateral sides of membrane; and an undercut located under at least a portion of the membrane and connected to the trenches.
2. The optical device of claim 1, wherein the least one heater element extends parallel to the first waveguide.
3. The optical device of claim 1, wherein a refractive index of the membrane is lower than a refractive index of the first waveguide core, and wherein the membrane functions as a cladding for the first waveguide core.
4. The optical device of claim 3, wherein: the first waveguide core comprises silicon nitride or silicon; and the membrane comprises silicon oxide.
5. The optical device of claim 1, wherein: the undercut has tapered sidewalls such that the top of the undercut closest to the membrane is wider than a bottom of the undercut furthest from the membrane; the substrate comprises a silicon substrate or a silicon on insulator substrate; and the undercut is located in the substrate.
6. The optical device of claim 1, further comprising: an interconnect connected to a power source; and an intermediate contact layer electrically connected to the interconnect and the at least one heater element, the intermediate contact layer extending between the interconnect and the at least one heater element parallel to the first waveguide core.Attorney Docket No.: 35113-0613WO7. The optical device of claim 6, wherein: the at least one heater element comprises a resistive layer; the intermediate contact layer comprises a refractory metal or an electrically conductive refractory metal nitride; and the interconnect comprises copper or aluminum.
8. The optical device of claim 1, wherein the undercut and the trenches are unfilled.
9. The optical device of claim 1, wherein the undercut is filled with a thermally insulating material.
10. The optical device of claim 1, wherein: the membrane laterally extends past sidewalls of the undercut; and a first end and a second end of the first waveguide core laterally extend past sidewalls of the undercut such that the first waveguide core is suspended in the membrane over the undercut by the first end and the second end.
11. The optical device of claim 1, wherein the at least one heater element comprises a first heater embedded in the membrane on a first side of the first waveguide core and a second heater embedded in the membrane on a second side of the first waveguide core.
12. The optical device of claim 1, further comprising a peripheral insulating layer surrounding the trenches, and support bridges laterally connecting the membrane to the peripheral insulating layer over the undercut.
13. The optical device of claim 12, wherein the support bridges, the membrane and the peripheral insulating layer comprise patterned portions of a silicon oxide layer which is etched to form the trenches.
14. The optical device of claim 1, further comprising: an unheated second waveguide core that is located over a top surface of the substrate and that is laterally spaced from the first waveguide core; and a laser optically connected to the first and the second waveguide cores, wherein the at least one heater is configured to heat the first waveguide core causing a phase shift in laserAttorney Docket No.: 35113-0613WO radiation in the first waveguide core relative to the laser radiation in the second waveguide core.
15. A method, comprising: forming a waveguide core and a heater element in a membrane layer on a substrate; forming trenches in the membrane layer parallel to the waveguide core and the heater element, the trenches extending through the membrane to the substrate; and removing a portion of the substrate under the membrane layer containing the waveguide core and the heater element via the trenches to form an undercut in the substrate and to pattern the membrane layer into a membrane containing the waveguide core and the heater element suspended over the undercut.
16. The method of claim 15, wherein the substrate comprises silicon.
17. The method of claim 16, wherein the membrane comprises a silicon oxide cladding.
18. The method of claim 17, wherein the removing a portion of the substrate further comprises providing an etchant that etches silicon selectively to silicon oxide through the trenches to the substrate.
19. The method of claim 17, wherein the waveguide core comprises silicon nitride, and the heater element comprises a metal silicide resistive layer.
20. The method of claim 19, further comprising: depositing an intermediate contact layer on a first end of the heater element, the intermediate contact layer comprising a refractory metal or a refractory metal nitride; and depositing a copper or aluminum interconnect wiring layer on a portion of the intermediate contact layer.
Citation Information
Patent Citations
Polished polyimide substrate
US20040033006A1
Tunable optical source
US20040105480A1
Integrated optics and electronics
US20050063431A1
Temperature control of components on an optical device
US20160282557A1
Integrated optical microelectronic mechanical systems devices and methods
US20230358975A1