Hierarchical multiplexing for logical block encoding

Abstract

Systems, devices, and methods for performing hierarchical multiplexing while encoding a logical qubit or a logical block. A plurality of respective layer one copies are produced of each brick of a plurality of bricks of a target fusion network. A respective first quality metric is determined for each layer one copy of each brick of the plurality of bricks. Based at least in part on the first quality metrics, a first layer one copy of the respective layer one copies is selected for each brick of the plurality of bricks. The first layer one copies are fused together to produce an aggregate brick. This process is hierarchically iterated for one or more layers of sub-bricks of the plurality of bricks.

Description

Hierarchical Multiplexing for Logical Block EncodingPriority Information[0011 This application claims benefit of priority of U. S. Provisional Patent Application No. 63 / 517,209 titled “Hierarchical Multiplexing for Logical Block Encoding”, filed on August 2, 2023, which is hereby incorporated by reference as though fully and completely set forth herein.Technical Field

[0002] Embodiments herein relate generally to quantum computational methods, systems and devices, such as photonic devices (or hybrid electronic / photonic devices), semiconducting or superconducting quantum computing devices, or topological quantum computers for preparing fault-tolerant logical qubits in a quantum computer.Background

[0003] Quantum computing can be distinguished from “classical” computing by its reliance on structures referred to as “qubits.” At the most general level, a qubit is a quantum system that may exist in one of two orthogonal states (denoted as |0) and |1) in the conventional bra / ket notation) or in a superposition of the two states (e.g., -7= (|0) + 11)), By operating on a system (or ensemble) of qubits, a quantum computer may quickly perform certain categories of computations that would require impractical amounts of time in a classical computer.

[0004] Because quantum computing utilizes quantum states as computational units, quantum computing systems are typically very’ sensitive to environmental noise, degradation and decoherence. Accordingly, there is a robust field of research into developing effective and efficient fault tolerance and error correction into quantum computing systems. In a fault-tolerant quantum computing scheme, multiple physical qubits may be entangled together to represent a single logical qubit, to make the logical qubit less susceptible to error. This process is time and resource intensive, and improvements in the field of fault-tolerant quantum computing are desired to increase the efficiency and fault tolerance of logical qubit preparation.Summary

[0005] Some embodiments described herein include quantum computing devices, systems and methods for performing hierarchical multiplexing while encoding a logical qubit or logical block. In some embodiments, a classical computing system including a classical processor coupled to anon-transitory memory medium may execute program instructions to direct the method steps of a quantum computing system.

[0006] In some embodiments, a plurality of respective layer one copies are produced of each brick of a plurality of bricks of a target fusion network.

[0007] In some embodiments, a respective first quality' metric is determined for each layer one copy of each brick of the plurality of bricks,

[0008] In some embodiments, based at least in part on the first quality metrics, a first layer one copy of the respective layer one copies is selected for each brick of the plurality of bricks. In some embodiments, the first layer one copies are fused together to produce an aggregate brick. In some embodiments, this process may be iterated. For example, multiple copies may be produced of each of a plurality of aggregate bricks, and quality metrics may be determined for these copies and used to select which copies of the aggregate bricks to fuse together to form a larger, next layer aggregate brick,

[0009] In some embodiments, the process of producing copies, determining quality metrics, and selecting copies for fusion based on the quality metrics may be hierarchically performed for one or more additional levels. For example, each brick of the plurality of bricks may be produced through a redundant production of multiple sub-bricks, which are each analyzed for their quality metrics and the best sub-bricks may be selected for fusion to produce the plurality of bricks. This process may be further iterated, e.g., for sub-sub-bricks, etc., as desired.

[0010] The techniques described herein may be implemented in and / or used with a number of different types of devices, including but not limited to photonic, superconductor, or semiconductor quantum computing devices and / or sy stems, hybrid quantum / classical computing systems, and any of various other quantum computing systems.[Oil] Tlris Summary is intended to provide a brief overview of some of the subject matter described in this document. Accordingly, it will be appreciated that the above-described features are merely examples and should not be construed to narrow the scope or spirit of the subject matter described herein in any way. Other features, aspects, and advantages of the subject matter described herein will become apparent from the following Detailed Description, Figures, and Claims.Brief Description of the Drawings

[0012] For a better understanding of the various described embodiments, reference should be made to the Detailed Description below, in conjunction with the following drawings in which like reference numerals refer to corresponding parts throughout the Figures.

[0013] Figures 1A-I illustrate the utilization of surface codes to constructed an error-corrected fault-tolerant logical qubit, according to some embodiments;

[0014] Figure 1J illustrates an example of a qubit fusion system interfacing with fusion sites, in accordance with some embodiments;

[0015] Figure IK illustrates a qubit fission system interfacing with a classical computing system, according to some embodiments;

[0016] Figure 2A is a system diagram of a quantum computing system that may be utilized to implement fault-tolerant post-selection of logical encoded qubits, according to some embodiments;

[0017] Figure 2B is a diagram of a controller, according to some embodiments;

[0018] Figures 3A-B illustrate a 2D toy model of brick encoding, according to some embodiments;

[0019] Figures 4A-C illustrate a 3D 6-ring network for hierarchical multiplexing in logical block encoding, according to some embodiments;

[0020] Figure 5 is a flowchart illustrating a method for performing hierarchical multiplexing while encoding bricks, according to some embodiments;

[0021] Figure 6A illustrates two 6-qubit resource states that undergo a fusion to produce a single 10-qubit entangled resource state, according to some embodiments;

[0022] Figure 6B illustrates integration of two copies of a 10-qubit resource state into a multiplexing circuit, according to some embodiments;

[0023] Figure 6C is a legend that defines circuit elements shown in Figure 6D, according to some embodiments;

[0024] Figure 6D illustrates an interleaving module configured to utilize the fault-tolerant 10-qubit resource state, according to some embodiments;

[0025] Figure 6E illustrates how four interleaving modules may be interconnected and incorporated into a larger quantum circuit, according to some embodiments;

[0026] Figure 7 A illustrates performing two fusion measurements on two 10-qubit resource states to obtain a 16-qubit resource state, according to some embodiments;

[0027] Figure 7B illustrates a multiplexing circuit that receives two 16-qubit resource states and produces a single multiplexed 16-qubit resource state, according to some embodiments;

[0028] Figure 7C illustrates incorporating a multiplexed 16-qubit resource state into an interleaving module, according to some embodiments;

[0029] Figure 8A illustrates an ordered sequence of fusion measurements, according to some embodiments;

[0030] Figure 8B illustrates two stages of fusion measurements in a fusion network, according to some embodiments;

[0031] Figure 9A is a legend illustrating various circuit components, according to some embodiments;

[0032] Figure 9B is a circuit diagram illustrating a 2-to- 1 multiplexing scheme for using rasterized resource state generators to construct a brick, according to some embodiments;

[0033] Figure 9C is a circuit diagram illustrating routing of qubits to 1stand 2ndstage fusion measurements, according to some embodiments;

[0034] Figure 10 are circuit diagrams illustrating network router switches that route qubits either locally or to another resource state generator in tire fusion network, according to some embodiments;

[0035] Figure 11 A is a circuit diagram illustrating a circuit utilizing network switches to create multiple copies of a brick, according to some embodiments;

[0036] Figure 1 IB is a circuit diagram illustrating multiple interconnected circuits, each with multiple copies of a brick, according to some embodiments;

[0037] Figures 12A-C illustrates the construction of subsequent hierarchical brick layers using a circuit-based quantum computing, according to some embodiments;

[0038] Figures 13A-J illustrate quantum circuits for performing hierarchical multiplexing using circuit-based quantum computing, according to some embodiments;

[0039] Figures 14A-D illustrate two alternate corrections of a 2-dimensional syndrome graph, according to some embodimen ts; and

[0040] Figures 15A-D illustrate connected components of primal and dual syndrome graphs in two dimensions in accordance with some embodiments.

[0041] While the features described herein may be susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and are herein described in detail. It should be understood, however, that the drawings and detailed description thereto are not intended to be limiting to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents and alternatives falling within the spirit and scope of the subject matter as defined by the appended claims.DETAILED DESCRIPTION

[0042] Disclosed herein are examples (also referred to as ‘‘embodiments”) of systems and methods for performing fault-tolerant post-selection using various quantum computing systems.

[0043] Although embodiments are described with specific detail to facilitate understanding, those skilled in the art with access to this disclosure will appreciate that the claimed invention may be practiced without these details. Reference will now be made in detail to embodiments, examples of which are illustrated in the accompanying drawings. In other instances, well-known methods, procedures, components, circuits, and networks have not been described in detail so as not to unnecessarily obscure aspects of the embodiments.Qubits

[0044] Quantum computing relies on the dynamics of quantum objects, e.g,, photons, electrons, atoms, ions, molecules, nanostructures, and the like, which follow the rules of quantum theory. As used herein, a "‘qubit” (or quantum bit) is a quantum system with an associated quantum state that may be used to encode information. A quantum state may be used to encode one bit of information if the quantum state space can be modeled as a (complex) two-dimensional vector space, with one dimension in the vector space being mapped to logical value 0 and the other to logical value 1. In contrast to classical bits, a qubit may have a state that is a superposition of logical values 0 and 1. More generally, a “qudit” describes any quantum system having a quantum state space that may be modeled as a (complex) w-dimensional vector space (for any integer n), which may be used to encode n bits of information. For the sake of clarity of description, the term “qubit” is used herein, although in some embodiments the system may also employ quantum information carriers that encode information in a manner that is not necessarily associated with a binary' bit, such as a qudit.

[0045] Qubits (or qudits) may be implemented in a variety of quantum systems. Examples of qubits include: polarization states of photons; presence of photons in waveguides; or energy states of molecules, atoms, ions, nuclei, or photons. Other examples include other engineered quantum systems such as flux qubits, phase qubits, or charge qubits (e.g., formed from a superconducting Josephson junction); topological qubits (e.g., Majorana fermions); or spin qubits formed from vacancy centers (e.g., nitrogen vacancies in diamond),

[0046] As used herein, a distinction is made between a “physical qubit” which is a physical quantum system such as a molecule, atom, photon, etc. that exists in a 2-level quantum state, and a “logical qubit” which includes a plurality of physical qubits encoded (e.g., entangled) together according to a quantum error correcting code (such as a surface code) to encode logical quantum information. These terms are described in greater detail below.Figures lA-K - Surface Codes and Physical implementations

[0047] Qubits (and operations on qubits) may be implemented using a variety of physical systems. In some examples described herein, qubits are provided in an integrated photonic system employing waveguides, beam splitters, photonic switches, and single photon detectors, and the modes that may be occupied by photons are spatiotemporal modes that correspond to presence of a photon in a w aveguide. Modes may be coupled using mode couplers, e.g., optical beam splitters, to implement transformation operations, and measurement operations may be implemented by coupling single-photon detectors to specific waveguides. One of ordinary skill in the art with access to this disclosure will appreciate that modes defined by any appropriate set of degrees of freedom, e.g,, polarization modes, temporal modes, and the like, may be used without departing from the scope of the present disclosure. For instance, for modes that only differ in polarization (e.g., horizontal (H) and vertical (V)), a mode coupler may be any optical element that coherently rotates polarization, e.g., a birefringent material such as a waveplate. For other systems such as ion trap systems or neutral atom systems, a mode coupler may be any physical mechanism that couples two modes, e.g., a pulsed electromagnetic field that is tuned to couple tw o internal states of the atom / ion.

[0048] In some embodiments of a photonic quantum computing system using dual-rail encoding, a qubit may be implemented using a pair of waveguides. In some embodiments, a photon in a first w aveguide of the pair and no photon in a second waveguide of the pair (also referred to as a vacuum mode) may correspond to the |0) state of a photonic qubit. Alternatively, a state w ith a photon in the second waveguide and no photon in the first waveguide may correspond to the 11) state of the photonic qubit. To prepare a photonic qubit in a known logical state, a photon source may be coupled to one end of one of tire waveguides. The photon source may be operated to emit a single photon into the w aveguide to which it is coupled, thereby preparing a photonic qubit in a known state. Photons travel through the waveguides, and by periodically operating the photon source, a quantum system having qubits whose logical states map to different temporal modes of the photonic system may be created in the same pair of waveguides. In addition, by providing multiple pairs of waveguides, a quantum system having qubits whose logical states correspond to different spatiotemporal modes may be created. It should be understood that the waveguides in such a system need not have any particular spatial relationship to each other. For instance, they may be but need not be arranged in parallel.

[0049] Some embodiments described below' relate to physical implementations of unitary' operations that couple modes of a quantum system, which may be understood as transforming the quantum state of the system. For instance, if the initial state of the quantum system (prior to mode coupling) is one in which one mode is occupied with probability 1 and another mode isunoccupied with probability 1 (e.g., a state 110) in Fock notation), mode coupling may result in a state in which both modes have a nonzero probability of being occupied, e.g., a state a 110) + a2|01), where |ail2+ |a2|2= 1- Insome embodiments, operations of this kind may be implemented by using beam splitters to couple modes together and variable phase shifters to apply phase shifts to one or more modes. The amplitudes a₁ and a₂ depend on the reflectivity (or transmissivity) of the beam splitters and on any phase shifts that are introduced.

[0050] A single physical qubit (e.g., such as the 2-level physical qubit illustrated in Figure 1 with a quantum state | ) = ar|0) + a21)) may be used for quantum computation in principle. However, individual physical qubits are generally highly susceptible to noise and decoherence. Fault-tolerant quantum computing utilizes a plurality of entangled physical qubits to encode a single logical qubit to mitigate the frailty and / or short coherence times of individual physical qubits. In fault-tolerant quantum computing schemes, a plurality of physical qubits is entangled together according to a specific error-correcting code (e.g., using fusion measurements on resource states) to produce a single logical qubit that is less susceptible to noise and decoherence. Encoding qubits in this manner causes the resultant logical qubit to be less sensitive to error and noise, and resultant errors may be fixed via quantum error correction. Encoding a logical qubit may itself be vulnerable to errors.

[0051] Embodiments herein address these and other issues by implementing hierarchical multiplexing in fault-tolerant codes and channels to improve the accuracy and fidelity of encoded logical qubits. At a high level, various quality metrics may be employed to assess tire fidelity of an encoded brick, to determine whether to discard the brick, keep it for use in the quantum computation, and / or reroute to another location within a quantum circuit. As used herein, a “brick” refers to two or more resource states that are entangled together, which may be used to encode a logical block. As described in greater detail below, bricks may be iteratively entangled together at subsequent hierarchical stages to encode a logical block.

[0052] In some quantum computing methodologies, such as fusion-based quantum computing, a logical qubit is encoded from a plurality of physical qubits using a sequence of specific measurements (e.g., stabilizer measurements). The measurement sequence may be constructed where a subset of the physical qubits is measured (e.g., collapsing the quantum state and producing classical information, i.e., the measurement result) in such a way that the remaining unmeasured / un-collapsed degrees of freedom (e.g., a 2-dimensional subspace which has support over all the physical qubits) form the desired encoded logical qubit. Accordingly, the processes of performing stabilizer measurements and / or encoding a fault-tolerant logical qubit may receivea plurality of physical qubits as input and as output may produce both the encoded logical qubit and classical information (e.g., syndrome graph data) resulting from the measurement sequence.

[0053] In some quantum computing implementations, the classical information takes the form of syndrome graph data, where the syndrome graph is a geometric representation of the outcomes of the measurement sequence. Because the input physical qubits are prepared in a known initial state and measured according to a predetermined measurement sequence, it may be determined (e.g., using classical computing) how the syndrome should appear in the absence of any errors involving the physical qubits during the measurement sequence (e.g., Pauli or erasure errors). Accordingly, any deviation of the syndrome graph data from the expected result may be indicative of one or more errors within the logical qubit. In general, these deviations may not indicate precisely which measurement(s) had an error, or which type of error has occurred, as there may be more than one type of error or combination of errors that is consistent with a given observed deviation from the anticipated error-free syndrome graph. For example, a syndrome graph may be determined as a grid of parity checks for adjacent nodes of the grid, whereby a parity error may indicate that one or more of the adjacent nodes had an error, but the parity error may not indicate precisely which adjacent node had an error, or which error occurred,

[0054] As used herein, the term ‘‘syndrome graph data” refers to a set of classical information (e.g., data represented by digital values such as ones and zeros) that specifies the location of one or more syndromes and / or one or more erasure errors within tire syndrome graph of a logical block. Said another way, based on the knowledge of the particular geometry of the cluster state / error correcting code, measurement outcomes may be used to determine the syndrome graph data. In some embodiments, the syndrome graph data may further include correction operators for the syndrome graph output by a decoder.

[0055] Errors that occur during operations on an encoded logical qubit may have varying degrees of severity. For example, errors in a fault-tolerant logical qubit may cause logical failure if they link up in a way that spans the syndrome graph of the logical qubit. Conversely, localized errors that do not span the syndrome graph may be identifiable and correctable via quantum error correction. Embodiments herein perform hierarchical multiplexing by determining an error metric based on the syndrome graph data, and utilizing the error metric to determine how to utilize / route a plurality of multiplexed copies of a logical block within a quantum circuit. For example, multiplexing may be employed whereby multiple copies of each logical qubit are produced and the higher fidelity logical qubits are kept and used in a quantum computation, whereas the lower fidelity logical qubits are discarded, increasing the fidelity of the computation.As described in greater detail below, exemplary embodiments employ hierarchical multiplexing, where multiplexing is iterated for bricks at multiple hierarchical scales.

[0056] In some embodiments, the brick may be a component of a quantum error-correcting code where an operation (for example, a quantum gate acting on a logical qubit) may be performed on encoded logical information. For example, a brick may include multiple resources states that are entangled with one another in a specific way. Resource states are defined as a plurality of physical qubits prepared in a specific entangled manner. In some embodiments, 6-qubit resource states such as those illustrated in Figure 1H may be used, or other types of resource states may be used. Depending on the layer or stage, a brick may include a portion of a logical block, logical qubit, or logical gate, an entire one of any of these, or a combination thereof.

[0057] As used herein, a “logical block” refers to an entangled arrangement of qubits with sufficient structure to perform a logical operation on one or more inputs and provide one or more outputs. For example, when a sufficient number of bricks of sufficient size and complexity are entangled together such that the resultant aggregate brick is configured to perform one more or logical operations, the aggregate brick may be considered to be a logical block. Logical qubits and logical gates are both examples of logical blocks. In some embodiments, a logical block may include one or more input ports and one or more output ports. The logical operation(s) performed by a logical block may be fault tolerant, in some embodiments. Logical blocks are described in greater detail in Hector Bombin, Chris Dawson, Ryan V. Mishmash, Naomi Nickerson, et al., Logical Blocks for Fault-Tolerant Topological Quantum Computation, PRX Quantum 4, 020303 (2023). Note that in FBQC, resource states are entangled by performing fusion measurements on a subset of the qubits of the resource states. As one example, a brick that includes two entangled 6-qubit resource states (e.g., the brick 606 shown in Figure 6A) will have fewer remaining unmeasured qubits than were present in the 12 qubits contained in the original resource states (e.g., the 12 qubits in the two resource states 602 and 604), since two of the qubits (x0+ and xl-in Figure 6) are measured in a fusion measurement.

[0058] As used herein, “sub-brick” is used to describe the smaller bricks that make up a given brick, and “aggregate brick” is used to describe the larger brick that is obtained by fusing together a plurality of bricks. Note that the layers of a sub-brick and an aggregate brick are relative to the layer of the brick to which they refer, as the brick may be at different layers or stages (e.g., the brick may be any of the stages shown in Figure 4A, and the sub-brick and the aggregate brick are one stage lower and higher, respectively).

[0059] If the above-described surface code measurement schedule is applied for numerous time steps, the system effectively acts as a fault-tolerant quantum memon for the logical qubitencoded by the underlying surface code or, viewed another way, as a fault-tolerant logical identity gate on the logical qubit that is encoded by the underlying surface code. Viewed yet another -way, this process operates as a fault-tolerant logical channel,

[0060] Figure IB illustrates a 3-dimensional graphical depiction of such a fault-tolerant logical identity gate. The surface labeled 114 is the input to the gate and includes an arbitrary logical state encoded in a surface code, represented as the input checkerboard surface. Likewise, the surface labeled 118 identifies the output qubits after the identity gate I has been applied to it. The input and output surfaces, which may be associated with either the physical or relational arrangement of qubits, are connected to each other via an intervening volume that represents the unique set of measurements to be applied overtime. Accordingly, in Figure IB, time flows from left to right and the lighter shaded (front and back) and darker shaded (top and bottom) sides of the boundaries of the volume depict whether the primal or dual plaquettes are disposed on that boundary. Figure 1C represents the same concept but written in a more familiar quantum circuit notation illustrating the analogy between the more familiar quantum circuit. While Figure IB shows the logical identity gate, any gate can be depicted in this manner and such a depiction is one example of a logical block that specifies a set of instructions to be performed on the underlying surface code qubits to perform a logical operation (the identity gate in this example) on the logical qubit that is encoded by surface code. Other examples of such gates are the S gate, the Hadamard gate, and the CX gate, among other possibilities.

[0061] The protocol for preparing an encoded logical state may contain tw o parameters, L and Ld. Here L is referred to as the “distance” of the scheme, which corresponds to the length and width of the cross section shown in Figure IB - it determines the code distance of the surface code state being prepared. In some embodiments, L may be separated into two parameters. Lx and Ly, i.e., the code distance may be different in the two spatial directions. This may be desirable, for example, when there is an asymmetery in the noise model or logical error rates in the X and Z directions, and the code distance may be separately tuned in the two spatial directions. Ldis referred to as the “depth” of the scheme - it can be thought of as simulated time, i.e. the number of rounds of stabilizer measurements in CBQC, or the number of layers of resource states in FBQC. Ldmay determine the number of stabilizer checks in the protocol from which information may be gathered for post-selection. A minimal depth of Ld= 2 may be chosen, however, longer depths may also be used (using more overhead) to allow for more information to be collected in order to better predict logical errors on the output state.

[0062] The sequence of measurements performed over the flow of time illustrated in Figure IB (e.g., a sequence of measurements including selective fusion measurements) may include asubset of measurements that incur an error such as a Pauli error or an erasure error. To identify errors in the measurement outcomes, syndrome graph data may be generated from the collection of measurement outcomes resulting from the measurements of the physical qubits. For example, the bit values associated with a plurality of edge qubits may be combined to create a syndrome value associated with an adjacent vertex that results from the intersection of the respective edges, e.g., the result of fusion measurements. A set of syndrome values (or “syndromes”), also referred to herein as parity checks, may be associated with each vertex of the syndrome graph. Figure ID illustrates an example 2D representation of a syndrome graph including a plurality of interspersed syndromes and erasures. The parity check values may be found by computing the parity of the bit values associated with each edge of the syndrome graph incident to the vertex. In some embodiments, a parity computation entails determining whether the sum of the edge values is an even or odd integer, with the parity result being the result of the sum modulo 2. If no errors have occurred in the quantum state or in the qubit measurements, then all syndrome values should be even (or 0). On the contrary, if an error occurs, it may result in some odd (or 1) syndrome values.

[0063] In some embodiments, half of the bit values from the qubit measurements are associated with the primal boundary surfaces, and this syndrome graph is referred to herein as the “primal graph”. The syndrome graph resulting from measurements on the dual boundary surfaces is referred to as the “dual graph”. There is generally an equivalent decoding problem on the syndrome values of the primal and dual graphs,

[0064] Syndromes may be identified and appropriately removed via quantum error correction, via a process known as decoding. Decoding produces a recovery that is consistent with the syndrome, attempting to correct for the error. Decoding succeeds when the combined effect of the error and recovery’ does not give rise to a logical error. However, this process does not always succeed, and certain combinations of error and recovery may result in an error chain that spans the surface code and damages the logical information. In some embodiments, logical gap magnitudes for correcting syndromes may be extracted from syndrome graph data to determine an error metric associated with a logical encoded qubit (i.e., for the output surface code shown in Figure IB). This error metric may then be used for hierarchical multiplexing, to determine how and / or where to route each of a plurality of multiplexed copies of a brick, in some embodiments.

[0065] In some embodiments, hierarchial multiplexing may utilize information metrics based on visible syndrome and erasure information. In some embodiments, different metrics may be employed for ranking the quality of bricks based on their respective configurations of syndromes and erasures. For example, some embodiments utilize a logical gap (and variants thereof) whichdetermines an unsigned weight difference between inequivalent logical corrections as a metric for predicting logical error rates of bricks (also known as fault-tolerant channels) based on error¬ correcting codes. Advantagously, this metric is highly adaptable to various types of noise and decoders. In some embodiments, hierarchial multiplexing may be deployed to prepare low-error surface code logical qubits with low overheads under an i.i.d. model of Pauli error and erasure error rates. Hierarchial multiplexing strategies based on the logical gap may suppress the encoding error rate of a logical qubit.

[0066] Figures IE and IF illustrate an arrangement of physical qubits that may be used to perform a (Z2, Z3) measurement on four logical qubits qi-q4. The individual circles shown in the rectangular sheet 120 in the top half of Figure IF represent individual physical qubits, and the lines connecting adjacent qubits indicate entanglement (e.g., via fusion measurements), in the stack of d = 9 layers shown at 122 of Figure IF, the vertical direction represents tire depth of the logical qubit (i.e., time), which is a sequence of nine entangling measurements performed on the 9x9 grid of physical qubits representing each of the qubits qi-q4 as well as a portion of the auxiliary qubits 121.

[0067] The protocol for preparing an encoded logical state may contain two parameters, L and Ld. Here L is referred to as the “distance” of the scheme - it determines the code distance of the surface code state being prepared. In some embodiments, L may be separated into two parameters. Lx and £. i.e,, the code distance may be different in the two spatial directions. This may be desirable, for example, when there is an asymmetery in the noise model or logical error rates in the X and Z directions, and the code distance may be separately tuned in the two spatial directions. Ldis referred to as the “depth” of the scheme - it can be thought of as simulated time, i.e. the number of rounds of stabilizer measurements in CBQC, or the number of layers of resource states in FBQC. Ldmay determine the number of stabilizer checks in the protocol from which information may be gathered for post-selection. A minimal depth of Ld= 2 may be chosen, however, longer depths may also be used (using more overhead) to allow for more information to be collected in order to better predict logical errors on the output state.

[0068] Figure 1G illustrates how the physical qubits illustrated in Figures IE-F may be encoded using 18 units of physical hardware (e.g., 18 interleaving circuits). As illustrated, each interleaving circuit encodes a set of 36 physical qubits in the illustrated sheet. As one example, the physical qubits may be encoded using a raster scan methodology where the 36 qubits are sequentially produced, mutually entangled, and preserved for 36 time cycles using variable fiber optic cable lengths until all 18 interleaving circuits have completed 36 cycles, whereupon the next sheet of physical qubits may be encoded.

[0069] In some embodiments, hierarchical multiplexing may be performed on a portion of one or more bricks, where the lower layer components of a brick are referred to herein as “sub-bricks.” Figure 1G shows multiple sub-bricks stitched together into a single brick. As illustrated in Figure 1G, a given hardware block such as an interleaving circuit may be configured to be encoded as multiple sub-bricks that each include only a portion of one or more logical qubits. Each dashed box in Figure IG delineates (potentially together with corresponding boxes in subsequent sheets) a respective sub-brick. For example, as can be seen by comparison of Figure 1G with Figures IE and IF, the sub-brick 126 encodes a portion of the logical qubit ^2, the sub-brick 124 encodes portions of both qi and q, the sub-brick 128 encodes a portion of qi and is partially dormant, the sub-brick 130 is entirely dormant for the illustrated set of clock cycles, and the sub-brick 132 encodes a portion of a block of logical ancillary qubits. The sub-bricks in Figure IG as illustrated are stitched together (e.g., through fusion measurements in FBQC) to form the entire brick shown in Figure IG, which performs the Z2Z3 two-qubit measurement. In performing hierarchical multiplexing on sub-bricks, multiple copies of each of the sub-bricks may be first created separately (i.e., not yet stitched together), hierarchical multiplexing may be performed to select high-quality copies of each sub-brick, and the selected sub-bricks may be then entangled to produce the desired larger brick.

[0070] Figure 1H illustrates a logical block composed of a plurality of 6-qubit resource states in a fusion network, according to some embodiments. In the illustrated example, each resource state is composed of 6 physical qubits in a specific entangled arrangement. The entanglement is illustrated with thin lines connecting the different numbered qubits 1-6 of the resource state. Bold lines are shown to indicate 2-qubit fusion measurements that are performed on one qubit from each of two different resource states to construct the logical block. In some embodiments stabilizer resource states may be utilized, which may be described, up to local Clifford operations, by a graph G using a graph state representation. The graph state is defined as the quantum state |G) obtained by putting qubits in the |+) state at each vertex and performing a controlled-Z gate between qubits for which the corresponding vertices in the graph are neighbors. Stabilizer resource states are described in greater detail in Bartolucci, S., Birchall, P., Bombin, H. et al. Fusion -based quantum computation. Nat Commun 14, 912 (2023), In some embodiments, a resource state such as is shown in Figure 1H may be used to perform hierarchical multiplexing according to the circuit diagrams shown in Figures 6-11.

[0071] Figure 11 is a circuit diagram illustrating raster-scanned interleaving modules, according to some embodiments. The interleaving modules may be used to implement the qubits illustrated in the network shown in Figure IG, as one example.

[0072] When the interleaving length / is larger than the code depth d (not illustrated), a sub-brick may include multiple logical qubits and / or portions of logical qubits. Methods described herein for performing hierarchical multiplexing may be generally applied to various types of logical blocks, logical qubits, and / or components thereof, in various embodiments.

[0073] Figure 1J shows one example of qubit fusion system 134 in accordance with some embodiments. In some embodiments, qubit fusion system 134 may be employed within a larger FBQC system such as the quantum computing system 205 shown in Figure 2A.

[0074] Qubit fusion system 134 includes a fusion controller 140 that is coupled to a fusion array 138. Fusion controller 140 is configured to operate as described herein to direct the fusion sites to perform fusion measurements in a particular manner (e.g., in a particular basis). Fusion array 138 includes a collection of fusion sites that each receive two or more qubits from different resource states (not shown) and perform one or more fusion operations (e.g., Type II fusion) on selected qubits from the two or more resource states. The fusion operations performed on the qubits may be controlled by the fusion controller 140 via signals that are sent from the fusion controller 140 to each of the fusion gates via classical control channels 136a, 136b, etc. Based on the joint measurements performed at each fusion site, classical measurement outcomes in the form of classical data are output and then provided to a decoder system.

[0075] Figure IK shows one possible example of a fusion site 1501 as configured to operate with a fusion controller 140 to provide measurement outcomes to a decoder for fault tolerant quantum computation in accordance with some embodiments. In this example, fusion site 1501 may be an element of fusion array 138 (shown in Figure 1 J), and although only one instance is shown for purposes of illustration, the fusion array 138 may include any number of instances of fusion sites 1501.

[0076] The qubit fusion system 1505 may receive two or more qubits qubit 1 and qubit 2) that are to be fused. Qubit 1 is one qubit that may be entangled with one or more other qubits (not shown) as part of a first resource state and qubit 2 is another qubit that may be entangled with one or more other qubits (not shown) as part of a second resource state (e.g., the resource states 602, 604, 606, 608, 610 and / or 612 illustrated in Figures 6A-B). The fusion operations that take place at the fusion sites are fully destructive joint measurements between qubit 1 and qubit 2 such that classical information remains after the measurement is performed representing the measurement outcomes on the detectors, e.g., detectors 1503, 1505, 1507, 1509. Quantum information contained within Qubits 1 and / or 2 may be transferred to the remaining (i.e., unmeasured) qubits of their respective resource states. The classical information is decoded by adecoder 146 and may be used in subsequent steps of the described embodiments. For example, the result of the fusion measurement may be used to determine whether the fusion was successful (i.e., whether it resulted in a desired outcome), and / or whether the remaining unmeasured qubits of the resource states associated with qubits 1 and 2 are in a desired configuration, among other possibilities. More broadly, the fusion measurement results may be used to determine a quality metric to be used for brick selection in hierarchical multiplexing, in some embodiments,

[0077] Figure IK shows an illustrative example for one way to implement a fusion site as part of a photonic quantum computer architecture, according to some embodiments. In this example, qubit 1 and qubit 2 are dual rail encoded photonic qubits. Accordingly, qubit 1 and qubit 2 are input on waveguides 1521, 1523 and 1525, 1527, respectively. An interferometer 1524, 1528 may be placed in line with each qubit, and within one arm of each interferometer 1524, 1528 a programmable phase shifter 1530, 1532 may be applied to affect the basis in which the fusion operation is applied, e.g., XX, XY, YY, Z, Z, etc.). The programmable phase shifters 1530, 1532 may be coupled to the fusion controller 1519 via control line 1529 and 1531 such that signals from the fusion controller 1519 may be used to set the basis in which the fusion operation is applied to the qubits. For example, the programmable phase shifters may be programmable to either apply or not apply a Hadamard gate to their respective qubits, altering the basis (e.g., x vs. z) of the type II fusion measurement. In some embodiments the basis may be hard-coded within the fusion controller 1519, or in some embodiments the basis may be chosen based upon external inputs, e.g., instructions provided by the fusion pattern generator 144. Additional mode couplers, e.g., mode couplers 1533 and 1534 may be applied after the interferometers followed by single photon detectors 1503, 1505, 1507, 1509 to provide a readout mechanism for performing the joint measurement. In the example shown in Figure IK, the fusion site implements an un¬ boosted Type II fusion operation on the incoming qubits. One of ordinary skill will appreciate that any type of fusion operation may be applied (and may be boosted or un-boosted) without departing from the scope of the present disclosure. In some embodiments, the fusion controller 1519 may also provide a control signal to the detectors 1503, 1505, 1507, 1509, A control signal may be used, e.g., for gating the detectors or for otherwise controlling the operation of the detectors. Each of the detectors 1503, 1505, 1507, 1509 provides one bit of information (representing a “photon detected” or “no photon detected” state of the detector), and these four bits may be preprocessed at the fusion site 1501 to determine a measurement outcome (e.g., fusion success or not) or passed directly to the decoder 146 for further processing.Figures 2A-B - Quantum and Classical Computing Systems

[0078] Figure 2A illustrates a quantum computing system coupled to a classical computing system that may be utilized to implement method steps of embodiments described herein. As illustrated, the system includes a classical computing system 203 coupled to a quantum computing system 205 over a classical channel 212. The classical channel may relay classical information between the classical and quantum computing systems.

[0079] In some embodiments, the classical computing sy stem 203 includes one or more non-transitory computer-readable memory media 204, one or more central processing units (CPUs) or processor(s) 202, a power supply, an input / output (I / O) subsystem, and a communication bus or interconnecting these components. The processor(s) 202 may execute modules, programs, and / or instructions stored in memory 204 and thereby perform processing operations. The processor may comprise a dedicated processor, or it may be a field programmable gate arrays (FPGA), an application specific integrated circuit (ASIC), or a “system on a chip"’ that includes classical processors and memory, among other possibilities. In some embodiments, memory 204 stores one or more programs (e.g., sets of instructions) and / or data structures and is coupled to the processor(s).

[0080] In some embodiments, the classical computing system may have installed thereon a dedicated module acting as a controller, also referred to as a multiplexing controller. In some embodiments, the controller may include its own dedicated memory medium and / or processor(s), which may be a dedicated processor, an FPGA, or an ASIC, among other possibilities. In some embodiments, the controller may be implemented as software and may share processing resources with other control aspects of the classical computing system.

[0081] The classical computing system may be classical in the sense that it operates computer code represented as a plurality of classical bits that may take a value of 1 or 0. Programs may be written in the form of ordered lists of instructions and stored within the classical (e.g., digital) memory 204 and executed by the classical (e.g., digital) processor 202 of the classical computer. The memory 204 is classical in the sense that it stores data and / or program instructions in a storage medium in the form of bits (rather than as qubits containing quantum information), which have a single definite binary state at any point in time. The processor may read instructions from the computer program in the memory 204 and / or write data into memory, and may optionally receive input data from a source external to the computer 203, such as from a user input device such as a mouse, keyboard, or any other input device. The processor 202 may execute program instructions that have been read from the memory 204 to perform computations on data read from the memory 204 and / or input from the quantum computing system, and generate output from those instructions. The processor 202 may store that output back into the memory 204.

[0082] The quantum computing system 205 may include a plurality of qubits and a controller 206 configured to interface with the plurality of qubits 210 to control, direct and / or measure the qubits within the quantum circuit. The qubits may be configured to evolve in time under the directed influence of the controller, and a measurement system 208 may at times perform quantum measurements on all or a subset of the qubits to obtain quantum measurement results in the form of classical data bits (e.g., ones and zeros). The classical data from the measurement results may be intermediate results that inform behavior of the classical computing system and / or the quantum controller 206 during a quantum computation, and they may additionally include classical results of the quantum computation. The measurement results may be communicated to the classical computing system and / or the controller 206, and further the classical computing system may provide directions and / or instructions to the controller 206 and the measurement system 208 to guide the behavior of the quantum computing system to perform a quantum computation. For example, the classical computing system 203 may provide classical data signals used for quantum state preparation within the quantum computing system 205, in response to which the controller may prepare the states of the qubits 210 into a desired initial state for a particular quantum computation.

[0083] In some embodiments, physical qubits 210 are provided to the measurement system 208 and controller 206, where the measurement system and the controller function as a logical qubit encoder that perform a sequence of measurements on the physical qubits to produce a logical qubit (e.g., a fault-tolerant encoded logical qubit). For example, the measurement system and controller may perform a sequence of measurements on the physical qubits to en tangle them in such a way as to produce a logical qubit. Encoding the logical qubit will also produce syndrome graph data for the logical qubit as classical information, which is output to the controller of the classical computing system 203 via the classical channel 212. The controller analyzes the syndrome graph data to determine an error metric for the logical qubit. Depending on the error metric, the controller outputs instructions back to the quantum computing system 205 along the classical channel 212 to discard the logical qubit, to flag the logical qubit as poor quality and / or reroute it to a different aspect of the quantum computation, or to keep the logical qubit in the quantum computation.

[0084] Figure 2B is an illustration of components of a controller 206, according to some embodiments, and includes a non-transitory computer-readable memory medium 230, one or more processors or central processing units (CPUs) 232, and one or more input / output ports to communicate with other elements of the quantum computing system 205 and / or the classical computing system 201.Hierarchical Multiplexing for Logical Block Encoding

[0085] As described according to embodiments herein, hierarchical multiplexing performs post¬ selection and multiplexing at the fault-tolerance scale (e.g., the logical scale), making use of syndromes and erasures (or any other visible information) to select favorable parts of a topological error-correcting code. As used herein, “post-selection” refers to the analysis of one or more quality metrics of a brick, and routing the brick in a quantum circuit based on the quality metrics.

[0086] The quality metrics may vary depending on the scale (i.e., the layer or stage) of the brick. For example, binary quality metrics (e.g., that indicate that a brick is definitively either valid or invalid) may be used for smaller bricks, whereas bricks that are greater than a threshold size may utilize syndrome graph data to analyze their quality.

[0087] As used herein, “multiplexing” refers to the construction of redundant copies of a brick, where higher and lower quality copies may be dynamically rerouted in the quantum circuit (as one example, the highest quality copies may be kept and the lower quality copies may be discarded). In the context of FBQC, a target fusion network is divided into smaller pieces, each of which may be constructed multiple times in parallel, in order to create a fusion network that has fewer imperfections.

[0088] As used herein, a “fusion network” is a prescribed set of resource states and fusion events to be performed between these resource states, which produces a network of entangled resource states in a particular entangled arrangement. A fusion network may be represented by a graph (e.g., a fusion graph), where vertices represent resource states and edges represent fusions. A “target fusion network” is the desired fusion network in the absence of any hierarchical multiplexing, i.e., it is the intended fusion network to be constructed by a quantum computing system. A quantum computing system may include resource state generators (RSG), fusion routing networks, controllers, and a classical computing system, and may be configured to construct a fusion network.

[0089] Hierarchical multiplexing may also be used outside of FBQC. For example, in addition to the multiplexing that occurs in resource state generation, hierarchical multiplexing may utilize multiplexing in one or more higher levels of the fusion network. Hierarchical multiplexing may also be used for other models of computation besides than FBQC, e.g., circuit-based quantum computation.

[0090] In FBQC, the fusion network is built up by fusing individual resource states together. In hierarchical multiplexing, a larger fusion network is built incrementally from bricks, which maybe ranked and dynamically selected for at each stage. At the zeroth level, each brick is a single resource state as shown in a toy model in Figure 3A. For each resource state in the target fusion network, No copies may be constructed in the hierarchical multiplexing scheme. For the next, first level, a brick may include several resource states fused together.

[0091] In some embodiments, No copies of level one bricks may be constructed and ranked according to one or more quality metrics, and only Ni copies of these level one bricks may be kept. This process may be iterated, building up bricks of increasing size from lower level bricks, and post-selecting for the high quality ones. Each level is called a "stage", and the final stage may include ballistic fusions of the top-level bricks to complete the fusion network. The top-level ballistic fusions may occur without multiplexing (i.e., without multiple redundant copies of each brick).

[0092] Embodiments herein may employ a "‘dicing scheme”, by which is meant a method for dividing up the target fusion network into different stages. Each stage includes a set of disconnected bricks to be fused together, where each brick may be multiplexed. At the lowest level (the zeroth level), the bricks are resource states, whereas higher level bricks (i.e., at higher stages) are sets of resource states fused together. We may specify a dicing scheme by a set of stages (So; Si;...; SK), where each stage S, is a set of fusions in the target fusion network that are to be performed. Each stage is performed many times in parallel and a subset of the bricks exhibiting the highest quality at each stage may be kept for subsequent stages.

[0093] Various quality metrics may be used to direct the post-selection strategy, to assess the quality of each brick and rank them. As a first example, a mixed erasure / syndrome score may be determined, where each brick is assigned a score s(b) = aNs+ Ne, where Nsis the number of syndromes in the syndrome graph data, Neis the number of erasures in the syndrome graph data, and a and are tunable parameters. In some embodiments, the quality metric of a brick may be determined based on a logical gap, as described in greater detail below.

[0094] Figures 3A-B illustrate a simple 2D toy example, where the resource states are four qubit states, and the target fusion network is described by a 2D square lattice. For example, Figure 3A illustrates a single resource state represented as a node and containing four qubit states that may undergo two-qubit fusion measurements with neighboring resource states along the illustrated lines. Figure 3B illustrates a dicing strategy for the 2D network, according to some embodiments. As illustrated. Stage 0 bricks include single resource states. Stage 1 bricks include pairs of resource states fused together. Stage 2 bricks include fused pairs of stage 1 bricks. The final stage (not illustrated) involves ballistically fusing all stage 2 bricks together, completing the targetfusion network. Note that at each stage multiple copies may be created of each brick, where the best copies are selected to complete the fusion network.

[0095] A more realistic example of a fusion network is the 6-ring network. In a 6-ring network, resource states are 6-qubit cluster states arranged on a ring. The fusion graph for this network is a cubic lattice. Embodiments herein utilize a multi-stage hierarchical multiplexing scheme, where at each stage pairs of lower-level bricks are fused together. Pairs are fused along the x, then y, and then z directions in sequence, and this process may then be repeated to get even larger bricks. Figure 4A illustrates an example dicing scheme for the 6-ring fusion network for the zeroth stage through the fourth stage. At each stage, multiplexing may be employed to select the best bricks for fusion at each stage. An example is shown in Figure 4B, where 3:1 multiplexing is employed for level-3 bricks (following the dicing scheme of Fig. 4A), where the best level-3 bricks 412a-c and 414a-c are selected to create a level-4 brick 416.

[0096] Hierarchical multiplexing may be utilized to reduce both erasures and Pauli errors in the produced fusion network. Figure 4C shows an example of using hierarchical multiplexing in the 6-ring fusion network where fusions inside a brick are post-selected. With post-selection, bricks such as the delineated brick 418 may be selected that have fewer erasures on the dot-dashed and solid line fusions to selectively suppress erasures on these fusion measurements. Pauli errors on both measurements from the fusions with suppressed erasures and errors (dot-dashed lines) and measurements from the fusions with suppressed erasures and partially suppressed errors (solid lines) may be indicated by syndromes inside the post-selected bricks. By picking copies of bricks without syndromes, Pauli errors may be suppressed as well. Long chains of Pauli errors that span the brick will not light up syndromes inside the brick and cannot be post-selected out, but these higher order Pauli errors occur with much lower probability than the 1storder Pauli errors that are caught. As a result, most of the errors are restricted to the ballistic fusions (dashed lines) that lie between the bricks and don't have any post-selection. As illustrated in Figure 4C, these ballistic fusions form a small fraction of the fusions and therefore most of the errors and erasures can be suppressed. With larger brick size, this suppression may be further increased but larger brick sizes may also require more post-selection. In the limit of extremely large brick size, errors are isolated into 2D planes which have a much higher threshold than the original 2D fusion network. As an example, the 3D 6-ring fusion network has an erasure threshold of ~12% and an error threshold of ~1% while the 2D limit has an erasure threshold of -50% and an error threshold of -11%.

[0097] To determine an appropriate multiplexing scale (i.e., a dicing strategy and an allocation of multiplexing overhead for each stage), two competing effects may be considered. For a fixedmultiplexing budget, smaller bricks may be more effectively multiplexed because there are more choices out of the bricks that are created. However, larger bricks leave fewer ballistic fusions interfacing the bricks which cannot be multiplexed away.

[0098] In some embodiments, these competing considerations may be quantitatively investigated to optimize the dicing scheme and the allocation of multiplexing overhead at each stage.Figure 5 -- Flowchart for Hierarchical Multiplexing of Logical Blocks

[0099] Figure 5 is a flowchart that illustrates a method for performing hierarchical multiplexing for encoding logical qubits or logical blocks, according to some embodiments. The method shown in Figure 5 may be used in conjunction with any of the computer systems or devices shown in the above Figures, among other devices. For example, the method shown in Figure 5 may be performed by a quantum computing device or system as illustrated in Figures 2A and 2B. The quantum computing system may further include a controller (e.g., the controller 206 illustrated in Figure 2B) to direct the described method steps, and may be included in (or be coupled to) a classical computing system for processing classical information and directing operations of the quantum computing system. For example, the controller may include one or more processors configured to execute program instructions stored on a non-transitory computer- readable memory medium. In some embodiments the methods described in Figure 5 may be utilized in a quantum communication network, quantum internet, or more generally in any application where it is desired to encode high fidelity qubits. It is to be understood that this method may be used by any quantum computing architecture, and these other architectures should be considered within the scope of the embodiments described herein. As illustrated, the method shown in Figure 5 may proceed as follows.

[0100] At 502, a plurality of respective layer one copies are produced for each brick of a plurality of bricks of a target fusion network. The methods of Figure 5 describe utilizing a target fusion network in the context of FBQC. More generally, tire embodiments described herein may be used in other types of quantum computing applications, such as circuit-based quantum computing. In these embodiments, the plurality of bricks may be components of other types of fault tolerant quantum networks.

[0101] In some embodiments, a controller such as the controller 206 illustrated in Figure 2B may direct a quantum circuit to produce the layer one copies. The target fusion network may be a Kagome 6 network, or another type of fusion network. Tire bricks may be at any fusion stage of the target fusion network. For example, in the 6-ring fusion network shown in Figures 4A-C, the bricks may be stage 0, 1, 2, 3 or 4 bricks. To take one example, if the plurality of bricks are stage3 bricks, multiple copies of each stage 3 brick may be produced as shown in Figure 4B (where 3 copies of each of two stage 3 bricks are produced). Note that the term “layer one” as used herein is an identifier to distinguish from other hierarchical layers in the multiplexing scheme, and does not imply that the copies are necessarily made in stage 1.

[0102] In an FBQC implementation, the bricks are comprised of physical qubits within multiqubit resource states. Each resource state includes a plurality of physical qubits prepared in a specific entangled state. For example, in some embodiments a 6-qubit resource state is employed (e.g., as shown in Figure 1H), as prescribed by the error-correcting code and desired logical operation. At each time step, a subset of the qubits of each resource state are fused with respective qubits of other resource states (thus creating higher level bricks), and a remaining subset of the qubits of each resource state are propagated to a subsequent time step. The fusion measurement causes the unmeasured qubits of the resource states to become entangled with each other, and this entangled quantum information is carried forward until the end of the computation, whereupon all remaining resource state qubits may be measured to produce classical measurement results. As described herein, the logical block includes the resource states that are input into the block (e.g., the input surface 114 from Figure 1G), the classical information that results from the fusion measurements, and the qubits that are output at the back end of the block (e.g., the output surface 118 from Figure 1G).

[0103] In some embodiments, the size and number of bricks in the plurality of bricks is determined based at least in part on a number of layer one copies, a circuit switching complexity, and a complexity of the first quality metrics. For example, brick size and number may be selected to balance the overhead for producing more copies with the number of ballistic fusions that are performed (e.g., a smaller brick size will result in a larger number of bricks for a given aggregate brick, which will increase the number of ballistic fusions). Further, if one has access to a high degree of switching (e.g., if one can switch any n inputs to any n outputs) and high-accuracy quality metrics, fewer input copies may be used to achieve high-quality output bricks.

[0104] In some embodiments, the plurality of bricks of the target fusion network are mutually disjoint. For example, each brick may contribute to a separate and distinct portion of the target fusion network.

[0105] At 504, a respective first quality metric is determined for each layer one copy of each brick of the plurality of bricks. For example, a first quality metric may be determined for each of the six copies 412a-c and 414a-c shown in Figure 4B. In some embodiments, syndrome graph data for the copies of the bricks is received, and the quality metric is determined based on the syndrome graph data. The bricks may be encoded blocks that each include a plurality' of physicalqubits, and the syndrome graph data may include classical information describing outcomes of the encoding process of each brick. The syndrome graph data may specify the locations of one or more syndromes (i.e., parity errors) and / or one or more erasure errors in the syndrome graph of the logical qubit. The syndrome graph data may also specify a respective set of corrected edges produced by a decoder for each of a first and second correction of the syndromes and / or erasure errors, as described in greater detail below.

[0106] The syndrome graph data may include one or more syndromes, which represent one or more Pauli errors in the syndrome graph. A Pauli error refers to, as one example, a qubit flip error where a qubit has flipped its value (e.g., in the specific case of a dual-rail encoded photonic qubit, the photon may have inadvertently moved to the other waveguide). The syndrome graph data may further contain one or more erasure errors, which represent locations where a physical qubit has escaped the circuit (e.g., a photon may have tunneled out of and escaped the waveguide). An illustration of syndromes and erasure errors within a syndrome graph is shown in Figure ID.

[0107] In some embodiments, the quality metric may be determined based on the total number of syndromes and erasures in the syndrome graph data for the brick. For example, the quality metric may be determined as a score s(b) = aNs+ βNe, where Ns is the number of syndromes in the sy ndrome graph data, N is the number of erasures in the sy ndrome graph data, and a and β are tunable parameters. In some embodiments, the first quality metric is a weighted summation of a number of syndromes and erasures contained within a respective syndrome graph of each layer one copy. For example, rather than simply considering the total number of syndromes Nsand erasures Nein determining the score s(b), each syndrome and / or erasure may be weighted based on its location in the syndrome graph, based on the expected rate of error or erasure (as, for example, may be obtained from aggregate statistics from the measurement system), or based on any other observable information communicated from the hardware modules that may be used to assess the reliability of measurement outcomes from the measurement system.

[0108] In some embodiments, the first quality metric is a logical gap magnitude of the respective syndrome graph of each layer one copy. The logical gap may be determined from the syndrome graph data. The logical gap magnitude is a magnitude of the logical gap, where the logical gap is the difference in weights between first and second correction operators belonging to distinct classes of correction. In some embodiments, the first and second corrections correct for syndromes indicated by the syndrome graph data. In some embodiments, the weight of a correction operator is computed as a real-valued monotonic function of the number of syndromegraph edges that it corrects (i.e., the number of non-identity single-qubit Pauli operators in the correction).

[0109] In some embodiments, the first quality metric is a summation over the set of distinct logical error classes of a decaying exponential function of the respective magnitudes of the respective logical gaps. More generally, any monotonically decreasing function of the logical gap magnitudes may be used for the error metric, and the specific form of function may be determined empirically to impro ve performance metrics of the fault-tolerant post-selection procedure.

[0110] In some embodiments, aggregate quality’ metrics are determined based at least in part on the first quality metrics for the layer one copies of the plurality of bricks. For example, rather than analyzing the quality of the brick copies in isolation, an aggregate quality metric may be considered that looks at the quality’ of the fused combination of the plurality of bricks within an aggregate brick. As one example, it may be considered whether the errors in adjacent bricks line up to form a lattice-spanning error for the aggregate brick. More generally, the aggregate quality metric may consider how likely it is for a set of syndromes and erasures of a brick to result in an overall logical error of the target fusion network, given knowledge of the syndromes and erasures of the copies of the other bricks in the target fusion network. For example, a first copy of a first brick may have a high likelihood of a lattice -spanning logical error when fused to a first copy of a second brick (e.g., if their erasures and / or syndromes happen to line up in an adverse way), but may have a low likelihood of a lattice-spanning logical error when fused to a second copy of the second brick. Note that the aggregate quality metric may be qualitatively different from the first quality metrics considered in isolation. For example, a copy of a first brick with a relatively poor individual quality metric may have a better aggregate quality metric when considered in combination with a particular set of copies of other bricks in the target fusion network.

[0111] At 506, based at least in part on the first quality metrics, a first layer one copy of the respective layer one copies is selected for each brick of the plurality of bricks. For example, the layer one copy with the highest first quality metric may be selected. In Figure 4B, copies are selected for the left (412a-c) and right (414a-c) sets ofbricks that have tire fewest number of missing fusions, leading to a higher quality metric in the fused result 416. In some embodiments, aggregate quality metrics are used instead of the first quality metrics when performing selection of the layer one copies.

[0112] At 508, the first layer one copies are fused together to produce an aggregate brick. This is illustrated schematically in the center of Figure 4B at 416. For example, a controller such as thecontroller 206 illustrated in Figure 2B may direct the quantum circuit to fuse together tire first layer one copies.

[0113] In some embodiments, the layer one copies for each brick are rank ordered based on their respective quality metrics, and respective layer one copies from each brick of the plurality of bricks are fused together based on tire rank ordering to produce a plurality of logical qubits. In other words, rather than only keeping the highest quality copy for each brick, the copies may be rank ordered and may be paired based on their rank ordering. For example, a subset of the copies may be kept and paired (e.g., 50% of copies with the highest quality), or all of the copies may be kept and paired according to the rank ordering (e.g., the two highest quality copies are fused together, the two second highest quality copies are fused together, etc.)

[0114] In some embodiments, for any copies that are determined to not be kept and fused, instructions may be provided to discard the copies. For example, the controller may provide instructions over a classical channel to the quantum computing system to discard these copies. In some embodiments, these copies may be rerouted in the quantum circuit, and kept for use in some other aspect of the quantum computation.

[0115] In some embodiments, the methods described in reference to steps 502-508 may be hierarchically iterated for one or more additional stages of the target fusion network. For example, producing the plurality of respective layer one copies of each brick of the plurality of bricks may itself include multiplexing to produce higher quality layer one copies. For example, for each layer one copy of each brick of the plurality of bricks, a plurality' of respective layer two copies of each sub-brick of a plurality of sub-bricks of the respective brick may be produced. (Note that “layer two” is at a lower stage than “layer one”, e.g., if the layer one copies are for stage 3 bricks, the layer two copies are for stage 2 sub-bricks). A respective second quality metric may be determined for each layer two copy of each sub-brick of the plurality of sub-bricks. Based at least in part on the second quality metrics, a first layer two copy of the respective layer two copies is selected for each sub-brick of the plurality of sub-bricks; and the first layer two copies are fused together to produce the respective layer one copy.

[0116] In some embodiments, the second quality metrics for the layer two copies may be used to inform the determination of the first quality metrics of the layer one copies. In other words, the first quality metrics may be determined based at least in part on the second quality metrics. As one example, quality metrics (such as one based on counting erasure and syndromes) may be updated based on the performance of the fusions between two or more copies. For example, the second quality metrics may specify locations of erasures and / or syndromes in the layer two copies of the sub-bricks, and it may be determined, when the sub-bricks are aligned to be fusedinto bricks, whether these erasures and / or syndromes connect to one another across adjacent sub¬ bricks, The first quality metric may rate erasures and / or syndromes that line up across adjacent sub-bricks as lower quality than erasures and / or syndromes that do not line up across adjacent sub-bricks, as these may be less likely to cause a lattice -spanning (and hence uncorrectable) error.

[0117] Using second quality metrics as inputs to the first quality metrics may enable more efficient and faster computation. In some embodiments, an exposure metric for the layer two copies may be used to determine the first quality metric. An exposure metric may be determined for each layer two copy (i.e., for each sub-brick), and the exposure metric may be updated for the fused layer one bricks. Exposure may be calculated and stored in a classical data structure that is conveniently and quickly updated and accessed.3. Additional Technical Detail

[0118] The following numbered paragraphs provide additional technical detail and description regarding embodiments herein.Figures 6-7 - Implementing Hierarchical Multiplexing with Interleaving Circuits

[0119] Figures 6A-E illustrate an example of how hierarchical multiplexing may be physically implemented when encoding a brick with a 6-ring network using interleaving circuits, according to some embodiments,

[0120] Figure 6A illustrates two 6-qubit resource states that undergo a fusion between xo+ of resource state 0 (602) and xi- of resource state 1 (604), leading to a single 10-qubit entangled resource state (606), according to some embodiments. Note that this process corresponds to the transition from stage 0 (402) to stage 1 (404) shown in Figure 4A. The fusion measurement shown in Figure 6A also produces classical information 605 (i.e., the fusion measurement result), which may be output to a classical processor for determining a quality metric.

[0121] Figure 6B illustrates how two copies (608 and 610) of the 10-qubit resource state of Figure 6A may be integrated into a multiplexing circuit, according to some embodiments. As illustrated, each of the 10 qubits from each of the two resource states is routed to a respective 2 to 1 multiplexer (MUX) 614. In some embodiments, rather than having a dedicated 2-to-l MUX for each pair of qubits, a single larger MUX may receive two or more pairs of qubits. In these embodiments, each input port of each MUX will receive a unique qubit. The MUXes are each coupled to a controller 206 which is configured to instruct the MUXes which of their two input qubits to route to the output, resulting in a fault-tolerant 10 qubit resource state 612. To preserveentanglement, the controller may direct each of the MUXes to select a qubit from one of the resource states 608 and 610, depending on which resource state has a higher quality metric. The controller 206 may receive classical measurement results of the fusion measurements used to produce the resource states and provide instructions to the MUXes to select the resource state with the higher quality metric. To avoid clutter, only a single classical input 617 to the controller from the resource state 610 and a single output 619 to one of the MUXes is illustrated in Figure 6B, but the controller may be connected to receive input from both resource states 608 and 610 (as well as other elements of the quantum circuit, potentially) and provide instructions to each of the illustrated MUXes.

[0122] Figure 6C is a legend that defines circuit elements shown in Figure 6D, according to some embodiments. A modified fusion gate is F’ is defined, which is controllable to receive two inputs and either perform a fusion measurement, separately measure the qubits in the X, Y or Z basis, or perform a phase shift followed by a Z -measurement (e.g., for magic state preparation). Figure 6C additionally defines the symbol used to denote a delay line with a duration of x clock cycles.

[0123] Figure 6D illustrates an interleaving module configured to utilize the fault-tolerant 10-qubit resource state 612, according to some embodiments. Note that the circuit shown in Figure 6D corresponds to two of the physical qubits shown as open circles in the circuit of Figure IF.

[0124] Figure 6E illustrates how' four of the interleaving modules illustrated in Figure 6D may be interconnected and incorporated into a larger quantum circuit, according to some embodiments.

[0125] Figures 7A-C illustrate a physical implementation of a subsequent level of hierarchical multiplexing, relative to that shown in Figures 6A-E, according to some embodiments. Said another way, Figures 7A-C illustrate how to implement in hardware a multiplexing process on the level 1 bricks 404 of Figure 4A to obtain multiplexed level 2 bricks 406.

[0126] Figure 7A illustrates how two fusion measurements are performed on two 10-qubit resource states (i.e., level 1 bricks) to obtain a 16-qubit resource state (i.e., a level 2 brick), according to some embodiments. Classical measurement results 705 are produced during the fusion measurements, w hich may be output to a controller to determine a quality metric and perform hierarchical multiplexing. Note that the qubits y00-, y01-, y10- and y11- are measured (i.e., destroyed) during the two fusion measurements, hence reducing the total number of qubits from 20 to 16.

[0127] Figure 7B illustrates a multiplexing circuit that receives two of the 16-qubit resource states shown in Figure 7B, routes each qubit to a respective 2-to-l MUXer, and produces a single multiplexed 16-qubit resource state, according to some embodiments. The controller 721 may be configured to receive classical measurement results from the resource states (shown at 717 forthe resource state 710) and direct the MUXers which of the two input qubits to select (shown as output 719 for one of the MUXes in Figure 7B), depending on the quality metrics of the two resource states 708 and 710. For example, depending on the quality metrics associated with the resource states 708 and 710, the controller may direct each of the 16 MUXers to select and output the qubits from either the resource state 708 or 710. Note that the controller 721 may be the same as or a different controller from the controller 206 illustrated in Figure 6B.

[0128] Figure 7C illustrates how the multiplexed 16-qubit resource state produced in Figure 7B may be incorporated into an interleaving module. Note that the circuit shown in Figure 7C corresponds to four of the physical qubits shown as open circles in the circuit of Figure IF,Figures 8-11 - Raster Scanning to Implement Fusion Network

[0129] Figures 8-11 illustrate an alternative implementation to what is shown in Figures 6-7 for performing hierarchical multiplexing when constructing a brick, according to some embodiments. The circuit diagrams shown in Figures 8-11 utilize fewer resource state generators (RSGs) than the schemes shown in Figure 6-7, at the cost of a longer time for constructing the brick. At a high level, the circuits shown in Figures 8-11 perform a raster scanning procedure to sequentially perform fusion measurements, rather than performing them concurrently as in the embodiments shown in Figure 6-7. For example, in the raster scanning methodology, a single resource state generator (RSG) may create a physical qubit that is fused at a subsequent time step with a physical qubit created by the same RSG. Accordingly, a single RSG may perform the desired fusion measurement in two sequential time steps. In the embodiments shown in Figures 6-7, the corresponding fusion measurement may be performed in a single time step with qubits produced by two separate RSGs. Either of the two methodologies may be more desirable, depending on specifics of the hardware cost, efficiency, and / or other considerations of the quantum computer.

[0130] Figure 8A illustrates an ordered sequence of fusion measurements, according to some embodiments. The letters (x,y,z) indicate the direction separating the two qubits to be fused, and the subscripts 1 and 2 indicate the stage of the fusion measurement. As illustrated, an ordered sequence of fusion measurements is sequentially performedy1→ z1→ x2→ y2→ z2. In each fusion measurement, one of the qubits is labelledand the oilier is labelled Figure 8B illustrates two stages of fusion measurements in a fusion network, according to some embodiments. The left half of Figure 8B illustrates the stage 1 fusion measurements (illustrated with a subscript 1 ), which are performed sequentially according to tire order shown in Figure 8A,followed by the stage 2 fusion measurements, which are also performed sequentially x2→ y2→ z2, between adjacent bricks in the fusion network.

[0131] Figure 9A is a legend illustrating various circuit components used in subsequent Figures, according to some embodiments. As illustrated, a 6-qubit resource state generator 902 is shown as a large positively-sloped hashed rectangle with 6 single lines emanating from it, which correspond to the 6 entangled qubits of the resource state. A network / local switch router 904 is illustrated as a square enclosing a capital “N”, with a single qubit input and two outputs to a local destination (solid) and a network destination (dashed). Note that “local"’ means that the qubit is routed to a location within the same interleaving circuit (e.g., potentially to be fused by another qubit created by the same RSG), whereas “network” means that the qubit is routed to another interleaving circuit in the quantum network. A delay line 906 is illustrated as a loop, and may be of various durations, A stage router 908 is illustrated as a negatively sloped hashed rectangle with one input and three outputs, where the three outputs determine which of three sequential fusion stages to route the input qubit. Some of the stage routers in the subsequent Figures have two outputs (rather than 3). A brick multiplexer (“muxer”) 910 is illustrated as a positively-sloped hashed rectangle with two qubit inputs (solid lines on left), one qubit output (solid line on right) and a classical control input (dashed arrow). The brick muxer receives the two qubits and selects one to output based on the classical control input. Note that the brick muxer is distinguishable from the stage router by having a positive slope on its hash marks, whereas the stage router has negatively sloped hash marks. A multiplex (“mux”) controller 912 is illustrated as a dashed rectangle with internal hashing, which receives input from a classical processor and outputs instructions (e.g., to a brick muxer). Finally, a fusion circuit 914 is illustrated as a curved box with two qubit inputs (solid lines) and a classical instruction input (dashed arrow). Tire classical instruction input may be received from a controller and may determine which type of fusion measurement to perform.

[0132] Figure 9B is a circuit diagram illustrating a 2-to-l multiplexing scheme for using rasterized resource state generators to construct a brick, according to some embodiments. Two 6-qubit RSGs create 6 qubits each, which are routed to respective stage routers. The stage routers direct the input qubits, after a time delay, to one of two brick muxers, along with a qubit from the other RSG. The mux controller directs the brick muxers to select one of the two input qubits, which is routed to a fusion circuit.

[0133] Figure 9C is a circuit diagram illustrating routing of qubits to 1stand 2ndstage fusion measurements, according to some embodiments. The top 6 brick muxers are routed to 1ststagefusion measurements shown in the left half of Figure 8B, and the bottom 6 brick muxers are routed to 2ndstage fusion measurements shown in the right half of Figure 8B.

[0134] Figure 10 are circuit diagrams illustrating network router switches that route qubits either locally or to another resource state generator in the fusion network, according to some embodiments. Prior to routing the qubits to stage routers, the qubits may first pass through network router switches to route the qubits either locally or to the network.

[0135] Figure 11 A is a circuit diagram illustrating a circuit utilizing network switches to create multiple copies of a brick, according to some embodiments. Multiplexing may be performed on the multiple copies, e.g., to select the highest quality copies for routing to higher layers of the circuit. Figure 1 IB is a circuit diagram illustrating multiple interconnected circuits, each with multiple copies of a brick, according to some embodiments. Figures 11A-B illustrate an example implementation of the hierarchical aspect of the multiplexing scheme, as the multiplexed sub¬ bricks created via the circuits shown in Figures 9A-C are used to create bricks that are themselves redundantly created and multiplexed, in some embodiments.Figures 12-13 - Hierarchical Multiplexing for Circuit-Based Quantum Computing

[0136] Figures 12A-C and 13A-G illustrate quantum circuits and methods for performing hierarchical multiplexing using circuit-based quantum computing (CBQC). As opposed to the fusion-based implementations described for performing hierarchical multiplexing, Figures 12A-C and 13A-G illustrate circuit configurations for utilizing CBQC in a hierarchical multiplexing scheme. Note that while the physical implementations are quite different, the high-level logic for selecting copies of sub-bricks for constructing larger bricks in a fault tolerant code based on quality metrics may be similar for both CBQC and FBQC implementations.

[0137] Figure 12 A illustrates a brick illustrated as a grid of entangled CBQC qubits that are produced w ith two different types of stabilizer measurements (illustrated as shaded and unshaded boxes). Figure 12B illustrates three copies of each of two bricks, A and B, where ancilla qubit measurements (physical brick measurements, BM) are performed for the second copy of brick A and tire first copy of brick B. Figure 12C illustrates a subsequent stage in the hierarchical multiplexing scheme.

[0138] Figure 13A utilizes logical block notation to illustrate a 4 GHZ state. The spacetime diagram on the left of Figure 13A corresponds to a brick that outputs a 4GHZ state stabilized by {ZZZZ, XXII, IXXI, IIXX}. The four white ports on top are the output surface codes, whose distance may be tuned by changing the dimensions of the brick. The light and dark shaded surfaces correspond to X and Z-type boundaries, respectively. Time goes from bottom to top.The right half of Figure 13A uses a shorthand "tensor network" notation to denote the brick. Each brick has a distance that may be tuned. Each brick may be built and multiplexed before the 4GHZ projection is applied. Figure 13B illustrates another type of logical block that is stabilized by {XXXX, ZZII, IZZI, IIZZ} and is denoted by a dark-shaded circle, as opposed to the light shaded circle of the logical block shown in Figure 13A. Both logical blocks may be utilized as either state preparations or projections,

[0139] Figure 13C illustrates how the logical block of Figure 13B may be used for performing a set of "transversal" measurements between 4 surface codes. Figure 13D illustrates the four logical blocks that are included in the transversal measurements shown in Figure 13C. These operations only take place on the inner and upper surfaces of the surface codes, which are illustrated in Figure 13E.

[0140] Figure 13F illustrates these four transversal measurements in an alternative representation, where the four bricks of Figure 13D are illustrated as 5x5 grids and the lines denote the couplings of the transversal measurements. Figure 13F depicts a few "corresponding pairs" of qubits. Not all pairs are shown, and the measurements may take place on all qubits of all surface codes,

[0141] Figure 13G illustrates a quantum circuit that may be used to implement these measurements. The operation includes performing measurements of {XXXX, ZZII, IZZI, IIZZ} between corresponding qubits of the four surface codes, as shown in the quantum circuit diagram. Note that there are many possible circuit for implementing this, in various embodiments. After the measurement is done, the surface code qubits may be measured out.

[0142] Figure 13H illustrates how each brick may be composed of a number of light and dark shaded tensors itself, in a 3D lattice-like structure, a portion of which is shown in the inset in Figure 13H. Each of the shaded nodes corresponds to either a 4GHZ preparation or projection. To turn it into a circuit, the 3D network is extrapolated into a linear one (see Figures 13I-J), with long-range connections.

[0143] Figure 131 illustrates extrapolating the network into a linear ordering, with light-shaded tensors on the bottom, and dark-shaded ones on top. In principle, any ordering or geometry is possible, according to various embodiments. A 2D grid may be arranged, for instance. It may be desirable to keep nearest neighbours in the 3D network as close as possible in the linear arrangement. More generally, an arbitrary’ linear ordering may be used, or a raster ordering may be utilized for all tensors.

[0144] Figure 13 J illustrates one example of the connections between the upper and lower tensors, where they are connected up according to their connectivity in 3D, This will introducelong -range connections. Note that these long-range connections correspond to some circuit that needs to be implemented on the corresponding surface-code qubits.Computing a Logical Gap for Hierarchical Multiplexing

[0145] The following paragraphs define methods for determining quality metrics based on a logical gap for hierarchical multiplication. The following description may be applied to any of a variety of types of bricks, encoded logical qubits, and configurations. Furthermore, while the following description focuses on FBQC with the 6-ring network, the techniques may generalize to other models and schemes.

[0146] For the 6-ring fusion network, there are two distinct syndrome graphs termed tire primal / dual syndrome graphs, analogous to the planar surface code, with checks belonging to the two independent syndrome graphs, The dual syndrome graphs may be collectively represented as syndrome graph that may be used to determine an error metric for a logical qubit. For more general logical blocks encoding channels from m to n qubits, there are m + n independent logical error classes that generate all possible logical correlations from input to output. The set of distinct logical sectors is denoted herein by C.

[0147] The logical gap rule RG(QG, PG) uses a metric that utilizes the fact that, below an error correction threshold, logical errors may be suppressed due to distinguishability between logical sectors. On the other hand, above an error correction threshold, logical errors are not suppressed due to a loss of distinguishabi lity between distinct logical sectors. In other words, below the threshold, the decoder may reliably differentiate which logical sector of the code space to recover to (as the code distance increases). In this spirit, one may define the logical gap as the difference between the correction weights that return the system to different logical sectors.

[0148] For example, consider a simple case of a single logical Z operator in a surface code memory block (e.g. only the primal syndrome graph), with a configuration E and possible correctionswrong, Correct such that composing the correction and error yields a logical operator on the code space — namely / and Z respectively. The signed logical gap is defined as

[0149] Aj?(£’) — ^(Uong) ”wz(Jcorrect)

[0150] where denotes the log-likelihood weight of the correction I for the Z sector given by a choice of decoder, defined as follows: an edge e has weight we= ln((1-pe) / pe) where peis the(marginal) probability of Pauli error on that edge, edges e e E supporting erasures have weight we= 0, and the total -weight of a correction I is W(l) = Σe∈lwe- Other types of weights may also be used. The error e as part of E may be unknown and therefore which correction is correctis unknown; hence only the unsigned logical gap (i.e., the magnitude of the logical gap) may be known in this circumstance, which is denoted herein as ΔZ(E) (below we will drop the dependence on E for brevity).

[0151] In general, any decoder may be used to compute an unsigned logical gap and biased noise may be accommodated by modifying the weights appropriately. If one chooses a minimumweight perfect-matching (MWPM) decoder, then the decoder may always choose the minimum weight correction. If Ay < 0, the decoder will fail and a logical error will be introduced. If ΔZ> 0, the decoder will succeed in correcting the error and if ΔZ= 0, the decoder will succeed / fail -0half of the time. Therefore, the EER for the brick becomes penc~ Σi∈(z,x)∫P(Δi)dΔi, where P(Aj) is the distribution of logical gaps of logical error classes i for a fixed brick size and error rate. In more complex logical blocks (i.e., surface code protocols / channels), there may be many logical error classes and so one may compute a vector of logical gaps as the information of interest.

[0152] QG(E) = {Δi}i∈C

[0153] where recall, C is the set of distinct logical error classes. A combined score may be created for the brick to be thresholded by the policy as

[0154] SG(QG) = Σi∈C

[0155] PG(QG; θ) = δ(s - SG(QG))

[0156] where a, represent tunable linear weights to weight the addition of the scores for all logical error classes.

[0157] To determine the two correction weights whose difference is the logical gap, in some embodiments weight contributions are computed for each single-qubit Pauli operator for a respective correction on the code or fusion network (on the syndrome graph, this corresponds to assigning a weight contribution to each corrected edge of the syndrome graph), and the overall weight of each correction is obtained by combining the weight contributions for each corrected edge of the correction. In some embodiments, the weight contributions may be computed as the log-likelihood ratios of the error rate that each qubit or fusion outcome is subject to. Edges may have weight zero, as could be the case, for instance, if an erasure error is detected on that qubit / fusion outcome. In the event that one considers a correlated error model, one can compute the weight of the correction in terms of new weights assigned to multi-qubit Pauli operators (in the syndrome graph, this corresponds to adding additional edges with appropriate weight contributions).

[0158] In some embodiments, the first and second corrections may be determined by a decoder, and may correspond to two potential corrections to the syndrome graph that either preserve or flip the overall logical state of the logical qubit, in some embodiments. For example, the syndrome graph data may be provided to a decoder, and the decoder may determine the first correction as the most likely correction that does not alter the overall logical state of the logical qubit. To obtain the second correction, the syndrome graph may be provided to the decoder with the constraint that it is to return a correction that flips the value of the logical qubit, and the decoder may determine the most likely correction satisfying this constraint.

[0159] Said another way, if we denote C as the correction and E as the true error that occurred (which the decoder does not know), without the constraint (i.e., for the first correction) the decoder will determine the correction that has the highest probability of giving C·E = I where I denotes a logical identity. In other words, it tries to find the first correction C that fixes what it thinks is the true error such that nothing happens to the logical state of the brick. For the second correction, the decoder is constrained to determine a C with the highest probability of giving C·E = Flip, where Flip denotes a flip of the state of the logical qubit, in other words, the correction plus the error should flip the logical sector,

[0160] The decoder may add information related to the first and second corrections to the syndrome graph data, and this supplemented syndrome graph data may then be provided to the Controller. In some embodiments, the decoder may be comprised within the Controller, or alternatively it may be instantiated as separate circuitry’ (e.g., as a dedicated classical processor and memory' coupled to the controller, which may be contained within the classical computing system 203). Tire information related to the first and second corrections specifies the modifications to the syndrome graph that are entailed by the respective corrections (i.e., the location and / or number of the edges that are flipped by the correction). These first and second corrections are then the two alternative corrections for which two respective weights are determined by the Controller from the syndrome graph data received from the decoder, and the magnitude of the difference between the two weights is the magnitude of the logical gap. A simple example of two alternative corrections to a 2D syndrome graph is shown in Figures 14C-D and described in greater detail below.

[0161] In some embodiments, the overall weight of each correction may be determined as a weighted summation over the weight contributions of each corrected edge of the respective correction. In some embodiments, the summation is weighted based on log-likelihood ratio (LLR) weights of the respective corrected edges, as shown in the expression we= ln((1-pe) / pe) wherepeis the (marginal) probability of a Pauli error on that edge. In these embodiments, a corrected edge with a smaller error probability pewill have a larger weight than if the corrected edge had a larger error probability. In this manner, edges that are relatively more likely to have experienced an error will be granted a smaller weight. Accordingly, corrected edges that are more likely to have experienced an error will have a smaller weight contribution (as else being equal), where a smaller overall weight corresponds to a correction that is more likely to not result in a logical error. Said another way, edges with a large peare relatively more likely to require correction, and the LLR weights promote these corrections. For some logical blocks, each edge may have the same error probability pesuch that wehas a single value that is constant throughout the logical block. However, in some cases, different edges may have different error probabilities and pemay vary between different edges in the logical block.

[0162] For a pair of parity errors that is identified as a pair of syndromes to be corrected in the syndrome graph, there may be many different combinations of Pauli errors that may be used to attempt to correct the parity error (e.g., any sequence of flipped edges on the syndrome graph that share endpoints with the pair of parity errors). The decoder may provide two specific alternative corrections, as shown in Figures 14C and 14D, The weight of each correction may be generally understood to be an increasing function of the number of flipped edges in the correction, whereby (all else being equal, e.g., without accounting for any potential weighting of the flipped edges based on their log-likelihood ratios and / or their location in the syndrome graph) corrections that flip a larger number of edges will have a larger weight than corrections that flip fewer edges. In some embodiments, the set of corrected edges connects each pair of syndromes in the syndrome graph in a particular way according to a geometry determined by the decoder.

[0163] As used herein, the term “graph distance” refers to the separation between two nodes on a syndrome graph. For example, two adjacent nodes (i.e., parity checks) connected by a fusion measurement (i.e., and edge) in a fusion-based encoding scheme have a graph distance of one. Two parity checks with one intervening parity check have a graph distance of two, etc.Weighting the weight contributions based on a graph distance from the first physical qubit (e.g., a center qubit of the logical block) may improve the effectiveness of a quality metric, as described below, in identifying high-fidelity logical states. For example, a set of errors that spans across the face 118 shown in Figure IB will be uncorrectable via quantum error correction, whereas a set of errors that lies within the face without spanning across may be correctable via quantum error correction.

[0164] Weighting the summation of weight contributions of corrected edges based on the respective graph distances may include weighting each weight contribution with a factorcomprising the respective graph distance raised to a power of a tunable parameter. The tunable parameter may be empirically adjusted to improve the effectiveness of the quality metric,

[0165] Tire logical gap magnitude may be determined by taking the magnitude of the difference of the overall weights of the two alternate corrections of the syndrome graph.

[0166] Because the parity error may not uniquely identify the specific set of Pauli errors that occurred (e.g,, the observed parity error may be consistent with two or more potential sets of Pauli errors), it may not be known a priori which correction will correct the error. However, corrections with larger weights are generally less likely to be correct. All else being equal, the weight of a correction increases for corrections that involve flipping a larger number of edges, and errors of this type are relatively less common than simpler errors that involve flipping fewer edges.

[0167] Accordingly, a large magnitude of the logical gap (i.e., a large magnitude in the difference between the two weights of the two alternative corrections) may indicate that one correction is much more likely to be correct than the other one (e.g., the correction with a small weight may be more likely to be correct). In this case, the error is likely correctable since it may be determined with a high probability that one of the two alternate corrections is the correct one, and the error may be likely fixable using a decoder. Conversely, when the magnitude of the logical gap is small, both of the two corrections may be comparably likely to be correct so it maybe less likely for the decoder to implement the proper correction (e.g., the decoder may have close to a 50 / 50 chance of implementing the proper correction). Accordingly, the magnitude of the logical gap may serve as an effective quality metric to quantify how likely the errors indicated by the syndrome graph data are to be correctable by the decoder, where syndrome graph data with a larger magnitude logical gap are identified as corresponding to higher fidelity logical qubits,

[0168] In some embodiments, a respective logical gap magnitude of the syndrome graph data is determined for each class of logical error (e.g., for each logical error sector) of the syndrome graph data. For example, a syndrome graph may include a primal graph and a dual graph, each of the primal and dual graphs may have their own respective class of logical errors, and a respective logical gap magnitude may be determined for each of the primal and dual graphs. In some embodiments, the primal and / or the dual graph may themselves contain multiple classes of logical error, and a respective logical gap magnitude may be determined for each class of error. The logical gap magnitudes for each class of error may be combined in any of a variety of ways (e.g., summed) to obtain an overall error metric based on the logical gap magnitudes.Figure 14A-D -- Correction of Syndrome Graphs

[0169] Figures 14A-D illustrate an example of a syndrome graph and syndrome graph data in accordance with one or more embodiments. In this example, a simplified 2D syndrome graph is used but one of ordinary skill will appreciate that any type of syndrome graph corresponding to any error correcting code may be used without departing from the scope of the present disclosure.

[0170] Figure 14 A illustrates the geometry of the syndrome graph, a square lattice in this example. Such a square lattice syndrome graph is associated with the primal or dual syndrome graphs of the surface code implementation discussed above in reference to FIGS. 1A-F.

[0171] FIG. 14B shows an example of syndrome graph data that is superimposed on the syndrome graph, where vertices correspond to tire set of measurement outcomes of the various parity checks. In the illustrated example, each vertex includes a 1 if the parity check measurement returned an odd parity measurement outcome (also referred to herein as a “syndrome”) and a zero if the parity check returned an even parity, where the parity check measurements can be implemented as shown above in FIGS. 1D-IE or IF. Depending on the type of error correcting code being employed, one of ordinary skill will appreciate that the parity measurement outcomes may be computed by any known method. A useful way of understanding the syndrome graph data shown in FIG. I4B in the context of the surface code example of FIGS.1D-1E is that any “syndromes” present in the syndrome graph data, are the result of one or more errors on the underlying data qubits, which can be thought of as positioned on the edges of the superimposed syndrome graph. Vertices having an odd number of data qubit errors incident thereon will result in a syndrome being present at the vertex (i.e., the vertex is labeled I) while vertices having zero or an even number of data qubit errors incident thereon w ill result in no syndrome being present on the vertex (i.e., the vertex is labeled 0). The situation for an FBQC implementation of the surface code is slightly more complicated because, rather than being directly computed from the measurement of the measure qubit located at each vertex, the syndromes are computed from the surrounding two-qubit fusion measurement outcomes that can be visualized as located on each incident edge.

[0172] Figure 14C illustrates an example correction that a decoder w ould produce when provided the syndrome graph data of FIG. 14B. The correction can include the one or more Pauli operators representing the set of operations that could be applied (or alternatively, not applied, but instead tracked and accounted for in the system as the quantum computation progresses) on the underlying data qubits of the error correction code to correct errors on those qubits while still preserving the overall quantum state of the logical qubit. One of ordinary skill will appreciate that many different decoders are known and any could be deployed here w ithout departing fromthe scope of the present disclosure. For example, a minimum -weight perfect matching decoder may be used to determine the one or more corrections to be used for fault-tolerant post selection processing. The correction shown in Figure 14C is an example of a minimum -weight correction also referred to herein as the ‘'first correction’". Note that there can be many possible minimum weight corrections that could be computed by the decoder, and Figure 14C only illustrates one particular example. Tire weight of this correction is 8, because it identifies 8 Pauli operators on the underlying physical data qubits (shown by the 8 edges are traversed by the thick black line). In some embodiments, to calculate a logical gap, a second correction can be computed with the constraint that the correction should flip the overall logical value of the logical qubit with the assumption that the first correction properly identifies the underlying errors on the data qubits, i.e., the second correction can be computed such that it that differs from the first correction by a logical operator (e.g., a chain of Pauli operations that spans from the left edge of the syndrome graph to the right edge of the syndrome graph (or from the top to the bottom),

[0173] Figure 14D shows one example of a second correction represented as a light grey thick line. In this example, the second correction plus the first correction results in a logical error on the logical qubit because a chain of errors spans the lattice from left to right. Note, there are many possible candidate corrections for this second correction as well, as there was for the first correction. The weight of the second correction shown in Figure 14D is 9. The magnitude of the logical gap may then be obtained by taking the difference of the weights of the corrections shown in Figures 14C and 14D, which results in a magnitude of the logical gap of |9 - 8| = 1.

[0174] In the example above, the decoder receives syndrome graph data that indicates the location(s) of syndromes. More generally as described in more detail below, the decoder can receive a set of data representing the visible error which includes the location of both the syndromes and underlying erasure errors if any. As used herein the term syndrome graph will be used synonymously with visible error and it is therefore understood that syndrome graph data includes both syndromes and erasures. In some examples, the syndrome graph data received by the decoder may take the form of a matrix of syndrome values, where each entry of the matrix is mapped to a vertex in the syndrome graph (e.g., the vertices shown in Figures 14A-C). In addition, the syndrome graph data may include a second related matrix that includes erasure errors, where, e.g., in the case of the surface code shown in FIGS. 1D-1E, each entry of the matrix is mapped to an edge in tire syndrome graph.Figures 15A-D - Connected Components - 2D Example

[0175] Figure 15A-D are simplified diagrams of 2-dimensional syndrome graphs illustrating the relationship between the primal and dual graphs during a sequence of fusion measurements. Actual implementations of FBQC will typically employ 3-dimensional syndrome graphs. However, the essential concepts of primal / dual correspondence and connected components may be more easily visualized and explained in the context of a 2-dimensional syndrome graph. It may be appreciated by one of skill in the art that the concepts introduced herein for a connected component in the context of a 2D syndrome graph may be generalized to apply to a 3D syndrome graph.

[0176] Figure 15A illustrates an overlay of an example 2D primal syndrome graph (dotted lines) and a 2D dual syndrome graph (dashed lines). Solid circles connected to dotted lines are syndrome values of the primal graph, whereas solid circles connected to dashed lines are syndrome values of the dual graph. Syndrome values may be calculated by performing a parity check once all of the syndrome graph edges connected to the syndrome value have been measured. A single fusion measurement will measure both a single edge in the primal graph and a single corresponding edge in the dual graph, two examples of which are shown in Figure 15 A. More generally, each primal edge and dual edge pair that intersects at their midpoint will have both edges measured by a single fusion measurement.

[0177] Figure 15B illustrates the same syndrome graphs as Figure 15 A, but with the lattices separated for clarity. The arrows illustrate the correspondence between two sets of primal / dual edges, where the two edges indicated by an arrow' will be measured by a single fusion measurement.

[0178] Figure 15C illustrates the same syndrome graphs as Figures 15A-15B after a subset of the sequence of fusion measurements have been performed. As illustrated, bold solid black edges indicate that the fusion measurement resulted in an erasure, whereas non-bold solid edges indicate that the fusion measurement was successful. Unmeasured edges are indicated with dashed lines. For clarity, primal and dual edges are not distinguished by line type in Figures 15C-D, rather, they are separated (left and right, respectively).

[0179] As used herein, the term “connected component” refers to any contiguous set of erased edges in either the primal or dual syndrome graph. For example, a connected component composed of seven erased edges is shown in the primal graph on the left side of Figure 15C, whereas the dual graph shown on the right side of Figure 15C has a larger number of smaller connected components (e.g., 4 connected components of size two, one, one, and one, indicated by the bold lines). An edge may be erased by either a loss measurement result or a failedmeasurement result. As used herein, any node that is connected to an edge of a connected component is considered to be “within” the connected component.

[0180] In the example shown in Figure 15C, the subsequent fusion measurement to be performed involves the two edges indicated by the double-headed arrow (one primal edge and one dual edge). A failure outcome will result in one of the primal or dual edges involved in the measurement being erased, and the basis for performing the fusion measurement may be selected to determine which of tire involved primal or dual edge will be erased in the event of a failure outcome, A successful outcome will successfully measure both of the involved primal and dual edges, while a loss outcome of a fusion measurement will erase both edges.

[0181] In the example shown in Figure 15C, the two ends of the primal edge involved in the fusion measurement are part of the same connected component. Accordingly, an erasure of this primal edge will not increase the likelihood of an overall logical error.

[0182] Figure 15D illustrates an alternative scenario, similar to Figure 15C but with a different set of prior fusion measurement results. Similar to Figure 15C, bold solid black edges indicate that a fusion measurement of the edge resulted in an erasure, non-bold solid edges indicate that the fusion measurement was successful, and unmeasured edges are indicated with dashed lines. The two edges involved in the next fusion measurement are indicated with the double-headed arrow'.

[0183] In the example illustrated in Figure 15D, an erasure of either of the involved primal or dual edges will increase the likelihood of a logical error. To quantify the risk of causing a logical error, an exposure may be calculated for each of the involved primal and dual edges.

[0184] The “exposure” of an edge is defined herein as follows. Each edge connects two nodes of either the primal or dual graph. Often, one or both of these nodes may be part of one or more respective connected components. For example, the left node connected to the indicated edge of the primal graph in Figure 15D is part of a 6-node connected component, and the right node connected to the indicated edge of the primal graph is part of a different 6-node connected component. The exposure of an edge is calculated as the product of the exposures of these two connected components. The exposure of a connected component, in turn, is defined as a sum (either weighted or unweighted) of the unmeasured edges and / or the measured edges adjacent to the connected component, not counting the edge for which the exposure is being calculated. As one example, the left connected component adjacent to the indicated edge of the primal graph in Figure 15D may be determined to have an exposure of 3, whereas the right connected componentadjacent to the indicated edge of the primal graph in Figure 15D has an exposure of 6, leading to an overall exposure of the indicated edge of the primal graph of 3*6=18.

[0185] In some cases, the edge may be adjacent to a node that is not part of a connected component. For example, the indicated edge in the dual graph of Figure 15D is directly above a connected component of size 3, but directly below a region of unmeasured nodes that does not contain a connected component. For such nodes that are not part of a connected component, tire exposure of the node is set equal to 3 to account for the three unmeasured edges (not counting the indicated edge) adjacent to this node. Accordingly, the indicated edge of the dual graph of Figure 15D has an exposure of 3* 1=3.

[0186] When performing hierarchical multiplexing, the exposure of copies of sub-bricks may be considered when determining an aggregate quality metric based on tire quality metrics for multiple sub-bricks. For example, the illustrated primal graph may include two sub-bricks 1502 and 1504, and tire quality metric used to determine which copy of the two sub-bricks to select to fuse together may be determined based on the overall exposure for each pair of copies. For example, for each copy of each of the two sub-bricks, an overall exposure may be calculated for the fusions that are to be performed between the two copies, and these overall exposure values may be used to determine an aggregate quality metric for each pair of copies (e.g., with higher overall exposure values corresponding to lower quality metrics). Accordingly, the quality metric may be a joint quality metric that is determined for each set of two or more copies of different sub-bricks, rather than an individual quality metric that depends solely on the properties of the respective copy in isolation. Said another way, the aggregate quality metric may be based on the positions of errors in a copy of the sub-brick 1502 relative to the positions of errors in a copy of the sub-brick 1504, rather than being only based on the number of errors in the two copies.

[0187] It should be understood that all numerical values used herein are for purposes of illustration and may be varied. In some instances, ranges are specified to provide a sense of scale, but numerical values outside a disclosed range are not precluded.

[0188] It should also be understood that all diagrams herein are intended as schematic. Unless specifically indicated otherwise, the drawings are not intended to imply any particular physical arrangement of the elements shown therein, or that all elements shown are necessary. Those skilled in the art with access to this disclosure will understand that elements shown in drawings or otherwise described in this disclosure may be modified or omitted and that oilier elements not shown or described may be added.

[0189] This disclosure provides a description of the claimed invention with reference to specific embodiments. Those skilled in the art with access to this disclosure will appreciate that the embodiments are not exhaustive of the scope of the claimed invention, which extends to all variations, modifications, and equivalents.

[0190] The terminology used in the description of the various described embodiments herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used in the description of the various described embodiments and the appended claims, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the term “and / or” as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items. It will be further understood that the terms “includes,” “including,” “comprises,” and / or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0191] It will also be understood that, although the terms first, second, etc., are, in some instances, used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first switch could be termed a second switch, and, similarly, a second switch could be termed a first switch, without departing from the scope of the various described embodiments. The first switch and tire second switch are both switches, but they are not the same switch unless explicitly stated as such.

[0192] As used herein, the term “if’ is, optionally, construed to mean “when” or “upon” or “in response to determining” or “in response to detecting” or “in accordance with a determination that,” depending on the context.

[0193] The foregoing description, for purpose of explanation, has been described with reference to specific embodiments. However, the illustrative discussions above are not intended to be exhaustive or to limit the scope of the claims to the precise forms disclosed. Many modifications and variations are possible in view of the above teachings. The embodiments were chosen in order to best explain the principles underly ing the claims and their practical applications, to thereby enable others skilled in the art to best use the embodiments with various modifications as are suited to the particular uses contemplated.

Claims

ClaimsWhat is claimed is:

1. A method, comprising:for each brick of a plurality of bricks of a target fusion network, receiving a plurality of respective layer one copies;by a classical processor:determining a respective first quality metric for each layer one copy of each brick of the plurality of bricks; andbased at least in part on the first quality metrics, selecting a first layer one copy of the respective layer one copies for each brick of the plurality of bricks; andby a fusion controller, fusing the first layer one copies for each brick of the plurality of bricks together to produce an aggregate brick.

2. Tire method of claim 1,wherein selecting the first layer one copy for each brick of the plurality of bricks based at least in part on the first quality metrics comprises determining aggregate quality metrics based at least in part on the first quality metrics for the layer one copies of the plurality of bricks.

3. The method of claim 1,wherein the plurality of bricks of the target fusion network are mutually disjoint.

4. lire method of claim 1, further comprising producing the plurality of respective layer one copies of each brick of the plurality of bricks by performing:for each layer one copy of each brick of the plurality of bricks:for each sub-brick of a plurality of sub-bricks of the respective brick, receiving a plurality’ of respective layer two copies;determining a respective second quality metric for each layer two copy of each sub-brick of the plurality of sub-bricks;based at least in part on the second quality metrics, selecting a first layer two copy of the respective layer two copies for each sub-brick of the plurality of sub-bricks; and fusing the first layer two copies together to produce the respective layer one copy.

5. The method of claim 4,wherein the first quality metrics are determined based at least in part on the second quality metrics.

6. The method of claim 1,wherein selecting the first layer one copy of each brick of the plurality of bricks comprises selecting a layer one copy with a highest first quality metric,7. The method of claim 1, further comprising:for each brick of the plurality of bricks, rank ordering the layer one copies based on their respective quality metrics;fusing respective layer one copies from each brick of the plurality of bricks together according to the rank ordering to produce a plurality of logical qubits.

8. The method of claim 1, further comprising:for each brick of the plurality of bricks, rank ordering the layer one copies based on their respective quality metrics;fusing respective layer one copies from each brick of the plurality of bricks together based at least in part on the rank ordering to produce a plurality of aggregate bricks.

9. The m ethod of claim 1,wherein the first quality metric comprises one of:a weighted summation of a number of syndromes and erasures comprised within a respective syndrome graph of each layer one copy; ora logical gap magnitude of the respective syndrome graph of each layer one copy.

10. The method of claim 1, further comprisingdetermining a size and a number of the plurality of bricks, wherein the size and the number of the plurality of bricks is determined based at least in part on a number of layer one copies, a circuit switching complexity, and a complexity of the first quality metrics.

11. The method of claim 1,wherein the plurality of bricks comprise a plurality of Kagome-6 bricks.

12. A non-transitory computer-readable memory medium storing program instructions which, when executed by a processor:direct a quantum computing system to receive, for each brick of a plurality of bricks of a target fusion network, a plurality of respective layer one copies;determine a respective first quality metric for each layer one copy of each brick of the plurality of bricks;based at least in part on the first quality metrics, select a first layer one copy of the respective layer one copies for each brick of the plurality of bricks; anddirect the quantum computing system to fuse the first layer one copies together to produce an aggregate brick.

13. The non-transitory computer-readable memory medium of claim 12,wherei n selecting the first layer one copy for each brick of the plurality of bricks based at least in part on the first quality metrics comprises determining aggregate quality metrics based at least in part on the first quality metrics for the layer one copies of the plurality of bricks.

14. The non-transitory computer-readable memory medium of claim 12, wherein the program instructions are further executable to produce the plurality of respective layer one copies of each brick of the plurality of bricks, wherein in producing the plurality of respective layer one copies of each brick of the plurality of bricks, the program instructions are further executable to:for each layer one copy of each brick of the plurality of bricks:direct the quantum computing system to receive, for each sub-brick of a plurality of sub-bricks of the respective brick, a plurality of respective layer two copies;determine a respective second quality metric for each layer two copy of each subbrick of the plurality of sub-bricks;based at least in part on the second quality metrics, select a first layer two copy of the respective layer two copies for each sub-brick of the plurality of sub-bricks; anddirect the quantum computing system to fuse tire first layer two copies together to produce the respective layer one copy.

15. The non-transitory computer-readable memory medium of claim 14,wherein the first quality metrics are determined based at least in part on the second quality metrics.

16. The non-transitory computer-readable memory medium of claim 12,wherein the first quality metric comprises one of:a weighted summation of a number of syndromes and erasures comprised within a respective syndrome graph of each layer one copy; ora logical gap magnitude of the respective syndrome graph of each layer one copy.

17. A controller, comprising:a non-transitory computer-readable memory medium;a switching circuit coupled to a logical qubit generator;a fusion controller;one or more processors coupled to the memory medium, wherein the processor is configured to execute program instructions to:direct a quantum circuit to receive, for each brick of a plurality of bricks of a target fusion network, a plurality of respective layer one copies;determine a respective first quality metric for each layer one copy of each brick of the plurality of bricks;based at least in part on the first quality metrics, select a first layer one copy of the respective layer one copies for each brick of the plurality of bricks; anddirect the quantum circuit to fuse the first layer one copies together to produce an aggregate brick,18. Tlie controller of claim 17,wherein selecting the first layer one copy for each brick of the plurality of bricks based at least in part on the first quality metrics comprises determining aggregate quality metrics based at least in part on the first quality metrics for the layer one copies of the plurality of bricks.

19. The controller of claim 17, wherein the program instructions are further executable to produce the plurality of respective layer one copies of each brick of the plurality of bricks, wherein in producing the plurality of respective layer one copies of each brick of the plurality of bricks, the program instructions are further executable to:for each layer one copy of each brick of the plurality of bricks:toggle the switching circuit to receive, for each sub-brick of a plurality of sub¬ bricks of the respective brick, a plurality of respective layer two copies;determine a respective second quality metric for each layer two copy of each sub¬ brick of the plurality of sub-bricks;based at least in part on the second quality metrics, select a first layer two copy of the respective layer two copies for each sub-brick of the plurality of sub-bricks; anddirect the fusion controller to fuse the first layer tw o copies together to produce the respective layer one copy.

20. The controller of claim 17,wherein the first quality metric comprises one of:a weighted summation of a number of syndromes and erasures comprised within a respective syndrome graph of each layer one copy; ora logical gap magnitude of the respective syndrome graph of each layer one copy.

21. A photonic circuit, comprising:a first resource state 602 comprising a first plurality of entangled qubits;a second resource state 604 comprising a second plurality of entangled qubits, wherein the photonic circuit is configured to perform a fusion measurement on a first qubit of the first plurality of qubits and a second qubit of the second plurality of qubits to entangle remaining qubits of the first plurality of qubits with remaining qubits of the second plurality of qubits and produce a third resource state 606;a fourth resource state 602 comprising a fourth plurality of entangled qubits;a fifth resource state 604 comprising a fifth plurality of entangled qubits, wherein the photonic circuit is configured to perform a fusion measurement on a fourth qubit of the fourth plurality of qubits and a fifth qubit of the fifth plurality’ of qubits to entangle remaining qubi ts of the fourth plurality of qubits with remaining qubits of the fifth plurality of qubits to produce a sixth resource state 606; anda plurality’ of multiplexers 614, wherein each input port of each multiplexer of the plurality of multiplexers is connected to exactly one qubit of tire third resource and exactly one qubit of the sixth resource state, wherein each multiplexer of the plurality of multiplexers is configured to receive instructions from a controller to select qubits from either the third resource state or the sixth resource state to output a first fault-tolerant resource state 612.

22. The photonic circuit of claim 21, further comprising:a second fault-tolerant resource state 704, wherein the photonic circuit is configured to perform a fusion measurement on an error corrected qubit of the first fault-tolerant resource state 702 and an error corrected qubit of the second fault-tolerant resource state 704 to entangle remaining qubits of the first fault-tolerant resource state with remaining qubits of the second fault-tolerant resource state to produce a third fault-tolerant resource state 706;a copy of the third fault-tolerant resource state 710;a connection from each qubit of the third fault-tolerant resource state 708 and the copy of the third fault-tolerant resource state 710 to a respective multiplexer 712, wherein each input port of each respective multiplexer is connected to one qubit of the third fault-tolerant resource state and one qubit of the copy of the third fault-tol erant resource state; anda controller coupled to each respective multiplexer, wherein the controller is configured to direct tire respective multiplexers to select qubits from either the third fault-tolerant resource state or the copy of the third fault-tolerant resource state to output a fourth fault-tolerant resource state 714.

23. The photonic circuit of claim 21, further comprising:an interleaving circuit comprising the fault-tolerant resource state, wherein the interleaving circuit comprises:a plurality' of delay' lines;a plurality of fusion measurement sites; anda plurality of switches configured to route qubits of the fault tolerant resource state to respective ones of the fusion measurement sites or to a separate interleaving circuit.

24. A method, comprising:receiving a first resource state comprising a first plurali ty of entangled qubits; receiving a second resource state comprising a second plurality' of entangled qubits; performing a fusion measurement on a first qubit of the first plurality of qubits and a second qubit of the second plurality of qubits to entangle remaining qubits of the first plurality of qubits with remaining qubits of the second plurality of qubits and produce a third resource state;receiving a fourth resource state comprising a fourth plurality of entangled qubits; receiving a fifth resource state comprising a fifth plurality of entangled qubits; performing a fusion measuremen t on a fourth qubit of the fourth plurality of qubi ts and a fifth qubit of the fifth plurality' of qubits to entangle remaining qubits of the fourth plurality of qubits with remaining qubits of the fifth plurality of qubits to produce a sixth resource state; andprovide exactly one qubit of the third resource and exactly one qubit of the sixth resource state to each of a plurality of multiplexers;provide instructions to the plurality of multiplexers to select qubits from either the third resource state or the sixth resource state to output a first fault-tolerant resource state.

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