Display panel and display apparatus

Abstract

A display panel and a display apparatus. The display panel comprises: an array substrate (001), wherein the array substrate (001) comprises a first base substrate (101), a common voltage line (102), and a ground line (103), the first base substrate (101) comprises a display area (AA) and a non-display area located on at least one side of the display area (AA), the common voltage line (102) and the ground line (103) are located in the non-display area, and the non-display area comprises a binding area; and an opposite substrate (002), arranged opposite to the array substrate (001), wherein the opposite substrate (002) comprises a second base substrate (201), a black matrix (202) located on the side of the second base substrate (201) facing the array substrate (001), and a shielding electrode layer (203) located on the side of the second base substrate (201) away from the black matrix (202), the black matrix (202) is electrically connected to the common voltage line (102), the shielding electrode layer (203) is electrically connected to the ground line (103), a connection position (C1) between the black matrix (202) and the common voltage line (102) and a connection position (C2) between the shielding electrode layer (203) and the ground line (103) are simultaneously provided on the same side of a central axis (MN) of the display area (AA) extending in a first direction (Y), and the first direction (Y) intersects the binding area.

Description

Display panel and display device

[0001] Cross-reference to related applications

[0002] The present application claims priority to the Chinese Patent Application No. 202411290903.8, filed on September 14, 2024, and entitled "Display panel and display device", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present disclosure relates to the technical field of display, and in particular, to a display panel and a display device. BACKGROUND

[0004] Thin Film Transistor Liquid Crystal Display (TFT-LCD) has the characteristics of small volume, low power consumption, high picture quality, no radiation and portability, and has developed rapidly in recent years. It has gradually replaced the traditional Cathode Ray Tube display (CRT) and occupies a dominant position in the current flat panel display market. Currently, TFT-LCD has been widely used in various large, medium and small size products, and almost covers the main electronic products in today's information society, such as liquid crystal televisions, high-definition digital televisions, computers (desktop and notebook), mobile phones, tablet computers, navigation instruments, vehicle-mounted displays, projection displays, video cameras, digital cameras, electronic watches, calculators, electronic instruments, instruments, public displays and virtual reality displays, etc. SUMMARY

[0005] The display panel and display device provided by the present disclosure have the following specific solutions:

[0006] In one aspect, the present disclosure provides a display panel, comprising:

[0007] An array substrate, the array substrate comprising a first substrate, a common voltage line and a ground line, the first substrate comprising a display area and a non-display area located at least one side of the display area, the common voltage line and the ground line being located in the non-display area, and the non-display area comprising a binding area;

[0008] The opposite substrate is opposite to the array substrate, and the opposite substrate comprises a second substrate, a black matrix on a side of the second substrate facing the array substrate, and a shielding electrode layer on a side of the second substrate away from the black matrix, the black matrix is electrically connected with the common voltage line, and the shielding electrode layer is electrically connected with the ground line; the connection position of the black matrix and the common voltage line and the connection position of the shielding electrode layer and the ground line are provided on the same side of a central axis extending in a first direction of the display area, and the first direction intersects the binding area.

[0009] In some embodiments, in the display panel provided in the embodiments of the present disclosure, the opposite substrate further comprises a planar layer on a side of the black matrix away from the second substrate, and the planar layer comprises a via on the non-display area.

[0010] The display panel further comprises a first conductive structure filling the via, and the black matrix is electrically connected with the common voltage line through the first conductive structure.

[0011] In some embodiments, in the display panel provided in the embodiments of the present disclosure, the display panel further comprises a second conductive structure on the non-display area, and part of the side surface of the black matrix is electrically connected with the common voltage line through the second conductive structure.

[0012] In some embodiments, in the display panel provided in the embodiments of the present disclosure, the opposite substrate further comprises a conductive mesh between the black matrix and the second substrate, and a projection of the conductive mesh on the second substrate is located in a projection of the black matrix on the second substrate.

[0013] In some embodiments, in the display panel provided in the embodiments of the present disclosure, the black matrix comprises a first black matrix and a second black matrix arranged in a stack, and a projection of the first black matrix on the second substrate substantially coincides with a projection of the second black matrix on the second substrate.

[0014] The opposite substrate further comprises a conductive mesh between the first black matrix and the second black matrix, and a projection of the conductive mesh on the second substrate is located in a projection of the black matrix on the second substrate.

[0015] In some embodiments, in the display panel provided in the embodiments of the present disclosure, part of the black matrix contacting the second conductive structure is flush with the boundary of the second substrate, and the remaining part is recessed by a preset distance relative to the boundary of the second substrate.

[0016] In some embodiments, in the display panel provided in the embodiments of the present disclosure, a third conductive structure is further included and integrally arranged with the second conductive structure, the third conductive structure is located in another non-display area of the display panel other than the non-display area where the second conductive structure is located, and the third conductive structure is electrically connected with the black matrix within the preset distance.

[0017] In some embodiments, in the display panel provided in the embodiments of the present disclosure, the counter substrate further includes a planar layer located on a side of the black matrix away from the second substrate, the planar layer at least partially exposes an edge of the black matrix away from the display area and vertically overlaps with the common voltage line.

[0018] The display panel further includes a fourth conductive structure that overlaps with the edge and the common voltage line, and the black matrix is electrically connected with the common voltage line through the fourth conductive structure.

[0019] In some embodiments, in the display panel provided in the embodiments of the present disclosure, the connection position of the black matrix and the common voltage line is symmetrically arranged with respect to the center axis.

[0020] In another aspect, the embodiments of the present disclosure provide a display device, including a driving circuit board and a display panel, wherein the display panel is the display panel provided in the embodiments of the present disclosure, and the driving circuit board is electrically connected with the common voltage line.

[0021] In some embodiments, in the display device provided in the embodiments of the present disclosure, the driving circuit board includes a power management chip, and the common voltage line is electrically connected with a common voltage terminal of the power management chip.

[0022] In some embodiments, in the display device provided in the embodiments of the present disclosure, the driving circuit board further includes a protection structure connected between the common voltage terminal and the common voltage line. BRIEF DESCRIPTION OF DRAWINGS

[0023] FIG. 1 is a waveform of a black matrix coupling voltage;

[0024] FIG. 2 is a DC influence model of a black matrix;

[0025] FIG. 3 is a structural schematic diagram of a display device provided in the embodiments of the present disclosure;

[0026] FIG. 4 is a cross-sectional structural schematic diagram along line I-I' in FIG. 3;

[0027] FIG. 5 is a cross-sectional structural schematic diagram along line II-II' in FIG. 3;

[0028] FIG. 6 is a cross-sectional structural schematic diagram along line III-III' in FIG. 3;

[0029] Fig. 7 is a schematic view of another cross-sectional structure along III-III' in Fig. 3;

[0030] Fig. 8 is a diagram showing the improvement effect of the display device shown in Fig. 3;

[0031] Fig. 9 is a schematic view of a single-point short-circuit test position of a black matrix according to an embodiment of the present disclosure;

[0032] Fig. 10 is a Flicker change curve for different positions of the single-point short-circuit test in Fig. 9;

[0033] Fig. 11 is a schematic view of another structure of a display device according to an embodiment of the present disclosure;

[0034] Fig. 12 is a schematic view of a cross-sectional structure along IV-IV' in Fig. 11;

[0035] Fig. 13 is a schematic view of another structure of a display device according to an embodiment of the present disclosure;

[0036] Fig. 14 is a schematic view of a cross-sectional structure along V-V' in Fig. 13;

[0037] Fig. 15 is a schematic view of another structure of a display device according to an embodiment of the present disclosure;

[0038] Fig. 16 is a schematic view of a cross-sectional structure along VI-VI' in Fig. 13. DETAILED DESCRIPTION

[0039] To make the objects, technical solutions and advantages of the embodiments of the present disclosure clearer, the following will be described with reference to the drawings of the embodiments of the present disclosure. In the drawings, the thicknesses of layers, films, panels, regions and the like are exaggerated for clarity. In the present disclosure, the exemplary embodiments are described with reference to cross-sectional views that are schematic illustrations of idealized embodiments. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, embodiments described in the present disclosure are not to be construed as limited to the particular shapes of regions as illustrated but are to include deviations in shapes that result, for example, from manufacturing. For example, an area illustrated or described as flat can typically have rough and / or nonlinear features. A illustrated sharp angle can be rounded, etc. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not reflective of true scales and proportions. The same reference numbers in different drawings representing the same or similar elements or elements having the same or similar functions are used throughout the several appended figures.

[0040] Unless otherwise defined, technical terms or scientific terms used herein shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first", "second", and similar terms do not imply any order, quantity, or importance, but are used to distinguish one element from another, and are used arbitrarily. The terms "include", "comprise", and the like are intended to mean that the elements or components listed after the terms are included or contained in the described products, compositions, or methods, and are not intended to exclude other elements or components. The terms "connected" or "linked" or the like are not limited to physical or mechanical connections or linkages, but can include electrical connections or linkages, whether direct or indirect. The terms "inner", "outer", "upper", "lower", and the like are used only to indicate relative positional relationships, and when the absolute positions of the described objects are changed, the relative positional relationships can also be changed accordingly.

[0041] In the following description, when an element or layer is referred to as "on" or "connected to" another element or layer, it can be directly on or connected to the other element or layer, or an intermediate element or layer can be present. When an element or layer is referred to as "provided on one side of another element or layer", it can be directly on one side of the other element or layer, directly connected to the other element or layer, or an intermediate element or layer can be present. However, when an element or layer is referred to as "directly on" or "directly connected to" another element or layer, no intermediate element or layer is present. The term "and / or" includes any and all combinations of one or more of the associated listed items. The various embodiments of the present disclosure can be combined with each other without conflict, as long as they do not conflict.

[0042] In some display products, product Flicker drift occurs due to factors such as lighting conditions and standing time. Product Flicker drift can cause a series of display problems, such as Flicker value exceeding Spec, boot Mura, coarse lines, shaking lines, and increased residual image.

[0043] In the study of product Flicker drift, the inventors found that the charge affecting Flicker drift can be divided into two parts, Array and BM / CF. Array charge is mainly generated by driving, while BM / CF charge is mainly generated by coupling. Through variable correlation verification, it is found that the main factor affecting Flicker in the current display product is BM charge, which is mainly characterized by being positively charged after power-on, negatively charged after power-off, and then slowly recovering over time, as shown in FIG. 1.

[0044] The reason for the coupling and slow change of the BM is the floating state of its structure, which leads to the whole BM being neither electrically controlled nor having an effective discharge path, and it is essentially an unstable electric field. As shown in FIG. 2, through modeling analysis of the BM electric field, it is found that the BM electric field has two main modes of action on Flicker drift: ① up DC: the product is powered on at different standing times, and the BM voltage level + coupled fixed voltage leads to differences in up DC; ② standing DC field: long-term standing of the BM is charged, and a DC electric field is formed in the screen.

[0045] To improve the above technical problems, the display panel and display device provided by the embodiments of the present disclosure are provided. FIG. 3 is a structural schematic diagram of a display device provided by an embodiment of the present disclosure, FIG. 4 is a cross-sectional structural schematic diagram along line I-I' in FIG. 3, FIG. 5 is a cross-sectional structural schematic diagram along line II-II' in FIG. 3, FIG. 6 is a cross-sectional structural schematic diagram along line III-III' in FIG. 3, and FIG. 7 is another cross-sectional structural schematic diagram along line III-III' in FIG. 3. As shown in FIGS. 3 to 7, the display panel provided by the embodiments of the present disclosure comprises:

[0046] The array substrate 001 comprises a first substrate 101, a common voltage line 102 and a ground line 103. The first substrate 101 comprises a display area AA and a non-display area located at least one side of the display area AA, and the non-display area comprises a binding area. Optionally, the non-display area comprises a first non-display area DP and a second non-display area DPO opposite to each other, and two third non-display areas GL&GR connecting the first non-display area DP and the second non-display area DPO. The first non-display area DP comprises the binding area, and the bonding terminal of the binding area can be electrically connected with a driving circuit board PCB through a chip on film COF. In some embodiments, the common voltage line 102 and the ground line 103 can be located in the non-display area; for example, the ground line 103 is arranged to surround the display area AA in the second non-display area DPO and the third non-display area GL&GR; the common voltage line 102 can be located only in the first non-display area DP, or can be arranged to surround the display area AA in the first non-display area DP, the second non-display area DPO and the third non-display area GL&GR.

[0047] The counter substrate 002 is opposite to the array substrate 001, and includes a second substrate 201, a black matrix (BM) 202 located on a side of the second substrate 201 facing the array substrate 001, and a shielding electrode layer 203 located on a side of the second substrate 201 away from the black matrix 202. The black matrix 202 is electrically connected with the common voltage line 102, and the shielding electrode layer 203 is electrically connected with the ground line 103 through a silver glue point AD. On the same side of a center axis MN of the display area AA extending along the first direction Y (which can intersect the first non-display area DP where the binding area is located), the connection position C1 of the black matrix 202 and the common voltage line 102 and the connection position C2 of the shielding electrode layer 203 and the ground line 103 can be simultaneously provided. Optionally, the connection position C1 of the black matrix 202 and the common voltage line 102 is symmetrically arranged about the center axis MN, so as to eliminate the display difference between the left half screen and the right half screen as much as possible. In some embodiments, according to the impedance of the BM material, the BM material can be divided into two categories: low-impedance BM and high-impedance BM. The division is based on 1014Ω / sq. In order to reduce the cost of the material, the black matrix 202 of the display panel provided in the embodiments of the present disclosure can be a low-impedance BM.

[0048] In the display panel provided in the embodiments of the present disclosure, by electrically connecting the black matrix 202 and the common voltage line 102, it is ensured that, regardless of the size of the voltage applied to the black matrix 202, the common voltage line 102 is a discharge path in the product power-off stage, and the common voltage line 102 functions as a ground. In the product power-on stage, the liquid crystal itself is mainly the pixel electrode (Pixel) and the common electrode (Com), and the BM is charged as the common voltage, so that the DC difference can be reduced. Based on this, the unstable electric field originally coupled by the black matrix 202 can be changed into a controllable steady-state electric field, so that the display quality problems such as Flicker, residual image, Gamma, wobble lines, and thick lines can be improved.

[0049] The display device shown in FIG. 3 is simulated by short-circuiting the black matrix 202 and the common voltage line 102 in the product, and the improvement effect of the display device is verified. The results show that the following performance improvements can be achieved on a plurality of products: ① Flicker drift is stable after different standing times, and the Flicker value is generally low; ② there is no significant influence on short-term and long-term residual image, and the horizontal is comparable to that before the improvement; ③ there is no significant difference in product gray scale brightness, and the Gamma is generally stable, and the Flicker is better. The power-on Flicker result of the display device shown in FIG. 3 after standing for 24 hours is shown in FIG. 8. As shown in FIG. 8, the display device shown in FIG. 3 can effectively improve the Flicker drift problem, and thus the display quality problems such as Flicker, residual image, Gamma, wobble lines, and thick lines can be improved.

[0050] In some embodiments, the implementation of the black matrix 202 needs to take into account the actual product size, the impedance and sheet resistance of the black matrix 202, and the setting of the compensation points, and comprehensively consider the voltage variation speed of different points on the screen. FIG. 9 shows a schematic diagram of a single-point short-circuit test on a product including a low-impedance black matrix 202, and FIG. 10 shows the Flicker variation curves of different positions in the single-point short-circuit test of FIG. 9. It can be found from FIG. 9 and FIG. 10 that the Flicker variation of the compensation far end and the compensation near end has a difference in speed. In other words, if the product size is large and the impedance of the black matrix 202 is relatively high, the difference in the voltage variation speed distribution on the screen during the power-on stage will be larger, and the problem that may be caused is that the effect of the compensation on different positions of the screen presents a time-position distribution difference.

[0051] Based on the above consideration of the compensation aspect, a conductive layer can be added on the facing substrate 002, which can have a shape distribution that can be referred to the black matrix 202, and can be coincident with the black matrix 202 or slightly smaller than the black matrix 202 (for example, 1 μm-2 μm inward relative to the black matrix 202), and can be electrically connected with the black matrix 202 to form a complete low-impedance network, so as to completely eliminate the voltage variation speed problem that can be caused by the impedance distribution of the black matrix 202 and the position setting of the compensation points. Thus, as shown in FIG. 6, the facing substrate 002 can further include a conductive mesh 204 between the black matrix 202 and the second substrate 201, and the orthographic projection of the conductive mesh 204 on the substrate 101 can be located within the orthographic projection of the black matrix 202 on the second substrate 201.

[0052] In some embodiments, in order to reduce the reflection of the conductive mesh 204 to the ambient light, the conductive mesh 204 of FIG. 6 can be made of a material with low reflectivity and good conductivity, such as molybdenum; or a black matrix can be additionally provided between the conductive mesh 204 and the second substrate 201. Specifically, as shown in FIG. 7, the black matrix 202 includes a first black matrix 2021 and a second black matrix 2022 arranged in layers, the orthographic projection of the first black matrix 2021 on the second substrate 201 is approximately coincident with the orthographic projection of the second black matrix 2022 on the second substrate 201, and the conductive mesh 204 is provided between the first black matrix 2021 and the second black matrix 2022.

[0053] It should be noted that in the embodiments provided in the present disclosure, due to the limitation of process conditions or the influence of other factors such as measurement, the “approximately coincident” may be exactly coincident or may have some deviation (for example, with a deviation of ±1 μm), and therefore the “approximately coincident” relationship between the related features belongs to the protection scope of the present disclosure as long as the error is allowed.

[0054] In some embodiments, FIG. 11 is another structural schematic diagram of a display device provided by embodiments of the present disclosure, and FIG. 12 is a cross-sectional structural schematic diagram along the IV-IV' line in FIG. 11. As shown in FIG. 11 and FIG. 12, the facing substrate 002 can further include a planar layer 205 located on the side of the black matrix 202 away from the second substrate 201, and the planar layer 205 includes vias V located in the non-display area (for example, the first non-display area DP and the second non-display area DPO); the display panel PNL can further include a first conductive structure 003 (for example, a gold ball, Au Ball) filling the via V, and the black matrix 202 is electrically connected to the common voltage line 102 through the first conductive structure 003.

[0055] In some embodiments, FIG. 13 is another structural schematic diagram of a display device provided by embodiments of the present disclosure, and FIG. 14 is a cross-sectional structural schematic diagram along the V-V' line in FIG. 13. As shown in FIG. 3, FIG. 4, FIG. 13 and FIG. 14, the display panel PNL provided by embodiments of the present disclosure can further include a second conductive structure 004 (for example, silver paste) located in the non-display area (for example, the first non-display area DP), and part of the side surface of the black matrix 202 can be electrically connected to the common voltage line 102 through the second conductive structure 004. Optionally, the part of the black matrix 202 contacting the second conductive structure 004 is flush with the boundary of the second substrate 201, and the remaining part is recessed by a preset distance d relative to the boundary of the second substrate 201, so that the electrical connection effect of the black matrix 202 and the second conductive structure 004 is ensured, and at the same time, external static electricity can be effectively prevented from being introduced into the black matrix 202.

[0056] In some embodiments, in the above-mentioned display panel provided by embodiments of the present disclosure, as shown in FIG. 13 and FIG. 14, a third conductive structure 005 can be integrally arranged with the second conductive structure 004, and the third conductive structure 005 is located in other non-display areas (for example, the second non-display area DPO and the third non-display area GL&GR) other than the non-display area (for example, the first non-display area DP) where the second conductive structure 004 is located, and the third conductive structure 005 is electrically connected to the black matrix 202 within the preset distance d. In some embodiments, the electrical connection between the third conductive structure 005 and the black matrix 202 can be achieved by using the "three-edge grinding + Ag transfer" method. The process of "three-edge grinding + Ag transfer" can be: finely grinding the glass side surface position to be contacted with the third conductive structure 005 to ensure the absolute flatness of the glass side surface. Then, Ag is used for transfer, which is essentially to press the Ag paste on the black matrix 202 and the common voltage line 102 to be contacted as the third conductive structure 005, so as to achieve electrical connection. Considering the path protection of the transferred Ag, in some embodiments, the amount of Ag paste can be increased at the four corners to increase the Ag contact area. Optionally, a sealing frame glue can be added outside the third conductive structure 005 for protection.

[0057] In some embodiments, FIG. 15 is another structural schematic diagram of a display device provided by embodiments of the present disclosure, and FIG. 16 is a cross-sectional structural schematic diagram along the line VI-VI' in FIG. 15. As shown in FIG. 15 and FIG. 16, the planar layer 205 at least partially exposes the edge of the black matrix 202 away from the display area AA and perpendicular to the common voltage line 102; the display panel PNL can further include a fourth conductive structure 006 that overlaps the exposed edge of the black matrix 202 and the common voltage line 102, and the black matrix 202 is electrically connected to the common voltage line 102 through the fourth conductive structure 006. In some embodiments, the fourth conductive structure 006 can be made by multi-point Ag transfer printing to realize the connection between the common voltage line 102 and the black matrix 202, and in this way, the second conductive structure 004 on the DP side can be selected to be unnecessary. In addition, in order to facilitate Ag transfer printing, the common voltage line 102 must be the peripheral trace on the outermost side of the array substrate 001, and the inner side (i.e., the side close to the display area AA) of the common voltage line 102 can be provided with a ground line 103, and the outer side (i.e., the side away from the display area AA) of the common voltage line 102 can be provided with a sealant.

[0058] It should be noted that in the case where the common voltage line 102 is the peripheral trace on the outermost side of the array substrate 001 in FIG. 15, on the same side of the central axis MN, the connection position C1 of the black matrix 202 and the common voltage line 102 can be located on the side away from the central axis MN from the connection position C2 of the shielding electrode layer 203 and the ground line 103. In the case where the ground line 103 is the peripheral trace on the outermost side of the array substrate 001 in FIG. 3, FIG. 11 and FIG. 13, on the same side of the central axis MN, the connection position C1 of the black matrix 202 and the common voltage line 102 can be located on the side close to the central axis MN from the connection position C2 of the shielding electrode layer 203 and the ground line 103.

[0059] In some embodiments, in the above-mentioned display panel PNL provided by embodiments of the present disclosure, as shown in FIG. 6 and FIG. 7, the array substrate 001 can further include a pixel electrode 104, a first insulating layer 105, a data line 106, a second insulating layer 107, a common electrode 108, etc. In some embodiments, the layer where the data line 106 is located and the active layer can share one mask, so that there is an active layer pattern 106' under the data line 106 and in contact with the data line 106. It should be understood by those skilled in the art that other essential components in the display panel PNL are also understood, and will not be described here in detail, and should not be regarded as a limitation on the present disclosure.

[0060] In some embodiments, as shown in FIG. 3, FIG. 11, FIG. 13 and FIG. 15, in the display device provided by the embodiments of the present disclosure, the drive circuit board PCB is electrically connected with the common voltage line 102 of the display panel PNL. Optionally, the drive circuit board PCB comprises a power management chip PMIC, and the common voltage line 102 is electrically connected with the common voltage end com of the power management chip PMIC. Of course, in some embodiments, the common voltage line 102 can also be electrically connected with other common voltage ends (for example, the common voltage end connected with the opposite common electrode to compensate 3-4 times of the common voltage) of the drive circuit board PCB. In addition, the drive circuit board PCB can further comprise a protection structure SW1&SW2 connected between the common voltage end com of the power management chip PMIC and the common voltage line 102, so as to avoid burning the power management chip PMIC when the static electricity on the common voltage line 102 is too large. Optionally, the protection structure SW1&SW2 is a zero-ohm resistor, a magnetic bead, a relay or a MOS, etc.

[0061] In some embodiments, the display device provided by the embodiments of the present disclosure can further comprise a backlight module BLU located on the light entering side of the display panel PNL. The backlight module BLU can be a direct type backlight module or a side type backlight module. Optionally, the side type backlight module can comprise a lamp strip, a reflection sheet, a light guide plate, a diffusion sheet, a prism group and the like, and the lamp strip is located on one side of the light guide plate in the thickness direction. The direct type backlight module can comprise a matrix light source, a reflection sheet, a diffusion plate and a brightness enhancement film and the like which are stacked on the light emitting side of the matrix light source, and the reflection sheet comprises an opening opposite to the position of each lamp bead in the matrix light source. The lamp bead in the lamp strip and the lamp bead in the matrix light source can be a light emitting diode (LED), for example, a micro light emitting diode (Mini LED, Micro LED, etc.).

[0062] The micro light emitting diode in the order of sub-millimeter or even micrometer and the organic light emitting diode (OLED) are both self-luminous devices. Like the organic light emitting diode, the micro light emitting diode has a series of advantages such as high brightness, ultra-low delay, ultra-large viewing angle, etc. And because the inorganic light emitting diode realizes light emission based on metal semiconductor with more stable properties and lower resistance, it has the advantages of lower power consumption, longer service life, higher temperature resistance and lower temperature resistance compared with the organic light emitting diode which realizes light emission based on organic matter. When the micro light emitting diode is used as a backlight source, it can realize more precise dynamic backlight effect, effectively improve the brightness and contrast of the screen, and solve the glare phenomenon caused by the traditional dynamic backlight between the bright and dark areas of the screen, and optimize the visual experience.

[0063] In some embodiments, the display device provided by the embodiments of the present disclosure can be any product or component with display function, such as a projector, a 3D printer, a virtual reality device, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigation device, a smart watch, a fitness wristband, a personal digital assistant, and the like. Optionally, the display device provided by the embodiments of the present disclosure includes, but is not limited to, a radio frequency unit, a network module, an audio output & input unit, a sensor, a display unit, a user input unit, an interface unit, a control chip, and the like. Optionally, the control chip is a central processing unit, a digital signal processor, a system chip (SoC), and the like. For example, the control chip can further include a memory, and can further include a power module, and the like, and the power supply and signal input and output functions are realized through wires, signal lines, and the like arranged additionally. For example, the control chip can further include hardware circuitry and computer executable code, and the like. The hardware circuitry can include conventional very large scale integration (VLSI) circuitry or gate array, and existing semiconductors or other discrete elements such as logic chips, transistors, and the like; the hardware circuitry can also include field programmable gate array, programmable array logic, programmable logic device, and the like. In addition, those skilled in the art can understand that the above structure does not constitute a limitation on the display device provided by the embodiments of the present disclosure, in other words, the display device provided by the embodiments of the present disclosure can include more or less components, or combine certain components, or arrange different components.

[0064] Although the preferred embodiments of the present disclosure have been described, those skilled in the art can make additional changes and modifications to the embodiments once they know the basic inventive concept. Therefore, the appended claims are intended to be interpreted as including all the preferred embodiments and all the changes and modifications falling within the scope of the present disclosure.

[0065] Obviously, those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the embodiments of the present disclosure. Thus, if these modifications and variations of the embodiments of the present disclosure fall within the scope of the claims of the present disclosure and their equivalent technologies, the present disclosure is also intended to include these modifications and variations.

Claims

1. A display panel, wherein, The display panel comprises: an array substrate comprising a first substrate, a common voltage line and a ground line, the first substrate comprising a display area and a non-display area on at least one side of the display area, the common voltage line and the ground line being located in the non-display area, the non-display area comprising a binding area; a counter substrate opposite to the array substrate, the counter substrate comprising a second substrate, a black matrix on a side of the second substrate facing the array substrate, and a shielding electrode layer on a side of the second substrate away from the black matrix, the black matrix being electrically connected with the common voltage line, and the shielding electrode layer being electrically connected with the ground line; a center axis extending in a first direction on the same side of the display area, and the connection position of the black matrix and the common voltage line and the connection position of the shielding electrode layer and the ground line are provided simultaneously, the first direction intersecting the binding area.

2. The display panel of claim 1, wherein, The counter substrate further comprises a planar layer on a side of the black matrix away from the second substrate, the planar layer comprising a via hole in the non-display area; The display panel further comprises a first conductive structure filling the via hole, and the black matrix is electrically connected with the common voltage line through the first conductive structure.

3. The display panel of claim 1 or 2, wherein, The display panel further comprises a second conductive structure in the non-display area, and part of the side surface of the black matrix is electrically connected with the common voltage line through the second conductive structure.

4. The display panel of claim 3, wherein, The counter substrate further comprises a conductive mesh between the black matrix and the second substrate, and the orthogonal projection of the conductive mesh on the second substrate is located in the orthogonal projection of the black matrix on the second substrate.

5. The display panel of claim 3, wherein, The black matrix comprises a first black matrix and a second black matrix arranged in a stack, and the orthogonal projection of the first black matrix on the second substrate substantially coincides with the orthogonal projection of the second black matrix on the second substrate. The counter substrate further comprises a conductive mesh between the first black matrix and the second black matrix, and the orthogonal projection of the conductive mesh on the second substrate is located in the orthogonal projection of the black matrix on the second substrate.

6. The display panel of any of claims 3-5, wherein, Part of the black matrix contacting the second conductive structure is flush with the boundary of the second substrate, and the remaining part is recessed by a preset distance relative to the boundary of the second substrate.

7. The display panel of claim 6, wherein, The display panel further comprises a third conductive structure integrally arranged with the second conductive structure, the third conductive structure being located in other non-display areas of the non-display area where the second conductive structure is located, and the third conductive structure is electrically connected with the black matrix within the preset distance.

8. The display panel of claim 1, wherein, The counter substrate further comprises a planar layer on a side of the black matrix away from the second substrate, and the planar layer at least partially exposes an edge of the black matrix away from the display area and vertically overlapping with the common voltage line. The display panel further comprises a fourth conductive structure overlapping with the edge and the common voltage line, and the black matrix is electrically connected with the common voltage line through the fourth conductive structure.

9. The display panel of any one of claims 1 to 8, wherein, The connection position of the black matrix and the common voltage line is symmetrically arranged about the center axis.

10. A display device, wherein, The display panel is as claimed in any one of claims 1-9, and the driving circuit board is electrically connected with the common voltage line.

11. The display device of claim 10, wherein, The driving circuit board comprises a power management chip, and the common voltage line is electrically connected with a common voltage terminal of the power management chip.

12. The display device of claim 11, wherein, The driving circuit board further comprises a protection structure connected between the common voltage terminal and the common voltage line.

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