Electronic device including interposer

Abstract

An electronic device according to an embodiment of the present disclosure comprises: a first substrate including a plurality of first conductive terminals arranged on one surface thereof; an interposer arranged parallel to the first substrate and including, on a first surface thereof facing the first substrate, a plurality of first conductive pads and a plurality of second conductive pads having a larger size than the first conductive pads; a solder in contact between the first conductive terminals and the first conductive pads and in contact between the first conductive terminals and the second conductive pads; a first protective layer arranged outside an area in which the first conductive terminals are arranged; a 2-1 protective layer arranged outside an area in which the first conductive pads and the second conductive pads are arranged and having at least a portion facing the first protective layer; and a 2-2 protective layer arranged in the second conductive pads, outside an area in which the solder is arranged, and having at least a portion facing the first protective layer. A distance between the first protective layer and the 2-2 protective layer may be less than a distance between the first protective layer and the 2-1 protective layer.

Description

Electronic device including an interposer

[0001] The various embodiments disclosed in this document relate to an electronic device including an interposer.

[0002] Electronic devices are becoming increasingly slimmer to secure competitiveness against other manufacturers, and are being developed to increase rigidity, enhance design aspects, and differentiate their functional elements.

[0003] Multiple printed circuit boards placed within the internal space of an electronic device can be arranged in a stacked manner to slim down the device, and are being developed to reduce mounting space through mutually efficient electrical connection structures.

[0004] The information described above may be provided as related art for the purpose of aiding understanding of the present disclosure. No claim or determination is made as to whether any of the foregoing may be applied as prior art related to the present disclosure.

[0005] The electronic device may include at least two substrates (e.g., printed circuit boards (PCBs)) disposed within an internal space. Each substrate may be arranged in a stacked manner to secure efficient mounting space and may be electrically connected to each other through an interposer (e.g., a stacked substrate) disposed between them. For example, each substrate may include a plurality of conductive terminals, and the two substrates may be electrically connected by physically contacting a plurality of corresponding conductive terminals disposed on the corresponding surface of the stacked substrate.

[0006] The interposer may include conductive pads (e.g., conductive terminals) disposed on a surface facing each substrate. The conductive pads can electrically connect multiple printed circuit boards by physically contacting multiple conductive terminals of each facing substrate through pre-solder.

[0007] As the interposer and each substrate are physically in contact through pre-solder, a gap may exist between the interposer and the multiple substrates. When an external shock is applied to the electronic device, damage may occur to the pre-solder, the conductive pads of the interposer, and / or the conductive terminals of the substrates due to the gap between the interposer and each substrate.

[0008] Meanwhile, a thermal interface material (TIM) that diffuses heat generated from the multiple substrates and the interposer to the surroundings may be injected into the internal space of the interposer located between the multiple substrates. However, the thermal interface material may leak to the outside of the interposer through a gap created by the pre-solder placed between the interposer and each substrate. Additionally, the thermal interface material may leak to the outside of the interposer through the damaged area as damage occurs to the pre-solder, the conductive pads of the interposer, and / or the conductive terminals of the substrates due to external impact applied to the electronic device.

[0009] The technical tasks intended to be accomplished in this document are not limited to those mentioned above, and other technical tasks not mentioned will be clearly understood by those skilled in the art to which this document belongs from the description below.

[0010] According to one embodiment of the present disclosure, an electronic device may include a first substrate comprising a plurality of first conductive terminals disposed on one surface. The electronic device may include an interposer disposed parallel to the first substrate and comprising a plurality of first conductive pads disposed on a first surface facing the first substrate and a plurality of second conductive pads larger in size than the first conductive pads when viewed from the first surface. The electronic device may include a solder that contacts between the first conductive terminal and the first conductive pad and contacts between the first conductive terminal and the second conductive pad. The electronic device may include a first protective layer disposed on one surface of the first substrate in the remaining area excluding the area where the plurality of first conductive terminals are disposed. The electronic device may include a second-1 protective layer disposed on the first surface of the interposer in the remaining area excluding the area where the first conductive pad and the second conductive pad are disposed, with at least a portion facing the first protective layer. The electronic device may include a second-2 protective layer disposed in the remaining area of ​​the second conductive pad excluding the area where the solder is disposed, and at least a portion thereof facing the first protective layer. The gap (e.g., width, distance, length, or space) between the first protective layer and the second-2 protective layer may be smaller than the gap between the first protective layer and the second-1 protective layer.

[0011] According to one embodiment of the present disclosure, an electronic device comprises a first substrate having a plurality of first conductive terminals disposed on one surface, a second substrate disposed parallel to the first substrate and having a plurality of second conductive terminals, an interposer disposed between the first substrate and the second substrate and electrically connected to the first conductive terminals and the second conductive terminals, a first conductive pad electrically connected to the first conductive terminals and disposed inside the interposer, a second conductive pad electrically connected to the second conductive terminals and disposed inside the interposer, and a conductive post electrically connecting the first conductive pad and the second conductive pad, wherein the first conductive pad does not protrude toward the first substrate from a first surface of the interposer facing the first substrate, and the second conductive pad may not protrude toward the second substrate from a second surface of the interposer facing the second substrate.

[0012] According to various embodiments disclosed in this document, a structure can be presented that reduces the gap between an interposer and a plurality of substrates by means of pre-solder. For example, some of the conductive pads of the interposer may be formed with an expanded size compared to other conductive pads. A protective layer (e.g., a solder resist (SR) layer) applied to one side of the interposer may be additionally applied to at least some of the expanded conductive pads. The protective layer applied to the conductive pads of the interposer may face the protective layer applied to the substrate. Accordingly, as the protective layer is placed on the conductive pads formed with the expanded size, the gap between the substrate and the interposer can be reduced by the protective layer. Therefore, when an external shock is applied to a plurality of substrates and the interposer, the shock applied to the pre-solder, the conductive pads of the interposer, and the conductive terminals of the substrate can be dispersed or mitigated by the contact between the protective layer of the substrate and the protective layer applied to the conductive pads of the interposer.

[0013] In addition, as the gap between the substrate and the interposer is reduced, the leakage of heat transfer material introduced into the interior of the interposer to the exterior of the interposer can be blocked to a certain extent.

[0014] The effects obtainable from the present disclosure are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art to which the present disclosure belongs from the description below.

[0015] In relation to the description of the drawings, the same or similar reference numerals may be used for identical or similar components.

[0016] FIG. 1a is a front perspective view of an electronic device according to one embodiment of the present disclosure.

[0017] FIG. 1b is a perspective view of the rear side of the electronic device of FIG. 1a according to one embodiment of the present disclosure.

[0018] FIG. 2 is an exploded perspective view of the electronic device of FIG. 1a according to one embodiment of the present disclosure.

[0019] FIG. 3 is a configuration diagram of an electronic device to which an interposer is applied according to various embodiments of the present invention.

[0020] FIG. 4 is a perspective view of an interposer according to various embodiments of the present invention.

[0021] FIG. 5 is a partial cross-sectional view illustrating the configuration and combined state between an interposer and a plurality of substrates according to one embodiment of the present disclosure.

[0022] FIG. 6a is a drawing of the conductive pads and ground pads of an interposer connected to each other according to one embodiment of the present disclosure.

[0023] FIG. 6b is a drawing of the ground pads of FIG. 6a with a protective layer applied.

[0024] FIG. 7a is a plan view of the interposer of FIG. 6a according to one embodiment of the present disclosure.

[0025] FIG. 7b is a plan view of an interposer in which the ground pads of the interposer are spaced apart and connected to each other, according to one embodiment of the present disclosure.

[0026] FIG. 8 is a partial cross-sectional view illustrating the configuration and combined state between an interposer and a plurality of substrates according to one embodiment of the present disclosure.

[0027] FIG. 9a is a drawing of an embodiment according to one embodiment of the present disclosure in which some of the signal pads of an interposer and a ground pad are formed with a size extended compared to the signal pads of the interposer.

[0028] FIG. 9b is a drawing according to one embodiment of the present disclosure, showing a state in which a protective layer is applied to the signal pads and ground pads in FIG. 9a.

[0029] FIG. 10 is a plan view of the interposer of FIG. 9a according to one embodiment of the present disclosure.

[0030] FIG. 11 is a drawing of a state in which conductive pads of an interposer according to one embodiment of the present disclosure are arranged so as not to protrude from the surface of the interposer.

[0031] FIG. 1a is a front perspective view of an electronic device according to one embodiment of the present disclosure. FIG. 1b is a rear perspective view of the electronic device of FIG. 1a according to one embodiment of the present disclosure.

[0032] Referring to FIGS. 1a and 1b, an electronic device (200) according to one embodiment may include a housing (210) comprising a first surface (or front) (210A), a second surface (or rear) (210B), and a side (210C) surrounding the space between the first surface (210A) and the second surface (210B). In one embodiment (not shown), the housing may refer to a structure forming some of the first surface (210A), the second surface (210B), and the side (210C) of FIG. 1a. According to one embodiment, the first surface (210A) may be formed by a front plate (202) (e.g., a glass plate or a polymer plate having various coating layers) in which at least a portion is substantially transparent. The second surface (210B) may be formed by a rear plate (211) that is substantially opaque. The rear plate (211) may be formed, for example, by coated or colored glass, ceramic, polymer, metal (e.g., aluminum, stainless steel (STS), or magnesium), or a combination of at least two of the above materials. The side (210C) may be formed by a side bezel structure (218) (or "side member") comprising metal and / or polymer, which is combined with the front plate (202) and the rear plate (211). In some embodiments, the rear plate (211) and the side bezel structure (218) may be formed integrally and may comprise the same material (e.g., a metallic material such as aluminum).

[0033] In the illustrated embodiment, the front plate (202) may include a first region (210D) that curves seamlessly from the first surface (210A) toward the rear plate at both ends of the long edge of the front plate. In the illustrated embodiment (see FIG. 1b), the rear plate (211) may include a second region (210E) that curves seamlessly from the second surface (210B) toward the front plate at both ends of the long edge. In some embodiments, the front plate (202) or the rear plate (211) may include only one of the first region (210D) or the second region (210E). In some embodiments, the front plate (202) may not include the first region and the second region, but may include only a flat plane positioned parallel to the second surface (210B). In the above embodiments, when viewed from the side of the electronic device, the side bezel structure (218) may have a first thickness (or width) on the side that does not include the first region (210D) or the second region (210E) as above, and may have a second thickness that is thinner than the first thickness on the side that includes the first region (210D) or the second region (210E).

[0034] According to one embodiment, the electronic device (200) may include at least one of a display (201), an input device (203), an audio output device (207, 214), a sensor module (204, 219), a camera module (205, 212), a key input device (217), an indicator (not shown), and a connector (208). In some embodiments, the electronic device (200) may omit at least one of the components (e.g., a key input device (217), or an indicator) or additionally include other components.

[0035] The display (201) may be visually exposed, for example, through a significant portion of the front plate (202). In some embodiments, at least a portion of the display (201) may be exposed through the front plate (202) forming the first surface (210A) and the first area (210D) of the side (210C). The display (201) may be combined with or placed adjacent to a touch sensing circuit, a pressure sensor capable of measuring the intensity (pressure) of the touch, and / or a digitizer that detects a magnetic field-type stylus pen. In some embodiments, at least a portion of the sensor module (204, 219) and / or at least a portion of the key input device (217) may be placed in the first area (210D) and / or the second area (210E).

[0036] The input device (203) may include a microphone (203). In some embodiments, the input device (203) may include a plurality of microphones (203) arranged to detect the direction of sound. The sound output device (207, 214) may include speakers (207, 214). The speakers (207, 214) may include an external speaker (207) and a call receiver (214). In some embodiments, the microphone (203), speakers (207, 214), and connector (208) may be placed in at least part of the internal space of the electronic device (200) and may be exposed to the external environment through at least one hole formed in the housing (210). In some embodiments, the hole formed in the housing (210) may be used in common for the microphone (203) and the speakers (207, 214). In some embodiments, the acoustic output device (207, 214) may include a speaker (e.g., a piezo speaker) that is operated with the hole formed in the housing (210) excluded.

[0037] The sensor module (204, 219) can generate an electrical signal or data value corresponding to an internal operating state of the electronic device (200) or an external environmental state. The sensor module (204, 219) may include, for example, a first sensor module (204) (e.g., proximity sensor) and / or a second sensor module (not shown) (e.g., fingerprint sensor) disposed on a first surface (210A) of the housing (210), and / or a third sensor module (219) (e.g., HRM sensor) disposed on a second surface (210B) of the housing (210). The fingerprint sensor may be disposed on the first surface (210A) of the housing (210) (e.g., home key button), a portion of the second surface (210B), and / or below the display (201). The electronic device (200) may further include at least one of the unillustrated sensor modules, for example, a gesture sensor, a gyroscope sensor, a barometric pressure sensor, a magnetic sensor, an accelerometer sensor, a grip sensor, a color sensor, an IR (infrared) sensor, a biosensor, a temperature sensor, a humidity sensor, a proximity sensor, or an illuminance sensor.

[0038] The camera module (205, 212) may include a first camera module (205) disposed on a first surface (210A) of the electronic device (200), a second camera module (212) disposed on a second surface (210B), and / or a flash (213). The camera modules (205, 212) may include one or more lenses, an image sensor, and / or an image signal processor. The flash (213) may include, for example, a light-emitting diode or a xenon lamp. In some embodiments, two or more lenses (wide-angle lenses, ultra-wide-angle lenses, or telephoto lenses) and image sensors may be disposed on one surface of the electronic device (200).

[0039] A key input device (217) may be placed on the side (210C) of the housing (210). In one embodiment, the electronic device (200) may not include some or all of the aforementioned key input devices (217), and the key input device (217) that is not included may be implemented in other forms, such as soft keys, on the display (201). In one embodiment, the key input device (217) may be implemented using a pressure sensor included in the display (201).

[0040] An indicator may be disposed, for example, on a first surface (210A) of a housing (210). The indicator may provide status information of an electronic device (200), for example, in the form of light (e.g., a light-emitting element). In one embodiment, the light-emitting element may provide a light source that corresponds to the operation of a camera module (205), for example. The indicator may include, for example, an LED, an IR LED, and / or a xenon lamp.

[0041] The connector hole (208) may include a first connector hole (208) capable of receiving a connector (e.g., a USB (universal serial bus) connector) for transmitting and receiving power and / or data with an external electronic device, and / or a second connector hole (or earphone jack) (not shown) capable of receiving a connector for transmitting and receiving audio signals with an external electronic device.

[0042] Some camera modules (205) among the camera modules (205, 212), some sensor modules (204) among the sensor modules (204, 219), or an indicator may be positioned to be visually exposed through the display (201). For example, the camera module (205), sensor module (204), or indicator may be positioned to come into contact with the external environment through an opening or a transparent area perforated to the front plate (202) of the display (201) within the internal space of the electronic device (200). According to one embodiment, the area facing the display (201) and the camera module (205) may be formed as a transparent area having a certain transmittance as part of the area for displaying content. According to one embodiment, the transparent area may be formed to have a transmittance in the range of about 5% to about 20%. These transparent areas may include an area that overlaps with the effective area (e.g., field of view area) of the camera module (205) through which light passes to form an image with an image sensor to generate an image. For example, the transparent area of ​​the display (201) may include an area with a lower pixel density than the surrounding area. For example, the transparent area may replace the opening. For example, the camera module (205) may include an under-display camera (UDC). In one embodiment, some sensor modules (204) may be positioned to perform their functions without being visually exposed through the front plate (202) within the internal space of the electronic device. For example, in this case, the area of ​​the display (201) facing the sensor modules may not require a perforated opening.

[0043] According to one embodiment, the electronic device (200) has a bar-type or plate-type appearance, but the present invention is not limited thereto. For example, the illustrated electronic device (200) may be part of a foldable electronic device, a slideable electronic device, a stretchable electronic device, and / or a rollable electronic device. The terms "foldable electronic device," "slidable electronic device," "stretchable electronic device," and / or "rollable electronic device" may mean an electronic device that is capable of bending deformation of a display (e.g., display (330) in FIG. 2), so that at least a portion may be folded, wound or rolled, at least a portion of the area may be expanded, and / or can be housed inside a housing (e.g., housing (210) in FIG. 1a and FIG. 1b). Foldable electronic devices, slideable electronic devices, stretchable electronic devices and / or rollable electronic devices can be used by expanding the screen display area by unfolding the display or by exposing a larger area of ​​the display to the outside, depending on the user's needs.

[0044] FIG. 2 is an exploded perspective view of the electronic device of FIG. 1a according to one embodiment of the present disclosure.

[0045] The electronic device (300) of FIG. 2 may be at least partially similar to the electronic device (200) of FIG. 1a and FIG. 1b, or may include other embodiments of the electronic device.

[0046] Referring to FIG. 2, an electronic device (300) (e.g., the electronic device (200) of FIG. 1a or FIG. 1b) may include a side member (310) (e.g., a side bezel structure), a first support member (311) (e.g., a bracket or support structure), a front plate (320) (e.g., a front cover), a display (330) (e.g., the display (201) of FIG. 1a), a substrate (340) (e.g., a printed circuit board (PCB), a flexible PCB (FPCB), or a rigid-flexible PCB (RFPCB)), a battery (350), a second support member (360) (e.g., a rear case), an antenna (370), and a rear plate (380) (e.g., a rear cover). In some embodiments, the electronic device (300) may omit at least one of the components (e.g., the first support member (311) or the second support member (360)) or additionally include other components. At least one of the components of the electronic device (300) may be identical or similar to at least one of the components of the electronic device (200) of FIG. 1a or FIG. 1b, and redundant descriptions are omitted below.

[0047] The first support member (311) may be disposed inside the electronic device (300) and connected to the side member (310), or may be formed integrally with the side member (310). The first support member (311) may be formed, for example, from a metal material and / or a non-metal (e.g., polymer) material. The first support member (311) may have a display (330) attached to one side and a substrate (340) attached to the other side. The substrate (340) may be equipped with a processor, memory, and / or an interface. The processor may include, for example, one or more of a central processing unit, an application processor, a graphics processing unit, an image signal processor, a sensor hub processor, or a communication processor.

[0048] Memory may include, for example, volatile memory or non-volatile memory.

[0049] The interface may include, for example, an HDMI (high definition multimedia interface), a USB (universal serial bus) interface, an SD card interface, and / or an audio interface. The interface may, for example, electrically or physically connect the electronic device (300) to an external electronic device and may include a USB connector, an SD card / MMC connector, or an audio connector.

[0050] The battery (350) is a device for supplying power to at least one component of the electronic device (300) and may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell. At least a portion of the battery (350) may be disposed substantially coplanar with, for example, the substrate (340). The battery (350) may be integrally disposed inside the electronic device (300). In one embodiment, the battery (350) may be disposed detachably from the electronic device (300).

[0051] An antenna (370) may be positioned between the rear plate (380) and the battery (350). The antenna (370) may include, for example, a near field communication (NFC) antenna, a wireless charging antenna, and / or a magnetic secure transmission (MST) antenna. The antenna (370) may, for example, communicate near-field with an external device or wirelessly transmit and receive power required for charging. In one embodiment, the antenna structure may be formed by a part or combination thereof of the side bezel structure (310) and / or the first support member (311).

[0052] FIG. 3 is a configuration diagram of an electronic device to which an interposer is applied according to various embodiments of the present invention.

[0053] The electronic device (400) of FIG. 3 may be at least partially similar to the electronic device (200) of FIG. 2 and / or the electronic device (300) of FIG. 3, or may include other embodiments of the electronic device.

[0054] Referring to FIG. 3, an electronic device (400) (e.g., electronic device (300) of FIG. 2) may include a housing structure (e.g., housing (210) of FIG. 1a) comprising a front cover (481) (e.g., front plate (320) of FIG. 2), a rear cover (480) facing in the opposite direction to the front cover (481) (e.g., rear plate (380) of FIG. 2), and a side member (410) (e.g., side member (310) of FIG. 2) surrounding the space between the front cover (481) and the rear cover (480). According to one embodiment, the electronic device (400) may include a first support member (411) (e.g., first support member (311) of FIG. 2) disposed in an internal space. According to one embodiment, the first support member (411) may be disposed to extend from the side member (410) into the internal space. In another embodiment, the first support member (411) may be separately provided in the internal space of the electronic device (400). According to one embodiment, the first support member (411) may extend from the side member (410) and at least a portion of the area may be formed of a conductive material. According to one embodiment, the electronic device (400) may include a camera structure (490) disposed in the space between the front cover (481) and the rear cover (480).

[0055] According to various embodiments, the electronic device (400) may include a pair of substrates (e.g., printed circuit boards) (510, 520) disposed between a first support member (411) and a rear cover (480) in an internal space. According to one embodiment, the pair of substrates (510, 520) may be disposed such that at least some areas overlap when viewed from above with respect to the front cover (481). According to one embodiment, the pair of substrates (510, 452) may include a first substrate (510) (e.g., main substrate) disposed between the first support member (411) and the rear cover (480), and a second substrate (520) (e.g., sub substrate) disposed between the first substrate (510) and the rear cover (480).

[0056] According to various embodiments, the electronic device (400) may include an interposer (440) disposed between a first substrate (510) and a second substrate (520). According to one embodiment, the interposer (440) may include a plurality of conductive pads (e.g., conductive terminals) (e.g., the first conductive pad (442), the second conductive pad (443), the third conductive pad (444), and / or the fourth conductive pad (445) of FIG. 5) and may electrically connect the two substrates (510, 520) by physically contacting the conductive terminals disposed on the two substrates (510, 520) (e.g., the first conductive terminal (511) and the second conductive terminal (521) of FIG. 5) through pre-solder. For example, the interposer (440) may be preferentially connected to the first substrate (510) through pre-solder applied to the conductive pads. In another embodiment, the interposer (440) may be preferentially connected to the second substrate (520) through pre-solder applied to the conductive pads. According to one embodiment, the electronic device (400) may include a second support member (450) disposed between the second substrate (520) and the rear cover (480). According to one embodiment, the second support member (450) may be disposed at a position that overlaps at least partially with the second substrate (520). According to one embodiment, the second support member (450) may include a metal plate. Thus, the first substrate (510), the interposer (440), and the second substrate (520) may be fixed to the first support member (411) through the second support member (450) disposed thereon. For example, the second support member (450) can be fastened to the first support member (411) through a fastening member such as a screw, thereby firmly supporting the electrical connection between the first substrate (510), the interposer (440), and the second substrate (520).

[0057] Below, the interposer (440) will be described in detail.

[0058] FIG. 4 is a perspective view of an interposer according to various embodiments of the present invention.

[0059] Referring to FIG. 4, the interposer (440) may include a dielectric substrate (441) comprising a first surface (4401) facing in a first direction (direction ①) and a second surface (4402) facing in a direction opposite to the first surface (4401) (direction ②). According to one embodiment, the interposer (440) may include a plurality of conductive pads (442, 443, 444, 445) (e.g., first conductive pads (442), second conductive pads (443), third conductive pads (444) and / or fourth conductive pads (445) of FIG. 5) that are disposed on a first surface (4401) and a second surface (4402) at regular or irregular intervals and are exposed to the outside. According to one embodiment, the plurality of conductive pads (442, 443, 444, 445) may have various sizes and may be disposed at regular or irregular intervals. For example, referring to FIG. 5 and FIG. 8 to be described later, among the plurality of conductive pads (442, 443, 444, 445), at least one conductive pad connected to ground (e.g., ground pad, second conductive pad) The pad (443) and the fourth conductive pad (445)) may be formed larger than at least one conductive pad used for signal transmission (e.g., signal pad, first conductive pad (442), and third conductive pad (444)).

[0060] According to one embodiment, a plurality of conductive terminals (442, 443, 444, 445) may be electrically connected through a conductive post (e.g., a conductive post (446) of FIG. 5) (e.g., a conductive via) that penetrates from a first surface (4401) to a second surface (4402) of a dielectric substrate (441). For example, a first conductive pad (442) and a third conductive pad (444) used for signal transmission may be electrically connected through a conductive post (446). A second conductive pad (443) and a fourth conductive pad (445) connected to ground may be electrically connected through a conductive post (446).

[0061] According to one embodiment, the interposer (440) may include at least one screw fastening portion (4411) that is at least partially disposed. According to one embodiment, the interposer (440) may be fixed to at least one support structure (e.g., a first support member (411) and / or a second support member (450) of FIG. 3) disposed inside an electronic device (e.g., an electronic device (400) of FIG. 3) through the screw fastening portion (4411).

[0062] According to various embodiments, the interposer (440) may have a shape substantially identical to that of at least one of the first substrate (e.g., the first printed circuit board (510) of FIG. 3) or the second substrate (e.g., the second substrate (520) of FIG. 3) and may include an opening (4403) formed in the center. In another embodiment, the interposer (440) may be formed with a shape at least partially different from that of at least one of the first substrate (e.g., the first substrate (510) of FIG. 3) or the second substrate (e.g., the second substrate (520) of FIG. 3). According to one embodiment, the opening (4403) may be utilized as a receiving space for receiving electronic components (e.g., various electrical components or shield cans) placed on at least one of the two substrates (510, 520). In one embodiment, a liquid thermal interface material (TIM) may be injected into the opening (4403) of the interposer (440). The liquid thermal interface material may come into contact with the interposer (440), the first substrate (510), and the second substrate (520) to diffuse heat generated from the first substrate (510), the second substrate (520), and the interposer (440) to the surroundings.

[0063] FIG. 5 is a partial cross-sectional view illustrating the configuration and combined state between an interposer and a plurality of substrates according to an embodiment of the present disclosure. FIG. 6a is a drawing of the interposer in a state where the conductive pads and ground pads are connected to each other according to an embodiment of the present disclosure. FIG. 6b is a drawing of the ground pads of FIG. 6a with a protective layer applied thereto. FIG. 7a is a plan view of the interposer of FIG. 6a according to an embodiment of the present disclosure. FIG. 7b is a plan view of the interposer in a state where the ground pads of the interposer are connected to each other at a distance according to an embodiment of the present disclosure.

[0064] According to various embodiments, as illustrated in FIG. 5, an electronic device (e.g., the electronic device (400) of FIG. 3) may include a first substrate (510) (e.g., a first printed circuit board and / or a main board) having a first plurality of conductive terminals (511) disposed in an internal space, a second substrate (520) (e.g., a second printed circuit board and / or a sub-substrate) having a second plurality of conductive terminals (521) disposed substantially parallel to the first substrate (510) and the second substrate (520), and an interposer (440) disposed substantially parallel to the first substrate (510) and the second substrate (520) and disposed to electrically connect the first substrate (510) and the second substrate (520).

[0065] According to various embodiments, as illustrated in FIG. 5, the interposer (440) may include a dielectric substrate (441) comprising a first surface (4401) facing the first substrate (510) and a second surface (4402) facing the second substrate (520) (e.g., a sub-substrate) in the opposite direction to the first surface (4401). According to one embodiment, the interposer (440) may include first conductive pads (442) and second conductive pads (443) disposed on the first surface (4401) to face each of a first plurality of conductive terminals (511) disposed on one surface of the first substrate (510). According to one embodiment, the interposer (440) may include third conductive pads (444) and fourth conductive pads (445) disposed on a second surface (4402) to face each of a second plurality of conductive terminals (521) disposed on one surface of a second substrate (520). According to one embodiment, the first conductive pads (442) and the third conductive pads (444) may be electrically connected through a conductive post (446) (e.g., a conductive via) disposed to penetrate from the first surface (4401) of the dielectric substrate (441) to the second surface (4402). According to one embodiment, the second conductive pads (443) and the fourth conductive pads (445) can be electrically connected through a conductive post (446) positioned to penetrate from the first surface (4401) to the second surface (4402) of the dielectric substrate (441).

[0066] According to various embodiments, as illustrated in FIG. 5, the first conductive pads (442) and the third conductive pads (444) may be conductive pads (e.g., signal pads) used for signal transmission between the first substrate (510) and the second substrate (520). In one embodiment, the second conductive pads (443) and the fourth conductive pads (445) may be ground pads that reduce electrical noise generated in the interposer (440) and the plurality of substrates (510, 520). The ground pads of the interposer (440) (e.g., the second conductive pads (443) and the fourth conductive pads (445)) may be connected to the ground of the interposer (440) and / or the ground of the substrates (510, 520). In one embodiment, the first conductive pads (442), the third conductive pads (444), and the conductive posts (446) can transmit signals between the first substrate (510) and the second substrate (520). In one embodiment, the first substrate (510) and the second substrate (520) are grounded through the second conductive pad (443) and the fourth conductive pad (445), which are connected to the ground of the interposer (440), so that electrical noise generated during signal transmission can be reduced.

[0067] In one embodiment, with reference to FIG. 5 and FIG. 7a and FIG. 7b to be described later, the second conductive pads (443) may be spaced apart from the opening (4403) of the interposer (440) and arranged along the outer perimeter of the first surface (4401) of the interposer (440). In one embodiment, the second conductive pads (443) may be arranged at the outermost edge spaced apart from the opening (4403) on the first surface (4401) and arranged along the perimeter of the interposer (440). The second conductive pads (443) are positioned further outward than the first conductive pads (442) on the first surface (4401) of the interposer (440), thereby shielding electrical noise generated from the first conductive pads (442) and the first conductive terminals (511) when transmitting signals between the substrates (510, 520) through the interposer (440). However, the positional relationship between the first conductive pads (442) and the second conductive pads (443) is an example, and the positions of the signal pads (e.g., first conductive pads (442)) and ground pads (e.g., second conductive pads (443)) on the first surface (4401) of the interposer (440) can be varied.

[0068] In one embodiment, the fourth conductive pads (445) may be spaced apart from the opening (4403) of the interposer (440) and arranged along the outer perimeter of the second surface (4402) of the interposer (440). In one embodiment, the fourth conductive pads (445) may be arranged at the outermost edge spaced apart from the opening (4403) on the second surface (4402) and arranged along the perimeter of the interposer (440). As the fourth conductive pads (445) are arranged further outward than the third conductive pads (444) on the second surface (4402) of the interposer (440), they can shield electrical noise generated from the third conductive pads (444) and the second conductive terminals (521) when transmitting signals between the substrates (510, 520) through the interposer (440). However, the positional relationship between the third conductive pads (444) and the fourth conductive pads (445) is an example, and the positions of the signal pad (e.g., the third conductive pads (444)) and the ground pad (e.g., the fourth conductive pads (445)) on the second surface (4402) of the interposer (440) can be varied.

[0069] According to various embodiments, the interposer (440) may have a plurality of first conductive pads (442) and a plurality of second conductive pads (443) electrically and physically connected to a plurality of first conductive terminals (511) of a first substrate (510) via pre-solder (PS) (e.g., solder). The interposer (440) may have a plurality of third conductive pads (444) and a plurality of fourth conductive pads (445) electrically and physically connected to a plurality of second conductive terminals (521) of a second substrate (520) via pre-solder. In one embodiment, the pre-solder (PS) can bond each conductive terminal (e.g., first conductive terminals (511), second conductive terminals (521)) and each conductive pad (e.g., first conductive pads (442), second conductive pads (443), third conductive pads (444) and / or fourth conductive pads (445)) to each other through a reflow process when the first substrate (510) and the second substrate (520) are bonded to the interposer (440). The reflow process may be a process for soldering the substrate (510, 520) and the interposer (440) by supplying solder in advance to the conductive terminals (511, 521) of the substrate (510, 520) or the conductive pads (442, 443, 444, 445) of the interposer (440) and melting the solder with an external heat source. The soldering process is not limited to reflow soldering, and various methods other than reflow soldering, such as flow soldering, may be used.

[0070] According to various embodiments, as illustrated in FIG. 5, a protective layer (e.g., a first protective layer (501), a second protective layer (502), a third protective layer (503), and a fourth protective layer (504)) including a solder resist (SR) layer may be disposed on one side of a first substrate (510) where conductive terminals (511, 521) are disposed, one side of a second substrate (520), and a first side (4401) and a second side (4402) of an interposer (440) where conductive pads (442, 443, 444, 445) are disposed. In one embodiment, the protective layer may prevent unintended short circuits caused by pre-solder (PS) being attached to parts other than the conductive terminals (511, 521) and conductive pads (442, 443, 444, 445).

[0071] In one embodiment, referring to FIG. 5, a first protective layer (501) may be disposed on one side of the first substrate (510) in the area excluding the area where the first conductive terminals (511) are disposed. In one embodiment, the one side of the first substrate (510) where the first conductive terminals (511) are disposed may be protected through the first protective layer (501). For example, the first protective layer (501) may prevent the pre-solder (PS) applied to the first conductive terminals (511) from adhering to one side of the first substrate (510), thereby preventing an unintended short circuit between the circuits of the first substrate (510) and / or the interposer (400), and may prevent corrosion of the first substrate (510).

[0072] In one embodiment, referring to FIG. 5, a second protective layer (502) may be disposed on the first surface (4401) of the interposer (440) in the remaining area excluding the area where the first conductive pads (442) and the second conductive pads (443) are disposed. In one embodiment, the first surface (4401) of the interposer (440) where the first and second conductive pads (442, 443) are disposed may be protected through the second protective layer (502). For example, the second protective layer (502) may prevent the pre-solder (PS) applied to the first and second conductive pads (442, 443) from adhering to the first surface (4401), thereby preventing an unintended short circuit between the circuits of the first substrate (510) and / or the interposer (400), and preventing corrosion of the interposer (440).

[0073] In one embodiment, referring to FIG. 5, a third protective layer (503) may be disposed on one side of the second substrate (520) in the area excluding the area where the second conductive terminals (521) are disposed. In one embodiment, the side of the second substrate (520) where the second conductive terminals (521) are disposed may be protected through the third protective layer (503). For example, the third protective layer (503) may prevent the pre-solder (PS) applied to the second conductive terminals (521) from adhering to one side of the second substrate (520), thereby preventing unintended short circuits between the circuits of the second substrate (520) and / or the interposer (440), and may prevent corrosion of the second substrate (520).

[0074] In one embodiment, referring to FIG. 5, a fourth protective layer (504) may be disposed on the second surface (4402) of the interposer (440) in the remaining area excluding the area where the third conductive pads (444) and the fourth conductive pads (445) are disposed. In one embodiment, the second surface (4402) of the interposer (440) where the third and fourth conductive pads (444, 445) are disposed may be protected through the fourth protective layer (504). For example, the fourth protective layer (504) may prevent the pre-solder (PS) applied to the third and fourth conductive pads (444, 445) from adhering to the second surface (4402), thereby preventing an unintended short circuit between the circuits of the second substrate (520) and / or the interposer (400), and preventing corrosion of the interposer (440).

[0075] According to various embodiments, as illustrated in FIG. 5, among the plurality of conductive pads (442, 443, 444, 445), the conductive pad connected to ground (e.g., ground pad, second conductive pad (443), and fourth conductive pad (445)) may be formed larger than the conductive pad used for signal transmission (e.g., signal pad, first conductive pad (442), and third conductive pad (444)). In one embodiment, referring to FIG. 5, the second conductive pad (443) and the fourth conductive pad (445), which are ground pads, may be formed with a wider gap (e.g., width, distance, length, or space) than the first conductive pad (442) and the third conductive pad (444), which are signal pads. Additionally, referring to FIGS. 6a, 7a, and 7b, when viewed from the first surface (4401) of the interposer (440), the second conductive pads (443) may be connected to each other and larger in size than the first conductive pad (442). For example, referring to FIGS. 6a and 7a, a plurality of second conductive pads (443) may be physically connected and arranged along the perimeter of the interposer (440) to form a closed loop. In one embodiment, referring to FIGS. 6a and 7b, a plurality of second conductive pads (443) may be physically connected and spaced along the perimeter of the interposer (440) and may have a loop shape with a portion open. In one embodiment, when viewed from the second surface (4402) of the interposer (440), the fourth conductive pads (445) may be connected to each other and larger in size than the third conductive pad (444). In one embodiment, a plurality of fourth conductive pads (445) may be physically connected and arranged along the perimeter of the interposer (440) to form a closed loop. In one embodiment, a plurality of fourth conductive pads (445) may be physically connected and spaced apart along the perimeter of the interposer (440) to form a loop shape with a portion open.

[0076] In one embodiment, since the second conductive pads (443) are ground pads, no interference between signals may occur even if they are connected to each other. Similarly, since the fourth conductive pads (445) are ground pads, no interference between signals may occur even if they are connected to each other. As illustrated in 9a to be described later, since the first conductive pads (442) are signal pads, the first conductive pads (442) may not be physically connected to each other so that no signal interference occurs between the plurality of first conductive pads (442). Similarly, since the third conductive pads (444) are signal pads, the plurality of third conductive pads (444) may not be physically connected to each other.

[0077] According to various embodiments, as illustrated in FIG. 5, some of the second protective layer (502) disposed on the first surface (4401) of the interposer (440) may be disposed on the second conductive pads (443). In one embodiment, the second protective layer (502) may include a second-1 protective layer (5021) disposed on the remaining area of ​​the first surface (4401) of the interposer (440) excluding the area where the first conductive pads (442) and the second conductive pads (443) are disposed, and a second-2 protective layer (5022) disposed on the remaining area of ​​the second conductive pads (443) excluding the area where the pre-solder (PS) is disposed. In one embodiment, referring to FIG. 6b, the second-2 protective layer (5022) may be disposed in the area where a plurality of second conductive pads (443) are connected, excluding the area where pre-solder (PS) is applied on the second conductive paddle (443). The second-1 protective layer (5021) and the second-2 protective layer (5022) may face the first protective layer (501) which is disposed on the first substrate (510) in at least a portion. Although the second protective layer (502) was described as being divided into the second-1 protective layer (5021) and the second-2 protective layer (5022) in the above description, the second-1 protective layer (5021) and the second-2 protective layer (5022) may be formed integrally. In one embodiment, the second-1 protective layer (5021) and the second-2 protective layer (5022) may be conceptually distinguished according to the location where the second protective layer (502) is placed. In some embodiments, the second-1 protective layer (5021) and the second-2 protective layer (5022) may be physically distinguished.

[0078] According to various embodiments, some of the fourth protective layer (504) disposed on the second surface (4402) of the interposer (440) may be disposed on the fourth conductive pads (445). In one embodiment, the fourth protective layer (504) may include a fourth-1 protective layer (5041) disposed on the remaining area of ​​the second surface (4402) of the interposer (440) excluding the area where the third conductive pads (444) and the fourth conductive pads (445) are disposed, and a fourth-2 protective layer (5042) disposed on the remaining area excluding the area where pre-solder (PS) is disposed on the fourth conductive pads (445). In one embodiment, the fourth-2 protective layer (5042) may be disposed on the portion where a plurality of fourth conductive pads (445) are connected, as an area excluding the area where pre-solder (PS) is applied on the fourth conductive pads (445). The 4-1 protective layer (5041) and the 4-2 protective layer (5042) may face the 3rd protective layer (503), at least a portion of which is disposed on the 2nd substrate (520). In the description above, the 4th protective layer (504) was described as being divided into the 4-1 protective layer (5041) and the 4-2 protective layer (5042), but the 4-1 protective layer (5041) and the 4-2 protective layer (5042) may be formed integrally. In one embodiment, the 4-1 protective layer (5041) and the 4-2 protective layer (5042) may be conceptually distinguished according to the location where the 4th protective layer (504) is disposed. In some embodiments, the 4-1 protective layer (5041) and the 4-2 protective layer (5042) may be physically separated.

[0079] Meanwhile, as pre-solder (PS) is placed between the first conductive terminals (511) of the first substrate (510) and the first conductive pads (442) and between the first conductive terminals (511) and the second conductive pads (443), a gap may be formed between the first substrate (510) and the first surface (4401) of the interposer (440). Similarly, as pre-solder (PS) is placed between the second conductive terminals (521) of the second substrate (520) and the third conductive pads (444) and between the second conductive terminals (521) and the fourth conductive pads (445), a gap may be formed between the second substrate (520) and the second surface (4402) of the interposer (440). In this case, when an external shock is applied to the electronic device, damage may occur to the pre-solder (PS), conductive terminals (511, 521), and conductive pads (442, 443, 444, 445) as the shock is transmitted to the pre-solder (PS) through the gap between the interposer (440) and each substrate (510, 520).

[0080] According to one embodiment of the present disclosure, the second-2 protective layer (5022) of the second protective layer (502) may be positioned so as not to overlap with the pre-solder (ps) in the second conductive pads (443), which are ground pads that are relatively larger in size than the first conductive pads (442), which are signal pads. For example, the second-2 protective layer (5022) may be positioned in the remaining area excluding the area where the pre-solder (PS) is positioned in the second conductive pads (443). As the second-2 protective layer (5022) is positioned in the second conductive pads (443), it may be positioned relatively higher from the first surface (4401) than the second-1 protective layer (5021) positioned in the first surface (4401) of the interposer (440). For example, the height from the first surface (4401) of the interposer (440) to the second-second protective layer (5022) may be greater than the height from the first surface (4401) of the interposer (440) to the second-first protective layer (5021). Accordingly, the gap (e.g., width, distance, length, or space) (w2) between the first protective layer (501) and the second-second protective layer (5022) disposed on the first substrate (510) may be smaller than the gap (e.g., width, distance, length, or space) (w1) between the first protective layer (501) and the second-first protective layer (5021). In one embodiment, the fourth-2nd protective layer (5042) of the fourth protective layer (504) may be positioned so as not to overlap with the pre-solder (PS) on the fourth conductive pads (445), which are ground pads that are relatively larger in size than the third conductive pads (444), which are signal pads. For example, the fourth-2nd protective layer (504) may be positioned in the remaining area of ​​the fourth conductive pads (445), excluding the area where the pre-solder (PS) is positioned. As the fourth-2nd protective layer (5042) is positioned on the fourth conductive pads (445), it may be positioned relatively higher from the second surface (4402) than the fourth-1st protective layer (5041) positioned on the second surface (4402) of the interposer (440).For example, the height from the second surface (4402) of the interposer (440) to the fourth-second protective layer (5042) may be greater than the height from the second surface (4402) of the interposer (440) to the fourth-first protective layer (5041). Accordingly, the gap (e.g., width, distance, length, or space) (w'2) between the third protective layer (503) and the fourth-second protective layer (5042) disposed on the second substrate (520) may be smaller than the gap (e.g., width, distance, length, or space) (w'1) between the third protective layer (503) and the fourth-first protective layer (5041).

[0081] In this case, when an external shock is applied to a plurality of substrates (510, 520) and an interposer (440), contact may occur between the second-2 protective layer (5022) applied to the second conductive pads (443) of the interposer (440) and the first protective layer (501) of the first substrate (510), and / or contact may occur between the fourth-2 protective layer (5042) applied to the fourth conductive pads (445) of the interposer (440) and the third protective layer (503) of the second substrate (520). Accordingly, the shock applied to the pre-solder (PS) may be distributed to the protective layers (e.g., the first protective layer (501), the second-2 protective layer (5022), the third protective layer (503), and the fourth-2 protective layer (5042)). Accordingly, damage to the pre-solder (PS), conductive terminals (511, 521), and conductive pads (442, 443, 444, 445) caused by external shock applied to the electronic device (400) can be prevented or reduced. In one embodiment, the gap (w2) between the first protective layer (501) and the second-second protective layer (5022) and / or the gap (w'2) between the third protective layer (503) and the fourth-second protective layer (5042) forms a narrower gap than the gaps (w1, w'1) between other protective layers (501, 5021, 503, 5041), thereby blocking the liquid heat transfer material introduced into the interior of the interposer (440) from leaking out of the interposer (440) to a certain extent.

[0082] FIG. 8 is a partial cross-sectional view illustrating the configuration and combined state between an interposer and a plurality of substrates according to an embodiment of the present disclosure. FIG. 9a is a drawing of an embodiment according to an embodiment of the present disclosure in which some of the signal pads of the interposer and the ground pad are formed with a size expanded compared to the signal pads of the interposer. FIG. 9b is a drawing according to an embodiment of the present disclosure in which a protective layer is applied to the signal pads and the ground pad in FIG. 9a. FIG. 10 is a plan view of the interposer of FIG. 9a according to an embodiment of the present disclosure.

[0083] Hereinafter, in describing the electrical connection structure through the conductive terminals (511, 512) and conductive pads (442, 443, 444, 445) of the interposer (440) and two substrates (510, 520) coupled to the interposer (440) according to exemplary embodiments of the present invention, the detailed description of substantially identical components may be omitted.

[0084] As described in FIGS. 8 to 10 below, as described through FIGS. 5 to 7b, a plurality of second conductive pads (443) may be physically connected to form an area larger than that of the first conductive pads (442). A portion of the second protective layer (502) (e.g., a second-2 protective layer (5022)) may be disposed on the plurality of second conductive pads (443). Additionally, a plurality of fourth conductive pads (445) may be physically connected to form an area larger than that of the third conductive pads (444). A portion of the fourth protective layer (504) (e.g., a second-2 protective layer (5042)) may be disposed on the plurality of fourth conductive pads (445).

[0085] According to various embodiments, as illustrated in FIGS. 8 and 9a, the first conductive pads (442), which are signal pads, may include a first-1 conductive pad (4421) and first-2 conductive pads (4422). In one embodiment, referring to FIGS. 8, the first-2 conductive pads (4422) may be formed with a wider gap (e.g., width, distance, length, or space) than the first-1 conductive pads (4421). In one embodiment, referring to FIGS. 9a and 10, when viewed from the first surface (4401) of the interposer (440), the first-2 conductive pads (4422) may be larger in size than the first-1 conductive pads (4421).

[0086] According to various embodiments, as illustrated in FIG. 8, the third conductive pads (444), which are signal pads, may include a third-first conductive pad (4441) and third-second conductive pads (4442). In one embodiment, referring to FIG. 8, the third-second conductive pads (4442) may be formed with a wider spacing (e.g., width, distance, length, or space) than the third-first conductive pads (4441). In one embodiment, when viewed from the first surface (4402) of the interposer (440), the third-second conductive pads (4442) may be larger in size than the third-first conductive pads (4441).

[0087] According to various embodiments, as illustrated in FIG. 9a and FIG. 10, the first-2 conductive pads (4422) may not be physically connected to each other so that signal interference does not occur, as the first-2 conductive pads (4422) are pads that transmit signals to the first substrate (510) and the second substrate (520). In one embodiment, the first-2 conductive pads (4422) are not connected to each other and may be pads larger in size than the first-1 conductive pads (4421). According to various embodiments, the third-2 conductive pads (4442) may not be physically connected to each other so that signal interference does not occur, as the third-2 conductive pads (4442) are pads that transmit signals to the first substrate (510) and the second substrate (520). In one embodiment, the 3-2 conductive pads (4442) are not connected to each other and may be pads larger in size than the 3-1 conductive pads (4441).

[0088] According to various embodiments, as illustrated in FIG. 8 and FIG. 9b, some of the second protective layer (502) disposed on the first surface (4401) of the interposer (440) may be disposed on the first-second conductive pads (4422). In one embodiment, the second protective layer (502) may include a second-first protective layer (5021) disposed on the remaining area of ​​the first surface (4401) of the interposer (440) excluding the area where the first conductive pads (442) and the second conductive pads (443) are disposed, a second-second protective layer (5022) disposed on the remaining area excluding the area where the pre-solder (PS) is disposed on the second conductive pads (443), and / or a second-third protective layer (5023) disposed on the remaining area excluding the area where the pre-solder (PS) is disposed on the first-second conductive pads (4422). In one embodiment, referring to FIG. 9b, the second-third protective layer (5023) may be disposed on a portion of a plurality of first-second conductive pads (4422) as an area excluding the area where pre-solder (PS) is applied on the first-second conductive pad (4422). In one embodiment, the second-third protective layer (5023) may face the first protective layer (501) disposed on the first substrate (510). Although the second protective layer (502) has been described in the above description as being divided into a second-first protective layer (5021), a second-second protective layer (5022), and a second-third protective layer (5023), the second-first protective layer (5021), the second-second protective layer (5022), and / or the second-third protective layer (5023) may be formed integrally. In one embodiment, the second-1 protective layer (5021), the second-2 protective layer (5022), and / or the second-3 protective layer (5023) may be conceptually separated according to the location where the second protective layer (502) is placed. In some embodiments, the second-1 protective layer (5021), the second-2 protective layer (5022), and / or the second-3 protective layer (5023) may be physically separated.

[0089] According to various embodiments, as illustrated in FIG. 8, some of the fourth protective layer (504) disposed on the second surface (4402) of the interposer (440) may be disposed on the third-second conductive pads (4442). In one embodiment, the fourth protective layer (504) may include a fourth-1 protective layer (5041) disposed on the remaining area of ​​the second surface (4402) of the interposer (440) excluding the area where the third conductive pads (444) and the fourth conductive pads (445) are disposed, a fourth-2 protective layer (5042) disposed on the remaining area excluding the area where the pre-solder (PS) is disposed on the fourth conductive pads (445), and / or a fourth-3 protective layer (5043) disposed on the remaining area excluding the area where the pre-solder (PS) is disposed on the third-second conductive pads (4442). In one embodiment, the 4-3 protective layer (5043) may be disposed on a portion of a plurality of 3-2 conductive pads (4442) as an area excluding the area where pre-solder (PS) is applied on the 3-2 conductive pads (4442). In one embodiment, the 4-3 protective layer (5043) may face the 3 protective layer (503) disposed on the 2 substrate (520). Although the 4 protective layer (504) has been described in the above description as being divided into the 4-1 protective layer (5041), the 4-2 protective layer (5042), and the 4-3 protective layer (5043), the 4-1 protective layer (5041), the 4-2 protective layer (5042), and / or the 4-3 protective layer (5043) may be formed integrally. In one embodiment, the 4-1 protective layer (5041), the 4-2 protective layer (5042), and / or the 4-3 protective layer (5043) may be conceptually separated according to the location where the 4th protective layer (504) is placed. In some embodiments, the 4-1 protective layer (5041), the 4-2 protective layer (5042), and / or the 4-3 protective layer (5043) may be physically separated.

[0090] According to one embodiment of the present disclosure, the second-third protective layer (5023) of the second protective layer (502) may be positioned so as not to overlap with the pre-solder (ps) at the first-second conductive pads (4422), which are signal pads. For example, the second-third protective layer (5023) may be positioned in the remaining area excluding the area where the pre-solder (PS) is positioned at the first-second conductive pads (4422). As the second-third protective layer (5023) is positioned at the first-second conductive pads (4422), it may be positioned relatively higher from the first surface (4401) than the second-first protective layer (5021) positioned at the first surface (4401) of the interposer (440). For example, the height from the first surface (4401) of the interposer (440) to the second-third protective layer (5023) may be greater than the height from the first surface (4401) of the interposer (440) to the second-first protective layer (5021). Accordingly, the gap (w3) between the first protective layer (501) and the second-third protective layer (5023) disposed on the first substrate (510) may be smaller than the gap (w1) between the first protective layer (501) and the second-first protective layer (5021).

[0091] In one embodiment, the fourth-third protective layer (5043) of the fourth protective layer (504) may be positioned so as not to overlap with the pre-solder (ps) at the third-second conductive pads (4442), which are signal pads. For example, the fourth-third protective layer (5043) may be positioned in the remaining area excluding the area where the pre-solder (PS) is positioned at the third-second conductive pads (4442). As the fourth-third protective layer (5043) is positioned at the third-second conductive pads (4442), it may be positioned relatively higher from the second surface (4402) than the fourth-first protective layer (5041) positioned at the second surface (4402) of the interposer (440). For example, the height from the second surface (4402) of the interposer (440) to the fourth-third protective layer (5043) may be greater than the height from the second surface (4402) of the interposer (440) to the fourth-first protective layer (5041). Accordingly, the gap (e.g., width, distance, length, or space) (w'3) between the third protective layer (503) and the fourth-third protective layer (5043) disposed on the second substrate (520) may be smaller than the gap (e.g., width, distance, length, or space) (w'1) between the third protective layer (503) and the fourth-first protective layer (5041).

[0092] In this case, when an external shock is applied to a plurality of substrates (510, 520) and an interposer (440), contact may occur between the second-third protective layer (5023) applied to the first-second conductive pads (4422) of the interposer (440) and the first protective layer (501) of the first substrate (510), and / or contact may occur between the fourth-third protective layer (5043) applied to the third-second conductive pads (4442) of the interposer (440) and the third protective layer (503) of the second substrate (520). In this case, the shock applied to the pre-solder (PS) may be distributed to the protective layers (e.g., the first protective layer (501), the second-third protective layer (5023), the third protective layer (503), and the fourth-third protective layer (5043)). Accordingly, damage to the pre-solder (PS), conductive terminals (511, 521), or conductive pads (442, 443, 444, 445) caused by external impact applied to the electronic device (400) can be prevented or reduced. In one embodiment, the gap (e.g., width, distance, length, or space) (w3) between the first protective layer (501) and the second-third protective layer (5023) and / or the gap (w'3) between the third protective layer (503) and the fourth-third protective layer (5043) forms a narrower gap than the gaps (w1, w'1) between the other protective layers (501, 5021, 503, 5041), thereby preventing the liquid heat transfer material introduced into the interior of the interposer (440) from leaking out of the interposer (440) to a certain extent.

[0093] FIG. 11 is a drawing of a state in which conductive pads of an interposer according to one embodiment of the present disclosure are arranged so as not to protrude from the surface of the interposer.

[0094] Hereinafter, in describing the electrical connection structure through the conductive terminals (611, 621) of the interposer (540) (e.g., the interposer point (440) of FIG. 4) and the two substrates (610, 620) (e.g., the first substrate (510), the second substrate (520) of FIG. 3) coupled to the interposer (540) (e.g., the first conductive terminals (511) and the second conductive terminals (521) of FIG. 5) and the conductive pads (542, 543) of the interposer (540) (e.g., the conductive pads (442, 443, 444, 445) of FIG. 5) according to exemplary embodiments of the present invention, the detailed description of substantially identical components may be omitted.

[0095] According to various embodiments, as illustrated in FIG. 11, the interposer (540) may include first conductive pads (542) disposed on a first surface (5401) to face each of a first plurality of conductive terminals (611) disposed on one surface of a first substrate (610). According to one embodiment, the interposer (540) may include second conductive pads (543) disposed on a second surface (5402) to face each of a second plurality of conductive terminals (621) disposed on one surface of a second substrate (620). According to one embodiment, each of the first conductive pads (542) and the second conductive pads (543) may be electrically connected through a conductive post (546) (e.g., a conductive via) disposed to penetrate from the first surface (5401) to the second surface (5402).

[0096] In one embodiment, the first plurality of conductive pads (542) and the second plurality of conductive pads (543) may each include a signal pad used for signal transmission between the first substrate (610) and the second substrate (620), and a ground pad that reduces electrical noise generated in the interposer (540) and the plurality of substrates (610, 620).

[0097] According to various embodiments, as illustrated in FIG. 11, the interposer (540) may include a plurality of conductive pads (e.g., conductive terminals, first conductive pads (542) of FIG. 11 and second conductive pads (543) of FIG. 11), and the two substrates (620, 630) may be electrically connected by being physically in contact with the conductive terminals (e.g., first conductive terminal (611) and second conductive terminal (621) of FIG. 11) placed on the two substrates (610, 620) through pre-solder.

[0098] According to various embodiments, as illustrated in FIG. 11, a protective layer (e.g., a first protective layer (601), a second protective layer (602), a third protective layer (603), and a fourth protective layer (604)) including a solder resist (SR) layer may be disposed on one side of a first substrate (610) on which the first conductive terminals (611) are disposed, one side of a second substrate (620) on which the second conductive terminals (621) are disposed, and on the first side (5401) and the second side (5402) of an interposer (540) on which the conductive pads (542, 543) are disposed. In one embodiment, the protective layer (602) may prevent unintended short circuits caused by pre-solder (PS) being attached to parts other than the conductive terminals (611, 621) and conductive pads (542, 543).

[0099] In one embodiment, referring to FIG. 11, a first protective layer (601) may be disposed on one side of the first substrate (610) in the remaining area excluding the area where the first conductive terminals (611) are disposed. In one embodiment, a second protective layer (602) may be disposed on the first side (5401) of the interposer (540) facing the first substrate (610) in the remaining area excluding the area where the first conductive pads (542) are disposed. In one embodiment, a third protective layer (603) may be disposed on one side of the second substrate (620) in the remaining area excluding the area where the second conductive terminals (621) are disposed. In one embodiment, a fourth protective layer (604) may be disposed on the second side (5402) of the interposer (540) facing the second substrate (620) in the remaining area excluding the area where the second conductive pads (543) are disposed.

[0100] According to various embodiments, the interposer (540) may include a plurality of layers. In one embodiment, the interposer (540) may have a copper layer and a prepreg (preimpregnated materials) layer (e.g., an insulating layer) alternately stacked as a dielectric substrate. In one embodiment, the interposer (540) may include a copper clad laminate (CCL) located between the plurality of prepregs.

[0101] According to various embodiments, as illustrated in FIG. 11, the first conductive pads (542) of the interposer (540) may not protrude toward the first substrate (610) from the first surface (5401) of the interposer (540). In one embodiment, the first conductive pads (542) may be located on the prepreg layer of the interposer (540) and may not protrude toward the first substrate (610) from the first surface (5401), which is the surface of the interposer (540). In one embodiment, the area of ​​the first conductive pads (542) located inside the interposer (540) may be greater than the area exposed on the surface of the interposer (540). As described above, when the first conductive pads (542) are located inside the interposer (540) without protruding from the first surface (5401) toward the first substrate (610), the first conductive pads (542) may not protrude toward the first substrate (610) relative to the second protective layer (602). Compared to an embodiment in which the first conductive pads (542) protrude from the first surface (5401) and are connected to the first conductive terminals (611) via pre-solder (PS), the structure described above may reduce the gap (e.g., width, distance, length, or space) between the first protective layer (601) disposed on the first substrate (610) and the second protective layer (602) disposed on the first surface (5401) of the interposer (540). In this case, when an external shock is applied to a plurality of substrates (610, 620) and an interposer (540), the shock transmitted to the pre-solder (PS) in contact between the first conductive pads (542) of the interposer (540) and the first conductive terminals (611) of the first substrate (610) can be dispersed to the protective layers (601, 602) as the first protective layer (601) and the second protective layer (602) come into contact. Accordingly, damage to the pre-solder (PS), the first conductive terminals (611), and the first conductive pads (542) caused by the external shock can be prevented or reduced.

[0102] According to various embodiments, as illustrated in FIG. 11, the second conductive pads (543) of the interposer (540) may not protrude toward the second substrate (620) from the second surface (5402) of the interposer (540). In one embodiment, the second conductive pads (543) may not protrude toward the second substrate (620) from the second surface (5402), which is the surface of the interposer (540) and is located on the prepreg layer of the interposer (540). In one embodiment, the area of ​​the second conductive pads (543) located inside the interposer (540) may be greater than the area exposed on the surface of the interposer (540). As described above, when the second conductive pads (543) are located inside the interposer (540) without protruding from the second surface (5402) toward the second substrate (620), the second conductive pads (543) may not protrude toward the second substrate (620) relative to the fourth protective layer (604). Compared to an embodiment in which the second conductive pads (543) protrude from the second surface (5402) and the pre-solder (PS) and the second conductive pads (621) are connected, the structure described above may reduce the gap (e.g., width, distance, length, or space) between the third protective layer (603) disposed on the second substrate (620) and the fourth protective layer (604) disposed on the second surface (5402) of the interposer (540). In this case, when an external shock is applied to a plurality of substrates (610, 620) and an interposer (540), the shock transmitted to the pre-solder (PS) in contact between the second conductive pads (543) of the interposer (540) and the second conductive terminals (621) of the second substrate (620) can be dispersed to the protective layers (603, 604) as the third protective layer (603) and the fourth protective layer (604) come into contact. Accordingly, damage to the pre-solder (PS), the second conductive terminals (621), and the second conductive pads (543) caused by the external shock can be prevented or reduced.

[0103] In one embodiment, compared to a comparative embodiment in which first conductive pads (542) protrude from the first surface (5401) of the interposer (540) or second conductive pads (543) protrude from the second surface (5402) of the interposer (540), in the embodiment of FIG. 11, the gap (e.g., width, distance, length, or space) between the first protective layer (601) disposed on the first substrate (610) and the second protective layer (602) disposed on the first surface (5401) of the interposer (540), and the gap (e.g., width, distance, length, or space) between the third protective layer (603) disposed on the second substrate (620) and the fourth protective layer (604) disposed on the second surface (5402) of the interposer (540) may be reduced. Therefore, the liquid heat transfer material introduced into the opening of the interposer (540) (e.g., the opening (4403) of FIG. 4) can be blocked from leaking out of the interposer (540) to a certain extent.

[0104] According to one embodiment of the present disclosure, an electronic device (200, 300, 400) may include a first substrate (510) comprising a plurality of first conductive terminals (511) disposed on one surface. The electronic device may include an interposer (440) that is disposed parallel to the first substrate and includes a plurality of first conductive pads (442) disposed on a first surface (4401) facing the first substrate, and a plurality of second conductive pads (443) that are larger in size than the first conductive pads when viewed from the first surface. The electronic device may include solder (PS) that is in contact between the first conductive terminals and the first conductive pads and between the first conductive terminals and the second conductive pads. The electronic device may include a first protective layer (501) disposed on one surface of the first substrate in the remaining area excluding the area where the plurality of first conductive terminals are disposed. The electronic device may include a second-1 protective layer (5021) disposed in the remaining area of ​​the first surface of the interposer, excluding the area where the first conductive pad and the second conductive pad are disposed, and at least a portion of which faces the first protective layer. The electronic device may include a second-2 protective layer (5022) disposed in the remaining area of ​​the second conductive pad, excluding the area where the solder is disposed, and at least a portion of which faces the first protective layer. The gap (w2) between the first protective layer and the second-2 protective layer may be smaller than the gap (w1) between the first protective layer and the second-1 protective layer.

[0105] In one embodiment, the height from the first surface of the interposer to the second-2 protective layer may be greater than the height from the first surface of the interposer to the second-1 protective layer.

[0106] In one embodiment, a plurality of the second conductive pads may be connected to the ground of the interposer.

[0107] In one embodiment, a plurality of the second conductive pads may be disposed at the outermost angle on the first surface of the interposer.

[0108] In one embodiment, a plurality of the second conductive pads are physically connected and arranged along the perimeter of the interposer, and may be formed in a closed loop or a partially open loop shape.

[0109] In one embodiment, a plurality of the first conductive pads are signal pads that transmit or receive an electrical signal to the first substrate, and may include a first-1 conductive pad (4421) and a first-2 conductive pad (4422). The first-2 conductive pad may be larger in size than the first-1 conductive pad when viewed from the first surface of the interposer.

[0110] In one embodiment, the second-third protective layer (5023) may be further included, which is disposed in the remaining area of ​​the first-third conductive pad excluding the area where the solder is disposed, and at least a portion thereof faces the first protective layer. The gap (w3) between the first protective layer and the second-third protective layer may be smaller than the gap (w1) between the first protective layer and the second-first protective layer.

[0111] In one embodiment, a second substrate (520) may be further included, which is positioned opposite to the first substrate with the interposer in between and includes a plurality of second conductive terminals (521) facing the first conductive terminal. The interposer may include a plurality of third conductive pads (444) positioned on a second surface (4402) opposite to the first surface, a plurality of fourth conductive pads (445) that are larger in size than the third conductive pads when viewed from the second surface, and conductive posts (446) that electrically connect the first conductive pad and the third conductive pad, and the second conductive pad and the fourth conductive pad, respectively. The plurality of third conductive pads and the plurality of fourth conductive pads may be electrically connected to the plurality of second conductive terminals of the second substrate through solder (PS).

[0112] In one embodiment, the apparatus may further include a third protective layer (503) disposed in the remaining area excluding the area where the plurality of second conductive terminals are disposed on one surface of the second substrate, a fourth-1 protective layer (5041) disposed in the remaining area excluding the area where the third conductive pad and the fourth conductive pad are disposed on the second surface of the interposer, with at least a portion facing the third protective layer, and a fourth-2 protective layer (5042) disposed in the remaining area excluding the area where the solder is disposed on the fourth conductive pad, with at least a portion facing the third protective layer. In one embodiment, the gap (w'2) between the third protective layer and the fourth-2 protective layer may be smaller than the gap (w'1) between the third protective layer and the fourth-1 protective layer.

[0113] In one embodiment, the height from the second surface of the interposer to the 4-2 protective layer may be greater than the height from the second surface of the interposer to the 4-1 protective layer.

[0114] In one embodiment, a plurality of the fourth conductive pads may be connected to the ground of the interposer.

[0115] In one embodiment, a plurality of the fourth conductive pads may be disposed at the outermost angle on the second surface of the interposer.

[0116] In one embodiment, a plurality of the fourth conductive pads are physically connected and arranged along the perimeter of the interposer, and may be formed in a closed loop or a partially open loop shape.

[0117] In one embodiment, the first substrate and the second substrate transmit or receive a signal through the first conductive pad, the second conductive pad and the conductive posts, and can be grounded through the second conductive pad and the fourth conductive pad connected to the ground of the interposer.

[0118] In one embodiment, the plurality of third conductive pads may include a third-1 conductive pad (4441) and a third-2 conductive pad (4442) that is larger in size than the third-1 conductive pad when viewed from the second surface of the interposer.

[0119] In one embodiment, the 3-3rd protective layer (5043) may be further included, disposed in the remaining area excluding the area where the solder is disposed on the 3-2nd conductive pad, and at least a portion thereof facing the 3rd protective layer. The gap (w'3) between the 3rd protective layer and the 4-3rd protective layer may be smaller than the gap (w'1) between the 3rd protective layer and the 4-1st protective layer.

[0120] In one embodiment, the 2-1 protective layer and the 2-2 protective layer are formed integrally, and the 4-1 protective layer and the 4-2 protective layer may be formed integrally.

[0121] According to one embodiment of the present disclosure, an electronic device (400) may include a first substrate (610) comprising a plurality of first conductive terminals (611) disposed on one surface, a second substrate (620) disposed parallel to the first substrate and comprising a plurality of second conductive terminals (621), and an interposer (540) disposed between the first substrate and the second substrate and electrically connected to the first conductive terminals and the second conductive terminals. The interposer may include a first conductive pad (542) electrically connected to the first conductive terminals and disposed inside the interposer, a second conductive pad (543) electrically connected to the second conductive terminals and disposed inside the interposer, and a conductive post (546) electrically connecting the first conductive pad and the second conductive pad. The first conductive pad may not protrude toward the first substrate from the first surface (5401) of the interposer facing the first substrate, and the second conductive pad may not protrude toward the second substrate from the second surface (5402) of the interposer facing the second substrate.

[0122] In one embodiment, the apparatus may further include a first protective layer (601) disposed in the remaining area excluding the area where the plurality of first conductive terminals are disposed on one surface of the first substrate, a second protective layer (602) disposed in the remaining area excluding the area where the first conductive pad is disposed on the first surface of the interposer, with at least a portion facing the first protective layer, a third protective layer (603) disposed in the remaining area excluding the area where the plurality of second conductive terminals are disposed on one surface of the second substrate, and a fourth protective layer (604) disposed in the remaining area excluding the area where the second conductive pad is disposed on the second surface of the interposer, with at least a portion facing the third protective layer.

[0123] In one embodiment, the first conductive pad may not protrude toward the first substrate with respect to the second protective layer. In one embodiment, the second conductive pad may not protrude toward the second substrate with respect to the fourth protective layer.

[0124] The various embodiments of this document and the terms used therein are not intended to limit the technical features described in this document to specific embodiments, and should be understood to include various modifications, equivalents, or substitutions of said embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of said items unless the relevant context clearly indicates otherwise. In this document, phrases such as "A or B," "at least one of A and B," "at least one of A or B," "A, B or C," "at least one of A, B and C," and "at least one of A, B, or C" may each include any one of the items listed together in the corresponding phrase, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used simply to distinguish said components from other said components and do not limit said components in any other aspect (e.g., importance or order). Where any (e.g., 1st) component is referred to as "coupled" or "connected" to another (e.g., 2nd) component, with or without the terms "functionally" or "communicationly," it means that said any component may be connected to said other component directly (e.g., via a wire), wirelessly, or through a third component.

[0125] According to various embodiments, each component (e.g., module or program) of the components described above may include a singular or multiple entities, and some of the multiple entities may be separated and placed in other components. According to various embodiments, one or more of the components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., module or program) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each of the multiple components in the same or similar manner as those performed by the corresponding component among the multiple components prior to integration. According to various embodiments, operations performed by the module, program, or other components may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

[0126] It will be understood that the present invention considers and includes, in addition to the embodiments disclosed above, embodiments based on any two or more combinations of the disclosed embodiments and embodiments including any combination of the features disclosed herein. That is, the absence of an explicit indication that two features can be combined or two embodiments can be combined does not mean that such combination is not conceived, but should be understood as such combination being included herein.

Claims

1. In an electronic device (200, 300, 400), A first substrate (510) comprising a plurality of first conductive terminals (511) arranged on one surface; An interposer (440) comprising a plurality of first conductive pads (442) arranged parallel to the first substrate and arranged on a first surface (4401) facing the first substrate, and a plurality of second conductive pads (443) larger in size than the first conductive pads when viewed from the first surface; A solder (PS) that is in contact between the first conductive terminal and the first conductive pad, and between the first conductive terminal and the second conductive pad; A first protective layer (501) disposed on one surface of the first substrate, in the remaining area excluding the area where the plurality of first conductive terminals are disposed; A second-1 protective layer (5021) disposed in the remaining area excluding the area where the first conductive pad and the second conductive pad are disposed on the first surface of the interposer, and at least a portion of which faces the first protective layer; and A second-2 protective layer (5022) disposed in the remaining area excluding the area where the solder is disposed on the second conductive pad, and at least a portion of which faces the first protective layer; comprising The gap (w2) between the first protective layer and the second protective layer is, An electronic device with a gap (w1) smaller than the gap between the first protective layer and the second-1 protective layer.

2. In Paragraph 1, An electronic device in which the height from the first surface of the interposer to the second-2 protective layer is greater than the height from the first surface of the interposer to the second-1 protective layer.

3. In Paragraph 1, A plurality of the above-mentioned second conductive pads, An electronic device connected to the ground of the above interposer.

4. In Paragraph 3, A plurality of the above-mentioned second conductive pads, An electronic device positioned at the outermost edge on the first surface of the above interposer.

5. In Paragraph 1, A plurality of the above-mentioned first conductive pads, The above first substrate and the signal pad that transmits or receives an electrical signal comprises a plurality of first-1 conductive pads (4421) and a plurality of first-2 conductive pads (4422). The above-mentioned first- and second conductive pads are, An electronic device larger in size than the 1-1 conductive pad when viewed from the first surface of the interposer.

6. In Paragraph 5, It further includes a second-third protective layer (5023) disposed in the remaining area excluding the area where the solder is disposed in the first-second conductive pad, and at least a portion of which faces the first protective layer. The gap (w3) between the first protective layer and the second-third protective layer is, An electronic device with a gap (w1) smaller than the gap between the first protective layer and the second-1 protective layer.

7. In Paragraph 1, The second substrate (520) further comprises a plurality of second conductive terminals (521) arranged opposite to the first substrate with the interposer in between and facing the first conductive terminal. The above interposer is, A plurality of third conductive pads (444) disposed on the second surface (4402), which is the opposite surface of the first surface, When looking at the second surface, a plurality of fourth conductive pads (445) larger in size than the third conductive pad, and It includes conductive posts (446) that electrically connect the first conductive pad, the third conductive pad, the second conductive pad, and the fourth conductive pad, respectively. An electronic device in which the plurality of third conductive pads and the plurality of fourth conductive pads are electrically connected to the plurality of second conductive terminals of the second substrate through solder (PS).

8. In Paragraph 7, A third protective layer (503) disposed on one surface of the second substrate, excluding the area where the plurality of second conductive terminals are disposed; A 4-1 protective layer (5041) disposed in the remaining area excluding the area where the 3rd conductive pad and the 4th conductive pad are disposed on the 2nd surface of the interposer, and at least a portion of which faces the 3rd protective layer; and It further includes a 4-2 protective layer (5042) disposed in the remaining area excluding the area where the solder is disposed on the 4th conductive pad, and at least a portion of which faces the 3rd protective layer; The gap (w'2) between the third protective layer and the fourth-second protective layer is, An electronic device with a gap (w'1) smaller than the gap between the third protective layer and the fourth-1 protective layer.

9. In Paragraph 8, An electronic device in which the height from the second surface of the interposer to the 4-2 protective layer is greater than the height from the second surface of the interposer to the 4-1 protective layer.

10. In Paragraph 8, A plurality of the above-mentioned fourth conductive pads, An electronic device connected to the ground of the above interposer.

11. In Paragraph 10, A plurality of the above-mentioned fourth conductive pads, An electronic device positioned at the outermost edge on the second surface of the above interposer.

12. In Paragraph 8, The first substrate and the second substrate are, Transmitting or receiving a signal through the first conductive pad, the second conductive pad, and the conductive posts, and An electronic device grounded through the second conductive pad and the fourth conductive pad connected to the ground of the interposer.

13. In Paragraph 12, A plurality of the above-mentioned third conductive pads, An electronic device comprising a plurality of third-1 conductive pads (4441) and a plurality of third-2 conductive pads (4442) that are larger in size than the third-1 conductive pads when viewed from the second surface of the interposer.

14. In Paragraph 13, It further includes a 4-3 protective layer (5043) disposed in the remaining area excluding the area where the solder is disposed in the 3-2 conductive pad, and at least a portion of which faces the 3 protective layer; The gap (w'3) between the above third protective layer and the above fourth-third protective layer is, An electronic device with a gap (w'1) smaller than the gap between the third protective layer and the fourth-1 protective layer.

15. In an electronic device (400), A first substrate (610) comprising a plurality of first conductive terminals (611) arranged on one surface; A second substrate (620) arranged parallel to the first substrate and including a plurality of second conductive terminals (621); An interposer (540) disposed between the first substrate and the second substrate and electrically connected to the first conductive terminal and the second conductive terminal, A first conductive pad (542) electrically connected to the first conductive terminal and disposed inside the interposer, A second conductive pad (543) electrically connected to the second conductive terminal and disposed inside the interposer, and It includes a conductive post (546) that electrically connects the first conductive pad and the second conductive pad, and The first conductive pad above does not protrude toward the first substrate from the first surface (5401) of the interposer facing the first substrate, and The second conductive pad is an electronic device that does not protrude toward the second substrate from the second surface (5402) of the interposer facing the second substrate.

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