Driving circuit, driver integrated circuit and power conversion circuit

Abstract

A driving circuit (1), a driver integrated circuit and a power conversion circuit. The driving circuit (1) comprises: a floating driving circuit (11), and a negative-voltage generation and soft-start circuit (12), wherein a voltage output end of the floating driving circuit (11) is connected to a voltage input end of the negative-voltage generation and soft-start circuit (12); the floating driving circuit (11) provides a drive voltage; and the negative-voltage generation and soft-start circuit (12) is configured to generate a negative voltage on the basis of the drive voltage, and superimpose the negative voltage and the drive voltage to obtain a final drive voltage, which is used for turning off a power switching device (2). A negative voltage can be generated when a power switching device (2) is turned off, thereby ensuring that the power switching device (2) is completely turned off.

Description

A driving circuit, a driving chip and a power conversion circuit

[0001] Cross-reference of related disclosures

[0002] The present disclosure claims priority to the Chinese patent application No.CN202411329237.4, filed on September 23, 2024, with the State Intellectual Property Office, and entitled "A driving circuit, a driving chip and a power conversion circuit", the entire content of which is incorporated herein by reference. TECHNICAL FIELD

[0003] Embodiments of the present disclosure relate to, but are not limited to, the field of power electronics, and in particular to a driving circuit, a driving chip and a power conversion circuit. BACKGROUND

[0004] In a switching power supply, passive energy storage elements such as inductors and capacitors are the main components of the volume and loss of the power supply. Narrow input, unregulated voltage power conversion circuits using smaller inductor and capacitor devices can achieve higher efficiency and power density, and are the main power supply components to meet the high-performance CPU (Central Processing Unit) and GPU (Graphics Processing Unit) chip high-current and high-power density power supply requirements. However, in order to reduce the driving loss, some current driving circuits directly drive the driver (which can be composed of a switching tube), and some schemes use fewer energy storage elements. However, in the direct driving scheme of the driver, the driver itself has a threshold, and the power switching device being driven also has a threshold, so that the power switching device cannot be reliably turned off in some application scenarios (such as low driving voltage scenarios), which has the risk of output voltage through and short circuit. In addition, due to the small number of energy storage elements, the input energy can be directly transmitted to the output. If the driving voltage is not adjustable during the startup of the power conversion circuit, the switching tube is in a normal low resistance state when turned on. After the driving starts, there is a large impact current on the output capacitor during the process of establishing the output voltage, which can cause great risk to the reliability of the switching device. SUMMARY

[0005] Embodiments of the present disclosure provide a driving circuit, a driving chip and a power conversion circuit.

[0006] In a first aspect, embodiments of the present disclosure provide a driving circuit, comprising: a floating driving circuit and a negative voltage generation and soft start circuit; a voltage output end of the floating driving circuit is connected with a voltage input end of the negative voltage generation and soft start circuit; the floating driving circuit is configured to provide a driving voltage; and the negative voltage generation and soft start circuit is configured to generate a negative voltage based on the driving voltage, superimpose the negative voltage and the driving voltage to obtain a final driving voltage, and use the final driving voltage to turn off the power switching device.

[0007] In a second aspect, the embodiments of the present disclosure further provide a driving chip, comprising the driving circuit according to any of the embodiments of the present disclosure.

[0008] In a third aspect, the embodiments of the present disclosure further provide a power conversion circuit, comprising the driving circuit according to any of the embodiments of the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0009] In the drawings of the embodiments of the present disclosure:

[0010] FIG. 1 is a schematic diagram of a driver provided by the related art;

[0011] FIG. 2 is a schematic diagram of a driving circuit according to an embodiment of the present disclosure;

[0012] FIG. 3 is a schematic diagram of voltage output of a driving circuit according to an embodiment of the present disclosure;

[0013] FIG. 4 is a schematic diagram of a floating driving circuit according to an embodiment of the present disclosure;

[0014] FIG. 5 is a schematic diagram of an embodiment of a floating driving circuit according to an embodiment of the present disclosure;

[0015] FIG. 6 is a schematic diagram of a bias current circuit according to an embodiment of the present disclosure;

[0016] FIG. 7 is a schematic diagram of an embodiment of a negative voltage generating circuit according to an embodiment of the present disclosure;

[0017] FIG. 8 is a schematic diagram of a bias current circuit according to an embodiment of the present disclosure;

[0018] FIG. 9 is a schematic diagram of a first embodiment of a peak voltage detecting circuit according to an embodiment of the present disclosure;

[0019] FIG. 10 is a schematic diagram of a second embodiment of a peak voltage detecting circuit according to an embodiment of the present disclosure;

[0020] FIG. 11 is a schematic diagram of a resonant driving implementation process according to an embodiment of the present disclosure;

[0021] FIG. 12 is a schematic diagram of a negative voltage driving implementation process according to an embodiment of the present disclosure;

[0022] FIG. 13 is a schematic diagram of a specific driving voltage waveform of a power switch Q7 in a soft start process according to an embodiment of the present disclosure;

[0023] FIG. 14 is a schematic diagram of a link of a second floating driving circuit and a third floating driving circuit according to an embodiment of the present disclosure;

[0024] FIG. 15 is a schematic diagram of a first driving circuit structure in a case of multiple power switch devices according to an embodiment of the present disclosure;

[0025] Fig. 16 is a schematic diagram of a second driving circuit structure of the power switching device in multiple cases according to an embodiment of the present disclosure;

[0026] Fig. 17 is a schematic diagram of driving waveforms of the second driving circuit of the embodiment of Fig. 16;

[0027] Fig. 18 is a block diagram of a driving chip according to an embodiment of the present disclosure;

[0028] Fig. 19 is a block diagram of a power conversion circuit according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0029] In order for those skilled in the art to better understand the technical solutions of the present disclosure, the communication-aware data processing method and the computer readable storage medium provided by the embodiments of the present disclosure are described in detail below with reference to the drawings.

[0030] The present disclosure will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the present disclosure are shown. The present disclosure may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art.

[0031] The accompanying drawings, which are included to provide a further understanding of the present disclosure and constitute a part of this specification, illustrate embodiments of the present disclosure and together with the detailed description serve to explain the present disclosure. The above and other features and advantages of the present disclosure will become more apparent from the following detailed description, taken in conjunction with the accompanying drawings.

[0032] The present disclosure can be described with reference to plan views and / or cross-sectional views by idealized schematic illustrations of the various elements of the present disclosure. Therefore, the size of the elements in the figures can not always be to scale and the dimensions of certain elements can have been enlarged relative to other elements for clarity.

[0033] The embodiments of the present disclosure and the features in the embodiments can be combined if there is no conflict.

[0034] The terms used in the present disclosure are only used to describe particular embodiments and should not be construed to limit the present disclosure. The term "and / or" as used in the present disclosure includes any and all combinations of one or more of the associated listed items. The singular forms "a," "an," and "the" as used in the present disclosure are intended to include the plural forms as well, unless the context clearly indicates otherwise. The term "comprises" or "comprising," as used in the present disclosure, specifies the presence of stated features, integers, steps, operations, elements, components, and / or groups thereof, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0035] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure and will not be interpreted in an overly literal or overly formal sense unless expressly so defined herein.

[0036] In the field of power electronics, switching power supplies using power switching devices have the advantages of high conversion efficiency, small size, etc., and dominate the field of industrial equipment power supply. High efficiency and high power density are the core requirements for switching power supplies, and increasing the switching frequency of power switching devices is an important technical means to further improve power density. With the application of third-generation semiconductor switching devices such as GaN (gallium nitride), the switching frequency is evolving above 1 MHz (megahertz). The increase in switching frequency can reduce the parameters and size of passive devices, but at the same time, it also brings an increase in switching loss, mainly including the loss caused by the output parasitic capacitance of the switching device during switching, and the driving loss caused by the input capacitance during driving.

[0037] In the related art, soft switching technology for power switching devices through resonant circuits and the like can achieve energy recovery on the output capacitor and significantly reduce switching process loss.

[0038] For example, the commonly used LLC (inductor-inductor-capacitor) resonant circuit currently pursues the demand for extremely high efficiency and high power density of power supply, such as current AI (artificial intelligence) GPU processors, high-performance network processors, etc., whose input power supply is 48V (volts) with a stable voltage. In order to meet the demand for ultra-low voltage and ultra-high current such as 0.8V (volts) and 1000A (amperes) for processor power supply, a two-stage power supply architecture is usually used, i.e. first converting the 48V input voltage into a low-voltage intermediate neutral voltage such as 12V or 6V through a front-stage power supply architecture, and then converting 12V or 6V into 0.8V for processor power supply. The intermediate neutral converter from 48V to 12V can use non-regulating topologies such as LLC resonant circuits, as the 48V input is regulated or in a narrow range. Such topologies can use smaller L (inductor), C (capacitor) and other passive energy storage devices, and can achieve smaller size and higher conversion efficiency. In addition, such topologies can achieve near-zero voltage and current switching by using LLC resonant circuits, which can significantly reduce switching loss and achieve higher switching frequency, further reducing the size of passive devices such as transformers, and are currently one of the circuits that can achieve the highest efficiency and power density. However, such circuits have the following problems:

[0039] 1. Efficiency: As the switching frequency increases, the drive loss also increases, which becomes an important part of the efficiency.

[0040] 2. Soft start problem: Due to the high efficiency and high power density characteristics of direct energy transmission without energy storage elements, during the startup process when the output voltage has not been established, the input voltage directly charges the output capacitor, resulting in a large impact current, which poses a risk to device stress and reliability.

[0041] For drive loss, when the switching frequency is low, the loss ratio is small, and a direct driver is generally used, for example, the following driver can be used to reduce the loss:

[0042] Figure 1 is a driver composed of two switching tubes (M1 and M2), and the output capacitor Cgs and Cgd are charged and discharged by Vcc to realize the voltage control of the gate of Mosfet (Metal Oxide Semiconductor Field Effect Transisto, Metal Oxide Semiconductor Field Effect Transisto) tube (M3) (for example, G in Figure 1, where D and S are the drain and source of M3, respectively). During a switching drive process, the charging and discharging energy of the input capacitor is completely lost on the loop impedance Rg, and the size of the loss is proportional to the switching frequency and the size of the input capacitor.

[0043] Based on the driver in Figure 1, the existing resonant drive technology can include the following resonant schemes:

[0044] The magnetizing inductance of the drive transformer resonates with the input capacitor of the power switch tube during the drive process, and the energy of the input capacitor is recovered by the magnetizing inductance, which can reduce the drive loss. However, the drive voltage cannot be completely to 0 when the drive is off, and needs to be higher than the threshold voltage of the Mosfet tube. When driving, there is a risk that the power switch tube cannot be completely turned off, especially in the drive of the synchronous rectifier tube for low-voltage output. The threshold voltage of the low-voltage output synchronous rectifier tube is often also low, which cannot effectively turn off the synchronous rectifier tube, which may cause the output voltage to be directly connected, forming a short circuit and other risks.

[0045] In addition, in the current resonant drive scheme, although some schemes reduce the drive loss, due to the lack of energy storage elements, the input energy can be directly transmitted to the output. If the drive voltage cannot be adjusted during the startup process of the power conversion circuit, the switching tube is in a normal low resistance state when it is turned on, and after the drive is started, there is a large impact current on the output capacitor during the process when the output voltage has not been established, which may cause a large risk to the reliability of the switching device.

[0046] The driving circuit of the embodiment of the present disclosure comprises a floating driving circuit and a negative voltage generation and soft start circuit; the floating driving circuit is configured to provide a driving voltage; the negative voltage generation and soft start circuit is configured to generate a negative voltage based on the driving voltage, and obtain a final driving voltage by superimposing the negative voltage and the driving voltage, which is used to turn off the power switching device. The embodiment can generate a negative voltage when turning off the power switching device, so as to ensure that the power switching device is completely turned off, thereby avoiding the risk of output voltage direct short circuit caused by the power switching device not being turned off.

[0047] The embodiment of the present disclosure can be applied to any driving scene of the power switching device, for example, including but not limited to the driving scene of the power switching device in various power conversion circuits in the field of power electronics, and specifically, for example, the unregulated voltage power conversion topology scene with narrow input voltage range, high switching frequency, high efficiency and high power density, such as LLC resonant circuit.

[0048] The embodiment of the present disclosure will be described in detail below.

[0049] The embodiment of the present disclosure provides a driving circuit 1. As shown in FIG. 2, the driving circuit 1 comprises a floating driving circuit 11 and a negative voltage generation and soft start circuit 12, the voltage output end of the floating driving circuit 11 is connected with the voltage input end of the negative voltage generation and soft start circuit 12, and the voltage output end of the negative voltage generation and soft start circuit 12 can be directly or indirectly connected with the driven power switching device 2;

[0050] The floating driving circuit 11 is configured to provide a driving voltage.

[0051] The negative voltage generation and soft start circuit 12 is configured to generate a negative voltage based on the driving voltage, and obtain a final driving voltage by superimposing the negative voltage and the driving voltage, wherein the final driving voltage is used to turn off the power switching device.

[0052] In the embodiment of the present disclosure, the driving circuit can drive the power switching device 2 in various power conversion circuits and control the turn-on and turn-off of the power switching device.

[0053] In the embodiment of the present disclosure, as shown in FIG. 3, the floating driving circuit 11 refers to that the output reference end n of the floating driving circuit is not grounded with the reference end y (such as the source of Mosfet) of the power switching device, that is, there is no electrical connection or the same potential, and the two are connected through the negative voltage generation and soft start circuit 12.

[0054] In the embodiments of the present disclosure, the process of negative voltage turn-off can include: the output voltage of the floating drive circuit 11 at the m, n end is Vmn=0-10V, the output voltage is 10V when the output conduction signal is output, and the output voltage is 0V when the output turn-off signal is output. The negative voltage generation and soft start circuit 12 generates a negative voltage between n and y, such as Vn-Vy=-2V. At this time, when Vmn=0V, Vm-Vy=-2V, the driving voltage Vx-Vy of the power switch device is -2V, and a negative voltage driving turn-off signal is formed.

[0055] In the embodiments of the present disclosure, the floating drive circuit 11 can include but is not limited to an isolation drive circuit.

[0056] In the embodiments of the present disclosure, several embodiments of the floating drive circuit 11 are given below.

[0057] In the embodiments of the present disclosure, the first implementation scheme of the floating drive circuit 11 is an isolation drive circuit, which can include an isolation power supply and a drive chip; the supply voltage and the drive ground of the drive chip are provided by the isolation power supply.

[0058] In the embodiments of the present disclosure, the drive chip at least includes two series-connected Mosfet switches (a first Mosfet switch and a second Mosfet switch), the source of the first Mosfet switch is connected to the drain of the second Mosfet switch, the drain of the first Mosfet switch and the source of the second Mosfet switch serve as the input end of the drive chip, and the source and the drain of the second Mosfet switch serve as the output end of the drive chip.

[0059] In the embodiments of the present disclosure, as shown in FIG. 4, the second implementation scheme of the floating drive circuit 11 is an isolation drive circuit, which can include but is not limited to a primary side bridge circuit 111, a drive transformer 112, and a secondary side drive rectifier circuit 113; the primary side bridge circuit 111 is connected to the primary side of the drive transformer 112; the secondary side of the drive transformer 112 is connected to the secondary side drive rectifier circuit 113; and the voltage output end of the secondary side drive rectifier circuit 113 serves as the voltage output end of the isolation drive circuit.

[0060] In the embodiments of the present disclosure, the primary side bridge circuit 111 can include but is not limited to a full-bridge circuit and a half-bridge circuit. In the present application, the detailed structure of the primary side bridge circuit 111 is not limited, and can be selected as needed.

[0061] In the embodiments of the present disclosure, as shown in FIG. 5, the primary side bridge circuit 111 can be a full-bridge rectifier circuit composed of four switch tubes Q1, Q2, Q3 and Q4, the power supply of the full-bridge rectifier circuit is VCC, and the drive transformer 112 (i.e. T1) is composed of a primary side winding Lm and a secondary side winding.

[0062] In the embodiments of the present disclosure, the secondary side of the driving transformer 112 can include one or more, according to the number of the driving power switch device 2.

[0063] In the embodiments of the present disclosure, the secondary side driving rectifier circuit 113 can include a plurality of rectifier tubes connected in series.

[0064] In the embodiments of the present disclosure, the number and type of the rectifier tubes are not limited, and can be selected according to the requirements.

[0065] In the embodiments of the present disclosure, the plurality of rectifier tubes can include, but are not limited to, a first rectifier tube and a second rectifier tube; the drain of the first rectifier tube and the gate of the second rectifier tube are connected to the first end of the secondary side of the driving transformer 112; the source of the first rectifier tube is connected to the source of the second rectifier tube; the drain of the second rectifier tube and the gate of the first rectifier tube are connected to the second end of the secondary side of the driving transformer; wherein the gate of the first rectifier tube and the gate of the second rectifier tube are connected to serve as the voltage output reference end of the secondary side driving rectifier circuit 113; the drain of the first rectifier tube and the source of the second rectifier tube serve as the voltage output end of the secondary side driving rectifier circuit 113.

[0066] In the embodiments of the present disclosure, as shown in FIG. 5, the first rectifier tube can be marked as Q5, and the second rectifier tube can be marked as Q6.

[0067] In the embodiments of the present disclosure, as shown in FIG. 6, the negative voltage generation and soft start circuit 12 can include, but is not limited to, a bias current circuit 121 and a negative voltage generation circuit 122; the bias current circuit 121 is configured to generate a bias current according to the driving voltage; the negative voltage generation circuit 122 is configured to generate a negative voltage based on the bias current, superimpose the negative voltage on the driving voltage, and obtain a final driving voltage.

[0068] In the embodiments of the present disclosure, as shown in FIG. 6, the bias current circuit 121 and the negative voltage generation circuit 122 are connected in series; the first end of the bias current circuit 121 is connected to the first end of the negative voltage generation circuit 122; the second end of the bias current circuit 121 serves as the voltage input end of the negative voltage generation and soft start circuit 12, and the second end of the negative voltage generation circuit 122 serves as the voltage output end of the negative voltage generation and soft start circuit 12.

[0069] In the embodiments of the present disclosure, the bias current flows out from the first end of the bias current circuit, flows into the second end of the negative voltage generation circuit through the first end of the negative voltage generation circuit, and generates a negative voltage on the negative voltage generation circuit.

[0070] In the embodiment of the present disclosure, as shown in FIG. 7, the negative voltage generating circuit 122 can include a first resistor R1 and a first capacitor C1; the first resistor R1 is connected in parallel with the first capacitor C1.

[0071] In the embodiment of the present disclosure, as shown in FIG. 8, the bias current circuit 121 can include a peak voltage detection circuit 1211 and a bias current generating circuit 1212; the peak voltage detection circuit 1211 is configured to detect a peak value of the driving voltage; and the bias current generating circuit 1212 is configured to generate a bias current based on the peak value.

[0072] In the embodiment of the present disclosure, a voltage input end of the peak voltage detection circuit 1211 is configured as a second end of the bias current circuit 121; a voltage output end of the peak voltage detection circuit 1211 is configured as a current input end of the bias current circuit 121; and a current output end of the bias current generating circuit 1212 is configured as a first end of the bias current circuit 121 and as a reference end of the voltage input end of the peak voltage detection circuit 1211.

[0073] In the embodiment of the present disclosure, the peak voltage detection circuit 1211 is configured to detect a peak voltage of the driving voltage, the bias current generating circuit 1212 is configured to generate a direct current bias current based on the peak voltage, and the negative voltage generating circuit 122 is configured to generate a negative voltage based on the direct current bias current.

[0074] In the embodiment of the present disclosure, as shown in FIG. 9, the peak voltage detection circuit 1211 can include, but is not limited to, a diode D and a second capacitor C2; an anode of the diode D is configured as a voltage input end of the peak voltage detection circuit 1211; a cathode of the diode D is connected with a first end of the second capacitor C2; any node between the cathode of the diode D and the first end of the second capacitor C2 is configured as a voltage output end of the peak voltage detection circuit 1211; and a second end of the second capacitor C2 is configured as a reference end of the voltage input end of the peak voltage detection circuit 1211.

[0075] In the embodiment of the present disclosure, as shown in FIG. 9, the bias current generating circuit 1212 can include a second resistor R2; and the second resistor R2 is connected in parallel with the second capacitor C2.

[0076] In the embodiment of the present disclosure, when the power switch device is turned off, the second capacitor C2 of the diode D is configured to store a peak voltage of the driving voltage.

[0077] In the embodiment of the present disclosure, the bias current generating circuit 1212 can further include a transistor; and the transistor is connected in parallel with the second capacitor.

[0078] In the embodiment of the present disclosure, the transistor can be further connected with an additional device, which can include, but is not limited to, a resistor.

[0079] In the embodiments of the present disclosure, for example, as shown in FIG. 10, the bias current generation circuit 1212 can include a third resistor R3 and a transistor Q0; the third resistor R3 is connected in parallel between the collector (or drain) and the base (or gate) of the transistor Q0; the collector (or drain) and the emitter (or source) of the transistor Q0 are connected to two ends of the second capacitor C2.

[0080] In the embodiments of the present disclosure, the transistor Q0 can include but is not limited to Mosfet, triode, etc.

[0081] In the embodiments of the present disclosure, the transistor Q0 is powered by the peak voltage detection circuit 1211, and the current flowing between the collector and the emitter (i.e. CE) or the current flowing between the drain and the source (i.e. DS) is controlled by adjusting the base (or gate) voltage or current of the transistor Q0. The base (or gate) current is generated by the third resistor R3, and the bias current is obtained by amplification through the NPN triode.

[0082] In the embodiments of the present disclosure, the driven power switching device can be one or more.

[0083] In the embodiments of the present disclosure, as shown in FIG. 9, when the driven power switching device 2 is one, the driven power switching device 2 can include a first power switching device (such as Q7); the floating drive circuit can include a first floating drive circuit; the negative voltage generation and soft start circuit includes a negative voltage generation circuit; the voltage output end of the first floating drive circuit is connected to the first power switching device for driving the first power switching device; the voltage reference end of the first floating drive circuit is connected to the voltage output end of the negative voltage generation circuit; the first end of the negative voltage generation circuit is connected to the reference end of the first power switching device.

[0084] In the embodiments of the present disclosure, the first floating drive circuit is a first isolation drive circuit; the first isolation drive circuit can include a first primary bridge circuit, a first drive transformer and a first secondary drive rectifier circuit; the first primary bridge circuit is connected to the primary side of the first drive transformer; the secondary side of the first drive transformer is connected to the first secondary drive rectifier circuit; wherein the voltage output end of the first secondary drive rectifier circuit is the voltage output end of the first isolation drive circuit.

[0085] In the embodiments of the present disclosure, as shown in FIG. 9, the first primary bridge circuit can include switching tubes Q1, Q2, Q3 and Q4; the first drive transformer can include T1, and the first secondary drive rectifier circuit can include a plurality of rectifier tubes.

[0086] In the embodiment of the present disclosure, the first auxiliary side driving rectifier circuit can include a first rectifier tube and a second rectifier tube; the drain of the first rectifier tube and the gate of the second rectifier tube are connected with the first end of the auxiliary side of the first driving transformer; the source of the first rectifier tube is connected with the source of the second rectifier tube; the drain of the second rectifier tube and the gate of the first rectifier tube are connected with the second end of the auxiliary side of the first driving transformer; the gate of the first rectifier tube and the gate of the second rectifier tube are connected to serve as the voltage output reference end of the first auxiliary side driving rectifier circuit; and the second end of the auxiliary side of the first driving transformer serves as the voltage output end of the first auxiliary side driving rectifier circuit.

[0087] In the embodiment of the present disclosure, as shown in FIG. 9, the first rectifier tube can be Q5, and the second rectifier tube can be Q6.

[0088] In the embodiment of the present disclosure, the detailed driving scheme of the present disclosure is described below based on the driving circuit of FIG. 9 in the form of comparison between the related art and the scheme of the embodiment of the present disclosure.

[0089] Suppose that the primary side bridge circuit 111 includes the switching tubes Q1, Q2, Q3 and Q4, the driving transformer T1 (i.e., the driving transformer 112) connected with the primary side bridge circuit 111, and the rectifier tubes Q5 and Q6 (the rectifier tubes Q5 and Q6 constitute the auxiliary side driving rectifier circuit 113) connected with the driving transformer T1, and suppose that the driving circuit does not include the negative voltage generation and soft start circuit 12, the rectifier tubes Q5 and Q6 are directly connected with the power switching tube Q7 (i.e., the power switching device 2) to be driven. The conduction process of the power switching device 2 is as follows: as shown in FIG. 11, at t1, the driving is started, when the switching tubes Q1 and Q4 are turned on (at t2-t3), the driving circuit power supply voltage VCC is connected with the driving transformer T1 (i.e., the driving transformer 112) in the positive direction, at this time, the winding of the primary side of the driving transformer T1 is set to be positive at the top and negative at the bottom, the winding of the auxiliary side of the driving transformer T1 is also set to be positive at the top and negative at the bottom, at this time, the synchronous rectifier tubes connected with the auxiliary side are the rectifier tube Q5 (i.e., the first rectifier tube 1311-1) and the rectifier tube Q6 (i.e., the second rectifier tube 1311-2), under the driving of the winding of the auxiliary side of the driving transformer T1, Q5 is turned on and Q6 is turned off, the driving level (also called the gate, i.e., the third gate) voltage of the power switching tube Q7 (i.e., the power switching device 2) to be driven is +VCC (assuming that the turns ratio of the primary side winding to the auxiliary side winding of the transformer is 1:1), and the conduction driving of the power switching tube Q7 is completed.

[0090] The turn-off process of the power switch device 2 is as follows: as shown in FIG. 11, during the dead time (at time t3-t4) when the switch tubes Q1 and Q4 are turned off and the Q2 and Q3 have not yet been turned on, the current ILm on the excitation inductance Lm of the primary winding of the drive transformer T1 flows through the output parasitic capacitance and body diode of the Q2 and Q3, the voltage across the secondary winding of the drive transformer T1 decreases, the gate voltage (third gate voltage) of the power switch tube Q7 decreases, the energy on the gate capacitance is fed back to the input end, the drive energy is recovered, and the drive loss is reduced. When the voltage of the primary winding of the drive transformer T1 reverses, under the driving of the negative voltage of the secondary winding, the synchronous rectifier tube Q5 is turned off and the Q6 is turned on, in the case where the negative voltage generating circuit 122 (for example, the first resistor R1 and the first capacitor C1) is not added, the gate voltage of the power switch tube Q7 is 0, the turn-off driving of the power switch tube Q7 is completed, and then the voltage of the primary winding of the drive transformer T1 is further charged to -VCC by the excitation inductance Lm. Due to the action of the synchronous rectification circuit (including the rectifier tubes Q5 and Q6) of the secondary winding, the gate voltage of the power switch tube Q7 remains 0.

[0091] It should be noted that, since the rectifier tubes Q5 and Q6 have a threshold voltage Vth, that is, the driving voltage needs to be higher than the threshold voltage Vth to be turned on, the turn-off voltage of the power switch tube Q7 cannot be completely 0 in a period of time, as shown in FIG. 11. The power switch tube Q7 also has a threshold voltage, especially in the case of 12V output application, the threshold voltage of the power switch tube Q7 is low under low voltage, and the risk of unreliable turn-off is prone to occur.

[0092] In the embodiment of the present disclosure, in the case where the negative voltage generating and soft start circuit 12 is included in the drive circuit 1, the rectifier tubes Q5 and Q6 are connected to the power switch tube Q7 to be driven through the negative voltage generating and soft start circuit 12.

[0093] In the embodiment of the present disclosure, the implementation process of the negative voltage driving is as follows:

[0094] When the switch tubes Q1 and Q4 are turned on (t2-t3), the gate drive voltage of the power switch tube Q7 is VCC. At this time, Q6 is turned off and Q5 is turned on. The diode D in the peak voltage detection circuit 1211 of the negative voltage generating circuit 122 in the negative voltage generating and soft start circuit 12 is turned on, and the voltage of the second capacitor C2 in the peak voltage detection circuit 1211 is the peak voltage of the drive voltage of the power switch tube Q7 (i.e. the maximum value of VCC), which is a direct current voltage. A direct current bias current is generated on the second resistor R2, which will flow to the first resistor R1 and the first capacitor C1 of the negative voltage generating circuit 122 in the negative voltage generating and soft start circuit 12. Since the current direction on the first resistor R1 is from right to left, the right end of the first resistor R1 is grounded, and thus a negative voltage is generated on the first resistor R1, and the alternating current part is filtered by the first capacitor C1. Wherein:

[0095] Bias current: Ibias = Vgs / R2, Vgs is the gate drive voltage of the power switch tube Q7, and the second resistor R2 is the impedance of the bias current generating circuit 1212.

[0096] Negative voltage: Vneg = Ibias*R1.

[0097] The specific circuit waveforms are shown in FIG. 12, line a: negative voltage output, line b: negative voltage drive Vgs, line c: peak detection voltage (considering the conduction voltage drop of 0.7V diode D).

[0098] When the switch tubes Q1 and Q4 are turned off (t3-t4), the gate drive voltage of the power switch tube Q7 is -VCC, at this time Q6 is turned on and Q5 is turned off, and the negative voltage generated on the first resistor R1 directly connects to the gate of the power switch tube Q7 through Q6. At this time, since the negative voltage Vneg is applied to the gate of the power switch tube Q7, it is ensured that the power switch tube Q7 is reliably turned off.

[0099] In the embodiment of the present disclosure, the negative voltage generating and soft start circuit 12 is further configured to adjust the drive voltage to turn on the power switch device, so as to achieve soft start of the power switch device.

[0100] In the embodiment of the present disclosure, the negative voltage generating and soft start circuit 12 can be configured to keep the capacitance value of the second capacitor C2 greater than the capacitance value of the first capacitor C1, so as to achieve soft start of the power switch device.

[0101] In the embodiments of the present disclosure, the negative voltage generation and slow start circuit 12 can adjust the drive voltage when the power switch device is turned on. Specifically, the capacitance of the second capacitor C2 can be adjusted or set to be greater than the capacitance of the first capacitor C1, so that the drive voltage applied to the power switch device can slowly rise, the drive current can be effectively controlled, the power switch device can be made to work in the linear region at a lower drive voltage, and the slow start of the power switch device can be realized, thereby avoiding the current surge problem of the power switch device at the start-up.

[0102] In the embodiments of the present disclosure, the implementation process of the slow start of the power switch tube Q7 is as follows:

[0103] In the process of driving the power switch tube Q7 by using the above negative voltage, when the second capacitor C2 is configured to be larger and the first capacitor C1 is configured to be smaller (at least the capacitance of the second capacitor C2 is greater than the capacitance of the first capacitor C1), at the moment when the switch tube Q1 and Q4 are just turned on, that is, at the moment of drive start, the voltage of the secondary winding of the drive transformer T1 is mainly applied to the first capacitor C1, the second capacitor C2 is close to zero voltage, and the drive voltage Vgs (that is, the voltage between the gate and the source) of the power switch tube Q7 is clamped at Vc2 (the voltage on the second capacitor C2) + Vd (the voltage on the diode D). Vd is a small voltage close to 0V (0.7V) and can be ignored. The first capacitor C1 is close to the negative voltage of the secondary winding, and then the first capacitor C1 is charged under the negative current of the first resistor R1 (flows from the left end of the first capacitor C1 to start charging, and the first capacitor C1 generates a left-high right-low voltage). At this time, the voltage on the second capacitor C2 is equal to the voltage of the secondary winding of the drive transformer T1 plus the voltage on the first capacitor C1. As the voltage on the first capacitor C1 gradually rises, the voltage on the second capacitor C2 slowly rises, and the Vgs voltage of the power switch tube Q7 slowly rises, thereby realizing the slow rise of the drive voltage of the power switch tube Q7 during the start-up process, and realizing the slow start of the power switch tube Q7.

[0104] In the embodiments of the present disclosure, the specific drive voltage waveform of the power switch tube Q7 during the slow start is shown in FIG. 13, wherein the shaded area is the drive voltage Vgs of the power switch tube Q7, and line d is the voltage of the peak detection capacitor, that is, the second capacitor C2. Since the time required for the slow start is much longer than the switching period, the switching waveform cannot be seen in the power switch tube Q7 drive waveform of the shaded area in FIG. 13, but the slow rise process of the amplitude of the drive voltage Vgs can be seen. The slow rise of the drive voltage Vgs can realize the power switch tube working in the linear region at a lower drive voltage Vgs, effectively control the current, and the current Ids between the source and the drain of the power switch tube Q7 = gm*Vgs (gm is the inverse of the gate-source resistance of the power switch tube Q7).

[0105] In the embodiment of the present disclosure, by slow starting the power switch tube Q7, the following problems can be solved: the current impact problem of the unstable voltage topology when driving and starting, and in the case of parallel use of the multi-channel driving circuit, the impact problem of current backflow when the output voltage of the other channel driving circuit has been established. In detail, through the slow starting scheme of the embodiment of the present disclosure, the driving voltage of the power switch tube Q7 is slowly raised, so that the driving current of the power switch tube Q7 is slowly increased, avoiding the current impact when driving and starting. In the case of parallel use of the multi-channel driving circuit, due to the slow increase of the driving voltage, the pre-bias starting function is realized, and even if there is backflow current, the backflow current cannot directly impact the power switch tube Q7, so that the damage of current backflow can be prevented.

[0106] In the embodiment of the present disclosure, in the case that the driven power switch device is multiple, the driven power switch device can include but is not limited to: a second power switch device and a third power switch device; the floating driving circuit can include a second floating driving circuit and a third floating driving circuit; the negative voltage generation and slow starting circuit includes a negative voltage generation circuit; the voltage output end of the second floating driving circuit is used to drive the second power switch device; the voltage output end of the third floating driving circuit is used to drive the third power switch device; the first end of the negative voltage generation circuit is connected with the reference end of the second power switch device and the reference end of the third power switch device.

[0107] In the embodiment of the present disclosure, as shown in FIG. 14, it is a connection schematic diagram between the second floating driving circuit, the third floating driving circuit, the negative voltage generation and slow starting circuit, and the second power switch device and the third power switch device; wherein, the port P1 (first end) of the second floating driving circuit is used as the voltage output end of the second floating driving circuit, and the port P2 (second end) of the second floating driving circuit is used as the reference end of the voltage output end of the second floating driving circuit; the port P1 (first end) of the third floating driving circuit is used as the voltage output end of the third floating driving circuit, and the port P2 (second end) of the third floating driving circuit is used as the reference end of the voltage output end of the third floating driving circuit; the port P3 of the second power switch device and the third power switch device is used as the reference end of the second power switch device and the reference end of the third power switch device, and the port P4 of the second power switch device and the third power switch device is used as the reference end of the second power switch device and the driving end of the third power switch device.

[0108] In the embodiments of the present disclosure, the second floating drive circuit is a second isolated drive circuit, and the third floating drive circuit is a third isolated drive circuit; the second isolated drive circuit and the third isolated drive circuit jointly comprise: a second primary bridge circuit, a second drive transformer, and a second secondary drive rectifier circuit; the second primary bridge circuit is connected with a primary side of the second drive transformer; a secondary side of the second drive transformer is connected with the second secondary drive rectifier circuit; wherein, a voltage output end of the second secondary drive rectifier circuit comprises two paths; the two paths of the voltage output end of the second secondary drive rectifier circuit are respectively used as a voltage output end of the second floating drive circuit and a voltage output end of the third floating drive circuit.

[0109] In the embodiments of the present disclosure, as shown in FIG. 15 and FIG. 16, the second primary bridge circuit can comprise switching tubes Q1, Q2, Q3 and Q4; the second drive transformer can comprise T1, and the second secondary drive rectifier circuit can comprise a plurality of rectifier tubes.

[0110] In the embodiments of the present disclosure, the second secondary drive rectifier circuit can comprise: a third rectifier tube and a fourth rectifier tube; a gate of the third rectifier tube and a drain of the fourth rectifier tube are connected, and then connected with a first end of the secondary side of the second drive transformer, as a voltage output end of the second secondary drive rectifier circuit; a gate of the fourth rectifier tube and a drain of the third rectifier tube are connected, and then connected with a second end of the secondary side of the second drive transformer, as a voltage output end of the second secondary drive rectifier circuit; the voltage output end of the second secondary drive rectifier circuit is connected with a driving end of the second power switching device, as a voltage output end of the second floating drive circuit; the voltage output end of the third secondary drive rectifier circuit is connected with a driving end of the third power switching device, as a voltage output end of the third floating drive circuit; a source of the third rectifier tube and a source of the fourth rectifier tube are connected, and then connected with a voltage output end of the negative voltage generation circuit, as a reference end of the voltage output end of the second floating drive circuit and a reference end of the voltage output end of the third floating drive circuit.

[0111] In the embodiments of the present disclosure, as shown in FIG. 15 and FIG. 16, the third rectifier tube can be rectifier tube Q5, the fourth rectifier tube can be rectifier tube Q6, the second power switching device can be power switching tube Q8, and the third power switching device can be power switching tube Q9.

[0112] In the embodiments of the present disclosure, the detailed drive scheme of the present disclosure is described in the manner of comparing the related art with the embodiments of the present disclosure based on the drive circuit of FIG. 15.

[0113] In the embodiment of the present disclosure, the same group of driving circuits can provide driving for multiple power switch devices 2. For example, power switch tube Q8 and power switch tube Q9 can be provided with driving. At this time, the aforementioned negative pressure generation and soft start circuit 12 is connected with the second power switch device Q8 and the third power switch device Q9 respectively, and no other circuit needs to be added. The negative voltage generation circuit 122 in the negative pressure generation and soft start circuit 12 provided by the embodiment of the present disclosure can simultaneously provide negative pressure driving for the power switch tubes Q8 and Q9. In terms of connection, the source of the power switch tube Q8 is connected with the source of the power switch tube Q9, the connection is connected with the driving reference ground, and the gate of the power switch tube Q9 is connected with the negative end of the secondary winding of the driving transformer T1. The specific driving waveform is shown in FIG. 17.

[0114] In the embodiment of the present disclosure, line e is the driving voltage waveform of the power switch tube Q8, line f is the driving voltage waveform of the power switch tube Q9, and line g is the negative voltage waveform generated by the negative voltage generation circuit 122.

[0115] In the embodiment of the present disclosure, as shown in FIG. 11, at t2-t3, the switch tubes Q1 and Q4 in the primary bridge circuit 111 are turned on, and Q2 and Q3 are turned off, the primary winding voltage and the secondary winding voltage of the driving transformer T1 are both positive voltage VCC, and the gate of the rectifier tube Q5 in the secondary side is turned on under the driving of the positive end (i.e. the upper end with the same name end symbol) of the secondary winding. The secondary winding voltage drives the power switch tube Q8 after passing through the negative voltage generation circuit 122 (for example, including the first resistor R1 and the first capacitor C1), so that the power switch tube Q8 is turned on. The driving voltage of the power switch tube Q9 is the voltage of the turned-on rectifier tube Q5 superimposed with the voltage on the negative voltage generation circuit 122, so that a negative voltage (i.e. negative pressure) is obtained, and the power switch tube Q9 can be reliably turned off.

[0116] In the embodiment of the present disclosure, at the moment of t3-t4, the switch tubes Q1-Q4 in the primary bridge circuit 111 are all turned off, the excitation inductance Lm current of the primary winding of the drive transformer T1 flows through the output parasitic capacitor and body diode of the switch tubes Q2, Q3, the voltage across the primary winding decreases, and commutates to negative VCC. At this time, the voltage across the secondary winding of the drive transformer T1 decreases from positive VCC to negative VCC synchronously, when the voltage across the secondary winding becomes negative, the gate of the rectifier tube Q6 is turned on under the drive of the negative end (lower end, without the same end symbol) of the secondary winding, and the rectifier tube Q5 is turned off. The drive voltage of the power switch tube Q8 decreases with the voltage across the secondary winding, and after the rectifier tube Q6 is turned on, the voltage on the negative voltage generation circuit 122 is superimposed to make the power switch tube Q8 reliably turned off. When the voltage across the secondary winding becomes negative, the voltage across the negative end of the secondary winding is positive, and with the rectifier tube Q6 turned on, the voltage across the negative end of the secondary winding drives the power switch tube Q9 through the negative voltage generation circuit 122 (the waveform of line g), so that the power switch tube Q9 is turned on.

[0117] In the embodiment of the present disclosure, at the moment of t4-t5, the switch tubes Q2, Q3 in the primary bridge circuit 111 of the drive circuit are turned on, the switch tubes Q1, Q4 are turned off, the winding voltage of the drive transformer T1 is negative VCC, the gate of the rectifier tube Q6 of the secondary side is turned on under the drive of the negative end (lower end, without the same end symbol) of the secondary winding, and after the voltage across the secondary winding reverses, the power switch tube Q9 is driven through the negative voltage generation circuit 122 (the waveform of line g), so that the power switch tube Q9 is turned on. The drive voltage of the power switch tube Q8 is the voltage of the turned-on rectifier tube Q6 superimposed with the voltage of the negative voltage generation circuit 122, obtaining a negative voltage (i.e. negative voltage), so that the power switch tube Q8 is reliably turned off.

[0118] In the embodiment of the present disclosure, at least the following advantages are included:

[0119] 1. The driving energy is recycled to reduce the driving loss under high frequency.

[0120] 2. The low threshold voltage synchronous rectifier (such as Q7, Q8, Q9) negative voltage turn-off is realized by simple resistance-capacitance devices.

[0121] 3. The related art usually adopts narrow pulse width start or adjusts the drive voltage, wherein the narrow pulse width requires high controller, especially for MHz (megahertz) high switching frequency application, the narrow pulse width start requires high precision of the output pulse width of the controller, and the existing adjustment of the drive voltage needs to increase an additional auxiliary power supply circuit. The drive voltage of the power switch tube in the embodiment of the present disclosure starts from zero to realize slow start and pre-bias start, and without additional devices, the relative size of the capacitance value (i.e. the capacitance value of the first capacitor C1 and the second capacitor C2) can be simply adjusted.

[0122] This disclosure also provides a driver chip 3, as shown in FIG18, which includes the aforementioned driver circuit 1.

[0123] This disclosure also provides a power conversion circuit 4, as shown in FIG19, which includes the aforementioned drive circuit 1.

[0124] In the embodiments disclosed herein, any of the aforementioned driving circuit embodiments are applicable to the embodiments of the driving chip 3 and the power conversion circuit 4, and will not be described in detail here.

[0125] Those skilled in the art will understand that all or some of the functional modules / units disclosed above can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0126] In hardware implementations, the division between functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be executed by several physical components working together.

[0127] Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit (CPU), digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit (ASIC). Such software may be distributed on a computer-readable medium, which may include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technique for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, random access memory (RAM, more specifically SDRAM, DDR, etc.), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory (FLASH) or other disk storage; read-only optical disc (CD-ROM), digital versatile disc (DVD) or other optical disc storage; magnetic cartridges, magnetic tapes, disk storage or other magnetic storage; and any other media that can be used to store desired information and can be accessed by a computer. Furthermore, as is known to those skilled in the art, communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0128] The present disclosure has disclosed example embodiments, and while specific terminology has been employed, it is merely in the nature of a general description and should not be construed as limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics or / and elements described in connection with a particular embodiment can be used in conjunction with other embodiments unless otherwise explicitly stated. As such, those skilled in the art will appreciate that modifications can be made in form and detail without departing from the scope of the disclosure as set forth in the appended claims.

Claims

1. A drive circuit comprising: A floating drive circuit and a negative voltage generation and soft start circuit, a voltage output end of the floating drive circuit being connected with a voltage input end of the negative voltage generation and soft start circuit; The floating drive circuit is configured to provide a drive voltage; The negative voltage generation and soft start circuit is configured to generate a negative voltage based on the drive voltage, and to obtain a final drive voltage by superimposing the negative voltage and the drive voltage, the final drive voltage being used to turn off the power switch device.

2. The drive circuit of claim 1, wherein, The negative voltage generation and soft start circuit comprises a bias current circuit and a negative voltage generation circuit; The bias current circuit is configured to generate a bias current according to the drive voltage; The negative voltage generation circuit is configured to generate the negative voltage based on the bias current, and to obtain the final drive voltage by superimposing the negative voltage and the drive voltage.

3. The drive circuit of claim 2, wherein, The bias current circuit and the negative voltage generation circuit are connected in series; A first end of the bias current circuit is connected with a first end of the negative voltage generation circuit; A second end of the bias current circuit serves as a voltage input end of the negative voltage generation and soft start circuit, and a second end of the negative voltage generation circuit serves as a voltage output end of the negative voltage generation and soft start circuit.

4. The drive circuit of claim 3, wherein, The bias current flows out from the first end of the bias current circuit, flows into the second end of the negative voltage generation circuit through the first end of the negative voltage generation circuit, and generates the negative voltage on the negative voltage generation circuit.

5. The drive circuit of claim 2, wherein, The negative voltage generation circuit comprises a first resistor and a first capacitor, and the first resistor and the first capacitor are connected in parallel.

6. The drive circuit of claim 2, wherein, The bias current circuit comprises a peak voltage detection circuit and a bias current generation circuit; The peak voltage detection circuit is configured to detect a peak value of the drive voltage; The bias current generation circuit is configured to generate the bias current based on the peak value.

7. The drive circuit of claim 6, wherein a voltage input end of the peak voltage detection circuit serves as a second end of the bias current circuit; a voltage output end of the peak voltage detection circuit serves as a current input end of the bias current generation circuit; a current output end of the bias current generation circuit is the first end of the bias current circuit and serves as a reference end of the voltage input end of the peak voltage detection circuit.

8. The drive circuit of claim 7, wherein, The peak voltage detection circuit comprises a diode and a second capacitor; an anode of the diode serves as the voltage input end of the peak voltage detection circuit; a cathode of the diode is connected with a first end of the second capacitor; a node between the cathode of the diode and the first end of the second capacitor serves as the voltage output end of the peak voltage detection circuit; a second end of the second capacitor serves as a reference end of the voltage input end of the peak voltage detection circuit.

9. The drive circuit of claim 8, wherein, The bias current generation circuit comprises a second resistor; the second resistor is connected with the second capacitor in parallel.

10. The drive circuit of claim 8, wherein, The bias current generation circuit comprises a transistor; the transistor is connected with the second capacitor in parallel.

11. The drive circuit of claim 8, wherein The negative voltage generation and soft start circuit is further configured to adjust the driving voltage to achieve soft start of the power switch device when the driving voltage is used to turn on the power switch device.

12. The drive circuit of claim 11, wherein, The negative voltage generation and soft start circuit is further configured to keep the capacitance of the second capacitor greater than the capacitance of the first capacitor to achieve soft start of the power switch device.

13. The drive circuit of claim 12, wherein, The capacitance of the second capacitor is greater than 2 times the capacitance of the first capacitor.

14. The drive circuit of any one of claims 1-13, wherein, In a case where the driven power switch device is one, the driven power switch device includes a first power switch device, the floating drive circuit includes a first floating drive circuit, and the negative voltage generation and soft start circuit includes a negative voltage generation circuit. A voltage output end of the first floating drive circuit is connected to the first power switch device to drive the first power switch device. A voltage reference end of the first floating drive circuit is connected to a voltage output end of the negative voltage generation circuit. A first end of the negative voltage generation circuit is connected to a reference end of the first power switch device.

15. The drive circuit of claim 14, wherein, The first floating drive circuit is a first isolated drive circuit. The first isolated drive circuit includes a first primary bridge circuit, a first drive transformer, and a first secondary drive rectifier circuit. The first primary bridge circuit is connected to a primary side of the first drive transformer. A secondary side of the first drive transformer is connected to the first secondary drive rectifier circuit. The voltage output end of the first secondary drive rectifier circuit serves as a voltage output end of the first isolated drive circuit.

16. The drive circuit of claim 15, wherein, The first secondary drive rectifier circuit includes a first rectifier tube and a second rectifier tube. A drain of the first rectifier tube and a gate of the second rectifier tube are connected to a first end of the secondary side of the first drive transformer. A source of the first rectifier tube is connected to a source of the second rectifier tube. A drain of the second rectifier tube and a gate of the first rectifier tube are connected to a second end of the secondary side of the first drive transformer. The source of the first rectifier tube and the source of the second rectifier tube connected together serve as a voltage output reference end of the first secondary drive rectifier circuit, and the second end of the secondary side of the first drive transformer serves as a voltage output end of the first secondary drive rectifier circuit.

17. The drive circuit of any one of claims 1-13, wherein, In a case where the driven power switch device is multiple, the driven power switch device includes a second power switch device and a third power switch device, the floating drive circuit includes a second floating drive circuit and a third floating drive circuit, and the negative voltage generation and soft start circuit includes a negative voltage generation circuit. A voltage output end of the second floating drive circuit is used to drive the second power switch device. A voltage output end of the third floating drive circuit is used to drive the third power switch device. A first end of the negative voltage generation circuit is connected to a reference end of the second power switch device and a reference end of the third power switch device.

18. The drive circuit of claim 17, wherein, The second floating drive circuit is a second isolated drive circuit, and the third floating drive circuit is a third isolated drive circuit. The second isolation driving circuit and the third isolation driving circuit jointly comprise a second primary bridge circuit, a second driving transformer and a second secondary driving rectifier circuit; The second primary bridge circuit is connected with a primary side of the second driving transformer; A secondary side of the second driving transformer is connected with the second secondary driving rectifier circuit; The voltage output end of the second secondary driving rectifier circuit comprises two paths, and the two paths of the voltage output end of the second secondary driving rectifier circuit are respectively used as the voltage output end of the second floating driving circuit and the voltage output end of the third floating driving circuit.

19. The drive circuit of claim 18, wherein, The second secondary driving rectifier circuit comprises a third rectifier tube and a fourth rectifier tube; The gate of the third rectifier tube and the drain of the fourth rectifier tube are connected, and the connection is connected with a first end of the secondary side of the second driving transformer, serving as the voltage output end of the second secondary driving rectifier circuit; The gate of the fourth rectifier tube and the drain of the third rectifier tube are connected, and the connection is connected with a second end of the secondary side of the second driving transformer, serving as the voltage output end of the third secondary driving rectifier circuit; The voltage output end of the second secondary driving rectifier circuit is connected with the driving end of the second power switch device, serving as the voltage output end of the second floating driving circuit; and the voltage output end of the third secondary driving rectifier circuit is connected with the driving end of the third power switch device, serving as the voltage output end of the third floating driving circuit; The source of the third rectifier tube and the source of the fourth rectifier tube are connected, and the connection is connected with the voltage output end of the negative voltage generating circuit, serving as the reference end of the voltage output end of the second floating driving circuit and the reference end of the voltage output end of the third floating driving circuit.

20. A driver chip comprising: The driving circuit of any one of claims 1-19.

21. A power conversion circuit comprising: The driving circuit of any one of claims 1-19.

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