Semiconductor substrate and method for producing same

Abstract

The present invention provides: a semiconductor substrate comprising an Si substrate in which the plane orientation of the main surface is (111), a carbon-doped Si layer on the Si substrate, a 3C-SiC layer on the carbon-doped Si layer, and a GeO2 layer on the 3C-SiC layer; and a method for producing the same. Thus, provided are a semiconductor substrate in which high-quality GeO2 is grown on a Si (111) substrate of a large diameter, and a method for producing the same.

Description

Semiconductor substrate and method for manufacturing the same

[0001] The present invention relates to a semiconductor substrate and a method for manufacturing the same.

[0002] The need for power devices is increasing in a very wide range of fields, including the electrification of automobiles and FA (Factory Automation). Furthermore, energy loss in power semiconductors can no longer be ignored, and research into energy-efficient structures is being conducted, yielding significant results.

[0003] While silicon-based power MOSFETs and IGBTs are predominant for this application, silicon has a bandgap of 1.1 eV, which naturally limits its voltage resistance.

[0004] Therefore, the use of materials other than silicon is being researched. This includes wide-bandgap materials with large band gaps such as GaN, SiC, and diamond, as well as oxide semiconductors such as GaO ２ YaGeO ２ There are others as well.

[0005] GeO ２ It has a very large bandgap of 4.7 eV, high breakdown voltage, and high radiation resistance, making it suitable for use in harsh environments. Furthermore, while oxide semiconductors are generally difficult to make into p-type conductors, GeO ２ It is said that both pn conductivity types are possible (Non-Patent Document 1).

[0006] Furthermore, in Non-Patent Document 1, GeO ２ The lattice constant of this material is reported to be 4.4. This value is very close to that of 3C-SiC, which is 4.35. Taking advantage of this characteristic lattice constant, 3C-SiC is grown on a Si(111) substrate, and then GeO is placed on top of it. ２ It has been disclosed that growth is possible (Non-Patent Document 2).

[0007] Patent Document 1 describes a method for applying GeO onto a crystalline substrate using the mist CVD method. ２ A technology for manufacturing a laminated structure in which crystalline oxide films containing are stacked is disclosed.

[0008] Japanese Patent Application Laid-Open No. 2024-114114

[0009] H. Takane et. al., "Band-gap engineering of rutile-structured SnO2-GeO2-SiO2 alloy system", PHYSICAL REVIEW MATERIALS 6, 084604 (2022) Patentix press release article, September 20, 2023, "Success in forming rutile-structured germania (γ-GeO2) film on SiC by Phantom SVD method"

[0010] However, when forming 3C-SiC on a Si(111) substrate, in practice, due to the lattice mismatch between Si and 3C-SiC, problems remain in the quality of the 3C-SiC surface on which GeO ２ is grown. This is because the lattice constant of Si(111) is 3.84, resulting in a large lattice constant difference from 3C-SiC. For this reason, it is considered difficult to increase the diameter.

[0011] The present invention has been made to solve the above problems, and an object thereof is to provide a semiconductor substrate on which high-quality GeO ２ is grown on a large-diameter Si(111) substrate.

[0012] The present invention has been made to achieve the above object, and a semiconductor substrate having a Si substrate whose main surface has a plane orientation of (111), a carbon-doped Si layer on the Si substrate, a 3C-SiC layer on the carbon-doped Si layer, and a GeO ２ layer on the 3C-SiC layer is provided.

[0013] According to such a semiconductor substrate, deterioration of crystal quality due to lattice mismatch is suppressed, and a virtual GeO ２ substrate is obtained in which GeO ２ is grown on a large-diameter Si substrate.

[0014] At this time, the carbon-doped Si layer may have voids at the interface between the carbon-doped Si layer and the 3C-SiC layer.

[0015] Thereby, the stress generated due to lattice mismatch can be further relaxed.

[0016] The present invention has also been made to achieve the above objectives, comprising the steps of: removing a native oxide film on the surface of a Si substrate having a main surface orientation of (111) by hydrogen baking; forming a carbon-doped Si layer on the Si substrate using a source gas containing carbon and silicon; forming a 3C-SiC layer on the carbon-doped Si layer using a source gas containing carbon and silicon; and forming a GeO layer on the 3C-SiC layer. ２ The present invention provides a method for manufacturing a semiconductor substrate, which includes a step of forming a layer.

[0017] This semiconductor substrate manufacturing method suppresses the degradation of crystal quality due to lattice mismatch, and allows for the formation of GeO on large-diameter Si substrates. ２ Virtual Geo ２ It is possible to manufacture circuit boards.

[0018] As described above, the semiconductor substrate of the present invention suppresses the deterioration of crystal quality due to lattice mismatch, and allows GeO to be applied to a large-diameter Si substrate. ２ This results in a semiconductor substrate on which GeO is grown. Furthermore, according to the semiconductor substrate manufacturing method of the present invention, the deterioration of crystal quality due to lattice mismatch is suppressed, and GeO is grown on a large-diameter Si substrate. ２ This makes it possible to manufacture semiconductor substrates with grown fibers.

[0019] This shows an example of a cross-sectional structure of a semiconductor substrate according to an embodiment of the present invention. This shows an example of a process flow for manufacturing a semiconductor substrate according to an embodiment of the present invention.

[0020] The present invention will be described in detail below, but the present invention is not limited to these descriptions.

[0021] As described above, high-quality GeO is used on a large-diameter Si(111) substrate. ２ There was a need for semiconductor substrates that could grow this material.

[0022] As a result of diligent research into the above problems, the present inventors have found a Si substrate with a main surface orientation of (111), a carbon-doped Si layer on the Si substrate, a 3C-SiC layer on the carbon-doped Si layer, and a GeO layer on the 3C-SiC layer. ２ A semiconductor substrate having layers suppresses the degradation of crystal quality due to lattice mismatch, and allows GeO to be applied to a large-diameter Si substrate.２ As a result of finding that it becomes a semiconductor substrate that has been grown, the present invention has been completed.

[0023] As a result of intensive studies on the above problems, the inventors also removed the native oxide film on the surface of a Si substrate with a (111) plane orientation of the main surface by hydrogen baking, and used a source gas containing carbon and silicon to form a carbon-doped Si layer on the Si substrate, a step of forming a 3C-SiC layer on the carbon-doped Si layer using a source gas containing carbon and silicon, and a step of forming a GeO ２ layer on the 3C-SiC layer. By the manufacturing method of the semiconductor substrate including these steps, deterioration of crystal quality due to lattice mismatch is suppressed, and a semiconductor substrate having GeO ２ grown on a large-diameter Si substrate can be manufactured, and the present invention has been completed.

[0024] In other words, the present invention relates to a germanium oxide substrate which is a wide-bandgap semiconductor. More specifically, it is a virtual germanium oxide substrate having single-crystalline 3C-SiC on a silicon substrate doped with carbon at a high concentration as a buffer layer, and germanium oxide formed thereon, and a manufacturing method thereof.

[0025] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0026] [Semiconductor Substrate] FIG. 1 shows an example of a cross-sectional structure of a semiconductor substrate according to an embodiment of the present invention. As shown in FIG. 1, a semiconductor substrate 1 according to the present invention includes a Si substrate (Si(111) substrate) 2 with a (111) plane orientation of the main surface, a carbon-doped Si layer 3 on the Si(111) substrate 2, a 3C-SiC layer 5 on the carbon-doped Si layer 3, and a GeO ２ layer 6 on the 3C-SiC layer 5.

[0027] As the Si(111) substrate 2, a Si substrate with a diameter of 300 mm can be used, but it is not limited to this, and a Si substrate with a diameter of 300 mm or more may be used.

[0028] With such a semiconductor substrate, as described above, the carbon-doped Si layer 3 mitigates the lattice mismatch between the Si(111) substrate 2 and the 3C-SiC layer 5, thereby suppressing the degradation of crystal quality and allowing GeO to be applied to the large-diameter Si substrate. ２ This will become a semiconductor substrate through growth.

[0029] Furthermore, the carbon-doped Si layer 3 may have a carbon-doped Si layer 4 with vacancies intentionally formed at the interface between the carbon-doped Si layer 3 and the 3C-SiC layer 5. This further reduces stress caused by lattice mismatch. Note that the carbon-doped Si layer 3 may also contain vacancies smaller than those in the carbon-doped Si layer 4.

[0030] The thickness of each of the above layers, the carbon concentration of the carbon-doped Si layer, etc., will be described in detail in the semiconductor substrate manufacturing method described later.

[0031] [Method for Manufacturing Semiconductor Substrates] Next, the method for manufacturing semiconductor substrates of the present invention will be described. Figure 2 shows an example of a process flow of a method for manufacturing semiconductor substrates according to an embodiment of the present invention. As shown in Figure 2, the method for manufacturing semiconductor substrates of the present invention includes the steps of: (S1) removing the native oxide film on the surface of a Si substrate (Si(111) substrate) 2 with a main surface orientation of (111) by hydrogen baking; (S2) forming a carbon-doped Si layer 3 on the Si(111) substrate 2 using a source gas containing carbon and silicon; (S3) forming a 3C-SiC layer 5 on the carbon-doped Si layer 3 using a source gas containing carbon and silicon; and forming a GeO layer on the 3C-SiC layer 5. ２ The process includes the step of forming layer 6 (S4). In this case, during the process using a reduced-pressure CVD apparatus, it becomes possible to form vacancies in the carbon-containing silicon layer and the carbon-containing silicon layer at the 3C-SiC interface (forming a carbon-doped Si layer (with vacancies) 4).

[0032] (Step to remove native oxide film by hydrogen baking: S1) First, a single crystal silicon substrate (Si(111) substrate) 2 is placed in a reduced pressure (RP-)CVD apparatus, and the native oxide film on the surface is removed by hydrogen baking (H ２ Removed by annealing.

[0033] By removing the amorphous silicon oxide film on the outermost surface of the Si(111) substrate 2, it becomes possible to grow a carbon-doped silicon epitaxial layer on the Si(111) substrate 2. ２ Annealing is preferably carried out at a temperature of 1000°C to 1200°C. Within this temperature range, the occurrence of slip dislocations can be effectively suppressed, and the residue of the native oxide film can be prevented with an efficient processing time. Also, at this time H ２ There are no particular restrictions on the annealing pressure or time, as long as it is sufficient to remove the native oxide film.

[0034] (Step to form carbon-doped Si layer: S2) Next, a carbon-doped Si layer 3 is formed on the Si(111) substrate 2 under reduced pressure using a vacuum CVD apparatus, controlling the gas type, gas flow rate, and temperature. Specifically, for example, the carbon-doped Si layer 3 is epitaxially grown using a gas mixture of trimethylsilane, monomethylsilane, or monosilane gas with a carbon source. At this time, the growth temperature is preferably in the range of 700°C to 900°C, more preferably in the range of 730°C to 750°C, to make it possible to produce a carbon-doped epitaxial layer with fewer defects.

[0035] The amount of carbon doping is 1 × 10⁻⁶ ２０ ~4 x 10 ２１ atoms / cm ３ This is possible. Within this range of carbon concentration, the effect of doped carbon is more reliably exerted, and the 3C-SiC layer 5 can be single-crystallized more effectively.

[0036] The thickness of the carbon-doped Si layer 3 is not particularly limited and can be changed at any time, but it is preferably between approximately 1 nm and 1000 nm. With a film thickness in this range, the film can be formed in an efficient time, and the carbon can escape from the substitution site, allowing for more effective vacancy formation.

[0037] (Step to form the 3C-SiC layer: S3) Next, the 3C-SiC layer 5 is grown on the carbon-doped Si layer 3 by controlling the gas type, gas flow rate, and temperature. Specifically, the Si(111) substrate 2 is preferably set to a temperature of 300°C to 1100°C, and a source gas containing carbon and silicon, such as monomethylsilane or trimethylsilane, is introduced as a raw material gas for SiC to form SiC nuclei. Compared to Si, C atoms are smaller and more easily vaporized, so trimethylsilane is easier to adjust the growth conditions for when considering raw material efficiency.

[0038] SiC nucleation can be performed, for example, on the surface of the carbon-doped Si layer 3 at a pressure of 100 Torr (13332 Pa) or less and a temperature of 300°C or higher. However, since epitaxial growth of SiC is promoted at temperatures of 800°C or higher, it is more preferable to set the SiC nucleation temperature to 800°C or higher so that SiC nucleation and the formation of the 3C-SiC layer 5 can be performed under the same conditions. Furthermore, if the temperature is 1100°C or lower, polycrystallization and the adhesion of by-products to the inner wall of the CVD apparatus can be effectively suppressed. This is presumed to be because at high temperatures, molecules adsorbed on the substrate surface desorb before epitaxial growth, causing a gas-phase reaction.

[0039] Furthermore, the growth pressure in the formation process of the 3C-SiC layer (3C-SiC single crystal film) 5 is preferably 100 Torr or less. If the growth pressure is 100 Torr or less, polycrystallization of 3C-SiC can be effectively prevented. If the pressure is 10 Torr (1333 Pa) or less, and more preferably 1 Torr (133 Pa) or less, vacancies will be formed directly beneath the 3C-SiC layer 5, and the effect of relaxing the stress on the entire epitaxial layer can be obtained.

[0040] Since the film thickness of the 3C-SiC layer 5 depends on pressure and temperature, the film formation time can be appropriately set based on the pressure and temperature conditions set to achieve the desired film thickness. Preferably, the film thickness of the 3C-SiC layer 5 can be between 100 nm and 1000 nm. With a thickness in this range, 3C-SiC can be grown in an efficient amount of time, and a sufficient amount of pores can be formed at the interface between the carbon-doped Si layer 3 and the 3C-SiC layer 5.

[0041] During the epitaxial growth of the 3C-SiC layer 5, numerous tiny vacancies are formed as carbon atoms in the carbon-doped Si layer 3 escape from their substitution positions. Furthermore, the silicon supplied to the 3C-SiC layer 5 during its growth is not only from the gas used during epitaxial growth but also from the carbon-doped Si layer 3, resulting in the formation of vacancies in the carbon-doped Si layer 3. In other words, vacancies of different sizes and densities are formed by these two effects.

[0042] Furthermore, the carbon-doped Si layer (with voids) 4 at the interface between the carbon-doped Si layer 3 and the 3C-SiC layer 5 is formed during the heat treatment process during 3C-SiC epitaxial growth when the silicon of the substrate is used as the silicon supply source when growing the 3C-SiC.

[0043] (GeO ２ Step to form the layer: S4) Finally, GeO ２ A film is formed using GeO ２ Layer 6 is formed. There are no restrictions on the film formation method at this stage, but methods such as mist CVD are commonly used for the production of oxide semiconductors. Here, for example, reference can be made to Patent Document 1, etc.

[0044] GeO ２ There are no particular restrictions on the thickness of layer 6; it is determined by the thickness required to maintain the actual device's pressure resistance.

[0045] The present invention will be described in detail below with reference to examples, but this is not intended to limit the present invention.

[0046] A 300 mm diameter, (111) face orientation, boron-doped high-resistance single-crystal silicon substrate was prepared. The silicon substrate was placed on a susceptor in the reactor of a reduced-pressure CVD apparatus, and CVD was performed at 1080°C for 1 minute. ２ We performed annealing.

[0047] Next, using trimethylsilane as the source gas, carbon is converted to 4 × 10¹⁶ carbon atoms at 700°C and 10 Torr. ２１ atoms / cm ３ A doped Si layer was grown to a thickness of 500 nm.

[0048] Next, trimethylsilane gas was introduced at a growth temperature of 900°C and a growth pressure of 5 Torr to perform SiC nucleation and grow a 3C-SiC single crystal film. Growth was carried out for 60 minutes, resulting in a film thickness of 200 nm.

[0049] Next, GeO is processed using the mist CVD method. ２ The material was grown to a thickness of 1 μm to obtain the desired semiconductor substrate.

[0050] The obtained semiconductor substrate GeO ２ XRD (X-ray Diffraction) measurements of the layer revealed high-quality single-crystal GeO ２ It was a layer.

[0051] As described above, according to the embodiments of the present invention, the deterioration of crystal quality due to lattice mismatch is suppressed, and GeO is applied to a large-diameter (300 mm diameter) Si substrate. ２ We were able to manufacture semiconductor substrates using this technology.

[0052] It should be noted that the present invention is not limited to the embodiments described above. The embodiments described above are illustrative, and any configuration that is substantially identical to the technical idea described in the claims of the present invention and achieves similar effects is included within the technical scope of the present invention.

Claims

1. A Si substrate with a main surface orientation of (111), a carbon-doped Si layer on the Si substrate, a 3C-SiC layer on the carbon-doped Si layer, and GeO on the 3C-SiC layer. ２ A semiconductor substrate characterized by having layers.

2. The semiconductor substrate according to claim 1, characterized in that the carbon-doped Si layer has vacancies at the interface between the carbon-doped Si layer and the 3C-SiC layer.

3. A step of removing the native oxide film on the surface of a Si substrate with a main surface orientation of (111) by hydrogen baking; a step of forming a carbon-doped Si layer on the Si substrate using a source gas containing carbon and silicon; a step of forming a 3C-SiC layer on the carbon-doped Si layer using a source gas containing carbon and silicon; and a step of forming GeO on the 3C-SiC layer. ２ A method for manufacturing a semiconductor substrate, characterized by including a step of forming a layer.

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