Photoactive transistor circuit module
The photoactive transistor circuit module with a controlled reset mechanism addresses the challenges of uncontrolled resets in LIF neuron emulation, achieving stable and efficient neuromorphic computing by using MoS2 to mimic biological neural behavior.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-09-18
- Publication Date
- 2026-04-02
AI Technical Summary
Existing neuromorphic computing systems face challenges in accurately replicating the biological behavior of Leaky Integrate-and-Fire (LIF) neurons due to uncontrolled reset mechanisms, leading to unpredictable timing and energy inefficiency, which hampers the scalability and reliability of spiking neural networks (SNNs).
A photoactive transistor circuit module with a controlled reset mechanism using gate voltage modulation is employed, incorporating atomically thin low-dimensional transition metal dichalcogenides like molybdenum disulfide (MoS2) to emulate synaptic functions and implement LIF neurons, ensuring precise timing and efficient reset.
The solution provides stable and predictable LIF neuron behavior, enhancing the performance of neuromorphic computing and vision systems by aligning more closely with biological neural dynamics, improving energy efficiency and reliability.
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Figure AU2025051052_02042026_PF_FP_ABST
Abstract
Description
PHOTOACTIVE TRANSISTOR CIRCUIT MODULETechnical Field
[0001] Embodiments of the present invention relates to a photoactive transistor circuit module for implementation of a Leaky Integrate-and-Fire (LIF) neuron in a Spiking Neural Network (SNN). The photoactive transistor circuit module may form the basis of an optoelectronic sensing device, memory device, neuromorphic processor and vision processing system.Background of Invention
[0002] The evolution of computing technology towards neuromorphic hardware is fundamentally driven by the increasing demand for energy-efficient and high-performance devices with miniaturised physical sizes. This paradigm shift from traditional digital systems to neuromorphic hardware largely aims to address the bottlenecks of von Neumann architecture and CMOS (Complementary-Metal-Oxide-Semiconductor) technology, responding to the modern technology's need for efficiency and compactness. Initially, the digital architecture behind these technologies led to the growth of the electronics industry, but as neural networks evolve in complexity, limitations in scalability and power consumption have posed considerable challenges. This led to the consideration of analogue neuromorphic computing which replicates complex network of neurons and synapses found in the human brain.
[0003] An important building block for neuromorphic hardware are artificial neural networks (ANNs), which have made remarkable strides in applications such as disease diagnosis, autonomous vehicle, and pattern recognition. These networks are composed of multiple layers of artificial neurons connected by synthetic synapses. However, they process information differently compared to biological systems, primarily operating with continuous analogue signals, and often neglecting the natural randomness of biological neural processing.
[0004] To address these discrepancies, spiking neural networks (SNNs) offer a more biologically aligned approach. They resemble biological neurons more accurately by utilizing neurons that fire in response to the accumulation of input signals (spikes), closely mimicking the operation of biological neurons. The Leaky Integrate-and-Fire (LIF) neuron model is asimplified model of biological neurons that accumulate incoming signals and fires a spike when a threshold is reached, subsequently reducing to baseline, while exhibiting a 'leaky' behaviour that reduces the accumulated charge over time if the threshold is not met within a certain timeframe.
[0005] Indeed, neuromorphic vision and information processing is a strongly emerging avenue for next generation computing and sensing technologies. While research is being conducted to demonstrate basic neural features and learning models, architectures that enable accurate replication of membrane potential behaviours in LIF neurons and their application in neuromorphic vision remains unexplored.
[0006] Embodiments of the invention may provide a photoactive transistor circuit module for implementation of a Leaky Integrate-and-Fire (LIF) neuron in a Spiking Neural Network (SNN), an optoelectronic sensing device, memory device, neuromorphic processor and vision processing system incorporating the photoactive transistor circuit module which may overcome or ameliorate one or more of the disadvantages or problems described above, or which at least provides the market with a useful choice.
[0007] A reference herein to a patent document or any other matter identified as prior art, is not to be taken as an admission that the document or other matter was known or that the information it contains was part of the common general knowledge as at the priority date of any of the claims.Summary of Invention
[0008] According to one aspect of the invention, there is provided a photoactive transistor circuit module configured to implement a Leaky Integrate-and-Fire neuron, the photoactive transistor circuit module including a photoactive transistor, and a reset mechanism configured to modulate a gate voltage of the photoactive transistor circuit module so as to reset the Leaky Integrate-and-Fire neuron after the generation of an action potential by the photoactive transistor circuit module.
[0009] The reset mechanism uses gate voltage modulation to actively return the photoactive transistor circuit module to its baseline state after each spike. This controlled reset may provide precise timing and consistent operation, which may result in more stable and predictable operation that imitates neuron behaviour. The reset mechanism may also prevent the photoactive transistor circuit module from lingering in a partially active state, which may improve energy efficiency. Overall, the photoactive transistor circuit module as provided herein may deliver a more reliable and biologically aligned leaky integrate-and-fire (LIF) response, enhancing the performance of neuromorphic computing and vision systems.
[0010] The photoactive transistor may incorporate an atomically thin low-dimensional material, for example an atomically thin low-dimensional transition metal dichalcogenide.
[0011] The photoactive transistor may include a channel. The channel may comprise the transition metal dichalcogenide material. In another embodiment, the channel may comprise a metal oxide material. Any suitable transition metal dichalcogenide and / or metal oxides may be used in the channel of the photoactive transistor. For example, the transition metal dichalcogenide and / or metal oxides may include any one or more of tungsten disulfide (WS2), tungsten diselenide (WSe2), molybdenum diselenide (MoSe2), molybdenum ditelluride (MoTe2).
[0012] The transition metal dichalcogenide material may be a low-dimensional material. In one embodiment, the transition metal dichalcogenide material may include molybdenum disulfide (M0S2). The molybdenum disulfide (M0S2) may be designed to emulate synaptic functions, so as to enable the implementation of a Leaky Integrate-and-Fire neuron, which may form the building blocks of a Spiking Neuron Network (SNN).
[0013] Unlike traditional ANNs, SNN with LIF neurons introduce randomness, capturing the stochastic nature of synaptic activity and neural firing. This variability, absent in ANNs, allows SNNs to model the nuanced processing of sensory information more realistically in the human brain.
[0014] In some embodiments, the transition metal dichalcogenide material may include a monolayer of molybdenum disulfide (M0S2). However, in other embodiments more than a single layer of transition metal dichalcogenide material may be used.
[0015] In some embodiments, the molybdenum disulfide (M0S2) may include engineered defects having predetermined characteristics. The predetermined characteristics may include a predetermined concentration of defects. In some alternative embodiments, the size and shape of the defects may be engineered.
[0016] Typically, the photoactive transistor circuit may be a three-terminal device. In particular, the photoactive transistor circuit may include a field effect transistor including a source terminal, a drain terminal and a gate terminal.
[0017] The reset mechanism may include a switching assembly for modulating a voltage at the gate terminal so as to reset the gate voltage of the photoactive transistor circuit module. In some embodiments, the reset mechanism may include a switching assembly for modulating a voltage between the gate terminal and the drain terminal. The switching assembly may include one or more optocouplers.
[0018] The switching assembly may be configured to selectively switch between a default terminal and a reset terminal, and wherein a reset voltage is applied to the gate terminal when the switching assembly switches to the reset terminal so as to reset the gate voltage of the photoactive transistor circuit module.
[0019] The reset voltage may be any suitable voltage. In one example, the reset voltage may be a negative voltage relative to the output voltage of the photoactive transistor circuit module. In some embodiments, the reset voltage may range from + / -1V to + / -70V. In one embodiment, the reset voltage may be about -1 Volts.
[0020] Typically, the transition metal dichalcogenide material is photosensitive such that electric conductivity of the photoactive transistor changes when the transition metal dichalcogenide material is exposed to light.
[0021] According to another aspect of the invention, there is provided an optoelectronic sensing device including a plurality of photoactive transistor circuit modules, each photoactive transistor circuit module being a photoactive transistor circuit module as described herein.
[0022] In some embodiments, the resolution of the optoelectronic sensing device may be defined by a total number of photoactive transistor circuit modules in the optoelectronicsensing device. In particular, a higher number or larger array of photoactive transistor circuit modules may provide a higher resolution optoelectronic sensing device.
[0023] Conceptually, the photosensitive information from each photoactive transistor circuit module may correspond with a pixel of a digital image. The optoelectronic sensing device may include one or more optical filters to filter input light to the optoelectronic sensing device. The one or more optical may be configured to separate input light such as input ambient light into three RGB channels, being a red channel, a green channel and a blue channel.
[0024] The output from the optoelectronic sensing device may comprise an array of transient voltage or current spike signals. The plurality of photoactive transistor circuit modules may implement a spiking neural network (SNN).
[0025] According to another aspect of the invention, there is provided a neuromorphic processor including a plurality of photoactive transistor circuit modules, each photoactive transistor circuit module being a photoactive transistor circuit module as described herein.
[0026] The plurality of photoactive transistor circuit modules may implement a spiking neural network.
[0027] According to a further aspect of the invention, there is provided a vision processing system including one or more optoelectronic sensing devices as described herein, each optoelectronic sensing device being configured to receive visual input and convert the visual input into an array of transient voltage or current spike signals, and one or more processors, each processor being operatively configured to receive output from the one or more optoelectronic sensing devices.
[0028] Any suitable type of processor may be used. For example, Von Neumann processors, GPUs, FPGAs, ASICs, digital signal processors, neuromorphic processors or quantum processors may be used. In one embodiment, the at least one processor may be a neuromorphic processor as described herein.
[0029] The visual input may include any one or both of static and dynamic visual input. Each processor may be operatively configured classify the visual input received from the one or more optoelectronic sensing devices coupled thereto.
[0030] In some embodiments, each processor may be operatively configured to classify the visual input based on one or more machine learning models. At least one machine learning model may be trained to classify static visual input, the machine learning model including any one or more of a convolutional neural network layer, Leaky Integrate and Fire neural network layer and max pooling layer.
[0031] In some embodiments, each processor may be operatively configured to classify the visual input based on one or more machine learning models. At least one machine learning model may be trained to classify dynamic visual input, the machine learning model including any one or more of a convolutional neural network layer, batch normalisation layer, Leaky Integrate and Fire neural network layer and max pooling layer.
[0032] The vision processing system may further include one or more memory devices. The one or more memory devices may be configured to provide weight synapses for combination with output from the one or more optoelectronic sensing devices. The memory device may include a plurality of photoactive transistor circuit modules. Each photoactive transistor circuit module may be a photoactive transistor circuit module as described herein.
[0033] The vision processing system may further include a driver module for combining output spike signals from the one or more optoelectronic sensing devices with weight synapses from the one or more memory devices.
[0034] In some embodiments, the vision processing system may further include a power regulator for regulating power to a light source based on a combination of output from the one or more optoelectronic sensing devices and weighted synapses from the one or more memory devices. The driver module may include the power regulator. The combination of output from the one or more optoelectronic sensing devices and weighted synapses from the one or more memory devices may be a weighted spike signal.
[0035] In some embodiments, the light source may generate light signals for processing by the one or more processors. The intensity of the light signals may be modulated based on the weighted spike signal.
[0036] In order that the invention may be more readily understood and put into practice, one or more preferred embodiments thereof will now be described, by way of example only, with reference to the accompanying drawings.
[0037] It will be appreciated that for simplicity and clarity of illustration, where considered appropriate, reference numerals may be repeated among the figures to indicate corresponding or analogous elements.Brief Description of Drawings
[0038] FIGURE 1A illustrates a photoactive transistor incorporating a transition metal dichalcogenide, such as molybdenum disulfide (M0S2).
[0039] FIGURE IB is a schematic diagram of an RC circuit modelling the behaviour of the photoactive transistor of Figure 1A.
[0040] FIGURE 2A is an optical image of the M0S2 layer in the photoactive transistor of Figure 1A.
[0041] FIGURE 2B is an Atomic Force Microscopy (AFM) image of a representative M0S2 crystal.
[0042] FIGURE 2C illustrates a Raman spectrum obtained from as-grown M0S2 crystal.
[0043] FIGURE 2D illustrates a Photoluminescence (PL) spectrum of as-grown monolayerM0S2.
[0044] FIGURE 3A illustrates the optical image of a photoactive transistor incorporating a M0S2 layer for implementation of a neuromorphic processor.
[0045] FIGURE 3B illustrates the absorbance spectra of the M0S2 layer using 350-800 nm wavelength of light.
[0046] FIGURE 4 is a circuit schematic illustrating a photoactive transistor circuit module having a reset mechanism according to one embodiment.
[0047] FIGURE 5A illustrates photocurrent response and decay characteristics of the photoactive transistor of Figure 1A when exposed to blue, green and red light pulses at distinct wavelengths.
[0048] FIGURES 5B to 5D provide enlarged views of the photocurrent response and decay characteristics under varying light conditions as provided in Figure 5A for each wavelength of light.
[0049] FIGURES 5E to 5G depict temporal light pulse patterns corresponding to each respective photocurrent response in Figures 5B to 5D.
[0050] FIGURE 6A illustrates photocurrent response and decay characteristics of the photoactive transistor of Figure 1A when exposed to blue, green and red light pulses at distinct wavelengths and the application of a reset voltage.
[0051] FIGURES 6B to 6D provide enlarged views of the photocurrent response and decay characteristics under varying light conditions as provided in Figure 6A for each wavelength of light.
[0052] FIGURES 6E to 6G depict temporal light pulse patterns corresponding to each respective photocurrent response in Figures 6B to 6D.
[0053] FIGURES 6H to 6J depict the application of a reset voltage after the application of each wavelength of light.
[0054] FIGURE 7 Photocurrent with natural decay (without being reset) vs Photocurrent reset by applying -IV to the gate voltage in MoS2.
[0055] FIGURE 8A is a graph illustrating normalized photocurrent potentiation for M0S2 under illumination, combining all colour data points from Figures 6B to 6D with a fitted exponential decay curve (r=207ms), demonstrating the consistent decay behaviour with a 95% prediction.
[0056] FIGURE 8B is a graph illustrating normalized photocurrent decay for M0S2 postillumination, combining all colour data points from Figures 6B to 6D with a fitted exponential decay curve (r=267ms), demonstrating the consistent decay behaviour with a 95% confidence bound.
[0057] FIGURE 9A is a schematic diagram illustrating an optoelectronic sensing device according to one embodiment.
[0058] FIGURE 9B is a schematic diagram illustrating processing of an input raw image into three different RGB channels.
[0059] FIGURE 10 is a schematic diagram of a neuromorphic processor implementing a spiking neural network (SNN) according to one embodiment.
[0060] FIGURE 11 is a schematic diagram of a photoactive transistor circuit module implementing a Leaky Integrate-and-Fire (LIF) neuron in the SNN hardware implementation of Figure 10.
[0061] FIGURE 12 illustrates the processing of spike signals by each photoactive transistor circuit module of Figure 11 implementing a Leaky Integrate-and-Fire (LIF) neuron.
[0062] FIGURE 13 is a schematic diagram illustrating a vision processing system according to one embodiment including an optoelectronic sensing device of Figure 9A and a neuromorphic processor of Figure 10.
[0063] FIGURE 14 is a schematic diagram providing visualisation of pre-processing a static image into corresponding RGB images and their transformation into spike trains via a rate encoding method. The rate encoding method converts pixel intensities into spikes, thereby preparing the data for input into an SNN.
[0064] FIGURE 15A illustrates a dynamic image of a waving hand.
[0065] FIGURES 15B to 15D illustrates conversion of a sequence of a waving hand gesture to polarity changes over time in an event-based data pre-processing step, so as to prepare the dynamic image data for input into an SNN.
[0066] FIGURE 16A is a graph illustrating photocurrent response of photoactive transistor circuit module having an M0S2 layer to 15 cycles of blue (455 nm), green (565 nm), and red (660 nm) light with a drain-source voltage (VDS) of 2V and a reset gate-source voltage (VGS) of - IV.
[0067] FIGURES 16B to 16D are enlarged views of the photocurrent response of 15 cycles of blue, green, and red light as illustrated in Figure 16A.
[0068] FIGURE 17A is another schematic diagram providing visualisation of pre-processing a static image into corresponding RGB channels.
[0069] FIGURE 17B is a schematic diagram illustrating an SNN architecture using M0S2 parameters as LIF neurons for the classification of the static image of Figure 17A.
[0070] FIGURE 17C illustrates the performance of the SNN of Figure 17B training after 15 epochs.
[0071] FIGURE 18A is a schematic diagram illustrating an SNN architecture for classification of dynamic (event-based) image data.
[0072] FIGURES 18B AND 18C are heat maps illustrating a 2D array of output spike signals for LIF neurons in layer 1 of the SNN of Figure 18A during training, in which white colour indicates generation of a spike and black colour indicates no spike is generated for the first epoch the 50thepoch respectively.
[0073] FIGURE 18D illustrates the performance of SNN in Figure 18A after 100 epochs.
[0074] FIGURE 18E illustrates time constant (T) VS performance of event-based vision data classification using the SNN of Figure 18A.Detailed DescriptionPhotoactive Transistor
[0075] Figure 1A presents a 3D schematic of the three-terminal photoactive transistor 100 incorporating atomically thin low-dimensional material (e.g. 2D material), for example an atomically thin low-dimensional (2D) transition metal dichalcogenide 102, such asmolybdenum disulfide (M0S2) designed to emulate synaptic functions, so as to implement a Leaky Integrate-and-Fire neuron, which may form the building blocks of a Spiking Neuron Network (SNN).
[0076] As previously mentioned, any suitable transition metal dichalcogenide and / or metal oxides may be used in a channel of the photoactive transistor 100. For example, tungsten disulfide (WS2), tungsten diselenide (WSe2), molybdenum diselenide (MoSe2), molybdenum ditelluride (MoTe2) may be used in the channel of the photoactive transistor 100. For simplicity and succinctness, the photoactive transistor incorporating M0S2 will be described in further detail herein as one non-limiting example embodiment.
[0077] As shown in Figure 1A, the photoactive transistor 100 includes a monolayer of M0S2 102 deposited on a SiCh / Si substrate 104. The photoactive transistor 100 includes a source terminal 106 and a drain terminal 108. Each of the source and train terminals 106, 108 may be Au / Cr electrodes.
[0078] In particular, the photoactive transistor 100 may be a three-terminal device. The three terminals of the photoactive transistor 100 are Source 106, Drain 108 and Gate (or back Gate) 110. As M0S2 is a light sensitive material, during operation of the photoactive transistor 100, photocurrent is generated when light is incident on the M0S2 layer 102. Current flowing between the source and drain terminals 106, 108 is capable of measuring or providing an indication of the intensity of light incident on the M0S2 layer 102. As described in further detail below, e.g. with reference to Figures 4 and 11, the gate terminal 110 is utilised with a reset mechanism 202, 612 to reset the generated photocurrent back to its baseline (i.e., dark current) to more effectively implement a Leaky Integrate-and Fire Neuron.
[0079] The operation of the photoactive transistor 100 may be influenced by the inherent semiconducting characteristics of the M0S2 layer 102. Notably, the bandgap of M0S2 is approximately 1.8 eV. When exposed to light possessing energy equal to or exceeding this bandgap value, the M0S2 absorbs photons and promotes electrons from the valence band to the conduction band. This electron excitation process results in the generation of charge carriers (i.e. electrons and holes), which contribute to the creation of photocurrent. The surgein charge carriers directly correlates with an increase in the photoactive transistor's 100 conductance and photocurrent.
[0080] In some embodiments, the M0S2 material may include engineered defects having predetermined characteristics, such as a predetermined concentration of defects. Typically, the concentration of defects in the optical properties of the M0S2 layer 102. The photocurrent response of the M0S2 layer 102 may be engineered by controlling the concentration of defects in the M0S2 layer 102. A method of engineering the defect may include oxygen driven defect engineering, for example as described in research article "Oxygen Driven Defect Engineering of Monolayer M0S2 for Tunable Electronic, Optoelectronic, and Electrochemical Devices" by Irfan et al, as published in Advanced Functional Materials, dated 14 March 2024, the entire contents of which are incorporated herein by reference.
[0081] Operation of the photoactive transistor 100 may be influenced by charge trapping within the M0S2 layer 102 because M0S2 material contains defect sites that can temporarily capture the photo-generated charge carriers. Accordingly, this trapping phenomenon contributes to an additional increase in material conductance, augmenting the overall photocurrent. This photocurrent simulates the "Charging state" occurring in biological neurons. When the light source is removed, the charges move to the valence band. This releases results in a decrease of conductance, which, in turn, causes the photocurrent of the M0S2 to decay exponentially. This decay simulates the 'Discharging' in biological neurons. Accordingly, the controlled charging and discharging of carriers allow the photoactive transistor 100 to mimic the gradual rise and fall in membrane potential of LIF neuron within. Furthermore, as described in further detail below, in some embodiments, a reset voltage (e.g. a negative voltage) may be applied between the gate and source terminals 110, 106 via a reset mechanism to rapidly discharge the photocurrent of the M0S2 layer 102. This rapid discharge behaviour may be used to simulate the reset function in a LIF neuron and repolarization in biological neurons. Advantageously, the ability to rapidly reset using the reset mechanism makes the photoactive transistor 100 particularly suitable for emulating synaptic functions in SNN architectures using a LIF neuron as the primary building block.
[0082] Figure IB is a circuit schematic of an RC circuit 112. The functionality of a LIF neuron may be represented by RC circuit 112, being the fundamental architecture of SNN where eitherstatic or dynamic images can serve as the input. In SNN, the LIF model is a simplified way to capture the electrical characteristic of biological neuron. In the RC circuit 112, input current spikes incrementally charge the capacitor by increasing the membrane voltage (70Ut) overtime. The general equation that describes the LIF neuron is given in equation [1] below:Vout(t) = n(t) R + (V0- Zin(where T is the time constant,out(t) is the membrane potential with respect to time t, Vois the membrane potential at time t = 0, R is the membrane resistance and / jn(t) is the input current.
[0083] When the input current is cut off, the membrane potential experiences an exponential decay, simplifying to equation (2) below:
[0084] On the other hand, when the neuron is subject to continuous input, such as a consistent stream of spikes or sustained optical excitation, the capacitor within the RC circuit begins to charge. This charging phase may be characterised by an increasing membrane potential and may be described using equation (3) as follows:
[0085] Therefore, Equations (2) and (3) may be used to model the discharging and charging phases of the RC circuit 112, which may be used to represent the functionality of LIF neuron respectively, embodying the fluctuating action potential as seen in biological neurons.
[0086] During operation, as the spike trains are fed from a previous neuron, the charging and discharging processes continue until the net membrane potential reaches a threshold, the neuron fires a spike, and the potential is reset to baseline, reflecting the dynamics of a biological neuron's action potential, for example as described in further detail below with reference to Figures 10 to 12. Then, the output spike becomes the input spikes of the next neuron to process the information in SNN, as described in further detail below.Optical image of M0S2
[0087] Figure 2A is an optical image of an example M0S2 layer 102. As shown in Figure 2A, as-grown MoS2single crystals are synthesized on a SiO2 / Si substrate. The SiO2 / Si substrate may be any suitable thickness, for example 300 nm. The scale bar of Figure 2A is 20pm.
[0088] Figure 2B is an Atomic Force Microscopy image of a representative M0S2 crystal. In the specific example show, the height profile in the inset reveals the typical thickness of a monolayer M0S2 being ~ 0.78nm. The scale bar of Figure 2B is 5pm.
[0089] Figure 2C is a Raman spectrum obtained from the as-grown M0S2 crystal showing typical E2g and Alg Raman modes of M0S2 at 384 and 404 cm4. The frequency difference of ~20 cm1confirms the synthesis of monolayer M0S2 flakes.
[0090] Figure 2D is a Photoluminescence (PL) spectrum of as-grown monolayer M0S2, showing typical A excitonic peak at 667 nm (1.86 eV).
[0091] Figure 3A illustrates the optical image of a photoactive transistor 100 incorporating a M0S2 monolayer 102 for implementing a neuromorphic processor according to an SNN. The photoactive transistor 100 may be connected to two gold (Au) probes, implementing the source and drain terminals 106, 108 used to measure the photocurrent response when a suitable voltage (e.g. 2V) is applied. In one embodiment, the M0S2 layer may be grown on a silicon substrate with a silicon dioxide (Si / SiO2) layer on top. During experiments as discussed herein, the photoactive transistor 100 may be exposed to a light intensity of 3mW / cm2.
[0092] As mentioned, monolayer M0S2 102 may have a direct bandgap of approximately 1.8 eV. When light within this energy range is incident on the monolayer M0S2 102, it can excite electrons from the valence band to the conduction band, creating electron-hole pairs. This excitation response may be more efficient in monolayer M0S2 because the bandgap allows for direct transitions. Once excited, free electrons increase the electrical conductivity, or the photocurrent, of the M0S2 layer 102. This is because the conduction band has more available states for electrons to occupy and move through, which corresponds to a higher conductance. The photocurrent response of M0S2 may be particularly strong because it has a higher density of electronic states at the band edges, especially at the K points in the Brillouin zone, whichare accessible with visible light photons. Thus, the bandgap energy of M0S2 allows for an effective response to visible light, making it a useful material for optoelectronic applications, including those in neuromorphic computing where light can be used to mimic neural signals.
[0093] Figure 3B illustrates the absorbance spectra of the M0S2 layer 102 over a wide range of wavelengths, for example from 350 nm to 900 nm. Notably, in the example experimental data, the most significant photoresponse occurs at about 455 nm, and the response gradually diminishes to zero as the wavelength extends to 700 nm. As such M0S2 may be used for machine vision applications in the visible spectrum. It has also been observed that the potentiation and decay properties of M0S2 are generally compatible with behaviours and properties of a LIF neuron.
[0094] As such, the optical properties and behaviours of M0S2 make the material suitable for vision sensing applications and neuromorphic computing. It would be understood that other materials in the transition metal dichalcogenide and / or metal oxide families exhibiting similar optical properties and behaviours as described herein with reference to M0S2 may be used in the channel of the photoactive transistor 100 without departing from the scope of the present invention.Photoactive Transistor Circuit Module Having Reset Mechanism
[0095] A photoactive transistor circuit module 200 configured to implement a LIF neuron having a suitable reset mechanism 202 to modulate the voltage at the gate terminal 110 so as to reset the LIF neuron after the generation of an action potential by the photoactive transistor 100 according to one embodiment is illustrated in Figure 4.
[0096] The photoactive transistor circuit module 200 represents one or a plurality of LIF neurons in a spiking neuron network (SNN) as described in further detail below with reference to Figure 10. As illustrated in Figure 4, the photoactive transistor circuit module 200 includes a photoactive transistor 100, in which like references refer to like features previous described with reference to Figure 1A. In addition, the photoactive transistor circuit module 200 includes an IV converter 204 for converting the photocurrent output from the transistor 100 to a transient voltage output 206 (also referred to herein as spikes or spike train).
[0097] The photoactive transistor circuit module 200 further includes a reset mechanism 202 configured to modulate a gate voltage of the photoactive transistor circuit module 200 so as to reset the Leaky Integrate-and-Fire neuron after the generation of an action potential by the photoactive transistor 100. In one embodiment, the reset mechanism may include a switching assembly as illustrated in Figure 4. In some embodiments, the reset mechanism may include an optocoupler 612, for example as shown in Figure 11.
[0098] The reset mechanism 202 may be operatively configured to provide a reset voltage at the gate terminal 110 when a threshold voltage is met or exceeded by the transistor 100 output. The threshold voltage may be any predetermined voltage and the reset mechanism 202 may be programmed to generate or provide the reset voltage when the threshold voltage is reached. Any suitable reset voltage may be provided. In some embodiments, the reset voltage may range from + / -1V to + / -70V. In the example embodiment illustrated in Figure 4, a reset voltage of about -IV may be applied.
[0099] Li et al. describe an optoelectronic spiking neuron device in "Single-Transistor Optoelectronic Spiking Neuron with Optogenetics -Inspired Spatiotemporal Dynamics" Advanced Functional Materials, vol. 34, article 2314456, 2024. As described in Li et al., an optoelectronic neuron is designed by integrating a threshold switch (TS) in series with a M0S2 transistor channel. The threshold switch is implemented based on an Ag / A Ch / Au stack and the M0S2 transistor channel is responsive to electrical and optical stimuli. The threshold switch operates via conductive filament formation and dissolution, wherein under an applied voltage, Ag ions migrate into the AI2O3 layer and form a metallic filament, thereby switching the device from a high-resistance state (HRS) to a low-resistance state (LRS) to imitate a spike event. When the voltage decreases below the holding voltage, the filament dissolves, returning the device to HRS.
[0100] As such, in the device disclosed by Li et al., spiking is achieved through the formation of conductive filaments within the AI2O3layer when a voltage threshold is reached, causing a transition from a high-resistance state to a low-resistance state. Reset occurs passively as the filaments dissolve when the applied voltage falls below a holding level, restoring the device to its initial state. While this volatile switching enables self-recovery, the reset process is uncontrolled and dependent on the material's inherent properties and naturalrecovering, resulting in non-deterministic timing, lack of precise control and consistency, limited spiking frequency, and variability between cycles. This typically means that the reset speed may vary, making it challenging to achieve predictable neuron behaviour, which can affect processing reliability in neuromorphic systems. It can also be difficult for the device to fully capture the charging and discharging characteristics of a biological LIF neuron due to its dependence on the natural relaxation process of conductive filaments. The absence of an active reset mechanism constrains the precision and scalability of such devices for high-speed neuromorphic applications.
[0101] US patent application no. 20240047600 discloses a photo-responsive neuronal transistor designed for neuromorphic computing and artificial visual perception systems. In particular, the transistor includes a floating body that accumulates charge (holes) generated by impact ionization and photon incidence. When the accumulated charge exceeds a firing threshold voltage, the device discharges, producing voltage spikes that imitates a biological neuron's integration-and-firing behaviour. This discharge is based on the single-transistor latch phenomenon, which naturally resets the floating body by releasing the stored charge. After firing, the floating body returns to a lower charge state, allowing the next integration cycle to begin. As the reset occurs passively through the natural discharge during firing, there is no precise timing control, making it difficult to synchronise neuromorphic networks or enforce refractory periods. The latch effect is also sensitive to process variations, temperature, and bias conditions, which can cause variability in firing thresholds and reset times. Additionally, without an explicit reset mechanism, residual charge may remain in the floating body, potentially causing spike timing errors or stuck states. This lack of external control limits adaptability and scalability, and can complicate reliable operation in neuromorphic systems.
[0102] The photoactive transistor circuit module according to embodiments of the present invention provides a controlled emulation of LIF behaviour by more accurately characterising the potentiation (charging) and decay (discharging) profiles of photocurrent in response to light, and more closely mimicking the integration and leakage processes in biological neurons. This emulates the biological LIF neuron more accurately by implementing controlled photocurrent rise and decay profiles, closely aligning with the natural integration and leakage dynamics of biological neurons.SMore specifically, the reset mechanism 202 using gate voltage modulation, enables the photoactive transistor circuit module 200 to more reliably reset to baseline after each spike. This active reset provides enhanced control and stability, allowing for more predictable and repeatable neuron behaviour. Particularly, the active reset of the reset mechanism 202 provides precise timing and consistent control of the reset process, thereby improving neuron stability and predictability. The active reset also enhances energy efficiency by only applying power for the reset, preventing the photoactive transistor circuit module from remaining in a partially active state. This may result in a more reliable and efficient neuromorphic computing system, which is more closely aligned with biological LIF neuron behaviour.Comparison of Photoactive Transistor Circuit Module Photo-response with and without Reset Mechanism
[0103] Experiments have been conducted to demonstrate the difference in photocurrent responses between the photoactive transistor circuit module 200 with and without the reset mechanism 202. Figures 5A to 5G illustrate and analyse photocurrent response and decay characteristics of the photoactive transistor circuit module 200 without reset, whereas Figures 6A to 6J illustrate and analyse photocurrent response and decay characteristics of the photoactive transistor circuit module 200 with reset.
[0104] Elaborating further, Figure 5A illustrates the photoactive transistor 100 photocurrent response and its decay characteristics under the influence of light pulses at distinct wavelengths, namely about 455 nm for blue, about 565 nm for green, and about 660 nm for red light. The photoactive transistor 100 photocurrent response and its decay characteristics would be comparable to the behaviour of the photoactive transistor circuit module 200 without the reset mechanism 202.
[0105] Figures 5B to 5D provide enlarged views of the photocurrent response under varying light conditions as provided in Figure 5A. In particular, Figure 5B illustrates the photocurrent response and decay characteristics of the transistor 100 under the influence of blue light pulses at about 455 nm. Figure 5C illustrates the photocurrent response and decay characteristics of the transistor 100 underthe influence of green light pulses blue light at about565 nm. Figure 5D illustrates the photocurrent response and decay characteristics of the transistor 100 under the influence of red light pulses at about 660 nm.
[0106] With respect to each Figure 5B to 5D, 15 pulses of each wavelength of light generated to determine the transistor's 100 sensitivity to these specific wavelengths, which in the embodiment described is tied to the M0S2 layer's 102 bandgap properties. The peaks in photocurrent in each of the Figures 5A to 5D are attributed to the excitations across the MoSz's bandgap, which are most responsive to these wavelengths within the visible spectrum.
[0107] The temporal light pulse patterns, depicted in Figures 5E to 5G, corresponding to Figures 5B to 5D respectively, show a consistent 1-second on-off cycle for each colour, which is facilitates the determination of the dynamic photoresponse of the transistor 100. When exposed to these pulses, the transistor 100 exhibits a significant increase in photocurrent, indicating a strong interaction between the incident photons and the M0S2 layer 102. However, upon cessation of the light source, and without application of a reset voltage, the photocurrent does not immediately return to the baseline but instead follows an exponential decay, a physical characteristic of the charge trapping and release mechanisms within the M0S2 layer 102.
[0108] This behaviour is particularly relevant when considering the implementation of photosensitive material such as M0S2 in an SNN as LIF neurons. In SNNs, a rapid reset mechanism post-spike is important for mimicking the biological neuron's firing and resetting dynamics. Therefore, the natural decay of M0S2 presents a challenge, and it is desirable to expedite the resetting process to align with the swift dynamics of SNNs.
[0109] Figures 6H illustrates the photoresponse and decay characteristics of the photoactive transistor circuit module 200 to 15 pulses (cycles) of blue (455 nm), green (565 nm), and red (660 nm) light with a drain-source voltage (VDS) of 2V with operation of reset mechanism 102. Corresponding enlarged views of the response and decay curve are illustrated in Figures 6B for blue (455 nm) light, Figure 6C for green (565 nm) light, and Figure 6D for red (660 nm) light. Corresponding temporal patterns of each respective wavelength of light pulses are illustrated in Figures 6E to 6G. In each of the Figures 6A to 6D, the light pulses are applied in a consistent on-off pattern, each lasting for about 1 second followed by the application of a-IV reset (gate) voltage (VGS=-1V) to rest the photocurrent to the baseline as illustrated in Figures 6H to 6J.
[0110] Comparing the observations in Figures 5A to 6J presents a detailed examination of the photoactive transistor circuit module's 200 photoresponse and the importance of reset mechanism 202. In the example experiments shown, a reset gate voltage of -IV is applied to the gate terminal 110, for resetting the photocurrent to its baseline after exposure to 15 light pulses across 455nm, 565nm, and 660nm wavelengths.
[0111] Figure 6A illustrates the overall photoresponse of the photoactive transistor circuit module's 200, demonstrating its ability to revert to baseline photocurrent levels promptly upon application of a -IV gate voltage, across all tested wavelengths (455nm, 565nm, 660nm).
[0112] The detailed photoresponse for each 455, 565, 660nm wavelength are shown in Figures 6B to 6D. The enlarged views in Figures 6B to 6D elucidate the sensitivity of the photoactive transistor circuit module 200 to the application of the reset voltage. Indeed, the immediate photocurrent reduction to baseline levels after application of the reset voltage affirms the effective reset function.
[0113] In the experiment shown, the reset mechanism was achieved by applying a negative gate voltage, which influences the MoSz's photocurrent through field-effect transistor (FET) behaviour. A negative gate voltage, by adjusting the Fermi level, reduces the electron density in the conduction band and promotes recombination, swiftly decreasing the photocurrent. This rapid adjustment serves as the 'reset', to implement the LIF neuron model in an SNN. This FET characteristic of M0S2 enables the reset function, demonstrating the material's suitability for neuromorphic applications. By exploiting MoSz's electrical properties and FET dynamics, synthetic LIF neurons can mimic biological processes, enhancing computational models.
[0114] Figure 7 is a further line graph comparing the photocurrent behaviour of M0S2 layer 102 under conditions with and without the application of a reset voltage (e.g. -IV), to mimic the reset function observed in LIF neurons. In particular, curves 302 illustrate the photocurrent behaviour in response to light wavelengths of 455nm, 565nm, and 660nm without application of the reset voltage, and curve 306 illustrates the photocurrent behaviourin with the application of a reset voltage. As illustrated in Figure 7, absence of a reset voltage, the photocurrent takes approximately 5 seconds to return to the baseline or dark current levels when exposed to light wavelengths of 455nm, 565nm, and 660nm. On the other hand, applying a reset voltage (-1V) results in an immediate drop in photocurrent. This swift decrease demonstrates the effective replication of the reset mechanism characteristic of LIF neurons.
[0115] Figure 8A is a graph 400 illustrating a normalised data from Figures 6A to 6D showing the potentiation photoresponse of the M0S2 layer 102. The graph of Figure 8A includes 45 data points, 15 data points for each wavelength of light 455nm, 565nm, 660nm for blue, green and red light respectively. The graph 400 is fitted using the formula (4) below:_ t_I = 1 - eTv (4)
[0116] Based on the 45 data points, a consolidated Tpvalue of approximately 0.207s was derived, as evidenced by the fitted curve in graph 400, indicating a consistent potentiation photoresponse behaviour across the visible spectrum.
[0117] A corresponding graph 402 of normalised data from Figures 6A to 6D illustrating the depression photoresponse of the M0S2 layer 102 is shown in Figure 8B. For the depression curve in graph 402, we fit the curve utilizing the equation:_ t_I = eTd (5)
[0118] In Figure 8B, a total of 45 data points, with 15 data points for each wavelength of light 455nm, 565nm, 660nm for blue, green and red light respectively were analysed and a consolidated decay time constant of Td= 0.267s was derived, indicating a consistent depression photoresponse behaviour across the visible spectrum.Optoelectronic Sensing Device
[0119] Given the photoresponse behaviour of the M0S2 layer 102 discussed herein, it has been demonstrated that the photoactive transistor circuit module 200 may be used in vision sensing application. In some embodiments, there is provided an optoelectronic sensing deviceincluding a plurality of photoactive transistor circuit modules 200 suitable for use in vision sensing applications.
[0120] Figure 9A illustrates a schematic of an optoelectronic sensing device 500, in which a 4X4 two-dimensional array of photoactive transistor circuit modules 200 is provided. It will be appreciated that any suitable number (NXM) of photoactive transistor circuit modules 200 may be provided to achieve the desired resolution of the optoelectronic sensing device 500, and vision sensing application. For example, in one embodiment, an 8X8, 32X32, or any other sized two-dimensional array of photoactive transistor circuit modules 200 may be provided in an optoelectronic sensing device.
[0121] Photosensitive information from each photoactive transistor circuit module 200 in the optoelectronic sensing device 500 may correspond with a pixel of a digital image. During operation, each photoactive transistor circuit module 200 of the optoelectronic sensing device 500 may be exposed to light of any corresponding wavelength, which causes photocurrent to be generated by each photoactive transistor circuit modules 200 in response to the light. The output of the optoelectronic sensing device 500 may therefore be an array of transient voltage or current spike signals in response to visual input. In particular, a 2D array of spike signals may be generated by the optoelectronic sensing device 500 in response to a static visual input (e.g. static image data) Moreover, a 3D array of spike signals may be generated by the optoelectronic sensing device 500 in response to dynamic visual input (e.g. video data). When dynamic visual input is used, each photoactive transistor circuit modules 200 generates a plurality of spike signals in response to time-varying light input.
[0122] In some embodiments, input light may be pre-processed prior to receipt by each photoactive transistor circuit module 200 in the optoelectronic sensing device 500. More specification, the pre-processing may include separating the input light into their fundamental (RGB: red, green and blue) colour elements (e.g. see 5A to 6J), for example by using one or more optical filters. The optical filters (not shown) may be provided in the optoelectronic sensing device 500 or externally to the optoelectronic sensing device 500.
[0123] The optical filters may separate the input light into three different RGB channels of light signals. As illustrated in Figure 9B, light signals as represented by image 502 may beseparated into a red channel light signals 504, green channel light signals 506 and blue channel light signals 508. In some embodiments, the separated RGB light signals may be stored in three distinct arrays of photoactive transistor circuit modules 200, with each array of photoactive transistor circuit modules 200 corresponding to one of the three RGB channels. The separated light signals may be subsequently converted into spike signals in accordance with operations of LIF neurons as further described herein. The spike signals may be further processed, for example by a processor to carry out static and dynamic image classification. In some embodiments, a neuromorphic processor may be used to process the spike signals for static and dynamic image classification as described in further detail below. As previously described, each colour light signals results in a distinct change in photocurrent, thereby allowing the processor to differentiate between the different RGB channels.
[0124] As such, in vision processing systems, one or more optoelectronic sensing devices 500 may be used to detect visual input for processing by a processor, such as a neuromorphic processor 600 as described in further detail below.Neuromorphic Processor
[0125] Figure 10 is a schematic diagram of a neuromorphic processor 600 implementing a spiking neural network (SNN) according to one embodiment. The SNN includes an input layer 602 for receiving a plurality of input spike signals, for example from one or more optoelectronic sensing devices 500 as described herein. One example implementation of a vision processing system incorporating an optoelectronic sensing device 500 and neuromorphic processor 600 will be described in further detail below with reference to Figure 13.
[0126] As illustrated in Figure 10, the SNN further includes a plurality of Leaky Integrate- and-Fire (LIF) neurons 604 (also referred to herein as spiking neurons) networked together. LIF neurons are adept at receiving various forms of encoded inputs from preceding neurons, including rate-encoded, temporal-encoded, and modulation-encoded signals. In the context of rate encoding, the neuron's current increases proportionally with the frequency of incoming spikes. Upon reaching a certain threshold, the LIF neuron generates a spike and subsequently resets its output. This spike then serves as an input for subsequent neurons, facilitating signal propagation through the network.
[0127] In the specific example shown, each spiking neuron 604 in the first layer receives input from each of the input nodes in the input layer 602. In subsequent layers, each spiking neuron 604 receives input from each spiking neuron 604 in a previous layer. In alternative embodiments, the spiking neurons 604 may be networked together in a different network structure.
[0128] In one embodiment, each spiking neuron 604 may include a photoactive transistor circuit module 606 as illustrated in Figure 11. The photoactive transistor circuit module 606 operates in a similar manner to photoactive transistor circuit module 200 as previous described with reference to Figure 4, in which like references refer to like features previously described.
[0129] The photoactive transistor circuit module 606 includes a photoactive transistor 100 having a M0S2 layer 102. The electrical spike signals from previous spiking neurons 604 activates a corresponding photon source (such as an LED) to illuminate the M0S2 layer 102. The photoactive transistor circuit module 606 may be constantly applied with an input voltage (e.g. 2V) across drain and source, to monitor the photoresponse of the M0S2 layer 102. Under illumination, there is an increase in the photocurrent generated by the M0S2 layer 102. This photocurrent then diminishes exponentially when the illumination is stopped (e.g. after the spike). The IV converter 608 converts photocurrent output from the photoactive transistor 100 to a transient voltage output.
[0130] The comparator 610 generates an output spike signal if the output voltage from the IV converter 608 in greater than a threshold voltage 614. The threshold voltage 614 may be predetermined and preset at any suitable threshold. Output spike (voltage) signals from the comparator 610 are transmitted to spiking neurons 604 in the next layer.
[0131] The reset mechanism of the photoactive transistor circuit module 606 includes an optocoupler 612. Output voltage spike signals from the comparator 610 are provided to an input (LED) side of the optocoupler 612, which emits light to trigger the photodetector of the output side of the optocoupler 612, to thereby apply a reset voltage 616 (e.g. -IV) to the gate terminal 110 of the photoactive transistor 100.
[0132] As multiple input spikes are received by the photoactive transistor 100, the peak level of the photocurrent slowly increases. When this photocurrent reaches a predefinedthreshold, the spike generator (e.g. comparator 610) activates, producing an output spike that propagated to the following neuron 604. Shortly after, the reset mechanism 612 is triggered by applying a reset voltage (e.g. -1 V) to the gate-source, i.e., VGS = -1 V, of the photoactive transistor 100. This action rapidly resets the photocurrent from the threshold level back to the baseline current, i.e., the dark current. Concurrently, the output spike activates light emitter in order to propagate the signal to the subsequent neuron in the SNN.
[0133] The photoactive transistor circuit module 606 therefore functions as a LIF neuron in which an action potential (output voltage spike signal) is only generated if the threshold voltage (implementing the membrane potential) is reached.
[0134] Figure 12 further illustrates the operation of input and output spike signals as processed by the photoactive transistor circuit module 606 implementing a LIF neuron. In particular, input spikes 620 in which higher light intensity input may be represented by a group of higher frequency spikes are received by the photoactive transistor circuit module 606. The input spikes 620 may be a sum or weighted sum of output spikes from a previous layer of spiking neurons 604. The input spikes 620 are converted into input light signals for the M0S2 layer of the photoactive transistor 100 of the photoactive transistor circuit module 606.
[0135] Example output voltage spikes 622 of the IV converter 608 are illustrated in Figure 12, in which input spikes 620 in close succession are added together and an output spike 626 is generated when the threshold voltage 614 is reached or exceeded, thereby implementing the behaviour of a LIF neuron.Vision Processing System
[0136] Figure 13 is a schematic diagram illustrating a vision processing system 700 including an optoelectronic sensing device 500 and a neuromorphic processor 600 as described herein.
[0137] More specifically, the optoelectronic sensing device 500 converts input light to output spike signals 702 as previously described. The frequency of the output spike signals 702 are based on the intensity of the input light incident on the photoactive transistor circuit modules 200 of the optoelectronic sensing device 500. As mentioned, the output photocurrentcharacteristic of each photoactive transistor circuit modules 200 changes according to the intensity of the input light applied.
[0138] Conceptually, each photoactive transistor circuit module 200 of the optoelectronic sensing device 500 may correspond to a single pixel of a digital input image. Generally, the light intensity corresponds to the pixel value of an input image, whereby the higher the pixel value, the greater the light intensity. As a result, the photocurrent rise time varies with intensity, leading to the generation of more spikes for higher intensities of input light and fewer spikes for lower intensities of input light, whilst maintaining the same threshold. As previously described, the generated photocurrent spikes are converted to voltage by using an IV converter 608 in each photoactive transistor circuit modules 200.
[0139] In the schematic diagram of Figure 13, an example 4X4 2D array optoelectronic sensing device 500 is illustrated for simplicity. In this example, the output would be a 4X4 2D array of spike signals, wherein for each photoactive transistor circuit modules 200 in the 4X4 array, and output spike is generated if a threshold voltage is exceeded. However, it will be understood that the optoelectronic sensing device 500 may have any suitable array of N X M photoactive transistor circuit modules 200.
[0140] The vision processing system 700 may further include a driver module 704 for a light source (e.g. LED light source), and a memory device 708 to provide an array of weight values (also referred to as weight synapses). The driver module 704 may be configured to combine the weight values from the memory device 708 with the output spike signals 702 to generated weighted spike signals 706.
[0141] The memory device 708 may be an array (e.g. 2D array) of photoactive transistor circuit modules 200. For the sake of simplicity, the memory device 708 illustrated is a 4X4 2D array of photoactive transistor circuit modules 200. However, it will be understood that the memory device may have any suitable array of NXM photoactive transistor circuit modules 200. Indeed, the array of photoactive transistor circuit modules 200 may also function as a memory. When configured as a memory device 708, the array of photoactive transistor circuit modules 200 may require additional defects in the M0S2 layer of each photoactive transistorcircuit module 200 to exhibit memory characteristics. This may be achieved by annealing the M0S2 layer of each photoactive transistor circuit module 200.
[0142] As described in further detail below with reference to Figures 14 to 17C, the weight values for the Spiking Neural Network (SNN) may be pretrained using a computer and then applied to the memory device 708 through varying light power intensities. As mentioned, the M0S2 photocurrent increases to different peak levels, and after illumination, it decays exponentially. Over time, the photocurrent stabilizes due to defect properties, exhibiting what is known as persistent photocurrent (PPG). This PPG represents the stabilisation of the photoconductance during that period, making it suitable for use as weight synapses for a hardware implementation of the SNN via neuromorphic processor 600.
[0143] As mentioned, the driver module 710 combines the weight values from the memory device 708 with the output spike signals 702 from the optoelectronic sensing device 500 to generate weighted spike signals 706. The weighted spike signals 706 may be used to provide corresponding variable power input for a light source 710 (e.g. LED light source). The light source 710 generates variable light input 712 that changes in light intensity in accordance with the weighted spike signals 706. The varying light 712 may be applied to the photoactive transistor circuit modules 200 in the input layer 602 of the neuromorphic processor 600. In one example embodiments, the driver module 704 may covert the 'N X M' (e.g. 4X4) 2D array of output spike signals 702 into 'M' sets of ID array of weighted spike signals 706 for driving the light source 710 to provide the variable light input 712 for the input layer 602 of the neuromorphic processor 600. The variable light input 712 is processed by the neuromorphic processor 600 in according with LIF neuron and SNN operating principles as previously discussed and illustrated in Figure 10. An output spike signal from the neuromorphic processor 600 may be used to classify light input received by the optoelectronic sensing device 500 representing static or dynamic image data.
[0144] In some embodiments, the output from each photoactive transistor circuit module200 (representing LIF neurons) of the input layer provide input spike signals for the next layer of the neuromorphic processor 600.
[0145] Typically, the output of a photoactive transistor circuit module 200 representing a LIF neuron can be denoted as yj = fuF Zixi *wi,j)> where x represents the input spikes, w denotes weight values that control the peak amplitude of the spikes, and fLIF, LIF activation function. This equation reflects how the input spikes, modulated by their corresponding weights, influence the output of a photoactive transistor circuit module 200 representing a LIF neuron in a subsequent layer of the hardware implementation of an SNN in the neuromorphic processor 600.
[0146] At the final layer, the output spikes may be processed to classify the input representing static / dynamic image data. For example, the output spikes may be counted and a prediction of the SNN may be based on the neuron (photoactive transistor circuit modules 200) in the output layer with the highest number of output spikes.Training SNN, Experimental Results and DiscussionMachine vision and data pre-processing
[0147] Method of training an SNN to determine pre-trained weight values as discussed herein with reference to the memory device 708 illustrated in Figure 13 will be described below.
[0148] Training may be carried out for both static and dynamic image processing so that the vision processing system 700 may be configured to process both types of data in machine vision applications. For illustrative purposes, the concept of operation has been demonstrated by training a spiking neural network (SNN) using both digital static image data and digital video data. The trained weights of the SNN can then be utilised by the vision processing system 700 to classify machine vision data received in the form of input light.
[0149] As further illustrated in Figure 14, a static image 800 can be pre-processed and separated into its fundamental red 802, green 804, and blue 806 (RGB) channels. Within each channel 802, 804, 806, the intensity of light is directly transduced into rate encoded spikes 808. The higher light intensities cause a greater spiking frequency due to the rate encoding mechanism intrinsic to SNNs. The generated spikes 808 may be propagated to the input and subsequent layers of neurons in the SNN. As the spike signals travel across the SNN network,they enable the SNN to efficiently interpret the composite colour information, facilitating image classification and other pattern recognition tasks.
[0150] Figures 15A to 15D illustrates the pre-processing of video (dynamic image) data for SNN training. An example of a hand-waving gesture in Figure 15A may be represented in a number of different ways. Figure 15B is a series plot quantifying vertical displacement of the hand 810 over time, with colour intensity reflecting the degree of motion, corresponding to the polarity values. In the graph of Figure 15C, the horizontal and vertical movements of the hand 810 are plotted on a 2D plane. In the graph of Figure 15D, the 3D plot amalgamates the horizontal movement, vertical movement, and time to depict the temporal evolution of the hand-waving gesture of Figure 15A, encapsulating the full motion dynamics of the waving hand 810. In this dynamic representation, color-coded changes within the visual scene indicate shifts in pixel intensity, where red reflects an increase (positive polarity, or +1) and blue a decrease (negative polarity, or -1). The degree of these colour changes encodes the intensity of the visual transition, with larger shifts pointing to more significant motion. This precise encoding captures the complex dynamics of the hand wave in real-time. Moreover, the magnitude of these polarity changes encodes the intensity of the visual change, with larger magnitude changes indicating more significant shifts in intensity. This encoding allows for a detailed representation of the visual scene's dynamics. Such changes may be captured using an eventbased sensor like the Dynamic Vision Sensor (DVS) camera. In the event based SNN processing, the change in polarity of each pixel generates a spike. This spike, representing dynamic changes in the scene, subsequently influence the associated neuron in the SNN. Depending on the incoming spike frequency, this neuron's current is altered, possibly leading to the neuron firing an output spike. This event-based nature ensures real-time processing and a rapid response to events, just as neurons relay immediate sensory changes to the brain. A rapid decay rate of LIF neurons ensures that the SNN remains responsive to the latest events by reducing the impact of older ones. Given that the M0S2 layer 102 possesses a relatively fast decay rate, it proofs suitable for vision processing application. This photo-response behaviour of the M0S2 layer 102 advantageously allows the SNN to offer real-time processing with rapid response to dynamic changes, which is similar to the neurons relay immediate sensory changes to the brain.Experimentation to illustrate photoresponse of M0S2
[0151] The photoresponse of the photoactive transistor circuit modules 200 and its M0S2 layer 102 was analysed via experimentation using three distinct wavelengths - blue (455 nm), green (565 nm), and red (660 nm) - to understand its spectral sensitivity and potential in neuromorphic applications. In Figure 16A, the photocurrent response of the M0S2 layer 102 is presented when exposed to blue 812, green 814, and red 816 light sources (e.g. LED or Laser light may be used), each with a power density of 3 mWcrrr2.
[0152] In Figures 16B to 16D, a closer examination of the photocurrent response under varying light conditions is provided. In particular, Figure 16B is an enlarged view of the photocurrent response for 15 cycles of blue light (at a wavelength of 455 nm). Figure 16C is an enlarged view of the photocurrent response for 15 cycles of green light (at a wavelength of 565 nm). Figure 16D is an enlarged view of the photocurrent response for 15 cycles of red light (at a wavelength of 660 nm).
[0153] Initially, the blue light was activated for a duration of 500ms, followed by a 1000ms pause. This cycle was repeated for 15 pulses aiming to assess the reliability and consistency of the photocurrent response in the M0S2 layer 102. During this period, a voltage VDS of 2 V was applied between the drain 108 and source 106 terminals of the photoactive transistor circuit modules 200 to generate the photocurrent. As illustrated in Figures 16B to 16D, the resulting photocurrent demonstrated an exponential rise.
[0154] After completing the 15 pulses with blue light, the light source is switched off. It was observed that the M0S2 layer's 102 photocurrent did not immediately return to its baseline value but instead showed an exponential decay. This behaviour demonstrates MoS2's suitability for use in the photoactive transistor circuit modules 200 to model a LIF neuron by mimicking the increase and subsequent decrease in membrane potential similar to biological neurons. To replicate the reset function of a LIF neuron in the photoactive transistor circuit modules 200, the photocurrent needed to return to its baseline current level. This was achieved by applying a gate-source (reset) voltage VGS of -1 V, causing a rapid drop in the photocurrent directly back to its baseline current level. As previously mentioned, the resetmechanism is configured to provide the reset voltage to achieve the reset requirements of a LIF neuron.
[0155] Similarly, the experiment was then repeated for both the green and red-light sources. This systematic approach enabled a comprehensive evaluation of the MoSz's photocurrent response across different light spectrums, providing valuable insights into its potential applications in the machine vision systems that need to interpret RGB colours the basics of image differentiation in the environment.
[0156] To emulate the behaviour of LIF neurons, the decay rate of the photoactive transistor circuit modules 200 should be understood. As such, the experimentation also investigated the post illumination response of M0S2 under red, green, and blue wavelengths excitation. More specifically, an average of 15 decay events was used for each colour, resulting a collective dataset of 45 exponential decays. The dataset was then normalised to fall within the range of 1 to 0 to provide consistency across the measurement.
[0157] As previously discussed and shown in Figure 8A, all 45 potentiation profiles fit closely to the following potentiation model:Where Ioutis the conductance, IQis the peak current, t is the time, and Tpis the potentiation time constant. After normalised to a range of 0 to 1, equation (4) above may be derived (shown below for ease of reference)
[0158] From the results, it was observed that the photoresponse across all RGB wavelengths exhibited a uniform potentiation time constant Tp= 207 ms with 95% confidence bound indicating a consistent temporal response characteristic for all tested light spectra regardless of their variation in peak currents and wavelength.
[0159] In relation to the decay aspects as illustrated in Figure 8B, the decay model may be represented by the following equation:loiM = Ip»e t / Td(7) where Ipis the current photoresponse of M0S2, while IpQis the initial current photoresponse, Tdis the decay time constant. After normalized to a range of 0 to 1, equation (5) above can be derived (shown below for ease of reference) lout = e~t / Td(5)
[0160] Similar to the potentiation, the result has shown that the photoresponse of M0S2 to all 3 measured wavelengths has uniform decay rate with a decay time constant Td= 267ms with 95% confidence bounds. This indicates a consistent decay response characteristic for all tested wavelengths, thus allowing for the utilization of any of the red, green, or blue wavelengths.
[0161] Equations 4 and 5 can also emulate the charging phase (Equation 3) and discharging phase (Equation 2) of LIF neuron respectively. As shown in Figure 8B, the feasibility of directly utilising M0S2 photocurrent for spike generation through a current-based spike generator may be observed, thereby shifting toward photocurrent rather than membrane potential (voltage) for LIF neuron. In terms of percentage, Tdis approximately 22.47% larger than Tp. In Equation 1, which represents the behaviour of the LIF neuron, there is only one time constant (T) involved. In this case, Tdmay be utilised as the decay time constant to capture the relevant dynamics. In some embodiments, a system demonstrating stable and effective performance with a larger time constant may be suitable for handling faster dynamics represented by a smaller time constant. Essentially, the successful operation of the model with T = Td= 267 ms serves as a robust proof of concept, suggesting that the modelled LIF neuron's functionality is not limited by slower response times and can adapt to quicker stimuli if required. This approach leverages the larger time constant as a test of the system's upper bounds of performance, so as to provide a versatile and reliable LIF neuron model.
[0162] The training of an M0S2 parameterised SNN will now be described with reference to Figures 17A to 18E. In the discussions below, CIFAR10 and DVS128 gesture datasets have been used to mimic the static image and event-based vision respectively.Static Image (CIFAR10) Classification with MoSz-Parameterised SNN
[0163] When interfacing with SNNs, the static image data requires preprocessing. Several different image encoding methods may be suitable, for example rate encoding, temporal encoding, and delta modulation. In the experiments conducted, rate encoding was used for its simplicity and robustness. However, it will be understood that other types of encoding and image pre-processing methods may be used.
[0164] The CIFAR-10 dataset is organised into ten distinct classes, providing a comprehensive framework for neural network-based classification tasks. The images are structured in a three-dimensional array, encompassing dimensions of width, height, and colour depth, offering a static image to human visual perception for machine vision.
[0165] Rate encoding within SNNs involves translating the intensity of input signals into a corresponding frequency of spike events. For the CIFAR-10 images, each pixel's intensity across the red, green, and blue (RGB) channels is observed. As illustrated in Figure 17A, as example raw image 900 is separated into its corresponding red 902, green 904 and blue channels 906.
[0166] During training, if the intensity of a spike signal corresponding to a pixel crosses a predetermined threshold, the neuron mapped to that pixel fires off a spike, as previously described. The dissection of CIFAR-10 images into RGB channels and conversion to spike signals is discussed herein with reference to Figure 14.
[0167] Figure 17B illustrates an SNN architecture 950 for classifying pre-processed input images 952. During training, the spike signals 808 generated from the images 900 are introduced into the SNN 950. The architecture of the SNN 950 is a hybridization of traditional convolutional neuron network (CNN) models with the dynamic elements of SNNs.
[0168] In particular, the SNN model 950 includes a plurality of layer sets. Five sets of layers (LI to L5) are shown in Figure 17B. In the first layer set (LI), there is provided a convolutional layer 954, followed by a LIF neuron layer 956, and followed by a max pooling layer 958. In each of the subsequent layer sets (e.g. L2 to L5), there is provided a convolutional layer 954, followed by a LIF neuron layer 956, followed by a convolutional layer 954, followed by a LIFneuron layer 956, and followed by a max pooling layer 958. The core of this architecture is ResNet-11, a variant of the Residual Network family renowned for its depth and efficiency. Other SNN architectures may be used.
[0169] In this SNN model 950, the LIF neuron layers 956 replace the traditional activation functions in the CNN layers. The parameters of these LIF neurons are fine-tuned to reflect the characteristics of molybdenum disulfide (M0S2), with a maximum voltage l^x of 1, a resting potentialrestof 0, and a threshold voltage Vthof 0.75. The decay time constant, denoted as Tm, is calibrated to 267 ms in line with the decay constant derived during experimentation as discussed herein.
[0170] As illustrated in Figure 17C, the performance of the SNN architecture over 15 epochs has an accuracy of 75%. The SNN network's performance begins to stabilise around the 10th epoch with a steady accuracy of approximately 60%, and then shows a gradual increase to 70% by the 15th epoch. This indicates the SNN network's learning and adaptive capabilities with the LIF neurons, parameterised with M0S2 characteristics.Dynamic Image (DVS128 Gesture) Classification with MoSz-Parameterised SNN
[0171] Training a MoS2-parameterised SNN using dynamic image data to illustrate suitability in event-based visual processing applications will now be described below with reference to Figures 18A to 18E.
[0172] The DVS128 gesture dataset is particularly well-suited for assessing the capabilities of SNNs in event-based vision contexts, owing to its effective capture of detailed hand movements. This dataset provides rich information essential for dynamic vision. Unlike standard cameras that take pictures at set time intervals, the DVS records only when there are changes in light hitting each pixel. This means it captures the action as it happens, making it highly efficient for real-time processing tasks. The DVS technology is particularly good at following quick movements, making it a useful component for systems that need to react without delay. Its ability to operate effectively in varied lighting conditions or when quick adaptation is required sets it apart from conventional cameras.
[0173] When SNNs are applied to the DVS128 dataset, they provide a refined approach to interpret human gestures. The DVS sensor's precision in capturing the timing of movement ensures that even the smallest details of a gesture are recorded. This level of detail is beneficial for creating responsive and accurate gesture recognition systems. The combination of the DVS128 dataset with the processing power of SNNs could lead to significant improvements in how computers understand and respond to human movement.
[0174] Figure 18A illustrates the SNN architecture 908 deployed for classifying the DVS128 gesture dataset using M0S2 parameters in LIF neurons. The architecture comprises multiple layers, each with a specific role in data processing. In a first layer, a convolutional layer 910 for extracting features is provided. Following this, a batch normalisation layer 912 that provides stability and normalisation of the inputs is provided as a second layer. A LIF neuron layer 914 is provided as a third layer, employing M0S2 parameters such as maximum and minimum voltage thresholds (^nax, Vmin), the voltage threshold for spiking (7th), and the decay time constant rm), similar to the "Static Image (CIFAR10) Classification with MoS2-Parameterized SNN" section previously described. These parameters dictate the response characteristics of the LIF neurons. A max pooling layer 916 is provided as a fourth layer, which reduces the data's dimensionality, thereby enhancing computational efficiency. The layered sequence of the first, second, third and fourth layer 910, 912, 914, 916 respectively is repeated a number of times (e.g. five times in LI to L5 as illustrated in Figure 18A), providing a deep learning capability.
[0175] After the repeated layered structures, the SNN network 908 employs a flattening layer for converting the multi-dimensional feature maps into a one-dimensional vector. This is a preparatory step for the following dropout layer, which aids in mitigating overfitting by randomly omitting neurons during the training process, such that the network maintains generalisation capabilities. The last layer is a fully connected layer 918, which integrates the learned features to categorise the dataset effectively. The output layer 920 provides the classified result in the form of output spike signals.
[0176] In Figure 18B to 18C, the right-hand wave spiking activity within the first LIF neuron layer is shown for two distinct epochs: the first epoch and the 50th epoch. It is illustrated that the spikes, represented in white, signify the firing of neurons. Notably, there is a visible reduction in the number of spikes after 50 epochs compared to the first, yet the spikes thatpersist correlate more closely with accurate classification outcomes. For instance, in the first epoch, there is an extensive, high-intensity red background, indicating a greater amount of indiscriminate spiking. By contrast, in the 50th epoch, the background intensity is reduced, suggesting less extraneous neural activity. Moreover, the focused regions of spiking activity in the latter epoch correspond more closely with accurate gesture classification. This evolution in spiking behaviour exemplifies the network's learning progression, where the neurons increasingly generate spikes that are pertinent to correct classification with M0S2 parameters as training advances. Figure 18D shows the performance graph of SNN architecture 908 using M0S2 parameters as LIF neuron. The graph in Figure 18D shows that the network can classify 80% accuracy after 60 epochs, and it is maintained up to 100 epochs with small variation. Figure 18E illustrates the performance sensitivity to the time constant (T) during DVS128 gesture classification. The analysis suggests that a device time constant ranging from 200ms to 400ms is optimal, within which the system consistently achieves an accuracy rate around 83%, allowing for a standard deviation of only ±2%. This range demonstrates that the trained SNN 908 is suitable for dynamic image classification applications, with robust operation and reliable gesture recognition.
[0177] Embodiments of the invention therefore demonstrate that the photoelectrical behaviour of visible active, atomically thin M0S2 can be leveraged to simulate the charging and discharging states of LIF neurons. Moreover, the employment of a reset voltage in the form of gate voltage modulation swiftly resets the neuron. In combination, these features enable replication of LIF membrane potential enhancing system responsiveness.
[0178] In the training and experimental methods described herein according to some embodiments, key photoresponse parameters of the M0S2 are extracted and embedded into a simulated neuromorphic model. This model is then deployed as an SNN architecture for static and dynamic image classification tasks. The outcomes demonstrate the capability of photoactive 2D materials for realising biologically relevant SNNs, representing a step in the development of real-time, energy efficient hardware capable of adaptive learning from sensory input, mimicking important neural features. As previously mentioned, other transition metal dichalcogenide materials or metal oxide materials with comparable qualities and characteristics may be used in a similar manner.Interpretation
[0179] This specification, including the claims, is intended to be interpreted as follows:
[0180] Embodiments or examples described in the specification are intended to be illustrative of the invention, without limiting the scope thereof. The invention is capable of being practised with various modifications and additions as will readily occur to those skilled in the art. Accordingly, it is to be understood that the scope of the invention is not to be limited to the exact construction and operation described or illustrated, but only by the following claims.
[0181] Moreover, any feature or element described within one embodiment may be combined with any feature or element as described with respect to any other embodiment detailed within this specification, as deemed suitable and appropriate by those skilled in the art.
[0182] The mere disclosure of a method step or product element in the specification should not be construed as being essential to the invention claimed herein, except where it is either expressly stated to be so or expressly recited in a claim.
[0183] The terms in the claims have the broadest scope of meaning they would have been given by a person of ordinary skill in the art as of the relevant date.
[0184] The terms "a" and "an" mean "one or more", unless expressly specified otherwise.
[0185] Neither the title nor the abstract of the present application is to be taken as limiting in any way as the scope of the claimed invention.
[0186] Where the preamble of a claim recites a purpose, benefit or possible use of the claimed invention, it does not limit the claimed invention to having only that purpose, benefit or possible use.
[0187] It should be noted that terms of degree such as "generally", "substantially", "about" and "approximately" as used herein mean a reasonable amount of deviation of the modified term such that the end result is not significantly changed. These terms of degreeshould be construed as including a deviation of the modified term if this deviation would not negate the meaning of the term it modifies.
[0188] In the specification, including the claims, the term "comprise", and variants of that term such as "comprises" or "comprising", are used to mean "including but not limited to", unless expressly specified otherwise, or unless in the context or usage an exclusive interpretation of the term is required.
[0189] Furthermore, the recitation of any numerical ranges by endpoints herein includes all numbers and fractions subsumed within that range (e.g. 1 to 5 includes 1, 1.5, 2, 2.75, 3, 3.90, 4, and 5). It is also to be understood that all numbers and fractions thereof are presumed to be modified by the term "about" which means a variation up to a certain amount of the number to which reference is being made if the end result is not significantly changed.
[0190] As used herein, the wording "and / or" is intended to represent an inclusive-or. That is, "X and / or Y" is intended to mean X or Y or both, for example. As a further example, "X, Y, and / or Z" is intended to mean X or Y or Z or any combination thereof.
[0191] Throughout the specification, like reference numerals refer to like features described herein. As such, any instance where features or components are indicated with the same references implies a direct correlation to the similar or identical features or components as previously described in the specification.
[0026] The disclosure of any document referred to herein is incorporated by reference into this patent application as part of the present disclosure, but only for purposes of written description and enablement and should in no way be used to limit, define, or otherwise construe any term of the present application where the present application, without such incorporation by reference, would not have failed to provide an ascertainable meaning. Any incorporation by reference does not, in and of itself, constitute any endorsement or ratification of any statement, opinion or argument contained in any incorporated document.
Claims
The claims defining the invention are as follows1. A photoactive transistor circuit module configured to implement a Leaky Integrate-and- Fire neuron, the photoactive transistor circuit module including a photoactive transistor, and a reset mechanism configured to modulate a gate voltage of the photoactive transistor circuit module so as to reset the Leaky Integrate-and-Fire neuron after the generation of an action potential by the photoactive transistor circuit module.
2. The photoactive transistor circuit module of claim 1, wherein the photoactive transistor includes a channel, and wherein the channel comprises a transition metal dichalcogenide material.
3. The photoactive transistor circuit module of claim 2, wherein the transition metal dichalcogenide material is a low-dimensional material.
4. The photoactive transistor circuit module of claim 2 or 3, wherein the transition metal dichalcogenide material includes molybdenum disulfide (M0S2).
5. The photoactive transistor circuit module of claim 4, wherein the transition metal dichalcogenide material includes a monolayer of molybdenum disulfide (M0S2).
6. The photoactive transistor circuit module of claim 4 or 5, wherein the molybdenum disulfide (M0S2) includes engineered defects having predetermined characteristics, the predetermined characteristics including a predetermined concentration of defects.
7. The photoactive transistor circuit module of any one of the preceding claims, wherein the photoactive transistor has a source terminal, drain terminal and a gate terminal.
8. The photoactive transistor circuit module of claim 7, wherein the reset mechanism includes a switching assembly for modulating a voltage at the gate terminal so as to reset the gate voltage of the photoactive transistor circuit module.
9. The photoactive transistor circuit module of claim 7 or 8, wherein the reset mechanism includes a switching assembly for modulating a voltage between the gate terminal and the drain terminal.
10. The photoactive transistor circuit module of claim 8 or 9, wherein the switching assembly is configured to selectively switch between a default terminal and a reset terminal, and wherein a reset voltage is applied to the gate terminal when the switching assembly switches to the reset terminal so as to reset the gate voltage of the photoactive transistor circuit module.
11. The photoactive transistor circuit module of claim 10, wherein the reset voltage is a negative voltage relative to the output voltage of the photoactive transistor circuit module.
12. The photoactive transistor circuit module of claim 10 or 11, wherein the reset voltage is about -1 Volts.
13. The photoactive transistor circuit module of any one of claims 2 to 12, wherein the transition metal dichalcogenide material is photosensitive such that electric conductivity of the photoactive transistor changes when the transition metal dichalcogenide material is exposed to light.
14. An optoelectronic sensing device including a plurality of photoactive transistor circuit modules, each photoactive transistor circuit module being a photoactive transistor circuit module according to any one of the preceding claims.
15. The optoelectronic sensing device of claim 14, wherein resolution of the optoelectronic sensing device is defined by a total number of photoactive transistor circuit modules in the optoelectronic sensing device.
16. The optoelectronic sensing device of claim 14 or 15, wherein photosensitive information from each photoactive transistor circuit module corresponds with a pixel of a digital image.
17. The optoelectronic sensing device of any one of the preceding claims, wherein output from the optoelectronic sensing device comprises an array of transient voltage or current spike signals.
18. The optoelectronic sensing device of any one of the preceding claims, wherein the plurality of photoactive transistor circuit modules implements a spiking neural network.
19. A neuromorphic processor including a plurality of photoactive transistor circuit modules, each photoactive transistor circuit module being a photoactive transistor circuit module according to any one of claims 1 to 13.
20. The neuromorphic processor of claim 19, wherein the plurality of photoactive transistor circuit modules implements a spiking neural network.
21. A vision processing system including one or more optoelectronic sensing devices according to any one of claims 14 to 18, each optoelectronic sensing device being configured to receive visual input and convert the visual input into an array of transient voltage or current spike signals, and one or more processors, each processor being operatively configured to receive output from the one or more optoelectronic sensing devices.
22. The vision processing system of claim 21, wherein at least one processor is a neuromorphic processor according to any one of claims 19 to 20.
23. The vision processing system of claim 21 or 22, wherein the visual input includes any one or both of static and dynamic visual input.
24. The vision processing system of any one of claims 21 to 23, wherein each processor is operatively configured classify the visual input received from the one or more optoelectronic sensing devices coupled thereto.
25. The vision processing system of claim 24, wherein each processor is operatively configured to classify the visual input based on one or more machine learning models, at least one machine learning model being trained to classify static visual input, themachine learning model including any one or more of a convolutional neural network layer, Leaky Integrate and Fire neural network layer and max pooling layer.
26. The vision processing system of claim 24, wherein each processor is operatively configured to classify the visual input based on one or more machine learning models, at least one machine learning model being trained to classify dynamic visual input, the machine learning model including any one or more of a convolutional neural network layer, batch normalisation layer, Leaky Integrate and Fire neural network layer and max pooling layer.
27. The vision processing system of any one of claims 21 to 26, further including one or more memory devices, the one or more memory devices being configured to provide weighted synapses for combination with output from the one or more optoelectronic sensing devices.
28. The visions processing system of claim 27, wherein the memory device includes a plurality of photoactive transistor circuit modules, each photoactive transistor circuit module being a photoactive transistor circuit module according to any one of claims 1 to 13.
29. The vision processing system of claim 27 or 28, further including a power regulator for regulating power to a light source based on the combination of output from the one or more optoelectronic sensing devices and weighted synapses from the one or more memory devices.
30. The vision processing system of claim 29, wherein the light source generates light signals for processing by the one or more processors.