Semiconductor substrate and method for producing same

Abstract

Provided are a semiconductor substrate comprising an Si substrate having a main surface with a (111) plane orientation, a 3C-SiC layer on the Si substrate, and a GaO2 layer on the 3C-SiC layer, and a method for producing the same. Thereby, a semiconductor substrate is provided, wherein high-quality GaO2 is grown on a large-diameter Si substrate.

Description

Semiconductor substrate and method for manufacturing the same

[0001] The present invention relates to a semiconductor substrate and a method for manufacturing the same.

[0002] The need for power devices is increasing in a very wide range of fields, including the electrification of automobiles and FA (Factory Automation). Furthermore, energy loss in power semiconductors can no longer be ignored, and research into energy-efficient structures is being conducted, yielding significant results.

[0003] While silicon-based power MOSFETs and IGBTs are predominant for this application, silicon has a bandgap of 1.1 eV, which naturally limits its voltage resistance.

[0004] Therefore, the use of materials other than silicon is being researched. This includes wide-bandgap materials with large band gaps such as GaN, SiC, and diamond, as well as oxide semiconductors such as GaO ２ YaGeO ２ There are others as well.

[0005] GaO ２ In particular, the α-type has a very large band gap of 5.3 eV, possesses high voltage resistance, and also has high radiation resistance, making it suitable for use in harsh environments (Non-Patent Document 1).

[0006] Furthermore, Non-Patent Document 1 describes α-type GaO ２ The lattice constant of this material has been reported to be 4.8. This value is very close to that of 3C-SiC (4.35), making heteroepitaxial growth possible.

[0007] Japanese Patent Publication No. 2024-023981

[0008] M. Biswas et. al. , “Thermodynamically metastable α-, ε-(or κ-), and γ-Ga2O3: From material growth to device applications”, APL Materials, 10, 060701 (2022)

[0009] However, when forming 3C-SiC on an Si(111) substrate, actually due to the lattice mismatch between Si and 3C-SiC, it is considered that there are still problems with the quality of the 3C-SiC surface on which GaO ２ is grown. The lattice constant of Si(111) is 3.84, which is the reason for the large lattice constant difference from 3C-SiC. For this reason, it is considered difficult to increase the diameter.

[0010] The present invention is made to solve the above problems, and an object thereof is to provide a semiconductor substrate in which high-quality GaO ２ is grown on a large-diameter Si substrate.

[0011] The present invention is made to achieve the above object, and provides a semiconductor substrate having an Si substrate with a main surface plane orientation of (111), a 3C-SiC layer on the Si substrate, and a GaO ２ layer on the 3C-SiC layer.

[0012] According to such a semiconductor substrate, deterioration of crystal quality due to lattice mismatch is suppressed, and a semiconductor substrate in which GaO ２ is grown on a large-diameter Si substrate is obtained.

[0013] At this time, the Si substrate may have voids at the interface between the Si substrate and the 3C-SiC layer.

[0014] Thereby, the stress generated due to lattice mismatch can be further relaxed.

[0015] At this time, a carbon-doped Si layer may be further provided between the Si substrate and the 3C-SiC layer.

[0016] Thereby, deterioration of crystal quality due to lattice mismatch is further suppressed, and a semiconductor substrate in which GaO ２ is grown on a large-diameter Si substrate is obtained.

[0017] At this time, the carbon-doped Si layer may have voids at the interface between the carbon-doped Si layer and the 3C-SiC layer.

[0018] Thereby, the stress generated due to lattice mismatch can be further relaxed.

[0019] The present invention is also made to achieve the above object, and includes a step of removing a natural oxide film on the surface of a Si substrate having a plane orientation of (111) on the main surface by hydrogen baking, and a step of forming a 3C-SiC layer on the Si substrate using a source gas containing carbon and silicon, and forming a GaO ２ layer on the 3C-SiC layer, and provides a method for manufacturing a semiconductor substrate.

[0020] According to such a semiconductor substrate, deterioration of crystal quality due to lattice mismatch can be suppressed, and a semiconductor substrate in which GaO ２ is grown on a large-diameter Si substrate can be manufactured.

[0021] At this time, between the step of removing the natural oxide film by hydrogen baking and the step of forming the 3C-SiC layer, a step of forming a carbon-doped Si layer on the Si substrate using a source gas containing carbon and silicon may be further included.

[0022] Thereby, deterioration of crystal quality due to lattice mismatch can be further suppressed, and a semiconductor substrate in which GaO ２ is grown on a large-diameter Si substrate can be manufactured.

[0023] As described above, according to the semiconductor substrate of the present invention, deterioration of crystal quality due to lattice mismatch is suppressed, and a semiconductor substrate in which GaO ２ is grown on a large-diameter Si substrate is obtained. Further, according to the method for manufacturing a semiconductor substrate of the present invention, deterioration of crystal quality due to lattice mismatch is suppressed, and a semiconductor substrate in which GaO ２ is grown on a large-diameter Si substrate can be manufactured.

[0024] An example of a cross-sectional structure of a semiconductor substrate according to a first embodiment of the present invention is shown. An example of a cross-sectional structure of a semiconductor substrate according to a second embodiment of the present invention is shown. An example of a process flow of a method for manufacturing a semiconductor substrate according to a first embodiment of the present invention is shown. An example of a process flow of a method for manufacturing a semiconductor substrate according to a second embodiment of the present invention is shown.

[0025] Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

[0026] As mentioned above, high-quality GaO is used on a large-diameter Si substrate. ２ There was a need for semiconductor substrates that could grow this material.

[0027] As a result of diligent research into the above problems, the present inventors have found a Si substrate with a main surface orientation of (111), a 3C-SiC layer on the Si substrate, and GaO on the 3C-SiC layer. ２ By using a semiconductor substrate having layers, the degradation of crystal quality due to lattice mismatch is suppressed, and GaO is applied to a large-diameter Si substrate. ２ We discovered that this material can be grown into a semiconductor substrate, thus completing the present invention.

[0028] The inventors have also conducted extensive research on the above problem and have come up with a method comprising: removing the native oxide film on the surface of a Si substrate with a main surface orientation of (111) by hydrogen baking; forming a 3C-SiC layer on the Si substrate using a source gas containing carbon and silicon; and forming a GaO layer on the 3C-SiC layer. ２ A semiconductor substrate manufacturing method that includes a step of forming a layer suppresses the deterioration of crystal quality due to lattice mismatch, and allows GaO to be applied to a large-diameter Si substrate. ２ We discovered that it is possible to manufacture semiconductor substrates by growing [the material], and thus completed the present invention.

[0029] In other words, this invention relates to a gallium oxide substrate that is a wide-bandgap semiconductor, and more specifically, to a virtual gallium oxide substrate having a single crystal 3C-SiC on a silicon substrate, with gallium oxide formed on top of it.

[0030] Embodiments of the present invention will be described below with reference to the drawings.

[0031] [Semiconductor Substrate] Figure 1 shows an example of the cross-sectional structure of a semiconductor substrate according to the first embodiment of the present invention. As shown in Figure 1, the semiconductor substrate 1 according to the first embodiment of the present invention comprises a Si substrate (Si(111) substrate) 2 with a main surface orientation of (111), a 3C-SiC layer 4 on the Si(111) substrate 2, and GaO on the 3C-SiC layer 4. ２ It is a semiconductor substrate having layer 5.

[0032] The Si(111) substrate 2 can be a Si substrate with a diameter of 300 mm, but is not limited to this, and may be a Si substrate with a diameter of 300 mm or more.

[0033] The semiconductor substrate 1 may further include a Si(111) substrate 3 having vacancies intentionally formed at the interface between the Si(111) substrate 2 and the 3C-SiC layer 4. This allows for further relaxation of stresses caused by lattice mismatch.

[0034] Figure 2 shows an example of the cross-sectional structure of a semiconductor substrate according to the second embodiment of the present invention. As shown in Figure 2, the semiconductor substrate 10 according to the second embodiment of the present invention comprises a Si(111) substrate 2, a 3C-SiC layer 4, and GaO ２ The semiconductor substrate has a layer 5, and may further have a carbon-doped Si layer 6 between the Si(111) substrate 2 and the 3C-SiC layer 4.

[0035] This further suppresses the degradation of crystal quality due to lattice mismatch, and allows GaO to be applied to large-diameter Si substrates. ２ This will become a semiconductor substrate through growth.

[0036] The semiconductor substrate 10 may further have a carbon-doped Si layer 7 having vacancies intentionally formed at the interface between the carbon-doped Si layer 6 and the 3C-SiC layer 4. This further reduces stress caused by lattice mismatch. Note that the carbon-doped Si layer 6 may also contain vacancies smaller than those in the carbon-doped Si layer 7.

[0037] The thickness of each of the above layers, the carbon concentration of the carbon-doped Si layer, etc., will be described in detail in the semiconductor substrate manufacturing method described later.

[0038] [Method for Manufacturing Semiconductor Substrates] Next, the method for manufacturing semiconductor substrates according to the present invention will be described. Figure 3 shows an example of a process flow for the method for manufacturing semiconductor substrates according to the first embodiment of the present invention. As shown in Figure 3, the method for manufacturing semiconductor substrates according to the first embodiment of the present invention includes the steps of: (S1) removing the native oxide film on the surface of a Si substrate (Si(111) substrate) 2 with a main surface orientation of (111) by hydrogen baking; (S2) forming a 3C-SiC layer 4 on the Si(111) substrate 2 using a source gas containing carbon and silicon; and forming a GaO layer on the 3C-SiC layer 4. ２ The process includes the step of forming layer 5 (S3). In this case, during the process using a reduced-pressure CVD apparatus, it becomes possible to form voids in the Si(111) substrate 2 at the interface between the Si(111) substrate 2 and the 3C-SiC layer 4 (forming a Si(111) substrate (with voids) 3).

[0039] (Step to remove native oxide film by hydrogen baking: S1) First, a single crystal silicon substrate (Si(111) substrate) 2 is placed in a reduced pressure (RP-)CVD apparatus, and the native oxide film on the surface is removed by hydrogen baking (H ２ Removed by annealing.

[0040] By removing the amorphous silicon oxide film on the outermost surface of the Si(111) substrate 2, it becomes possible to grow a carbon-doped silicon epitaxial layer on the Si(111) substrate 2. ２ Annealing is preferably carried out at a temperature of 1000°C to 1200°C. Within this temperature range, the occurrence of slip dislocations can be effectively suppressed, and the residue of the native oxide film can be prevented with an efficient processing time. Also, H at this time ２ There are no particular restrictions on the annealing pressure or time, as long as it is sufficient to remove the native oxide film.

[0041] (Step to form the 3C-SiC layer: S2) Next, the gas type, gas flow rate, and temperature are controlled to grow the 3C-SiC layer 4 on the Si(111) substrate 2. Specifically, the Si(111) substrate 2 is preferably set to a temperature of 300°C to 1100°C, and a source gas containing carbon and silicon, such as monomethylsilane or trimethylsilane, is introduced as a raw material gas for SiC to form SiC nuclei. Compared to Si, C atoms are smaller and more easily vaporized, so trimethylsilane is easier to adjust the growth conditions for when considering raw material efficiency.

[0042] SiC nucleation can be performed on the surface of the Si(111) substrate 2 at a pressure of 100 Torr (13332 Pa) or less and a temperature of 300°C or higher. However, since epitaxial growth of SiC is promoted at temperatures of 800°C or higher, it is more preferable to set the SiC nucleation temperature to 800°C or higher so that SiC nucleation and the formation of the 3C-SiC layer 4 can be performed under the same conditions. Furthermore, if the temperature is 1100°C or lower, polycrystallization and the adhesion of by-products to the inner wall of the CVD apparatus can be effectively suppressed. This is presumed to be because at high temperatures, molecules adsorbed on the substrate surface desorb before epitaxial growth, causing a gas-phase reaction.

[0043] Furthermore, the growth pressure in the formation process of the 3C-SiC layer (3C-SiC single crystal film) 4 is preferably 100 Torr or less. If the growth pressure is 100 Torr or less, polycrystallization of 3C-SiC can be effectively prevented. If the pressure is 10 Torr (1333 Pa) or less, and more preferably 1 Torr (133 Pa) or less, vacancies will be formed directly beneath the 3C-SiC layer 4, and the effect of relaxing the stress on the entire epitaxial layer can be obtained.

[0044] Since the film thickness of the 3C-SiC layer 4 depends on pressure and temperature, the film formation time can be appropriately set based on the pressure and temperature conditions set to achieve the desired film thickness. Preferably, the film thickness of the 3C-SiC layer 4 can be between 100 nm and 1000 nm. With a thickness in this range, 3C-SiC can be grown in an efficient amount of time, and a sufficient amount of pores can be formed at the interface between the Si(111) substrate 2 and the 3C-SiC layer 4.

[0045] Furthermore, during the epitaxial growth of the 3C-SiC layer 4, silicon used for 3C-SiC growth is supplied from the Si(111) substrate 2 in addition to the gas used during epitaxial growth, thereby forming vacancies in the Si(111) substrate 2.

[0046] (GaO ２ Step to form the layer: S3) Finally, GaO ２ A film is formed using GaO ２ Layer 5 is formed. There are no restrictions on the film formation method at this stage, but methods such as mist CVD are commonly used for the production of oxide semiconductors. Here, for example, reference can be made to Patent Document 1, etc.

[0047] GaO ２ There are no particular restrictions on the thickness of layer 5; it is determined by the thickness required to maintain the actual device's pressure resistance.

[0048] Figure 4 shows an example of a process flow for a semiconductor substrate manufacturing method according to the second embodiment of the present invention. As shown in Figure 4, the semiconductor substrate manufacturing method according to the second embodiment of the present invention further includes a step (S1a) of forming a carbon-doped Si layer 6 on a Si(111) substrate 2 using a source gas containing carbon and silicon, between the step (S1) of removing the native oxide film by hydrogen baking and the step (S2) of forming a 3C-SiC layer 4. In this case, during the process using a reduced-pressure CVD apparatus, it becomes possible to form vacancies in the carbon-containing silicon layer and the carbon-containing silicon layer at the 3C-SiC interface (forming a carbon-doped Si layer (with vacancies) 7).

[0049] (Step to remove the native oxide film by hydrogen baking: S1) The step to remove the native oxide film by hydrogen baking (S1) is the same as in the first embodiment, so the explanation is omitted.

[0050] (Step of forming a carbon-doped Si layer: S1a) Next, a carbon-doped Si layer 6 is formed on the Si(111) substrate 2 under reduced pressure using a vacuum CVD apparatus, controlling the gas type, gas flow rate, and temperature. Specifically, for example, the carbon-doped Si layer 6 is epitaxially grown using a gas obtained by mixing trimethylsilane, monomethylsilane, or monosilane gas with a carbon source. At this time, by forming the film at a growth temperature preferably in the range of 700°C to 900°C, and more preferably in the range of 730°C to 750°C, it is possible to obtain a carbon-doped epitaxial layer with fewer defects.

[0051] The amount of carbon doping is 1 × 10⁻⁶ ２０ ~4 x 10 ２１ atoms / cm ３ This can be achieved. Within this range of carbon concentration, the effect of doped carbon is more reliably exerted, and the 3C-SiC layer 4 can be single-crystallized more effectively.

[0052] The thickness of the carbon-doped Si layer 6 is not particularly limited and can be changed at any time, but it is preferably between approximately 1 nm and 1000 nm. With a film thickness in this range, the film can be formed in an efficient time, and the carbon can escape from the substitution site, allowing for more effective vacancy formation.

[0053] This further suppresses the degradation of crystal quality due to lattice mismatch, and allows GaO to be applied to large-diameter Si substrates. ２ It is possible to manufacture semiconductor substrates by growing these materials.

[0054] (Step for forming the 3C-SiC layer: S2) Regarding the step for forming the 3C-SiC layer (S2), explanations will be omitted for those aspects that are the same as those for the semiconductor substrate manufacturing method according to the first embodiment (source gas type, growth temperature, growth pressure, film thickness, etc.).

[0055] SiC nucleation can be performed, for example, on the surface of the carbon-doped Si layer 6 at a pressure of 100 Torr (13332 Pa) or less and a temperature of 300°C or higher. However, since epitaxial growth of SiC is promoted at temperatures of 800°C or higher, it is more preferable to set the SiC nucleation temperature to 800°C or higher so that SiC nucleation and the formation of the 3C-SiC layer 4 can be performed under the same conditions. Furthermore, at temperatures of 1100°C or lower, polycrystallization and the adhesion of by-products to the inner wall of the CVD apparatus can be effectively suppressed. This is presumed to be because at high temperatures, molecules adsorbed on the substrate surface desorb before epitaxial growth, causing a gas-phase reaction.

[0056] During the epitaxial growth of the 3C-SiC layer 4, numerous tiny vacancies are formed as carbon atoms in the carbon-doped Si layer 6 escape from their substitution positions. Furthermore, silicon is supplied to the 3C-SiC layer 4 during its growth not only from the gas used during epitaxial growth but also from the carbon-doped Si layer 6, leading to the formation of vacancies in the carbon-doped Si layer 6. In other words, vacancies of different sizes and densities are formed by these two effects.

[0057] In other words, the vacancies formed in the carbon-doped Si layer (with vacancies) 7 are created by using the silicon of the substrate as the silicon source when growing 3C-SiC, and by the removal of carbon at the substitution sites in the carbon-doped silicon layer during the heat treatment process during 3C-SiC epitaxial growth.

[0058] (GaO ２ Layer formation process: S3) GaO ２ The step of forming the layer (S3) is the same as the semiconductor substrate manufacturing method according to the first embodiment, so its explanation will be omitted.

[0059] The present invention will be described in detail below with reference to examples, but this is not intended to limit the present invention.

[0060] (Example 1) A boron-doped high-resistance single-crystal silicon substrate with a diameter of 300 mm, a crystal orientation of (111), was prepared. The silicon substrate was placed on a susceptor in the reactor of a reduced-pressure CVD apparatus, and CVD was performed at 1080°C for 1 minute. ２We performed annealing.

[0061] Next, trimethylsilane gas was introduced at a growth temperature of 900°C and a growth pressure of 5 Torr to perform SiC nucleation and grow a 3C-SiC single crystal film. After 60 minutes of growth, a 3C-SiC single crystal film with a thickness of 200 nm was grown.

[0062] Next, GaO is processed by the mist CVD method. ２ The material was grown to a thickness of 1 μm to obtain the semiconductor substrate of the desired first embodiment.

[0063] GaO obtained from semiconductor substrate ２ XRD (X-ray Diffraction) analysis of the layer revealed high-quality single-crystal GaO ２ It was a layer.

[0064] (Example 2) A boron-doped high-resistance single-crystal silicon substrate with a diameter of 300 mm, a crystal orientation of (111), was prepared. The silicon substrate was placed on a susceptor in the reactor of a reduced-pressure CVD apparatus, and CVD was performed at 1080°C for 1 minute. ２ We performed annealing.

[0065] Next, using trimethylsilane as the source gas, carbon is converted to 4 × 10¹⁶ carbon atoms at 700°C and 10 Torr. ２１ atoms / cm ３ A doped Si layer was grown to a thickness of 500 nm.

[0066] Next, trimethylsilane gas was introduced at a growth temperature of 900°C and a growth pressure of 5 Torr to perform SiC nucleation and grow a 3C-SiC single crystal film. After 60 minutes of growth, a 3C-SiC single crystal film with a thickness of 200 nm was grown.

[0067] Next, GaO is processed by the mist CVD method. ２ The material was grown to a thickness of 1 μm to obtain the semiconductor substrate of the desired second embodiment.

[0068] GaO obtained from semiconductor substrate ２ XRD (X-ray Diffraction) analysis of the layer revealed high-quality single-crystal GaO ２ It was a layer.

[0069] As described above, according to the embodiments of the present invention, high-quality GaO is formed on a Si substrate.２ We were able to manufacture a semiconductor substrate with layers formed on it. This indicates that the lattice mismatch of the semiconductor substrate was mitigated. Furthermore, we were able to manufacture a large-diameter (300 mm diameter) Si substrate with GaO ２ We were able to manufacture semiconductor substrates using this technology.

[0070] It should be noted that the present invention is not limited to the embodiments described above. The embodiments described above are illustrative, and any configuration that is substantially identical to the technical idea described in the claims of the present invention and achieves similar effects is included within the technical scope of the present invention.

Claims

1. A Si substrate with a main surface orientation of (111), a 3C-SiC layer on the Si substrate, and GaO on the 3C-SiC layer. ２ A semiconductor substrate characterized by having layers.

2. The semiconductor substrate according to claim 1, characterized in that the Si substrate has vacancies at the interface between the Si substrate and the 3C-SiC layer.

3. The semiconductor substrate according to claim 1 or 2, characterized in that it further has a carbon-doped Si layer between the Si substrate and the 3C-SiC layer.

4. The semiconductor substrate according to claim 3, characterized in that the carbon-doped Si layer has vacancies at the interface between the carbon-doped Si layer and the 3C-SiC layer.

5. A step of removing the native oxide film on the surface of a Si substrate with a main surface orientation of (111) by hydrogen baking; a step of forming a 3C-SiC layer on the Si substrate using a source gas containing carbon and silicon; and a step of forming GaO on the 3C-SiC layer. ２ A method for manufacturing a semiconductor substrate, characterized by including a step of forming a layer.

6. The method for manufacturing a semiconductor substrate according to claim 5, further comprising a step of forming a carbon-doped Si layer on the Si substrate using a source gas containing carbon and silicon, between the step of removing the native oxide film by hydrogen baking and the step of forming the 3C-SiC layer.

Images