Capacitor having double electrode layer

Abstract

The present invention provides a capacitor having a double electrode layer in which the thickness of the double electrode layer per one super cycle can be finely adjusted to be 1 nm to 2 nm by a tin doped molybdenum oxide (TMO) process having one super cycle of an atomic layer deposition process including a Mo deposition sub-cycle for forming a Mo oxide layer and a Sn oxide doping sub-cycle for doping the Sn oxide, thereby reducing an equivalent oxide thickness and a leakage current and increasing a dielectric constant.

Description

capacitor having a double electrode layer

[0001] The present invention relates to a capacitor, and more specifically, to a capacitor having a double electrode layer for achieving high performance in next-generation DRAM.

[0002] With the miniaturization of capacitor devices, there is a need for technology to improve capacitance and suppress leakage current.

[0003] Currently, TiN-based upper and lower electrodes are generally used as electrode materials for capacitors, while ZrO2 / Al2O3 / ZrO2 or HfO2 / ZrO2-based materials are applied as dielectric film materials. However, as future miniaturization leads to a decrease in dielectric film thickness and a reduction in capacitor area, there are issues regarding increased leakage current and decreased capacitance. Therefore, it is necessary to develop new materials and new deposition process methods for these materials to suppress leakage current and enhance capacitor capacitance.

[0004] Molybdenum oxide is attracting attention as a material that can replace TiN-based electrode materials, but generally, molybdenum trioxide (MoO3) is the stable phase, and it is known that most molybdenum oxide deposition techniques form molybdenum trioxide.

[0005] However, molybdenum trioxide is a non-conductive material, making it impossible to use as an electrode material for next-generation DRAM.

[0006] On the other hand, molybdenum dioxide (MoO2) exhibits excellent conductivity despite being an oxide and possesses a high work function and a rutile crystal structure. Since combining it with titanium dioxide (TiO2) offers the advantage of producing rutile TiO2 with a high dielectric constant, the development of a process for forming molybdenum dioxide, or MoO2, thin films is very important.

[0007] While it is known that molybdenum dioxide thin films can be formed using pulse laser deposition or solution processes, for application in DRAM capacitors, it is essential to be able to form molybdenum dioxide using atomic layer deposition (ALD).

[0008] In addition, it is required to achieve miniaturization of the capacitor device of the DRAM by minimizing the equivalent oxide thickness of molybdenum dioxide.

[0009] The present invention aims to provide a capacitor having a double electrode layer that reduces leakage current and improves dielectric constant while reducing thickness by having a lower electrode having a double electrode layer comprising an electrode substrate and a Sn oxide-doped Mo oxide layer (TMO layer) whose deposition thickness is controlled to a thickness of 1 nm to 2 nm per super cycle of an atomic layer deposition process.

[0010] However, the problem that the present invention aims to solve is not limited to the problem mentioned above, and may be expanded in various ways without departing from the spirit and scope of the present invention.

[0011] An embodiment of the present invention provides a capacitor comprising a double electrode layer, a dielectric layer formed on top of the double electrode layer, and an electrode layer formed on top of the dielectric layer, wherein the double electrode layer comprises an electrode substrate layer; and a Sn oxide-doped Mo oxide layer formed on top of the electrode substrate layer, and wherein the deposition thickness of the Sn oxide-doped Mo oxide layer is controlled by controlling the number of supercycles of an atomic layer deposition process comprising a Mo deposition subcycle forming the Mo oxide layer and a Sn oxide doping subcycle doping the Sn oxide.

[0012] The above Sn oxide-doped Mo oxide layer can be deposited with a thickness of 1 nm to 2 nm per supercycle of the atomic layer deposition process.

[0013] The electrode substrate layer may include one or more selected from the group comprising Zr, Hi, TiOx, TiN, Ti, TiON, Ta, TaN, TaSi, TaCN, TiAIN, TiSiN, Zn, ZnO, Ni, NiSi, C, Si, SiOx, SiNx, SiONx, Ge, Pt, Ru, RuO2, Mo, MoN, MoC, AI, AIN, Y, Gd, Sr, W, WSi, WN, Ga, GaN, and NbN.

[0014] The thickness of the Sn oxide-doped Mo oxide layer is controlled such that the ratio of the number of times the Mo deposition subcycle and the Sn oxide-doped subcycle are performed is 100:1 to 100:20, thereby controlling the thickness of the Sn oxide-doped MoO2 layer deposited per supercycle to a range of 1 nm to 2 nm.

[0015] In addition, depending on the ratio of the number of times the Mo deposition subcycle to the Sn doping subcycle of the above atomic layer deposition process is performed to 100:1 to 10:1, the Sn doping concentration can be controlled to 6.63% to 29.12%.

[0016] The above Sn oxide-doped Mo oxide layer may have an equivalent oxide thickness (EOT) of at least 0.4 nm. The above Sn oxide-doped Mo oxide layer may be crystallized by performing post-heat treatment after deposition.

[0017] The above Sn oxide-doped Mo oxide layer may have a rutile structure through crystallization by performing post-heat treatment at 400 ℃ to 700 ℃. The above Sn oxide-doped Mo oxide layer has a rutile structure, with a minimum of 1 x 10 -4A / cm 2 It can have leakage current.

[0018] The above Sn oxide-doped Mo oxide layer may have a rutile structure by performing additional heat treatment after deposition. The additional heat treatment may be a step of heat treatment at a temperature of 350°C to 600°C for 2 to 7 minutes in a nitrogen gas or inert gas atmosphere. Preferably, the heat treatment time of the additional heat treatment step may be 4 to 5 minutes.

[0019] Another embodiment of the present invention comprises the steps of: forming a double electrode layer comprising an electrode substrate layer and a Sn oxide-doped MoO2 layer; forming a dielectric layer on top of the Sn oxide-doped MoO2 layer and forming an upper electrode layer on top of the dielectric layer, wherein the step of forming the double electrode layer comprises forming a MoO2 layer on top of the electrode substrate layer by a Mo deposition subcycle that performs an atomic layer deposition process using a Mo precursor and an oxidation reactant. x A method for manufacturing a capacitor is provided, comprising the steps of: forming a layer; and forming the MoOx layer into a Sn oxide-doped MoO2 layer by performing an atomic layer deposition process using Sn precursors and oxidation reactants in a Sn oxide doping subcycle.

[0020] The above Mo deposition subcycle comprises a Mo layer deposition process in which a Mo layer is deposited on an electrode substrate by atomic layer deposition of the Mo precursor, and an oxidation reactant is injected to deposit the Mo layer onto the MoO x It may include an oxidation pulse process that oxidizes into a layer.

[0021] The above Sn oxide doping subcycle involves injecting a Sn precursor to the MoO xIt may include an Sn precursor doping process that performs a purge process after doping Sn into a layer; and an Sn oxidation source pulse process that performs a purge process after injecting an oxidation reactant to convert the Sn into Sn oxide.

[0022] The above Sn oxide-doped MoO2 layer may have a rutile structure by performing additional heat treatment after deposition. The additional heat treatment may be performed at a temperature of 350°C to 600°C for 2 to 7 minutes in a nitrogen gas or inert gas atmosphere. Preferably, the heat treatment time of the additional heat treatment step may be 4 to 5 minutes.

[0023] The step of forming the double electrode layer can be controlled by controlling the ratio of the number of times the Mo deposition subcycle and the Sn oxide doping subcycle are performed to 100:1 to 100:20, thereby controlling the thickness of the Sn oxide doping MoO2 layer deposited per supercycle to a range of 1 nm to 2 nm.

[0024] In addition, when the above Sn oxide-doped MoO2 layer is deposited on the electrode substrate layer, a dual electrode effect can be exhibited at a thickness of 1 nm to 20 nm.

[0025] The above capacitor manufacturing method may further include a post-heat treatment step in which the capacitor having the dielectric layer formed thereon is heat-treated in an air atmosphere at a temperature of 400°C to 700°C to remove oxygen defects and smooth the surface to reduce leakage current.

[0026] The example enables fine control of the thickness of the double electrode layer to 1 nm to 2 nm per supercycle by a TMO (Tin doped Molybdenum Oxide) process having one supercycle of an atomic layer deposition process including a Mo deposition subcycle for forming the Mo oxide layer and a Sn oxide doping subcycle for doping the Sn oxide.

[0027] The example controls the ratio of the number of times the Mo deposition subcycle and the Sn oxide doping subcycle are performed to 100:1 to 100:20, thereby enabling the thickness of the Sn oxide-doped Mo oxide layer to be finely controlled in the range of 1 nm to 22 nm.

[0028] The embodiment allows the relative permittivity of the double electrode layer to be easily controlled in the range of 82 when performing 1 supercycle (1 TMO) to 129 when performing 20 supercycles (20 TMO).

[0029] The example enables the realization of a high-performance capacitor by applying a dual electrode layer containing TMO, thereby achieving high dielectric constant and low leakage current through structural similarity with a dielectric layer deposited with TiO2, while simultaneously securing conductivity through the dual electrode layer (bottom electrode).

[0030] The effects of the present invention are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art from the description below.

[0031] FIG. 1 is a perspective view of a capacitor (1) having a double electrode layer (2) of one embodiment of the present invention.

[0032] FIG. 2 is a flowchart showing the processing steps of a method for manufacturing a capacitor having a double electrode layer (2) according to the present invention.

[0033] Figure 3 is a process diagram of the Mo deposition subcycle (MoOx, sub-cycle) (S10) and Sn oxide doping subcycle (SnOx, sub-cycle) (S20) of Figure 2.

[0034] FIG. 4 is a perspective view of a capacitor (100) of an experimental example.

[0035] Figure 5 is a graph showing the XRD measurement results of Mo layers produced by Mo deposition subcycles at different temperatures.

[0036] Figure 6 is a graph showing the change in Mo deposition thickness according to the oxygen pulse supply time and material supply time of the Mo deposition subcycle.

[0037] Figure 7 is a graph showing the change in Sn concentration according to the ratio of the number of times the Mo deposition subcycle to the Sn doping subcycle is performed.

[0038] 8 is (N t This is a graph showing the deposition thickness of a Sn-doped MoO2 layer (Sn oxide-doped Mo oxide layer) per supercycle when the ratio of the Mo deposition subcycle to the Sn doping subcycle is 33 to 1 when a Bu)2(Nme2)2Mo precursor is applied.

[0039] Figure 9 is a graph of XRD measurement results showing that the Sn-doped MoO2 layer has a rutile structure.

[0040] Figure 10 is a graph showing the change in resistivity according to Sn concentration.

[0041] Figure 11 is an SEM image of a Sn-doped MoO2 layer showing an increase in thermal stability of the Sn-doped MoO2 layer after post-deposition annealing (PDA).

[0042] Figure 12 is a graph showing the change in equivalent oxide thickness (EOT) and relative permittivity (εr) according to the physical thickness of the Sn-doped MoO2 layer per supercycle.

[0043] Figure 13 is a diagram showing the change in potential barrier according to the thickness of the TiO2 layer (dielectric layer).

[0044] Figure 14 is a diagram showing a post-heat treatment (S50) process.

[0045] Figure 15 is a graph showing the change in leakage current according to the equivalent oxide thickness (EOT) relative to the physical thickness of the Sn-doped MoO2 layer.

[0046] Figure 16 is a graph comparing the leakage current of Sn-doped MoO2 layers of different thicknesses according to voltage.

[0047] Specific structural or functional descriptions of embodiments according to the concept of the present invention disclosed herein are provided merely for the purpose of explaining embodiments according to the concept of the present invention, and embodiments according to the concept of the present invention may be implemented in various forms and are not limited to the embodiments described herein.

[0048] Embodiments according to the concept of the present invention may be subject to various modifications and may take various forms; therefore, embodiments are illustrated in the drawings and described in detail in this specification. However, this is not intended to limit the embodiments according to the concept of the present invention to specific disclosed forms, and includes modifications, equivalents, or substitutions that fall within the spirit and scope of the present invention.

[0049] Terms such as "first" or "second" may be used to describe various components, but said components should not be limited by said terms. For the sole purpose of distinguishing one component from another, for example, without departing from the scope of rights according to the concept of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component.

[0050] When it is stated that one component is "connected" or "connected" to another component, it should be understood that while it may be directly connected or connected to that other component, there may also be other components in between. Conversely, when it is stated that one component is "directly connected" or "directly connected" to another component, it should be understood that there are no other components in between. Expressions describing the relationships between components, such as "between," "exactly between," or "directly adjacent to," should be interpreted in the same way.

[0051] The terms used herein are used merely to describe specific embodiments and are not intended to limit the invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this specification, terms such as “comprising” or “having” are intended to specify the existence of the described features, numbers, steps, actions, components, parts, or combinations thereof, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0052] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as generally understood by those skilled in the art to which the present invention pertains. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and should not be interpreted in an ideal or overly formal sense unless explicitly defined in this specification.

[0053] Hereinafter, embodiments will be described in detail with reference to the attached drawings. However, the scope of the patent application is not limited or restricted by these embodiments. Identical reference numerals in each drawing indicate identical components.

[0054] FIG. 1 is a perspective view of a capacitor (1) having a double electrode layer (2) of one embodiment of the present invention.

[0055] As shown in FIG. 1, the capacitor (1) may be configured to include a double electrode layer (2) comprising an electrode substrate layer (10) and a Sn oxide-doped Mo oxide layer (20), a dielectric layer (30), and an upper electrode layer (40).

[0056] The dual electrode layer (2) may be a TMO layer comprising an electrode substrate layer (10) and a Sn oxide-doped Mo oxide layer (20).

[0057] The deposition thickness of the above Sn oxide-doped Mo oxide layer (20) can be controlled by adjusting the number of supercycles of an atomic layer deposition process including a Mo deposition subcycle forming the above Mo oxide layer (20) and a Sn oxide doping subcycle doping the above Sn oxide.

[0058] The above Sn oxide-doped Mo oxide layer (20) can be deposited with a thickness of 1 nm to 2 nm per supercycle of the atomic layer deposition process.

[0059] The thickness of the Sn oxide-doped Mo oxide layer (20) can be controlled in the range of 1 nm to 22 nm by controlling the ratio of the number of times the Mo deposition subcycle and the Sn oxide doping subcycle are performed to 100:1 to 100:20. At this time, when the Sn oxide-doped MoO2 layer is deposited on the electrode substrate layer, a dual electrode effect can be exhibited at a thickness of 1 nm to 20 nm. The Sn oxide-doped Mo oxide layer (20) can have an Equivalent Oxide Thickness (EOT) of at least 0.4 nm. The Sn oxide-doped Mo oxide layer can be crystallized by performing heat treatment after deposition. The Sn oxide-doped Mo oxide layer (20) can have a rutile structure by crystallization through post-heat treatment at 400 ℃ to 700 ℃. The above Sn oxide-doped Mo oxide layer (20) has a rutile structure, so the leakage current is 1 x 10 -4 A / cm 2 It decreased to.

[0060] The electrode material forming the electrode substrate layer (10) and the upper electrode layer (40) may include one or more of Zr, Hi, TiOx, TiN, Ti, TiON, Ta, TaN, TaSi, TaCN, TiAIN, Zn, ZnO, Ni, NiSi, C, Si, SiOx, SiNx, SiONx, Ge, Pt, Ru, RuO2, MoN, MoC, AI, AIN, Y, Gd, Sr, W, WSi, WN, Ga, GaN, and compounds thereof, but is not limited thereto.

[0061] The dielectric material forming the dielectric layer (30) may be HfOx, ZrOx, TiOx, HfZrOx, HfTiOx, HfSiOx, Al2O3, etc., but is not limited thereto.

[0062] FIG. 2 is a flowchart showing the processing steps of a method for manufacturing a capacitor having a double electrode layer (2) according to the present invention, and FIG. 3 is a process diagram of the Mo deposition subcycle (MoOx, sub-cycle) (S10) and Sn oxide doping subcycle (SnOx, sub-cycle) (S20) of FIG. 2.

[0063] As shown in FIGS. 2 and 3, the capacitor manufacturing method of the embodiment may include a step of forming a double electrode layer including a step of forming a MoOx layer (S10) and a step of forming a MoO2 layer doped with Sn oxide (S20), a step of forming a dielectric layer (S30), a step of forming an upper electrode layer (S40), and a post-heat treatment step (S50).

[0064] The step (S10) of forming the above MoOx layer may be a step of forming a MoOx layer on top of an electrode substrate layer (10) by a Mo deposition subcycle that performs an atomic layer deposition process using a Mo precursor and an oxidation reactant. Here, x is 3 (MoO3) or 1 1 / 4 (Mo4O). 11 It can be ) etc.

[0065] The Mo precursor is MoCl5, Mo(NMe2)4, Mo(NEt2)4, Mo2(NMe2)6, Mo(tBuN)2(NMe2)2, Mo(tBuN)2(NEt2)2, Mo(NEtMe)4, Mo(NtBu)2(StBu)2, Mo(NtBu)2(iPr2AMD)2Mo(thd)3, MoO2(acac), MoO2(thd)2, MoO2(iPr2AMD)2Mo(CO)6, Mo(Cp)2H2, Mo(iPrCp)2H2, Mo(η 6 -ethylbenzene)2, MoCp(CO)2(η 3 It may include at least one of -allyl), and MoCp(CO)2(NO), but is not limited to such materials.

[0066] The above Mo deposition subcycle may include a Mo layer deposition process that deposits a Mo layer on an electrode substrate by the above Mo precursor atomic layer deposition, and an oxidation pulse process that oxidizes the Mo layer to the MoOx layer by injecting an oxidation reactant.

[0067] The above Sn oxide doping subcycle may include a Sn precursor doping process in which Sn is doped into the MoOx layer by injecting a Sn precursor and then a purge process is performed; and a Sn oxidation source pulse process in which an oxidation reactant is injected to convert the Sn into Sn oxide and then a purge process is performed.

[0068] The above Sn precursor may include at least one of Tetrakis(dimethylamino)tin (TDMASn), Tetraethyltin (TET), tetramethyltin (TMT), Tin(II)acetylacetonate (Sn(acac)2), SnCl4, dimethylamino-2-methyl-2-propoxy-tin(II) (Sn(dmamp)2), and Bis[bis(trimethylsilyl)amino]tin(II), but is not limited to these substances.

[0069] The above oxidation reactant may be a reactant based on at least one of O2, H2O, O3, oxygen atoms, oxygen radicals, and oxygen plasma.

[0070] The step (S20) of forming the above-mentioned Sn oxide-doped MoO2 layer may be a step of forming the above-mentioned MoOx layer into the above-mentioned Sn oxide-doped MoO2 layer (20) by a Sn oxide doping subcycle that performs an atomic layer deposition process using a Sn precursor and an oxidation reactant.

[0071] The above Sn oxide-doped Mo oxide layer may have a rutile structure by performing additional heat treatment after deposition. The additional heat treatment may be performed at a temperature of 350°C to 600°C for 2 to 7 minutes in a nitrogen gas or inert gas atmosphere. Preferably, the heat treatment time of the heat treatment step may be 4 to 5 minutes. The purge gas of the purge process may include one or more of nitrogen (N2) or inert gas.

[0072] The step of forming the double electrode layer can be controlled by controlling the ratio of the number of times the Mo deposition subcycle and the Sn oxide doping subcycle are performed to 100:1 to 100:20, thereby controlling the thickness of the Sn oxide doping MoO2 layer deposited per supercycle to a range of 1 nm to 2 nm.

[0073] The step (S20) of forming the MoOx layer of the above-mentioned double electrode layer into a Sn oxide-doped MoO2 layer may further include a step of converting the Sn oxide-doped MoO2 layer (20) into a rutile structure by performing additional heat treatment after the Sn oxide-doped MoO2 layer (20) is formed. A rutile structure can be obtained by performing additional heat treatment after deposition. The additional heat treatment may be performed at a temperature of 350°C to 600°C for 2 to 7 minutes in a nitrogen gas or inert gas atmosphere. Preferably, the heat treatment time of the above-mentioned heat treatment step may be 4 to 5 minutes.

[0074] The step of forming the dielectric layer (S30) may be a step of forming a dielectric layer (30) on top of the Sn oxide-doped MoO2 layer.

[0075] The dielectric material forming the dielectric layer may include one or more selected from the group consisting of HfOx, ZrOx, TiOx, HfZrOx, HfTiOx, HfSiOx, and Al2O3.

[0076] The above dielectric layer (30) may have a rutile structure due to the template effect of the rutile structure of the Sn-doped MoO2 layer (20).

[0077] The step of forming the upper electrode layer (S40) may be a step of forming the upper electrode (40) by depositing an electrode material.

[0078] The electrode material forming the electrode substrate layer (10) and the upper electrode layer (40) may include one or more selected from the group including Zr, Hi, TiOx, TiN, Ti, TiON, Ta, TaN, TaSi, TaCN, TiAIN, TiSiN, Zn, ZnO, Ni, NiSi, C, Si, SiOx, SiNx, SiONx, Ge, Pt, Ru, RuO2, MoN, MoC, AI, AIN, Y, Gd, Sr, W, WSi, WN, Ga, and GaN, but is not limited to these materials.

[0079] The above capacitor manufacturing method may further include a post-heat treatment step (S50) in which the capacitor (1) having the dielectric layer (30) formed thereon is heat-treated in an air atmosphere at a temperature of 350 to 600°C to remove oxygen defects and smooth the surface to reduce leakage current.

[0080] <Experimental Example>

[0081] [Table 1]

[0082]

[0083] FIG. 4 is a perspective view of a capacitor (100) of an experimental example.

[0084] As shown in Fig. 4, as a Mo precursor (N tBy applying Bu)2(Nme2)2Mo, applying an electrode substrate layer (10) as a TiN substrate, and applying a dielectric layer as TiO2, a capacitor having a TiN electrode substrate (TiN substrate), a Sn oxide-doped MoO2 layer (TMO layer) as a Sn oxide-doped Mo oxide layer, a TiO2 dielectric layer (TiO2) as a dielectric layer, and a RuO2 layer as an upper electrode layer was manufactured according to the capacitor manufacturing method of FIG. 2 and FIG. 3, which applied the process conditions of Table 1, and the characteristics thereof were investigated.

[0085] Figure 5 is a graph showing the XRD measurement results of Mo layers produced by Mo deposition subcycles at different temperatures.

[0086] As shown in Fig. 5, the Mo layers deposited at 200 °C, 250 °C, and 300 °C formed a β-MoO3 layer. In contrast, the Mo layer deposited at 900 °C formed an α-MoO3 layer. That is, as a Mo precursor (N t It was confirmed that a rutile structure is not formed when Bu)2(Nme2)2Mo is applied and Sn doping is not performed. Figure 6 is a graph showing the change in Mo deposition thickness according to the oxygen pulse supply time and material supply time of the Mo deposition subcycle.

[0087] As shown in Fig. 6, the self-limiting reaction of the Mo precursor is performed for 5 s, the self-limiting reaction of the oxygen pulse (reactant) is performed for 3 s, and each purging is performed for 10 s, so the entire process cycle is 5 s - 10 s - xs - 10 s when the oxygen pulse time is controlled, and xs - 10 s - 3 s - 10 s when the self-limiting reaction of the Mo precursor is controlled.

[0088] As shown in Fig. 6, ALD MoOx is (N tAs the pulse length of the Bu)2(Nme2)2Mo precursor and oxidation reactant increased, the thickness of the saturated Mo layer (MoOx layer) was shown to be 1 nm (approx. 3 nm). In other words, the present invention confirmed that fine thickness control of the Sn oxide-doped MoO2 layer is possible.

[0089] Figure 7 is a graph showing the change in Sn concentration according to the ratio of the number of Mo deposition subcycles to Sn doping subcycles, and Figure 8 is (N t This is a graph showing the deposition thickness of a Sn-doped MoO2 layer (Sn oxide-doped Mo oxide layer) per supercycle when the ratio of the Mo deposition subcycle to the Sn doping subcycle is 33:1 when a Bu)2(Nme2)2Mo precursor is applied.

[0090] As shown in FIGS. 7 and 8, when the ratio of the number of Mo deposition subcycles to Sn doping subcycles is 100:1, the Sn doping concentration is 6.63%; when the ratio of the number of Mo deposition subcycles to Sn doping subcycles is 33:1, the Sn doping concentration is 16.79%; and when the ratio of the number of Mo deposition subcycles to Sn doping subcycles is 10:1, the Sn doping concentration is 29.12%. That is, depending on the ratio of the number of Mo deposition subcycles to Sn doping subcycles of the atomic layer deposition process being 100:1 to 10:1, the Sn doping concentration can be controlled to be between 6.63% and 29.12%.

[0091] That is, by self-limiting response (N tIt was confirmed that a Bu)2(Nme2)2Mo precursor can be deposited on a TiN electrode substrate layer. In addition, it was confirmed that a thin film having a Sn concentration of 6% to 29% was deposited by adjusting the ratio of the Mo deposition subcycle and the Sn doping subcycle from 100:1 to 10:1 by the dual electrode layer formation step (TMO process) including the Mo deposition subcycle and the Sn doping subcycle of the present invention.

[0092] The above (N t When the Bu)2(Nme2)2Mo precursor was applied, the thickness of the Sn oxide-doped MoO2 layer deposited per supercycle was measured to be 1.12 nm, as shown in Fig. 8. This indicates that the thickness of the Sn oxide-doped MoO2 layer can be finely adjusted compared to 7.68 nm in the prior art. That is, (N t The problem of TMO thickness control was solved by using TMO deposited using a Bu)2(Nme2)2Mo precursor.

[0093] Figure 9 is a graph of XRD measurement results showing that the Sn-doped MoO2 layer has a rutile structure, Figure 10 is a graph showing the change in resistivity according to Sn concentration, and Figure 11 is an SEM image of the Sn-doped MoO2 layer showing the increase in thermal stability of the Sn-doped MoO2 layer after post-deposition annealing (PDA).

[0094] As shown in Fig. 9, it was confirmed that the Sn oxide-doped MoO2 layer produced by performing an Sm doping subcycle has a rutile structure after additional heat treatment.

[0095] Next is (N tIn order to confirm whether the properties of the thin film improved with Sn doping in a single supercycle (TMO process) using Bu)2(Nme2)2Mo precursor, a characterization analysis of the Sn oxide-doped MoO2 layer was performed. As a result, as shown in Figure 9, it was confirmed that the phase of the Sn oxide-doped MoO2 layer changed to a rutile structure with Sn doping.

[0096] In addition, as shown in Fig. 10, it was confirmed that the electrical properties were improved as the resistance decreased with increasing Sn concentration, and as shown in the right graph of Fig. 10 and Fig. 11, it was confirmed that the surface was improved after heat treatment (right graph) compared to before heat treatment (NA, No annealing).

[0097] Figure 12 is a graph showing the change in equivalent oxide thickness (EOT) and relative permittivity (εr) according to the physical thickness of the Sn-doped MoO2 layer per supercycle number.

[0098] [Table 2]

[0099]

[0100] Table 2 shows the change in thickness of the Sn-doped MoO2 layer according to the total number of supercycles.

[0101] (N tTo determine whether in-situ crystallization of rutile TiO2 can be induced even when the thickness of the Sn-doped MoO2 layer (TMO) deposited using the Bu)2(Nme2)2Mo precursor is reduced to a few nanometers, the dielectric constant was measured according to the thickness of the TMO as shown in Fig. 12. As shown in the graph in Fig. 12, the measurement results confirmed that the dielectric constant of TiO2 increases as the thickness of the TMO increases. This indicates that as the thickness of the TMO increases, the crystallinity of the TiO2 deposited on top changes from an anatase structure to a rutile structure. Regarding the thickness dependence of the TMO, it was confirmed that the dielectric constant of TiO2 increased significantly compared to TiN even when using only 1 TMO, and that it exhibited a dielectric constant similar to that of 20 TMO even with only 2 TMO. The above 1 TMO refers to the thickness of the Sn oxide-doped MoO2 layer deposited by one supercycle.

[0102] Figure 13 is a diagram showing the change in potential barrier according to the thickness of the TiO2 layer (dielectric layer).

[0103] As shown in Figure 13, it was confirmed that a high potential barrier is formed by the TMO, which reduces the leakage current.

[0104] FIG. 14 is a diagram showing a post-heat treatment (S50) process. FIG. 15 is a graph showing the change in leakage current according to the equivalent oxide thickness (EOT) relative to the physical thickness of the Sn-doped MoO2 layer after the post-heat treatment (S50) process, and FIG. 16 is a graph comparing the leakage current according to the voltage of Sn-doped MoO2 layers of different thicknesses after the post-heat treatment (S50) process.

[0105] [Table 3]

[0106]

[0107] Table 3 is a table showing the process conditions of the post-heat treatment step (S50).

[0108] In order to reduce the leakage current of a capacitor using TMO as the bottom electrode, heat treatment was performed using an air atmosphere in a furnace. It was confirmed that by performing heat treatment in an oxidizing atmosphere (at a temperature of 350 ℃ to 600 ℃) on the capacitor, defects such as oxygen vacancies can be removed, thereby reducing the leakage current.

[0109] In addition, as shown in Figures 15 and 16, it was confirmed that TMO significantly reduces the equivalent oxide thickness (EOT) and leakage current compared to using only a TiN electrode substrate. Specifically, as shown in Figures 15 and 16, this is because the effective work function of the TiN / TMO bilayer is increased by the TMO as the thickness of the TMO, which has a high work function, increases. Therefore, as a result, it was confirmed that introducing TMO as the bottom electrode of the capacitor increases the dielectric constant of the capacitor and reduces the leakage current, thereby enabling the formation of a capacitor with better performance compared to TiN.

[0110] As a result, as shown in FIGS. 15 and 16, it can be confirmed that the leakage current of the capacitor is significantly improved, and accordingly, consequently, at a very low equivalent oxide thickness of 0.5 nm, 1 x 10 -5 A / cm 2 It was confirmed that a capacitor with low leakage current can be formed.

[0111] Although the embodiments have been described above with reference to the limited drawings, those skilled in the art can make various modifications and variations from the description above. For example, suitable results can be achieved even if the described techniques are performed in a different order than described, and / or the components of the described system, structure, device, circuit, etc. are combined or assembled in a form different from described, or replaced or substituted by other components or equivalents.

[0112] Therefore, other implementations, other embodiments, and equivalents to the claims also fall within the scope of the claims set forth below.

Claims

1. A double electrode layer, a dielectric layer formed on top of the double electrode layer, and an electrode layer formed on top of the dielectric layer, The above dual electrode layer is, Electrode substrate layer; and It includes a Sn oxide-doped Mo oxide layer formed on top of the electrode substrate layer, and The above Sn oxide-doped Mo oxide layer The deposition thickness is controlled by adjusting the number of supercycles of an atomic layer deposition process comprising a Mo deposition subcycle for forming the Mo oxide layer and a Sn oxide doping subcycle for doping the Sn oxide. Capacitor.

2. In Paragraph 1, The above Sn oxide-doped Mo oxide layer is, Deposited with a thickness of 1 nm to 2 nm per supercycle of the above atomic layer deposition process Depending on the ratio of the number of times the Mo deposition subcycle to the Sn doping subcycle of the above atomic layer deposition process is performed to 100:1 to 10:1, the Sn doping concentration is controlled to 6.63% to 29.12%, Capacitor.

3. In Paragraph 1, The thickness of the above Sn oxide-doped Mo oxide layer is, The ratio of the number of times the above Mo deposition subcycle and the above Sn oxide doping subcycle are performed is controlled to 100:1 to 100:20, so that the thickness of the Sn oxide-doped MoO2 layer deposited per supercycle is controlled to a range of 1 nm to 2 nm, and When the above Sn oxide-doped MoO2 layer is deposited on the electrode substrate layer, it exhibits a dual electrode effect at a thickness of 1 nm to 20 nm. Capacitor.

4. In Paragraph 1, The electrode substrate layer comprises one or more selected from the group including Zr, Hi, TiOx, TiN, Ti, TiON, Ta, TaN, TaSi, TaCN, TiAIN, TiSiN, Zn, ZnO, Ni, NiSi, C, Si, SiOx, SiNx, SiONx, Ge, Pt, Ru, RuO2, Mo, MoN, MoC, AI, AIN, Y, Gd, Sr, W, WSi, WN, Ga, GaN, and NbN. Capacitor.

5. In Paragraph 1, The above Sn oxide-doped Mo oxide layer is, Having a rutile structure by performing post-heat treatment at 400 ℃ to 700 ℃ Capacitor.

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