Optical package and method for manufacturing optical package

Abstract

The present invention reduces stress in a peripheral part of a transparent resin on an optical element.　This optical package comprises: an optical chip on which an optical element is formed; a first resin layer positioned on the optical element and capable of transmitting light; and a second resin layer positioned from an end of the first resin layer to the inside. A transparent substrate positioned on the first resin layer may be provided. The second resin layer may be positioned so as to surround the periphery of the optical element. The thickness of the second resin layer may be equal to or less than the thickness of the first resin layer. The second resin layer may be positioned on either the lower side or the upper side in the thickness direction of the first resin layer.

Description

Optical Package and Method for Manufacturing the Same

[0001] The present technology relates to an optical package and a method for manufacturing the optical package. Specifically, the present technology relates to an optical package in which a transparent resin is provided on an optical element and a method for manufacturing the optical package.

[0002] In a solid-state imaging device, there is a technique of covering a microlens of the solid-state imaging device with a transparent resin in order to enable low-profile. For example, a technique is disclosed in which a low-refractive-index layer having a refractive index lower than that of the microlens is formed in a region covering the microlens of the solid-state imaging device, and a glass substrate is adhered to a silicon wafer by an adhesive layer (see, for example, Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2010-40621

[0004] However, in the above-described conventional technology, since the peripheral portion of the glass substrate is joined to the peripheral portion of the transparent resin, peeling and cracking are likely to occur through the joint portion.

[0005] The present technology has been created in view of such a situation, and an object thereof is to reduce the stress in the peripheral portion of the transparent resin on the optical element.

[0006] The present technology has been made to solve the above-described problems, and a first aspect thereof is an optical package including an optical chip on which an optical element is formed, a first resin layer that is located on the optical element and is light-transmissive, and a second resin layer that is located from an end portion of the first resin layer toward the inside. This brings an effect that the stress applied from the end portion of the first resin layer (hereinafter also referred to as a transparent resin) that is light-transmissive on the optical element toward the inside is relaxed.

[0007] Also, in the first aspect, the second resin layer may be located so as to surround the periphery of the optical element. This brings an effect that the stress applied to the periphery of the transparent resin on the optical element is relaxed without blocking the optical path to the optical element through the transparent resin.

[0008] Furthermore, in the first aspect, the second resin layer may be arranged in parallel in multiple locations so as to surround the optical element. This results in the effect of distributing the stress applied around the transparent resin on the optical element without blocking the optical path to the optical element through the transparent resin.

[0009] Furthermore, in the first aspect, the thickness of the second resin layer may be less than or equal to the thickness of the first resin layer. This results in an increased stress relaxation effect around the transparent resin on the optical element.

[0010] Furthermore, in the first aspect, the second resin layer may be located either below or above the first resin layer in the thickness direction. This provides the effect of distributing the transparent resin on the optical element while relieving the stress acting around the transparent resin on the optical element.

[0011] Furthermore, in the first aspect, the second resin layer may have light-shielding properties. This reduces stray light on the optical element while also relieving stress on the inside from the edges of the transparent resin.

[0012] Furthermore, the first side surface may be provided with jagged edges located on the inner surface of the second resin layer. This reduces stray light on the optical element while also relieving stress on the inside from the edge of the transparent resin.

[0013] Furthermore, in the first aspect, the position of the horizontal edge of the optical chip, the position of the horizontal edge of the first resin layer, and the position of the horizontal edge of the second resin layer may be equal to each other. This results in the formation of a CSP (Chip Size Package) while relieving the stress acting inward from the edge of the transparent resin.

[0014] Furthermore, the first side surface may include an extended redistribution layer extending horizontally from the optical chip, and a sealing resin located on the extended redistribution layer that seals the side surface of the optical chip. This results in an increase in the number of external terminals connected to the optical chip on the wafer, without being constrained by the planar size of the optical chip.

[0015] Furthermore, in the first aspect, an underfill located beneath the optical chip may be provided. This improves reliability during mounting while enabling flip-chip mounting of the optical package.

[0016] Furthermore, in the first aspect, the elastic modulus of the second resin layer may be greater than that of the first resin layer and less than that of the underfill. This provides the effect of protecting the mounting surface of the optical package with the underfill while relieving the stress on the transparent resin through the second resin layer.

[0017] Furthermore, the first side may include a transparent substrate located on the first resin layer. This has the effect of improving the strength of the optical package while easing the stress acting inward from the edges of the transparent resin.

[0018] Furthermore, in the first aspect, at least a portion of the second resin layer may be embedded in the transparent substrate. This provides the effect of easing the stress acting inward from the edges of the transparent resin while arranging the second resin layer on the transparent resin.

[0019] Furthermore, in the first aspect, the position of the surface of the second resin layer in the thickness direction may be equal to the position of the surface of the transparent substrate in the thickness direction. This provides the effect of relieving the stress acting from the edges inward of the transparent resin while maintaining the flatness of the transparent resin.

[0020] Furthermore, in the first aspect, the second resin layer may cover at least a portion of the side surface of the transparent substrate. This protects the side surface of the transparent substrate while relieving the stress acting inward from the edges of the transparent resin.

[0021] Furthermore, on the first side, the second resin layer may cover the edges on the transparent substrate. This protects the sides and edges of the transparent substrate while relieving the stress acting inward from the edges of the transparent resin.

[0022] Furthermore, the second aspect is a method for manufacturing an optical package, comprising the steps of: forming optical elements cut out for each optical chip on a wafer; forming a light-transmitting first resin layer located on the optical element and a second resin layer located outside the optical element such that the first resin layer and the second resin layer are in contact with each other in the thickness direction; and cutting the wafer at the position of the second resin layer for each optical chip. This results in the formation of multiple optical packages on a wafer simultaneously, while also forming a CSP that can relieve stress applied from the edges of the transparent resin inward.

[0023] Furthermore, in a second aspect, the second resin layer may be formed by printing or lithography. This results in the second resin layer being positioned outside the optical element.

[0024] Furthermore, in the second aspect, the step of forming a light-transmitting first resin layer located on the optical element and a second resin layer located outside the optical element, such that the first resin layer and the second resin layer are in contact with each other in the thickness direction, may include the steps of forming a groove in a transparent substrate corresponding to the position of the second resin layer, embedding the second resin layer in the groove of the transparent substrate, and bonding the transparent substrate with the embedded second resin layer onto the first resin layer. This results in the second resin layer being positioned on the transparent resin while maintaining the flatness of the transparent resin.

[0025] Furthermore, the second aspect may include a step of flattening the second resin layer embedded in the groove of the transparent substrate. This results in the removal of the second resin layer that has protruded onto the transparent substrate.

[0026] This is a diagram showing an example of the configuration of an optical package according to the first embodiment. This is a cross-sectional view showing an example of a method for manufacturing an optical package according to the first embodiment. This is a cross-sectional view showing an example of a method for manufacturing an optical package according to the first embodiment. This is a cross-sectional view showing an example of a method for manufacturing an optical package according to the first embodiment. This is a cross-sectional view showing an example of a method for manufacturing an optical package according to the first embodiment. This is a cross-sectional view showing an example of a method for manufacturing an optical package according to the first embodiment. This is a diagram showing an example of the configuration of an optical package according to the second embodiment. This is a cross-sectional view showing an example of a method for manufacturing diagram showing an example of the configuration of an optical package according to the third embodiment. This is a diagram showing an example of the configuration of an optical package according to the fourth embodiment. This is a diagram showing the relationship between the configuration of the resin layer of the optical package according to this embodiment and the normal stress. This is a diagram showing the relationship between the film thickness of the resin layer of the optical package according to this embodiment and the normal stress. This is a diagram showing an example of the configuration of an optical package according to the fifth embodiment. This is a diagram showing an example of the configuration of an optical package according to the sixth embodiment. This is a diagram showing an example of the configuration of an optical package according to the seventh embodiment. This is a diagram showing an example of the configuration of an optical package according to the eighth embodiment. This is a diagram showing an example of the configuration of an optical package according to the ninth embodiment. This is a diagram showing an example of the configuration of an optical package according to the tenth embodiment. This is a cross-sectional view showing an example of the manufacturing method of an optical package according to the tenth embodiment. This is a cross-sectional view showing an example of the manufacturing method of an optical package according to the tenth embodiment. This is a cross-sectional view showing an example of the manufacturing method of an optical package according to the tenth embodiment. This is a cross-sectional view showing an example of the manufacturing method of an optical package according to the tenth embodiment.This is a cross-sectional view showing an example of a method for manufacturing an optical package according to the 10th embodiment. This is a diagram showing an example of the configuration of an optical package according to the 11th embodiment. This is a diagram showing an example of the configuration of an optical package according to the 12th embodiment. This is a diagram showing an example of the configuration of an optical package according to the 13th embodiment. This is a diagram showing the relationship between the configuration of the resin layer of the optical package according to this embodiment and the normal stress. This is a cross-sectional view showing a first example of a method for manufacturing an optical package according to the 13th embodiment. This is a cross-sectional view showing a first example of a method for manufacturing an optical package according to the 13th embodiment. This is a cross-sectional view showing a first example of a method for manufacturing an optical package according to the 13th embodiment. This is a cross-sectional view showing a first example of a method for manufacturing an optical package according to the 13th embodiment. This is a cross-sectional view showing a first example of a method for manufacturing an optical package according to the 13th embodiment. This is a cross-sectional view showing a first example of a method for manufacturing an optical package according to the 13th embodiment. This is a cross-sectional view showing a first example of a method for manufacturing an optical package according to the 13th embodiment. This is a cross-sectional view showing a second example of a method for manufacturing an optical package according to the 13th embodiment. This is a cross-sectional view showing a second example of a method for manufacturing an optical package according to the 13th embodiment. This is a cross-sectional view showing a second example of a method for manufacturing an optical package according to the 13th embodiment. This is a cross-sectional view showing a second example of the method for manufacturing an optical package according to the thirteenth embodiment. This is a cross-sectional view showing a second example of the method for manufacturing an optical package according to the thirteenth embodiment. This is a cross-sectional view showing a third example of the method for manufacturing an optical package according to the thirteenth embodiment. This is a cross-sectional view showing a third example of the method for manufacturing an optical package according to the thirteenth embodiment. This is a cross-sectional view showing a third example of the method for manufacturing an optical package according to the thirteenth embodiment. This is a cross-sectional view showing a third example of the method for manufacturing an optical package according to the thirteenth embodiment. This is a cross-sectional view showing a third example of the method for manufacturing an optical package according to the thirteenth embodiment. This is a cross-sectional view showing a fourth example of the method for manufacturing an optical package according to the thirteenth embodiment.This is a cross-sectional view showing a fourth example of the method for manufacturing an optical package according to the thirteenth embodiment. This is a cross-sectional view showing a fourth example of the method for manufacturing an optical package according to the thirteenth embodiment. This is a cross-sectional view showing a fourth example of the method for manufacturing an optical package according to the thirteenth embodiment. This is a cross-sectional view showing a fourth example of the method for manufacturing an optical package according to the thirteenth embodiment. This is a cross-sectional view showing a fourth example of the method for manufacturing an optical package according to the thirteenth embodiment. This is a cross-sectional view showing an example of the configuration of an optical package according to the fourteenth embodiment. This is a diagram showing an example of the configuration of an optical package according to the fifteenth embodiment. This is a diagram showing an example of the configuration of an optical package according to the sixteenth embodiment. This is a diagram showing an example of the configuration of an optical package according to the seventeenth embodiment. This is a cross-sectional view showing an example of the configuration of an optical package according to the eighteenth embodiment. This is a cross-sectional view showing an example of the method for manufacturing an optical package according to the eighteenth embodiment. This is a cross-sectional view showing an example of the method for manufacturing an optical package according to the eighteenth embodiment. This is a cross-sectional view showing an example of the method for manufacturing an optical package according to the eighteenth embodiment. This is a cross-sectional view showing an example of the method for manufacturing an optical package according to the nineteenth embodiment. This is a cross-sectional view showing an example of the method for manufacturing an optical package according to the nineteenth embodiment. This is a cross-sectional view showing an example of a method for manufacturing an optical package according to the 19th embodiment. This is a block diagram showing a schematic configuration example of a vehicle control system. This is an explanatory diagram showing an example of the installation position of the imaging unit.

[0027] The following describes embodiments for implementing this technology (hereinafter referred to as "embodiments"). The description will proceed in the following order: 1. First embodiment (an example in which a second resin layer is provided from the upper end to the inside of a light-transmitting first resin layer on an optical element formed on an optical chip) 2. Second embodiment (an example in which a second resin layer is provided from the lower end to the inside of a light-transmitting first resin layer on an optical element formed on an optical chip) 3. Third embodiment (an example in which a second resin layer is provided on the transparent substrate side of the optical chip from the entire thickness direction end of the light-transmitting first resin layer on an optical element formed on an optical chip to the inside) 4. Fourth embodiment (an example in which a second resin layer is provided on the optical chip side from the entire thickness direction end of the light-transmitting first resin layer on an optical element formed on an optical chip to the inside) 5. Fifth embodiment (an example in which a second resin layer is provided in double layers on the transparent substrate side of the optical chip from the upper end to the inside of a light-transmitting first resin layer on an optical element formed on an optical chip) 6. 7. Seventh Embodiment (An example in which a second resin layer is double-layered on the optical chip side, extending inward from the upper end of the light-transmitting first resin layer on the optical element formed on the optical chip) 8. Eighth Embodiment (An example in which a second resin layer having light-shielding properties is provided extending inward from the upper end of the light-transmitting first resin layer on the optical element formed on the optical chip) 9. Ninth Embodiment (An example in which a second resin layer is pattern-formed extending inward from the upper end of the light-transmitting first resin layer on the optical element formed on the optical chip) 10. Tenth Embodiment (An example in which a second resin layer, positioned extending inward from the end of the light-transmitting first resin layer on the optical element formed on the optical chip, is embedded in a transparent substrate on the optical chip) 11. Eleventh Embodiment (An example in which a second resin layer, positioned from the edge to the inside of a light-transmitting first resin layer on an optical element formed on an optical chip, is double-embedded in a transparent substrate on an optical chip) 12. Twelfth Embodiment (An example in which a light-shielding second resin layer, positioned from the edge to the inside of a light-transmitting first resin layer on an optical element formed on an optical chip, is embedded in a transparent substrate on an optical chip)13. Thirteenth embodiment (an example in which a second resin layer, which is arranged from the edge inward of a light-transmitting first resin layer on an optical element formed on an optical chip, is provided on the entire side surface of the transparent substrate on the optical chip) 14. Fourteenth embodiment (an example in which a second resin layer, which is arranged from the edge inward of a light-transmitting first resin layer on an optical element formed on an optical chip, is provided on the side surface of the transparent substrate on the optical chip and on the edge of the transparent substrate) 15. Fifteenth embodiment (an example in which a second resin layer, which is arranged from the edge inward of a light-transmitting first resin layer on an optical element formed on an optical chip, is provided on a part of the side surface of the transparent substrate on the optical chip) 16. Sixteenth embodiment (an example in which a light-shielding second resin layer, which is arranged from the edge inward of a light-transmitting first resin layer on an optical element formed on an optical chip, is provided on the entire side surface of the transparent substrate on the optical chip) 17. 17th Embodiment (An example in which a second resin layer, positioned from the edge inward of a light-transmitting first resin layer on an optical element formed on an optical chip, is provided on the side surface of a transparent substrate on an optical chip and within the first resin layer) 18. 18th Embodiment (An example in which a configuration in which a second resin layer is provided from the upper edge inward of a light-transmitting first resin layer on an optical element formed on an optical chip is applied to a FOWLP (Fan Out Wafer Level Package)) 19. 19th Embodiment (An example in which a configuration in which a second resin layer is provided from the upper edge inward of a light-transmitting first resin layer on an optical element formed on an optical chip to form a chiplet is applied to a FOWLP) 20. Application Examples to Mobile Devices

[0028] <1. First Embodiment> Figure 1 is a diagram showing an example of the configuration of an optical package according to the first embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 100, and b is a plan view showing an example of the configuration of the optical package 100. In the figure, a shows an example of the configuration cut along the line A1-A2 in b. Furthermore, the drawings used in the following explanation may differ in scale and shape from the actual structure in order to make each configuration easier to understand.

[0029] In the figure, the optical package 100 includes an optical chip P12. The optical package 100 may also include a circuit chip P11. In this case, the optical chip P12 is stacked on the circuit chip P11. In the following description, a structure in which the optical chip P12 is stacked on the circuit chip P11 is used as an example, but a single-layer structure of the optical chip may be mounted on the optical package, or a structure of three or more layers including the optical chip may be mounted on the optical package. Here, the planar size and planar shape of the circuit chip P11 can be made equal to the planar size and planar shape of the optical chip P12. In this case, the position of the horizontal edge of the circuit chip P11 can be made to coincide with the position of the horizontal edge of the optical chip P12. As a result, the package 100 can constitute a WLCSP (Wafer Level Chip Size Package) packaged at the wafer level.

[0030] Optical elements RA are formed on the optical chip P12. In addition to optical elements, semiconductor elements may also be formed on the optical chip P12. The substrate used for the optical chip P12 may be a semiconductor substrate, a dielectric substrate, or an organic substrate.

[0031] The optical element may be a light-receiving element, a light-emitting element, or a display element. The light-receiving element may be an image sensor such as a CCD (Charged Coupled Device) sensor, a CMOS (Complementary Metal-Oxide Semiconductor) sensor, or a SPAD (Single Photon Avalanche Diode) sensor, or an EVS (Event-based Vision Sensor) sensor. The light received by the image sensor may be visible light, near-infrared light (NIR), short-wavelength infrared light (SWIR), ultraviolet light, or X-rays. The light-emitting element may be a PD (Photo Diode), LD (Laser Diode), LED (Light Emitting Diode), or VCSEL (Vertical Cavity Surface Emitting Laser). The display element may be a liquid crystal display element or an organic EL (Electro Luminescence) element. The materials used in optical elements may be semiconductors such as Si, GaAs, and InGaAs, or LiNbO ３ Alternatively, a dielectric material such as glass or transparent resin may be used.

[0032] In the following explanation, we will take the case where a back-illuminated solid-state image sensor is formed as the optical element RA on the optical chip P12 as an example.

[0033] In this configuration, the optical element RA has pixels and pixel transistors arranged in a matrix along the row and column directions. A photodiode can be formed in each pixel. The pixel transistors may include a reset transistor for resetting the pixel, a selection transistor for selecting a pixel, a transfer transistor for transferring charge accumulated in the pixel, and an amplifier transistor that forms a source follower with the pixel.

[0034] The optical chip P12 comprises a semiconductor substrate 111 and a wiring layer 112. The wiring layer 112 is stacked on the semiconductor substrate 111. A color filter 115 is formed on the back side of the semiconductor substrate 111 for each pixel. An on-chip lens 114 is formed on the color filter 115 for each pixel. The material of the color filter 115 and the on-chip lens 114 is, for example, SiO ２ Insulating films such as SiN and SiCN, or transparent resins such as acrylic or polycarbonate can be used. The color filter 115 may contain pigments. The color filter 115 may, for example, form a Bayer array or a quad Bayer array. The color filter 115 may include an RGB filter, a complementary color filter, or a white filter.

[0035] Furthermore, a transparent resin layer 116 is provided on the back side of the semiconductor substrate 111 so as to cover the on-chip lens 114. The transparent resin layer 116 is an example of the light-transmitting first resin layer described in the claims. The material of the transparent resin layer 116 can be acrylic or polycarbonate, etc. The material of the transparent resin layer 116 may be a thermosetting resin or an ultraviolet curing resin. In this case, in order to ensure the light-gathering ability of the on-chip lens 114, the refractive index of the transparent resin layer 116 can be made different from the refractive index of the on-chip lens 114.

[0036] A resin layer 117 is provided on the upper side of the transparent resin layer 116, extending inward from the edge of the transparent resin layer 116. The resin layer 117 can be used as a stress-relieving resin to alleviate stress on the transparent resin layer 116. Alternatively, the resin layer 117 can be used as a stress-dispersing resin to disperse stress on the transparent resin layer 116. In this case, the resin layer 117 and the transparent resin layer 116 can be in contact with each other in their thickness direction (height direction of the optical package 100). The resin layer 117 can be positioned outside the optical element RA. In this case, the resin layer 117 may be positioned to surround the optical element RA. The surface of the resin layer 117 is exposed from the surface of the transparent resin layer 116. In this case, the surface from the surface of the resin layer 117 to the surface of the transparent resin layer 116 may be flattened. Here, the resin layer 117 can be spaced apart from the semiconductor substrate 111. In this case, the thickness of the resin layer 117 can be made thinner than the thickness of the transparent resin layer 116. The material of the resin layer 117 can be selected such that the elastic modulus of the resin layer 117 is higher than that of the transparent resin layer 116. In this case, the glass transition temperature of the resin layer 117 can be higher than that of the transparent resin layer 116. The resin layer 117 may be a molding resin, a potting resin, or a photosensitive resin. The material of the resin layer 117 may be a thermosetting resin or an ultraviolet curing resin. For example, the material of the resin layer 117 can be a silicone resin, a siloxane resin, an acrylic resin, or an epoxy resin. The resin layer 117 may contain a filler made of inorganic or organic material to improve reliability. The filler material may be glass. The resin layer 117 may be blackened to reduce flare on the optical element RA. For example, the resin layer 117 may contain a black pigment such as carbon black, or a filler such as carbon fiber.

[0037] The base material of the resin layer 117 may be the same as the base material of the transparent resin layer 116. In this case, in order to make the elastic modulus of the resin layer 117 higher than that of the transparent resin layer 116, glass, carbon black, or the like may be mixed into the transparent resin layer 116 to form the resin layer 117.

[0038] On the transparent resin layer 116 and the resin layer 117, a transparent substrate 118 is provided. The transparent substrate 118 can reinforce the strength of the optical package 100. The transparent substrate 118 may be a glass substrate, a quartz substrate, or a transparent resin substrate such as acrylic or polycarbonate. The transparent substrate 118 is made of Al ２ O ３ , CaF ２ , MgF ２ or LiF, etc. may also be used.

[0039] Here, the positions of the horizontal ends of the transparent resin layer 116, the positions of the horizontal ends of the resin layer 117, and the positions of the horizontal ends of the transparent substrate 118 can be made to coincide with the positions of the horizontal ends of the optical chip P12. At this time, each side surface of the circuit chip P11, the optical chip P12, the transparent resin layer 116, the resin layer 117, and the transparent substrate 118 may be a dicing surface.

[0040] In the wiring layer 112, wirings 122 and bonding electrodes 124 embedded in an insulating layer are provided. Also, in the wiring layer 112, vias 123 used for interlayer connection are provided. The bonding electrode 124 can be used for direct bonding between the optical chip P12 and the circuit chip P11.

[0041] A circuit layer is formed on the circuit chip P11. A semiconductor element is formed in the circuit layer. As the semiconductor element, a memory may be formed, a processor may be formed, a signal processing circuit may be formed, a data processing circuit may be formed, or an interface circuit may be formed.

[0042] The semiconductor device may include transistors, resistors, capacitors, etc. As the semiconductor device, a memory may be formed, a processor may be formed, a signal processing circuit may be formed, a data processing circuit may be formed, or an interface circuit may be formed. As the semiconductor device, for example, a hardware circuit such as an FPGA (Field-Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit) may be formed. The material used for the semiconductor device may be Si, GaAs, SiC, GaN, InGaAsP, or the like.

[0043] The circuit chip P11 includes a semiconductor substrate 141 and a wiring layer 131. The wiring layer 131 is laminated on the semiconductor substrate 141. Also, on the semiconductor substrate 141, gate electrodes embedded in an insulating layer are formed. At this time, the semiconductor substrate 141 can form active regions element-isolated by STI (Shallow Trench Isolation). In the active regions, a channel region located under the gate electrode and impurity diffusion layers located on both sides of the channel region can be formed.

[0044] The wiring layer 131 is provided with wirings 132 and bonding electrodes 134 embedded in an insulating layer. Also, the wiring layer 131 is provided with vias 133 used for interlayer connection. The bonding electrode 134 can be used for direct bonding of the optical chip P12 and the circuit chip P11. In the direct bonding of the optical chip P12 and the circuit chip P11, hybrid bonding can be used. At this time, the bonding electrodes 124 and 134 are arranged at opposing positions. Then, the bonding electrodes 124 and 134 can be bonded to each other based on a metal bonding such as Cu-Cu bonding.

[0045] A redistribution layer HR is provided on the back surface of the semiconductor substrate 141. A through electrode 143 and redistributions 144 are provided in the redistribution layer HR. The through electrode 143 is embedded in the semiconductor substrate 141. The through electrode 143 penetrates from the back surface of the semiconductor substrate 141 to the position of the wiring layer 131 and is connected to the wiring layer 131. The redistributions 144 are connected to the through electrode 143. The through electrode 143 and the redistributions 144 are insulated from the semiconductor substrate 141 via an insulating layer 142. The inner surface of the through electrode 143 and the redistributions 144 are covered with a protective film 145. The redistributions 144 are connected to a protruding electrode 146 through the protective film 145. The through electrode 143 and the redistributions 144 may be made of the same thin film or may be formed integrally. The protruding electrode 146 may be, for example, a ball electrode such as a solder ball, or a pillar electrode made of a conductor.

[0046] The optical package 100 is mounted on a mounting substrate 151 via a protruding electrode 146. A land electrode 152 is formed on the mounting substrate 151, and a protective film 153 is formed around the land electrode 152. The base material of the mounting substrate 151 may be, for example, ceramic or resin. Wiring and vias may be formed on the mounting substrate 151. In this case, the protruding electrode 146 can be bonded to the land electrode 152.

[0047] An underfill 154 is provided between the optical package 100 and the mounting substrate 151. The underfill 154 can cover the area around the protruding electrode 146. The underfill 154 may rise up on the side surface of the optical package 100. In this case, the underfill 154 may be in contact with the side surfaces of the transparent resin layer 116 and the resin layer 117. The elastic modulus of the resin layer 117 can be made smaller than the elastic modulus of the underfill 154. The material of the underfill 154 can be a resin such as a silicone resin, siloxane resin, acrylic resin, or epoxy resin.

[0048] Here, when the underfill 154 hardens with the underfill 154 raised against the side surface of the transparent substrate 118, the transparent substrate 118 and the optical chip P12 are fixed together via the underfill 154. Then, as the temperature of the underfill 154 decreases and the transparent resin layer 116 shrinks, vertical stress is generated due to the difference in CTE (Coefficient of Thermal Expansion) between the transparent resin layer 116 and the underfill 154. At this time, the vertical stress between the transparent resin layer 116 and the transparent substrate 118 can be relieved via the resin layer 117, thereby suppressing peeling, cracking, and clouding (generation of microbubbles) of the transparent resin layer 116.

[0049] The materials of each semiconductor substrate 111, 141 may be Si, GaAs, SiC, GaN, InGaAs, or InP, etc. The materials of each semiconductor substrate 111, 141 may be the same or different.

[0050] The insulating layer material used for each wiring layer 112, 131 is, for example, SiO ２ SiN or SiCN can be used. The material of the protective films 145 and 153 may be a resin such as solder resist, or SiO ２ Inorganic materials such as SiN or SiCN may also be used. The materials for the wiring 122, 132, rewiring 144, vias 123, 133 and bonding electrodes 124, 134 can be metals such as Al, Cu, AlCu, AlSiCu, or Co. The material for the through electrode 143 can be metals such as Cu, Ti, Ta, Al, W, Ni, Ru, or Co, and a laminated structure of multiple materials may be used.

[0051] Figures 2 to 7 are cross-sectional views showing an example of a method for manufacturing an optical package according to the first embodiment. Figures 2 to 7 show the manufacturing process for two optical packages 100.

[0052] As shown in Figure 2a, the transparent substrate wafer 118W is divided into partitioned regions RK. The transparent substrate 118 can be cut out from each partitioned region RK. An opening KA0 is formed in the mask MK. The opening KA0 can be provided at the placement position of the resin layer 117 for each partitioned region RK. The mask MK is then placed on the transparent substrate wafer 118W. The resin layer 117 is then applied into the opening KA0 via a squeegee SK, forming the resin layer 117 on the transparent substrate wafer 118W for each partitioned region RK.

[0053] Alternatively, as shown in Figure 2b, the resin layer 117 may be applied to each partitioned region RK on the transparent substrate wafer 118W via a dispenser NZ.

[0054] Furthermore, as shown in Figure 3a, the laminated wafer W10 is constructed by stacking an optical wafer W12 on a circuit wafer W11. The laminated wafer W10 is divided into partitioned regions RK. From each partitioned region RK, the laminated structure of the circuit chip P11 and the optical chip P12 can be cut out. Then, a transparent resin layer 116 is formed on the back side of the semiconductor substrate 111 so as to cover the on-chip lens 114. The transparent resin layer 116 may be formed by coating, printing, potting, dispensing, or molding.

[0055] Next, as shown in Figure 3b, the transparent substrate wafer 118W on which the resin layer 117 is formed and the laminated wafer W10 on which the transparent resin layer 116 is formed are positioned. At this time, the resin layer 117 and the transparent resin layer 116 can be placed facing each other.

[0056] Next, as shown in Figure 4a, the transparent substrate wafer 118W on which the resin layer 117 is formed and the laminated wafer W10 on which the transparent resin layer 116 is formed are bonded together. At this time, the resin layer 117 can penetrate the transparent resin layer 116 in the depth direction.

[0057] Next, as shown in Figure 4b, the back side of the circuit wafer W11 is thinned. Thinning of the circuit wafer W11 may be done using etch-back, back-grinding, or CMP (Chemical Mechanical Polishing).

[0058] Next, as shown in Figure 4c, openings KA are formed in each partitioned region RK on the semiconductor substrate 141 of the circuit wafer W11 based on lithography and dry etching techniques. The openings KA can be formed at the positions of the through electrodes 143. Dry etching may be, for example, RIE (Reactive Ion Etching).

[0059] Next, as shown in Figure 5a, an insulating layer 142 is formed on the back side of the semiconductor substrate 141 of the circuit wafer W11 by a method such as sputtering. At this time, the insulating layer 142 can be formed on the back surface of the semiconductor substrate 141 and on the inner surface of the opening KA. Then, the insulating layer 142 on the bottom surface of the opening KA is removed based on lithography and dry etching techniques.

[0060] Next, a rewiring material is deposited in each partitioned region RK, both inside the opening KA and on the insulating layer 142, using methods such as sputtering or vapor deposition. Then, the rewiring material is patterned in each partitioned region RK based on lithography and dry etching techniques to form through electrodes 143 and rewiring 144. At this time, the through electrodes 143 can be connected to the wiring layer 131 in each partitioned region RK.

[0061] Next, as shown in Figure 5b, a protective film 145 is formed on the back side of the circuit wafer W11. At this time, the inner surface of the through electrode 143 and the rewiring 144 can be covered with the protective film 145. Then, openings KA2 are formed in the protective film 145 based on lithography and dry etching techniques. The openings KA2 can be formed at the positions where the protruding electrode 146 is positioned.

[0062] Next, as shown in Figure 6a, a protruding electrode 146 is formed on the back side of the circuit wafer W11 through an opening KA2. At this time, the protruding electrode 146 can be connected to the rewiring 144.

[0063] Next, as shown in Figure 6b, the stacked wafer W10, in which the transparent substrate wafers 118W are stacked, is divided into individual sections RK, and the optical package 100 is cut out. Dicing or laser cutting may be used to cut out the optical package 100.

[0064] In addition, the process shown in Figure 7 may be used instead of the process shown in Figure 3 described above. In this case, after the process shown in Figure 2, a transparent resin layer 116 is formed on the transparent substrate wafer 118W so as to cover the resin layer 117, as shown in a in Figure 7.

[0065] Next, as shown in Figure 7b, the transparent substrate wafer 118W on which the transparent resin layer 116 and resin layer 117 are formed is positioned against the laminated wafer W10. At this time, the on-chip lens 114 and the transparent resin layer 116 can be positioned opposite each other.

[0066] As described above, in the first embodiment, a resin layer 117 is provided on the optical element RA from the upper end to the inside of the transparent resin layer 116. This makes it possible to alleviate the stress applied from the upper end to the inside of the transparent resin layer 116, thereby improving reliability while making the optical package 100 a CSP (Cross-Splitting Component).

[0067] <2. Second Embodiment> In the first embodiment described above, a resin layer 117 was provided on the transparent resin layer 116 on the optical element RA, extending from the upper end to the inside. In this second embodiment, a resin layer is provided on the transparent resin layer 116 on the optical element RA, extending from the lower end to the inside.

[0068] Figure 8 shows an example of the configuration of an optical package according to the second embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 200, and b is a plan view showing an example of the configuration of the optical package 200. Figure a shows an example of the configuration cut along the line A1-A2 in figure b.

[0069] In the figure, the optical package 200 includes a resin layer 217 instead of the resin layer 117 of the first embodiment described above. The other configurations of the optical package 200 of the second embodiment are the same as those of the optical package 100 of the first embodiment described above.

[0070] The resin layer 217 is provided extending inward from the lower end of the transparent resin layer 116. In this case, the resin layer 217 and the transparent resin layer 116 can be in contact with each other in their thickness direction. The resin layer 217 can be positioned outside the optical element RA. In this case, the resin layer 217 may be positioned to surround the optical element RA. The lower surface of the resin layer 217 is exposed from the lower surface of the transparent resin layer 116. In this case, the lower surface of the resin layer 217 may be in contact with the semiconductor substrate 111. Here, the resin layer 217 can be spaced apart from the transparent substrate 118. In this case, the thickness of the resin layer 217 can be made thinner than the thickness of the transparent resin layer 116. The other configurations of the resin layer 217 are the same as those of the resin layer 117 in the first embodiment described above.

[0071] Here, when the underfill 154 hardens with the underfill 154 rising up against the side surface of the transparent substrate 118, the transparent substrate 118 and the optical chip P12 are fixed together via the underfill 154. Then, as the temperature of the underfill 154 decreases and the transparent resin layer 116 shrinks, vertical stress is generated due to the difference in CTE between the transparent resin layer 116 and the underfill 154. At this time, the vertical stress between the transparent resin layer 116 and the optical chip P12 can be relieved via the resin layer 217, thereby suppressing peeling, cracking, and clouding of the transparent resin layer 116.

[0072] Figures 9 to 14 are cross-sectional views showing an example of a method for manufacturing an optical package according to the second embodiment. Figures 9 to 14 show the manufacturing process for two optical packages 200.

[0073] In Figure 9a, a mask MK is placed on the laminated wafer W10. At this time, a transparent planarization film may be formed on the on-chip lens 114. Then, a resin layer 217 is applied to the opening KA0 via a squeegee SK, forming a resin layer 217 on the laminated wafer W10 for each partitioned region RK.

[0074] Alternatively, as shown in Figure 9b, the resin layer 217 may be applied to the laminated wafer W10 for each partitioned region RK via the dispenser NZ.

[0075] Next, as shown in Figure 10a, a transparent resin layer 116 is formed on the transparent substrate wafer 118W.

[0076] Next, as shown in Figure 10b, the transparent substrate wafer 118W on which the transparent resin layer 116 is formed and the laminated wafer W10 on which the resin layer 217 is formed are positioned. At this time, the resin layer 217 and the transparent resin layer 116 can be placed facing each other.

[0077] Next, as shown in Figure 11a, a transparent substrate wafer 118W on which a transparent resin layer 116 is formed is bonded to a laminated wafer W10 on which a resin layer 217 is formed. At this time, the resin layer 217 can penetrate the transparent resin layer 116 in the depth direction.

[0078] Next, as shown in Figure 11b, the back side of the circuit wafer W11 is thinned.

[0079] Next, as shown in c in Figure 11, openings KA are formed in each partitioned region RK on the semiconductor substrate 141 of the circuit wafer W11. The openings KA can be formed at the positions of the through electrodes 143.

[0080] Next, as shown in Figure 12a, an insulating layer 142 is formed on the back side of the semiconductor substrate 141 of the circuit wafer W11. Then, the insulating layer 142 on the bottom surface of the opening KA is removed.

[0081] Next, through electrodes 143 are formed in the openings KA for each partitioned region RK, and rewiring 144 is formed on the insulating layer 142.

[0082] Next, as shown in Figure 12b, a protective film 145 is formed on the back side of the circuit wafer W11. Then, an opening KA2 is formed in the protective film 145. The opening KA2 can be formed at the position where the protruding electrode 146 is positioned.

[0083] Next, as shown in Figure 13a, a protruding electrode 146 is formed on the back side of the circuit wafer W11 through an opening KA2.

[0084] Next, as shown in Figure 13b, the stacked wafer W10, on which the transparent substrate wafer 118W is stacked, is divided into individual sections RK, and the optical package 100 is cut out.

[0085] In addition, the process shown in Figure 14 may be used instead of the process shown in Figure 10 described above. In this case, after the process shown in Figure 9, a transparent resin layer 116 is formed on the laminated wafer W10 so as to cover the resin layer 217, as shown in a in Figure 14.

[0086] Next, as shown in Figure 14b, the laminated wafer W10, on which the transparent resin layer 116 and the resin layer 217 are formed, is positioned against the transparent substrate wafer 118W. At this time, the transparent substrate wafer 118W and the transparent resin layer 116 can be placed facing each other.

[0087] As described above, in the second embodiment, a resin layer 217 is provided on the optical element RA from the lower end of the transparent resin layer 116 inward. This makes it possible to alleviate the stress applied from the lower end of the transparent resin layer 116 inward, thereby improving reliability while making the optical package 100 CSP (Critical Support Package).

[0088] <3. Third Embodiment> In the first embodiment described above, a resin layer 117 was provided from the upper end to the inside of the transparent resin layer 116 on the optical element RA. In this third embodiment, a resin layer is provided on the transparent substrate 118 side from the entire thickness direction of the transparent resin layer 116 on the optical element RA to the inside.

[0089] Figure 15 shows an example of the configuration of an optical package according to the third embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 300, and b is a plan view showing an example of the configuration of the optical package 300. Figure a shows an example of the configuration cut along the line A1-A2 in figure b.

[0090] In the figure, the optical package 300 includes a resin layer 317 instead of the resin layer 117 of the first embodiment described above. The other configurations of the optical package 300 of the third embodiment are the same as those of the optical package 100 of the first embodiment described above.

[0091] The resin layer 317 is provided on the transparent substrate 118 side, extending inward from the end of the transparent resin layer 116 along its entire thickness. Here, the resin layer 317 can contact the transparent substrate 118 and the optical chip P12. In this case, the thickness of the resin layer 317 can be equal to the thickness of the transparent resin layer 116. The resin layer 317 can be positioned outside the optical element RA. In this case, the resin layer 317 may be positioned to surround the periphery of the optical element RA. The other configurations of the resin layer 317 are the same as those of the resin layer 117 in the first embodiment described above.

[0092] At this time, the vertical stress between the transparent resin layer 116 and the transparent substrate 118 is relieved via the resin layer 317, and the vertical stress between the transparent resin layer 116 and the optical chip P12 is also relieved. Therefore, peeling, cracking, and clouding between the transparent resin layer 116 and the transparent substrate 118 can be suppressed via the resin layer 317, and peeling, cracking, and clouding between the transparent resin layer 116 and the optical chip P12 can also be suppressed.

[0093] Thus, in the third embodiment described above, the resin layer 317 is provided on the transparent substrate 118 side from the edges in the entire thickness direction of the transparent resin layer 116 on the optical element RA. This makes it possible to alleviate the stress applied from the edges in the transparent resin layer 116, thereby improving reliability while making the optical package 300 a CSP (Cross-Splitting Component).

[0094] <4. Fourth Embodiment> In the third embodiment described above, the resin layer 317 on the transparent substrate 118 side was provided from the edges in the thickness direction of the transparent resin layer 116 on the optical element RA towards the inside. In this fourth embodiment, the resin layer 317 on the optical chip P12 side was provided from the edges in the thickness direction of the transparent resin layer 116 on the optical element RA towards the inside.

[0095] Figure 16 shows an example of the configuration of an optical package according to the fourth embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 400, and b is a plan view showing an example of the configuration of the optical package 400. Figure a shows an example of the configuration cut along the line A1-A2 in figure b.

[0096] In the figure, the optical package 400 includes a resin layer 417 in place of the resin layer 317 of the third embodiment described above. The other configurations of the optical package 400 of the fourth embodiment are the same as those of the optical package 300 of the third embodiment described above.

[0097] The resin layer 417 is provided on the optical chip P12 side, extending inward from the end of the transparent resin layer 116 along its entire thickness. Here, the resin layer 417 can contact the transparent substrate 118 and the optical chip P12. In this case, the thickness of the resin layer 417 can be equal to the thickness of the transparent resin layer 116. The resin layer 417 can be positioned outside the optical element RA. In this case, the resin layer 417 may be positioned to surround the periphery of the optical element RA. The other configurations of the resin layer 417 are the same as those of the resin layer 317 in the third embodiment described above.

[0098] Thus, in the fourth embodiment described above, a resin layer 417 is provided on the optical chip P12 side, extending inward from the edges of the transparent resin layer 116 on the optical element RA along its entire thickness. This makes it possible to alleviate the stress applied to the transparent resin layer 116 from the edges inward, thereby improving reliability while enabling the optical package 400 to be made into a CSP (Cross-Side Packaging).

[0099] Figure 17 is a diagram showing the relationship between the resin layer configuration and normal stress of the optical package according to this embodiment. Note that E1 shows an example without the underfill 154 and resin layers 117, 217, 317, and 417. E2 shows an example without the resin layers 117, 217, 317, and 417. E3 to E5 show examples with resin layers 317, 217, and 117, respectively.

[0100] In the figure, compressive stress occurs when the underfill 154 is absent. When resin layers 317, 217, and 117 are provided, the vertical stress decreases compared to when resin layers 317, 217, and 117 are absent.

[0101] Figure 18 shows the relationship between the film thickness of the resin layer and the normal stress in the optical package according to this embodiment. In this figure, the relationship between the film thickness and the normal stress when the film thickness of the resin layer 117 is changed is shown at three points T1 to T3.

[0102] In the figure, the stress on the transparent resin layer 116 is reduced by providing the resin layer 117. This is thought to be because stress concentrates at the interface between the transparent resin layer 116 and the transparent substrate 118. At this time, the normal stress decreases as the thickness of the resin layer 117 decreases, and it is presumed that the stress is lowest when the thickness ratio of the resin layer 117 to the transparent resin layer 116 is 1:1.

[0103] <5. Fifth Embodiment> In the first embodiment described above, a resin layer 117 was provided on the transparent resin layer 116 on the optical element RA, extending inward from the upper end. In this fifth embodiment, a double layer of resin is provided on the transparent resin layer 116 on the optical element RA, extending inward from the upper end.

[0104] Figure 19 shows an example of the configuration of an optical package according to the fifth embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 500, and b is a plan view showing an example of the configuration of the optical package 500. Figure a shows an example of the configuration cut along the line A1-A2 in figure b.

[0105] In the figure, the optical package 500 includes a resin layer 517 instead of the resin layer 117 of the first embodiment described above. The other configurations of the optical package 500 of the fifth embodiment are the same as those of the optical package 100 of the first embodiment described above.

[0106] The resin layer 517 is provided extending inward from the upper end of the transparent resin layer 116. In this case, the resin layer 517 and the transparent resin layer 116 can be in contact with each other in their thickness direction. The resin layer 517 can be arranged in a double layer on the outside of the optical element RA. In this case, the resin layer 517 may be positioned to surround the optical element RA by two turns. The surface of the resin layer 517 is exposed from the surface of the transparent resin layer 116. In this case, the surface of the resin layer 517 may be flattened from the surface of the transparent resin layer 116. Here, the resin layer 517 can be spaced apart from the semiconductor substrate 111. In this case, the thickness of the resin layer 517 can be made thinner than the thickness of the transparent resin layer 116. The other configurations of the resin layer 517 are the same as those of the resin layer 117 in the first embodiment described above.

[0107] As described above, in the fifth embodiment, a double layer of resin 517 is provided on the transparent resin layer 116 on the optical element RA, extending inward from the upper end. This makes it possible to alleviate the stress applied to the transparent resin layer 116 from the upper end inward, thereby improving reliability while making the optical package 500 a CSP (Cross-Splitting Component).

[0108] <6. Sixth Embodiment> In the fifth embodiment described above, a double layer of resin layer 517 was provided on the transparent resin layer 116 on the optical element RA, extending from the upper end inward. In this sixth embodiment, a double layer of resin layer 517 is provided on the transparent resin layer 116 on the optical element RA, extending from the lower end inward.

[0109] Figure 20 shows an example of the configuration of an optical package according to the sixth embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 600, and b is a plan view showing an example of the configuration of the optical package 600. Figure a shows an example of the configuration cut along the line A1-A2 in figure b.

[0110] In the figure, this optical package 600 includes a resin layer 617 in place of the resin layer 517 of the fifth embodiment described above. The other configurations of the optical package 600 of the sixth embodiment are the same as those of the optical package 500 of the fifth embodiment described above.

[0111] The resin layer 617 is provided extending inward from the lower end of the transparent resin layer 116. In this case, the resin layer 617 and the transparent resin layer 116 can be in contact with each other in their thickness direction. The resin layer 617 can be arranged in a double layer on the outside of the optical element RA. In this case, the resin layer 617 may be positioned to surround the optical element RA by two turns. The lower surface of the resin layer 617 is exposed from the lower surface of the transparent resin layer 116. In this case, the lower surface of the resin layer 617 may be in contact with the semiconductor substrate 111. Here, the resin layer 617 can be spaced apart from the transparent substrate 118. In this case, the thickness of the resin layer 617 can be made thinner than the thickness of the transparent resin layer 116. The other configurations of the resin layer 617 are the same as those of the resin layer 517 in the fifth embodiment described above.

[0112] As described above, in the sixth embodiment, a double layer of resin 617 is provided on the optical element RA, extending from the lower end of the transparent resin layer 116 inward. This makes it possible to alleviate the stress applied from the lower end of the transparent resin layer 116 inward, thereby improving reliability while making the optical package 600 a CSP (Cross-Splitting Component).

[0113] In the fifth and sixth embodiments described above, each resin layer 517, 617 was doubled. In addition, each resin layer 517, 617 may be tripled or more. Furthermore, each resin layer 517, 617 may be arranged linearly along each side of the transparent substrate 118, or it may be arranged in a meandering pattern. Also, the planar pattern of each resin layer 517, 617 may be set according to the stress distribution applied to the transparent resin layer 116.

[0114] <7. Seventh Embodiment> In the first embodiment described above, a resin layer 117 was provided on the transparent resin layer 116 on the optical element RA, extending inward from the upper end. In this seventh embodiment, a light-shielding resin layer is provided on the transparent resin layer 116 on the optical element RA, extending inward from the upper end.

[0115] Figure 21 shows an example of the configuration of an optical package according to the seventh embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 700, and b is a plan view showing an example of the configuration of the optical package 700. Figure a shows an example of the configuration cut along the line A1-A2 in figure b.

[0116] In the figure, the optical package 700 includes a resin layer 717 instead of the resin layer 117 of the first embodiment described above. The other configurations of the optical package 700 of the seventh embodiment are the same as those of the optical package 100 of the first embodiment described above.

[0117] The resin layer 717 is provided extending inward from the upper end of the transparent resin layer 116. In this case, the resin layer 717 and the transparent resin layer 116 can be in contact with each other in their thickness direction. The resin layer 117 can be positioned outside the optical element RA. In this case, the resin layer 717 may be positioned to surround the periphery of the optical element RA.

[0118] Furthermore, the resin layer 717 has light-shielding properties. To give the resin layer 717 light-shielding properties, black pigment, carbon black, or metal powder such as Cr may be mixed into the resin layer 717.

[0119] Furthermore, a portion of the resin layer 717 is embedded in the transparent substrate 118. A step can be provided at the edge of the transparent substrate 118 in order to embed a portion of the resin layer 717. In this case, the thickness of the resin layer 717 may be thinner or thicker than the thickness of the transparent resin layer 116. The thickness of the resin layer 717 may also be equal to the thickness of the transparent resin layer 116. In addition, the resin layer 717 can be separated from the semiconductor substrate 111. The other configurations of the resin layer 717 are the same as those of the resin layer 117 in the first embodiment described above.

[0120] As described above, in the seventh embodiment, a light-shielding resin layer 717 is provided on the transparent resin layer 116 on the optical element RA, extending inward from the upper end. This reduces the stress on the transparent resin layer 116 from the upper end inward and also reduces flare on the optical element RA. As a result, it is possible to improve reliability while implementing CSP (Cross-Splitting Component) for the optical package 100, and to improve the image quality of the captured image.

[0121] In the seventh embodiment described above, an example was shown in which the resin layer 717 was given light-shielding properties. In addition to this, the resin layers 117 to 617 of the first to sixth embodiments described above may also be given light-shielding properties.

[0122] <8. Eighth Embodiment> In the first embodiment described above, a resin layer 117 was provided on the transparent resin layer 116 on the optical element RA, extending inward from the upper end. In this eighth embodiment, a resin layer is patterned on the transparent resin layer 116 on the optical element RA, extending inward from the upper end.

[0123] Figure 22 is a diagram showing an example configuration of an optical package according to the eighth embodiment. In the figure, a is a cross-sectional view showing an example configuration of the optical package 800, and b is a plan view showing an example configuration of the optical package 800. Figure a shows an example configuration cut along the line A1-A2 in figure b.

[0124] In the figure, the optical package 800 includes a resin layer 817 instead of the resin layer 117 of the first embodiment described above. The other configurations of the optical package 800 of the eighth embodiment are the same as those of the optical package 100 of the first embodiment described above.

[0125] The resin layer 817 is provided extending inward from the upper end of the transparent resin layer 116. In this case, the resin layer 817 and the transparent resin layer 116 can be in contact with each other in their thickness direction. The resin layer 817 can be positioned outside the optical element RA. In this case, the resin layer 817 may be positioned to surround the optical element RA. The surface of the resin layer 817 is exposed from the surface of the transparent resin layer 116. In this case, the surface of the resin layer 817 may be flattened from the surface of the transparent resin layer 116. Here, the resin layer 817 can be spaced apart from the semiconductor substrate 111. In this case, the thickness of the resin layer 817 can be made thinner than the thickness of the transparent resin layer 116.

[0126] The resin layer 817 is patterned. Lithography and dry etching techniques may be used to pattern the resin layer 817. Alternatively, a photosensitive resin may be used as the material for the resin layer 817. In this case, jagged edges may be formed on the inner surface of the resin layer 817 to reduce flare on the optical element RA. The jagged edges may have a jagged shape. The other configurations of the resin layer 817 are the same as those of the resin layer 117 in the first embodiment described above.

[0127] As described above, in the eighth embodiment, a resin layer 817 is patterned from the upper end to the inner side of the transparent resin layer 116 on the optical element RA. This makes it possible to reduce the stress applied from the upper end to the inner side of the transparent resin layer 116, and to improve the decorative properties of the planar shape while ensuring the dimensional accuracy of the resin layer 817. As a result, it is possible to improve reliability while making the optical package 100 CSP, and to make the resin layer 817 multifunctional, such as reducing stress and reducing flare.

[0128] <9. Ninth Embodiment> In the eighth embodiment described above, a resin layer 817 was patterned from the upper end to the inner side of the transparent resin layer 116 on the optical element RA. In this ninth embodiment, a resin layer is patterned from the lower end to the inner side of the transparent resin layer 116 on the optical element RA.

[0129] Figure 23 shows an example of the configuration of an optical package according to the ninth embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 900, and b is a plan view showing an example of the configuration of the optical package 900. Figure a shows an example of the configuration cut along the line A1-A2 in figure b.

[0130] In the figure, the optical package 900 includes a resin layer 917 in place of the resin layer 817 of the eighth embodiment described above. The other configurations of the optical package 900 of the ninth embodiment are the same as those of the optical package 800 of the eighth embodiment described above.

[0131] The resin layer 917 is provided extending inward from the lower end of the transparent resin layer 116. In this case, the resin layer 917 and the transparent resin layer 116 can be in contact with each other in their thickness direction. The resin layer 917 can be positioned outside the optical element RA. In this case, the resin layer 917 may be positioned to surround the optical element RA. The lower surface of the resin layer 917 is exposed from the lower surface of the transparent resin layer 116. In this case, the lower surface of the resin layer 917 may be in contact with the semiconductor substrate 111. Here, the resin layer 917 can be spaced apart from the transparent substrate 118. In this case, the thickness of the resin layer 917 can be made thinner than the thickness of the transparent resin layer 116.

[0132] The resin layer 917 is patterned. At this time, jagged edges may be formed on the inner circumferential surface of the resin layer 917 to reduce flare on the optical element RA. The jagged edges may have a jagged shape. The other configurations of the resin layer 917 are the same as those of the resin layer 817 in the eighth embodiment described above.

[0133] As described above, in the ninth embodiment, a resin layer 917 is patterned from the lower end to the inner side of the transparent resin layer 116 on the optical element RA. This makes it possible to reduce the stress applied from the lower end to the inner side of the transparent resin layer 116, and to improve the decorative properties of the planar shape while ensuring the dimensional accuracy of the resin layer 917. As a result, it is possible to improve reliability while making the optical package 100 CSP, and to make the resin layer 917 multifunctional, such as reducing stress and reducing flare.

[0134] In the above embodiment, an example was shown in which a transparent substrate 118 is provided on the transparent resin layer 116, but the transparent substrate 118 on the transparent resin layer 116 is not required. In this case, the optical package may be a glassless CSP.

[0135] <10. Tenth Embodiment> In the first embodiment described above, a resin layer 117 was provided on the transparent resin layer 116 on the optical element RA, extending inward from the upper end. In this tenth embodiment, the resin layer arranged on the transparent resin layer 116 on the optical element RA, extending inward from the upper end, is embedded in the transparent substrate 118.

[0136] Figure 24 shows an example of the configuration of an optical package according to the tenth embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 1000, and b is a plan view showing an example of the configuration of the optical package 1000. Figure a shows an example of the configuration cut along the line A1-A2 in figure b.

[0137] In the figure, the optical package 1000 includes a resin layer 1017 instead of the resin layer 117 of the first embodiment described above. The other configurations of the optical package 1000 of the tenth embodiment are the same as those of the optical package 100 of the first embodiment described above.

[0138] The resin layer 1017 is provided extending inward from the edge of the upper surface of the transparent resin layer 116. In this case, the resin layer 1017 and the transparent resin layer 116 can be in contact with each other in their thickness direction. The resin layer 1017 can be positioned outside the optical element RA. In this case, the resin layer 1017 may be positioned to surround the periphery of the optical element RA.

[0139] Furthermore, the resin layer 1017 is embedded in the transparent substrate 118. A step can be provided at the edge of the transparent substrate 118 in order to embed the resin layer 1017. In this case, the thickness of the resin layer 1017 may be thinner or thicker than the thickness of the transparent resin layer 116. The thickness of the resin layer 1017 may also be equal to the thickness of the transparent resin layer 116. In addition, the surface of the resin layer 1017 is exposed from the surface of the transparent substrate 118. In this case, the surface from the surface of the resin layer 1017 to the surface of the transparent resin layer 116 may be flattened. By embedding the resin layer 1017 in the transparent substrate 118, the width of the resin layer 1017 can be defined at the position of the step in the transparent substrate 118, thereby improving the dimensional accuracy of the resin layer 1017. The other configurations of the resin layer 1017 are the same as those of the resin layer 117 in the first embodiment described above.

[0140] Figures 25 to 30 are cross-sectional views showing an example of a method for manufacturing an optical package according to the tenth embodiment. Figures 25 to 30 show the manufacturing process for two optical packages 1000.

[0141] As shown in Figure 25a, grooves KA3 are formed in each partitioned region RK on the transparent substrate wafer 118W based on lithography and dry etching techniques. The grooves KA3 can be formed at the placement positions of the resin layer 1017.

[0142] Next, as shown in Figure 25b, the resin layer 1017 is applied to the groove KA3 for each partitioned area RK via the dispenser NZ. At this time, the resin layer 1017 may protrude from the groove KA3.

[0143] Next, as shown in Figure 26a, the resin layer 1017 applied in the groove KA3 is planarized. For planarization of the resin layer 1017, etch-back may be used, back-grinding may be used, or CMP may be used. At this time, along with planarization of the resin layer 1017, the surface of the transparent substrate wafer 118W may be thinned. This makes it possible to improve the dimensional uniformity of the resin layer 1017 applied in the groove KA3, and to remove scratches, defects, dust, etc. from the surface of the transparent substrate 118, thereby improving the quality of the transparent substrate 118.

[0144] Next, as shown in Figure 26b, a transparent resin layer 116 is formed on the transparent substrate wafer 118W so as to cover the resin layer 1017.

[0145] Next, as shown in Figure 27a, the transparent substrate wafer 118W on which the transparent resin layer 116 and resin layer 1017 are formed is positioned against the laminated wafer W10. At this time, the optical chip P12 and the transparent resin layer 116 can be positioned facing each other.

[0146] Next, as shown in Figure 27b, the transparent substrate wafer 118W on which the transparent resin layer 116 and the resin layer 1017 are formed is bonded to the laminated wafer W10.

[0147] Next, as shown in Figure 28 a, the back side of the circuit wafer W11 is thinned. Thinning of the circuit wafer W11 may be done using etch-back, back-grinding, or CMP.

[0148] Next, as shown in Figure 28b, an opening KA is formed in each partitioned region RK on the semiconductor substrate 141 of the circuit wafer W11. The opening KA can be formed at the location of the through electrode 143.

[0149] Next, as shown in Figure 29a, an insulating layer 142 is formed on the back side of the semiconductor substrate 141 of the circuit wafer W11. Then, the insulating layer 142 on the bottom surface of the opening KA is removed.

[0150] Next, through electrodes 143 are formed in the openings KA for each partitioned region RK, and rewiring 144 is formed on the insulating layer 142.

[0151] Next, as shown in Figure 29b, a protective film 145 is formed on the back side of the circuit wafer W11. Then, an opening KA2 is formed in the protective film 145. The opening KA2 can be formed at the position where the protruding electrode 146 is positioned.

[0152] Next, as shown in Figure 30a, a protruding electrode 146 is formed on the back side of the circuit wafer W11 through an opening KA2.

[0153] Next, as shown in Figure 30b, the stacked wafer W10, on which the transparent substrate wafer 118W is stacked, is divided into individual sections RK, and the optical package 1000 is cut out.

[0154] As described above, in the tenth embodiment, the resin layer 1017, which is positioned from the edge of the upper surface of the transparent resin layer 116 on the optical element RA inward, is embedded in the transparent substrate 118. This makes it possible to relieve the stress applied from the upper edge to the inner surface of the transparent resin layer 116 while maintaining the flatness of the transparent resin layer 116, thereby improving reliability while making the optical package 1000 a CSP (Cross-Side Packaging).

[0155] <11. Eleventh Embodiment> In the tenth embodiment described above, a resin layer 1017, which is positioned from the edge to the inside of the upper surface of the transparent resin layer 116 on the optical element RA, is embedded in the transparent substrate 118. In this eleventh embodiment, a doubled resin layer 1017, which is positioned from the edge to the inside of the upper surface of the transparent resin layer 116 on the optical element RA, is embedded in the transparent substrate 118.

[0156] Figure 31 is a diagram showing an example configuration of an optical package according to the eleventh embodiment. In the figure, a is a cross-sectional view showing an example configuration of the optical package 1100, and b is a plan view showing an example configuration of the optical package 1100. Figure a shows an example configuration cut along the line A1-A2 in figure b.

[0157] In the figure, the optical package 1100 includes a resin layer 1117 instead of the resin layer 1017 of the tenth embodiment described above. The other configurations of the optical package 1100 of the eleventh embodiment are the same as those of the optical package 1000 of the tenth embodiment described above.

[0158] The resin layer 1117 is provided extending inward from the edge of the upper surface of the transparent resin layer 116. In this case, the resin layer 1117 and the transparent resin layer 116 can be in contact with each other in their thickness direction. The resin layer 1117 can be arranged in a double layer on the outside of the optical element RA. In this case, the resin layer 1117 may be positioned for two turns so as to surround the periphery of the optical element RA. The surface of the resin layer 1117 is exposed from the surface of the transparent substrate 118. In this case, the surface from the surface of the resin layer 1117 to the surface of the transparent substrate 118 may be flattened. The thickness of the resin layer 1117 may be thinner or thicker than the thickness of the transparent resin layer 116. The thickness of the resin layer 1117 may be equal to the thickness of the transparent resin layer 116. The other configurations of the resin layer 1117 are the same as those of the resin layer 1017 in the tenth embodiment described above.

[0159] As described above, in the 11th embodiment, a doubled resin layer 1117 extending from the upper edge to the inner side of the transparent resin layer 116 on the optical element RA is embedded in the transparent substrate 118. This makes it possible to maintain the flatness of the transparent resin layer 116 while relieving the stress applied from the upper edge to the inner side of the transparent resin layer 116, thereby improving reliability while making the optical package 1100 a CSP (Cross-Side Packaging).

[0160] <12. Twelfth Embodiment> In the tenth embodiment described above, a resin layer 1017, which is positioned from the edge to the inside of the upper surface of the transparent resin layer 116 on the optical element RA, is embedded in the transparent substrate 118. In this twelfth embodiment, a light-shielding resin layer, which is positioned from the edge to the inside of the upper surface of the transparent resin layer 116 on the optical element RA, is embedded in the transparent substrate 118.

[0161] Figure 32 shows an example of the configuration of an optical package according to the twelfth embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 1200, and b is a plan view showing an example of the configuration of the optical package 1200. Figure a shows an example of the configuration cut along the line A1-A2 in figure b.

[0162] In the figure, the optical package 1200 includes a resin layer 1217 instead of the resin layer 1017 of the tenth embodiment described above. The other configurations of the optical package 1200 of the twelfth embodiment are the same as those of the optical package 1000 of the tenth embodiment described above.

[0163] The resin layer 1217 is provided extending inward from the edge of the upper surface of the transparent resin layer 116. In this case, the resin layer 1217 and the transparent resin layer 116 can be in contact with each other in their thickness direction. The resin layer 1217 can be positioned outside the optical element RA. In this case, the resin layer 1217 may be positioned to surround the periphery of the optical element RA.

[0164] Furthermore, the resin layer 1217 is embedded in the transparent substrate 118. At this time, the surface of the resin layer 1217 is exposed from the surface of the transparent substrate 118. Here, the surface from the resin layer 1217 to the surface of the transparent resin layer 116 may be flattened.

[0165] Furthermore, the resin layer 1217 has light-shielding properties. To give the resin layer 1217 light-shielding properties, black pigment, carbon black, or metal powder such as Cr may be mixed into the resin layer 1217. The other components of the resin layer 1217 are the same as those of the resin layer 1017 in the tenth embodiment described above.

[0166] As described above, in the twelfth embodiment, a light-shielding resin layer 1217 is provided extending inward from the upper end of the transparent resin layer 116 on the optical element RA. This makes it possible to reduce the stress applied to the transparent resin layer 116 extending inward from the upper end, and to reduce flare on the optical element LA. As a result, it is possible to improve reliability while implementing CSP (Computer-Sensitive Processing) for the optical package 1200, and to improve the image quality of the captured image.

[0167] In addition, in the 10th to 12th embodiments described above, jagged edges may be provided on the inner circumferential surfaces of each resin layer 1017 to 1217, similar to the 8th embodiment described above. In order to provide jagged edges on the inner circumferential surfaces of each resin layer 1017 to 1217, jagged edges may be provided on the steps of the transparent substrate 118. In order to provide jagged edges on the steps of the transparent substrate 118, in step a in Figure 25, jagged edges may be formed on the side surface of the groove KA3 based on lithography and dry etching techniques.

[0168] <13. Thirteenth Embodiment> In the first embodiment described above, a resin layer 117 was provided from the upper end to the inside of the transparent resin layer 116 on the optical element RA. In this thirteenth embodiment, the resin layer that was arranged from the end to the inside of the transparent resin layer 116 on the optical element RA is provided on the entire side surface of the transparent substrate.

[0169] Figure 33 shows an example of the configuration of an optical package according to the thirteenth embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 1300, and b is a plan view showing an example of the configuration of the optical package 1300. Figure a shows an example of the configuration cut along the line A1-A2 in figure b.

[0170] In the figure, the optical package 1300 includes a resin layer 1317 and a transparent substrate 1318 instead of the resin layer 117 and transparent substrate 118 of the first embodiment described above. The other configurations of the optical package 1300 of the thirteenth embodiment are the same as those of the optical package 100 of the first embodiment described above.

[0171] The transparent substrate 1318 is provided on the transparent resin layer 116. The planar size of the transparent substrate 1318 can be smaller than the planar size of the optical chip P12. In this case, the horizontal edge of the transparent substrate 1318 can be located inside the horizontal edge of the transparent resin layer 116. Also, the horizontal edge of the transparent substrate 1318 can be located outside the horizontal edge of the optical element RA. The other configurations of the transparent substrate 1318 are the same as those of the transparent substrate 118 in the first embodiment described above.

[0172] The resin layer 1317 is provided on the transparent resin layer 116 on the side surface of the transparent substrate 1318. Here, the resin layer 1317 can cover the entire side surface of the transparent substrate 1318. In this case, the thickness of the resin layer 1317 can be equal to the thickness of the transparent substrate 1318. The resin layer 1317 can be positioned outside the optical element RA. In this case, the resin layer 1317 may be positioned to surround the periphery of the optical element RA. Furthermore, the surface of the resin layer 1317 may be flattened from the surface to the surface of the transparent substrate 1318. Also, the position of the horizontal end of the resin layer 1317 may be equal to the position of the horizontal end of the transparent resin layer 116. In this case, the side surface of the transparent resin layer 116 and the side surface of the resin layer 1317 may be composed of dicing surfaces. The other configurations of the resin layer 1317 are the same as those of the resin layer 117 in the first embodiment described above.

[0173] Figure 34 is a diagram showing the relationship between the structure of the resin layer of the optical package according to this embodiment and the normal stress. A1 shows the stress on the edge of the transparent resin layer 116 at the interface between the transparent resin layer 116 and the transparent substrate 118 when the resin layer 1017 in Figure 24 is not embedded in the transparent substrate 118. A2 shows the stress on the edge of the transparent resin layer 116 at the interface between the resin layer 1017 and the transparent resin layer 116 in Figure 24. B2 shows the stress on the transparent resin layer 116 at the inner edge of the resin layer 1017 at the interface between the resin layer 1017 and the transparent resin layer 116 in Figure 24. A3 shows the stress on the edge of the transparent resin layer 116 at the interface between the resin layer 1317 and the transparent resin layer 116 in Figure 33. B3 shows the stress on the transparent resin layer 116 at the inner edge of the resin layer 1317 at the interface between the resin layer 1317 and the transparent resin layer 116 in Figure 33.

[0174] In Figure 34, when the resin layer 1017 of Figure 24 is embedded in the transparent substrate 118, the normal stress on the inner edge of the resin layer 1017 is reduced compared to when the resin layer 1017 is not embedded in the transparent substrate 118. Also, when the resin layer 1317 of Figure 33 is provided on the side surface of the transparent substrate 1318, the normal stress on the inner edge of the resin layer 1317 is reduced compared to when the resin layer 1017 is not embedded in the transparent substrate 118.

[0175] Figures 35 to 43 are cross-sectional views showing a first example of a method for manufacturing an optical package according to the thirteenth embodiment. Figures 35 to 43 show the manufacturing process for two optical packages 1300.

[0176] In Figure 35a, the transparent substrate wafer 118W is divided into sections RK.

[0177] Next, as shown in Figure 35b, the dicing tape DT1 is attached to the transparent substrate wafer 118W.

[0178] Next, as shown in Figure 35c, grooves MZ are formed in the transparent substrate wafer 118W for each partitioned region RK using the blade BD, and the transparent substrate wafer 118W is cut. As a result, as shown in Figure 36a, the transparent substrate wafer 118W is divided into individual pieces on the transparent substrate 1318 for each partitioned region RK while maintaining spacing corresponding to the width of the blade BD on the dicing tape DT1. At this time, the tip of the blade BD may be driven into the dicing tape DT1 to half-cut the dicing tape DT1. The width of the grooves MZ can be set to (twice the width of the resin layer 1017) + (the width of the blade used to cut the resin layer 1017).

[0179] Next, as shown in Figure 36b, with the dicing tape DT1 still attached to one side of the transparent substrate 1318, the dicing tape DT2 is attached to the other side of the transparent substrate 1318.

[0180] Next, as shown in c in Figure 36, the dicing tape DT1 is peeled off the transparent substrate 1318. At this time, each transparent substrate 1318 can maintain a spacing on the dicing tape DT2 that corresponds to the width of the blade BD.

[0181] Next, as shown in Figure 37a, the resin layer 1317 is embedded in the groove MZ. At this time, the resin layer 1317 may protrude onto the transparent substrate 1318. The method for embedding the resin layer 1317 in the groove MZ may be potting, dispensing, or printing.

[0182] Next, as shown in Figure 37b, the resin layer 1317 embedded in the groove MZ is planarized. For planarization of the resin layer 1317, etch-back may be used, back-grinding may be used, or CMP may be used. At this time, the surface of the transparent substrate 1318 may be thinned along with the planarization of the resin layer 1317. This makes it possible to remove scratches, defects, dust, etc. from the surface of the transparent substrate 1318, thereby improving the quality of the transparent substrate 1318.

[0183] Next, as shown in c in Figure 37, the dicing tape DT2 is peeled off from the transparent substrate 1318. At this time, a bonded wafer W13 is formed in which the transparent substrate 1318 is bonded horizontally via the resin layer 1317.

[0184] Next, as shown in Figure 38 a, a transparent resin layer 116 is formed on the optical chip P12.

[0185] Next, as shown in Figure 38b, the bonded wafer W13, to which the transparent substrate 1318 is bonded via the resin layer 1317, and the laminated wafer W10, on which the transparent resin layer 116 is formed, are positioned. At this time, the bonded wafer W13 and the transparent resin layer 116 can be placed facing each other.

[0186] Next, as shown in Figure 39a, a bonded wafer W13, on which a transparent substrate 1318 is bonded via a resin layer 1317, and a laminated wafer W10 on which a transparent resin layer 116 is formed are bonded together.

[0187] Next, as shown in Figure 39b, the back side of the circuit wafer W11 is thinned. Thinning of the circuit wafer W11 may be done using etch-back, back-grinding, or CMP.

[0188] Next, as shown in c in Figure 39, openings KA are formed in each partitioned region RK on the semiconductor substrate 141 of the circuit wafer W11. The openings KA can be formed at the positions of the through electrodes 143.

[0189] Next, as shown in Figure 40a, an insulating layer 142 is formed on the back side of the semiconductor substrate 141 of the circuit wafer W11. Then, the insulating layer 142 on the bottom surface of the opening KA is removed.

[0190] Next, through electrodes 143 are formed in the openings KA for each partitioned region RK, and rewiring 144 is formed on the insulating layer 142.

[0191] Next, as shown in Figure 40b, a protective film 145 is formed on the back side of the circuit wafer W11. Then, an opening KA2 is formed in the protective film 145. The opening KA2 can be formed at the position where the protruding electrode 146 is located.

[0192] Next, as shown in Figure 41a, a protruding electrode 146 is formed on the back side of the circuit wafer W11 through an opening KA2.

[0193] Next, as shown in Figure 41b, the laminated wafer W10, on which the bonded wafers W13 are stacked, is separated into individual pieces for each partitioned region RK, and the optical package 1300 is cut out. At this time, the bonded wafer W13 can be cut in the center of the resin layer 1317.

[0194] In addition, the steps shown in Figures 35 to 37 above may be replaced with the steps shown in Figures 42 and 43. In this case, as shown in a in Figure 42, the transparent substrate wafer 118W is divided into sections RK.

[0195] Next, as shown in Figure 42b, grooves MZ2 are formed in each partitioned region RK on the transparent substrate wafer 118W based on lithography and dry etching techniques. The depth of the grooves MZ2 can be shallower than the thickness of the transparent substrate wafer 118W. In this case, the transparent substrate wafer 118W can maintain its integrity. The grooves MZ2 can be formed at the placement positions of the resin layer 1317.

[0196] Next, as shown in c in Figure 42, a resin layer 1317 is formed on the transparent substrate wafer 118W such that the groove MZ2 is filled. At this time, the entire surface of the transparent substrate wafer 118W can be covered with the resin layer 1317. The resin layer 1317 may be formed by potting, dispensing, or coating.

[0197] Next, as shown in Figure 43 a, the resin layer 1317 embedded in the groove MZ2 is planarized. At this time, an embedded wafer W13' is formed in which the resin layer 1317 is embedded in the groove MZ2. In addition, the surface of the transparent substrate wafer 118W may be thinned along with the planarization of the resin layer 1317.

[0198] Next, as shown in Figure 43b, the back side of the transparent substrate wafer 118W is thinned, exposing the resin layer 1317 on the back side of the transparent substrate wafer 118W. At this time, a bonded wafer W13 is formed in which the transparent substrate 1318 is bonded horizontally via the resin layer 1317.

[0199] Figures 44 to 48 are cross-sectional views showing a second example of the manufacturing method for an optical package according to the thirteenth embodiment. Figures 44 to 48 show the manufacturing process for two optical packages 1300.

[0200] As shown in Figure 44 a, a transparent resin layer 116 is formed on the optical chip P12.

[0201] Next, as shown in Figure 44b, the embedded wafer W13' formed in step a of Figure 43 and the laminated wafer W10 on which the transparent resin layer 116 is formed are positioned. At this time, the resin layer 1317 embedded in the embedded wafer W13' and the transparent resin layer 116 can be brought into opposition.

[0202] Next, as shown in Figure 45 a, the embedded wafer W13' with the resin layer 1317 embedded in it and the laminated wafer W10 on which the transparent resin layer 116 is formed are bonded together.

[0203] Next, as shown in Figure 45b, the back side of the circuit wafer W11 is thinned.

[0204] Next, as shown in c in Figure 45, openings KA are formed in each partitioned region RK on the semiconductor substrate 141 of the circuit wafer W11. The openings KA can be formed at the positions of the through electrodes 143.

[0205] Next, as shown in Figure 46 a, an insulating layer 142 is formed on the back side of the semiconductor substrate 141 of the circuit wafer W11. Then, the insulating layer 142 on the bottom surface of the opening KA is removed.

[0206] Next, through electrodes 143 are formed in the openings KA for each partitioned region RK, and rewiring 144 is formed on the insulating layer 142.

[0207] Next, as shown in Figure 46b, a protective film 145 is formed on the back side of the circuit wafer W11. Then, an opening KA2 is formed in the protective film 145. The opening KA2 can be formed at the position where the protruding electrode 146 is to be placed.

[0208] Next, as shown in Figure 47a, a protruding electrode 146 is formed on the back side of the circuit wafer W11 through an opening KA2.

[0209] Next, as shown in Figure 47b, the back side of the transparent substrate wafer 118W is thinned, exposing the resin layer 1317 on the back side of the transparent substrate wafer 118W. At this time, a bonded wafer W13 is formed in which the transparent substrate 1318 is bonded horizontally via the resin layer 1317.

[0210] Next, as shown in Figure 48, the laminated wafer W10, on which the bonded wafers W13 are stacked, is separated into individual pieces for each partitioned region RK, and the optical package 1300 is cut out. At this time, the bonded wafer W13 can be cut in the center of the resin layer 1317.

[0211] Here, by thinning the back surface of the transparent substrate wafer 118W in step b in Figure 47, the strength of the transparent substrate wafer 118W can be ensured while carrying out steps b in Figure 44 to a in Figure 47. Therefore, the process from step b in Figure 44 to a in Figure 47 can be stabilized without providing a reinforcement step for the transparent substrate wafer 118W.

[0212] Figures 49 to 54 are cross-sectional views showing a third example of a method for manufacturing an optical package according to the thirteenth embodiment. Figures 49 to 54 show the manufacturing process for two optical packages 1300.

[0213] As shown in Figure 49 a, a transparent resin layer 116 is formed on the optical chip P12.

[0214] Next, as shown in Figure 49b, after step a in Figure 37, the dicing tape DT2 is peeled off the transparent substrate 1318 to form an embedded wafer W5 with the resin layer 1317 embedded in it. Then, the embedded wafer W5 and the laminated wafer W10 on which the transparent resin layer 116 is formed are positioned. At this time, the flat surface of the embedded wafer W5 with the resin layer 1317 embedded in it and the transparent resin layer 116 can be brought into contact.

[0215] Next, as shown in Figure 50a, the flat surface of the embedded wafer W5, on which the resin layer 1317 is embedded, and the laminated wafer W10, on which the transparent resin layer 116 is formed, are bonded together.

[0216] Next, as shown in Figure 50b, a support substrate 1322 is bonded to the embedded wafer W5 in which the resin layer 1317 is embedded. An adhesive layer 1321 can be used to bond the embedded wafer W5 and the support substrate 1322. In this case, the resin layer 1317 protruding from the embedded wafer W5 can be covered with the adhesive layer 1321.

[0217] Next, as shown in Figure 51a, the back side of the circuit wafer W11 is thinned.

[0218] Next, as shown in Figure 51b, openings KA are formed in each partitioned region RK on the semiconductor substrate 141 of the circuit wafer W11. The openings KA can be formed at the positions of the through electrodes 143.

[0219] Next, as shown in Figure 52a, an insulating layer 142 is formed on the back side of the semiconductor substrate 141 of the circuit wafer W11. Then, the insulating layer 142 on the bottom surface of the opening KA is removed.

[0220] Next, through electrodes 143 are formed in the openings KA for each partitioned region RK, and rewiring 144 is formed on the insulating layer 142.

[0221] Next, as shown in Figure 52b, a protective film 145 is formed on the back side of the circuit wafer W11. Then, an opening KA2 is formed in the protective film 145. The opening KA2 can be formed at the position where the protruding electrode 146 is to be placed.

[0222] Next, as shown in Figure 53 a, a protruding electrode 146 is formed on the back side of the circuit wafer W11 through an opening KA2.

[0223] Next, as shown in Figure 53b, the support substrate 1322 and adhesive layer 1321 are removed from the embedded wafer W5 in which the resin layer 1317 is embedded.

[0224] Next, as shown in Figure 54, the stacked wafer W10, on which the embedded wafers W5 are stacked, is separated into individual sections RK, and the optical package 1300 is cut out. At this time, the bonded wafer W13 can be cut in the center of the resin layer 1317. The resin layer 1317 can be made to protrude onto the transparent substrate 1318.

[0225] Figures 55 to 61 are cross-sectional views showing a fourth example of the method for manufacturing an optical package according to the thirteenth embodiment. Figures 55 to 61 show the manufacturing process for two optical packages 1300.

[0226] As shown in Figure 55 a, a transparent resin layer 116 is formed on the optical chip P12.

[0227] Next, as shown in Figure 55b, the transparent substrate 1318 and the laminated wafer W10 on which the transparent resin layer 116 is formed are positioned in each partitioned region RK. At this time, the transparent substrate 1318 and the transparent resin layer 116 can be placed facing each other. The transparent substrate 1318 can be formed by framing the transparent substrate wafer 118W. For framing the transparent substrate wafer 118W, dancing may be used, laser cutting may be used, or etching may be used.

[0228] Next, as shown in Figure 56 a, the transparent substrate 1318 and the laminated wafer W10 on which the transparent resin layer 116 is formed are bonded together in each partitioned region RK. At this time, grooves MZ3 are formed between the transparent substrates 1318. The grooves MZ3 can be formed at the positions where the resin layer 1317 is to be placed.

[0229] Next, as shown in Figure 56b, a resin layer 1317 is formed on each transparent substrate 1318 so as to fill the groove MZ3. At this time, the entire surface of each transparent substrate 1318 can be covered with the resin layer 1317. The resin layer 1317 may be formed by potting, dispensing, or coating.

[0230] Next, as shown in Figure 57 a, the support substrate 1322 is bonded to the resin layer 1317. An adhesive layer 1321 can be used to bond the resin layer 1317 and the support substrate 1322. If the flatness of the resin layer 1317 can be ensured, the step of bonding the support substrate 1322 to the resin layer 1317 may be omitted.

[0231] Next, as shown in Figure 57b, the back side of the circuit wafer W11 is thinned.

[0232] Next, as shown in Figure 58 a, openings KA are formed in each partitioned region RK on the semiconductor substrate 141 of the circuit wafer W11. The openings KA can be formed at the positions of the through electrodes 143.

[0233] Next, as shown in Figure 58b, an insulating layer 142 is formed on the back side of the semiconductor substrate 141 of the circuit wafer W11. Then, the insulating layer 142 on the bottom surface of the opening KA is removed.

[0234] Next, through electrodes 143 are formed in the openings KA for each partitioned region RK, and rewiring 144 is formed on the insulating layer 142.

[0235] Next, as shown in Figure 59 a, a protective film 145 is formed on the back side of the circuit wafer W11. Then, an opening KA2 is formed in the protective film 145. The opening KA2 can be formed at the position where the protruding electrode 146 is positioned.

[0236] Next, as shown in b in Figure 59, the support substrate 1322 and the adhesive layer 1321 are removed from the resin layer 1317.

[0237] Next, as shown in Figure 60a, a protruding electrode 146 is formed on the back side of the circuit wafer W11 through an opening KA2.

[0238] Next, as shown in Figure 60b, the resin layer 1317 on the transparent substrate 1318 is thinned to expose the surface of the transparent substrate 1318.

[0239] Next, as shown in Figure 61, the laminated wafer W10, in which transparent substrates 1318 with resin layers 1317 formed on their sides are stacked, is divided into individual sections RK, and the optical package 1300 is cut out.

[0240] Thus, in the 13th embodiment described above, the resin layer 1317, which is positioned from the edge to the inside of the transparent resin layer 116 on the optical element RA, is provided on the entire side surface of the transparent substrate 1318. This protects the side surface of the transparent substrate 1318 while relieving the stress applied from the upper edge to the inside of the transparent resin layer 116, thereby improving reliability while making the optical package 1300 a CSP (Cross-Side Packaging).

[0241] <14. Fourteenth Embodiment> In the thirteenth embodiment described above, the resin layer 1317, which is arranged from the edge to the inside of the transparent resin layer 116 on the optical element RA, is provided on the entire side surface of the transparent substrate 1318. In this fourteenth embodiment, the resin layer, which is arranged from the edge to the inside of the transparent resin layer 116 on the optical element RA, is provided on the edges of the side and top surfaces of the transparent substrate 1318.

[0242] Figure 62 shows an example of the configuration of an optical package according to the 14th embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 1400, and b is a plan view showing an example of the configuration of the optical package 1400. Figure a shows an example of the configuration cut along the line A1-A2 in figure b.

[0243] In the figure, the optical package 1400 includes a resin layer 1417 in place of the resin layer 1317 of the 13th embodiment described above. The other configurations of the optical package 1400 of the 14th embodiment are the same as those of the optical package 1300 of the 13th embodiment described above.

[0244] The resin layer 1417 is provided on the transparent resin layer 116, extending from the side surface to the upper edge of the transparent substrate 1318. In this case, the thickness of the resin layer 1417 can be greater than the thickness of the transparent substrate 1318. The resin layer 1417 can be positioned outside the optical element RA. In this case, the resin layer 1417 may be positioned to surround the optical element RA. The position of the horizontal edge of the resin layer 1417 may be equal to the position of the horizontal edge of the transparent resin layer 116. In this case, the side surface of the transparent resin layer 116 and the side surface of the resin layer 1417 may be composed of dicing surfaces. The other configurations of the resin layer 1417 are the same as those of the resin layer 1317 in the 13th embodiment described above.

[0245] Thus, in the 14th embodiment described above, the resin layer 1417, which is positioned from the edge inward on the transparent resin layer 116 on the optical element RA, is provided at the edges of the side and top surfaces of the transparent substrate 1318. This protects the edges of the side and top surfaces of the transparent substrate 1318 while relieving the stress applied from the upper edge inward on the transparent resin layer 116, thereby improving reliability while enabling the optical package 1400 to be made into a CSP (Cross-Side Packaging).

[0246] <15. Fifteenth Embodiment> In the thirteenth embodiment described above, the resin layer 1317, which is arranged from the edge to the inside of the transparent resin layer 116 on the optical element RA, is provided on the entire side surface of the transparent substrate 1318. In this fifteenth embodiment, the resin layer, which is arranged from the edge to the inside of the transparent resin layer 116 on the optical element RA, is provided on a part of the side surface of the transparent substrate 1318.

[0247] Figure 63 shows an example of the configuration of an optical package according to the 15th embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 1500, and b is a plan view showing an example of the configuration of the optical package 1500. Figure a shows an example of the configuration cut along the line A1-A2 in figure b.

[0248] In the figure, the optical package 1500 includes a resin layer 1517 in place of the resin layer 1317 of the 13th embodiment described above. The other configurations of the optical package 1500 of the 15th embodiment are the same as those of the optical package 1300 of the 13th embodiment described above.

[0249] The resin layer 1417 is provided on the transparent resin layer 116, on a part of the side surface of the transparent substrate 1318. In this case, the thickness of the resin layer 1417 can be thinner than the thickness of the transparent substrate 1318. The resin layer 1517 can be placed outside the optical element RA. In this case, the resin layer 1517 may be positioned to surround the optical element RA. Also, the position of the horizontal end of the resin layer 1517 may be equal to the position of the horizontal end of the transparent resin layer 116. In this case, the side surface of the transparent resin layer 116 and the side surface of the resin layer 1517 may be composed of dicing surfaces. The other configuration of the resin layer 1517 is the same as the configuration of the resin layer 1317 in the 13th embodiment described above.

[0250] Thus, in the 15th embodiment described above, the resin layer 1517, which is positioned from the edge inward on the transparent resin layer 116 on the optical element RA, is provided on a part of the side surface of the transparent substrate 1318. This protects the side surface of the transparent substrate 1318 while relieving the stress applied from the upper edge inward on the transparent resin layer 116, thereby improving reliability while making the optical package 1500 a CSP (Cross-Side Packaging).

[0251] <16. Sixteenth Embodiment> In the thirteenth embodiment described above, a resin layer 1317, which is arranged from the edge to the inside on the transparent resin layer 116 on the optical element RA, is provided on the entire side surface of the transparent substrate 1318. In this sixteenth embodiment, a light-shielding resin layer, which is arranged from the edge to the inside on the transparent resin layer 116 on the optical element RA, is provided on the entire side surface of the transparent substrate 1318.

[0252] Figure 64 shows an example of the configuration of an optical package according to the 16th embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 1600, and b is a plan view showing an example of the configuration of the optical package 1600. Figure a shows an example of the configuration cut along the line A1-A2 in figure b.

[0253] In the figure, the optical package 1600 includes a resin layer 1617 instead of the resin layer 1317 of the 13th embodiment described above. The other configurations of the optical package 1600 of the 16th embodiment are the same as those of the optical package 1300 of the 13th embodiment described above.

[0254] The resin layer 1617 is provided on the side surface of the transparent substrate 1318 on the transparent resin layer 116. Here, the thickness of the resin layer 1617 can be equal to the thickness of the transparent substrate 1318. The resin layer 1617 can be positioned outside the optical element RA. In this case, the resin layer 1617 may be positioned to surround the periphery of the optical element RA. Also, the position of the horizontal end of the resin layer 1617 may be equal to the position of the horizontal end of the transparent resin layer 116. In this case, the side surface of the transparent resin layer 116 and the side surface of the resin layer 1617 may be composed of dicing surfaces.

[0255] Furthermore, the resin layer 1617 has light-shielding properties. To give the resin layer 1617 light-shielding properties, black pigment, carbon black, or metal powder such as Cr may be mixed into the resin layer 1617. The other components of the resin layer 1617 are the same as those of the resin layer 1317 in the 13th embodiment described above.

[0256] As described above, in the 16th embodiment, a light-shielding resin layer 1617 is provided on the entire side surface of the transparent substrate 1318, positioned from the edge inward on the transparent resin layer 116 on the optical element RA. This makes it possible to protect the side surface of the transparent substrate 1318 while reducing the stress applied from the upper edge inward on the transparent resin layer 116, and also reduces flare on the optical element LA. As a result, it is possible to improve reliability while making the optical package 1600 a CSP (Compression Storage Package), and to improve the image quality of the captured image.

[0257] In the 16th embodiment described above, an example was shown in which the resin layer 1617 was given light-shielding properties. In addition to this, the resin layers 1417 and 1517 of the 14th and 15th embodiments described above may also be given light-shielding properties.

[0258] <17. Seventeenth Embodiment> In the thirteenth embodiment described above, the resin layer 1317, which is arranged from the edge to the inside of the transparent resin layer 116 on the optical element RA, is provided on the entire side surface of the transparent substrate 1318. In this seventeenth embodiment, the resin layer 1317, which is arranged from the edge to the inside of the transparent resin layer 116 on the optical element RA, is provided on the side surface of the transparent substrate 1318 and within the transparent resin layer 116.

[0259] Figure 65 shows an example of the configuration of an optical package according to the 17th embodiment. In the figure, a is a cross-sectional view showing an example of the configuration of the optical package 1700, and b is a plan view showing an example of the configuration of the optical package 1700. Figure a shows an example of the configuration cut along the line A1-A2 in figure b.

[0260] In the figure, the optical package 1700 includes a resin layer 1717 instead of the resin layer 1317 of the 13th embodiment described above. The other configurations of the optical package 1700 of the 17th embodiment are the same as those of the optical package 1300 of the 13th embodiment described above.

[0261] The resin layer 1717 is provided on the side surface of the transparent substrate 1318 on the transparent resin layer 116. A portion of the resin layer 1717 can penetrate the transparent resin layer 116. In this case, the resin layer 1717 may cover the edge of the lower surface of the transparent substrate 1318. The resin layer 1717 can be positioned outside the optical element RA. In this case, the resin layer 1717 may be positioned to surround the optical element RA. The position of the horizontal edge of the resin layer 1717 may be equal to the position of the horizontal edge of the transparent resin layer 116. In this case, the side surface of the transparent resin layer 116 and the side surface of the resin layer 1717 may be composed of dicing surfaces.

[0262] As described above, in the 17th embodiment, the resin layer 1717, which is positioned from the edge inward of the transparent resin layer 116 on the optical element RA, is provided on the side surface of the transparent substrate 1318 and within the transparent resin layer 116. This makes it possible to protect the side surface of the transparent substrate 1318 while reducing the stress applied from the upper edge inward of the transparent resin layer 116. As a result, it is possible to improve reliability while making the optical package 1700 a CSP (Cross-Side Packaging).

[0263] In addition, similar to the 16th embodiment described above, the resin layer 1717 of the 17th embodiment described above may be given light-shielding properties.

[0264] <18. Eighteenth Embodiment> In the first embodiment described above, a resin layer 117 was provided on the transparent resin layer 116 on the optical element RA, extending from the upper end to the inside. In this eighteenth embodiment, a configuration in which a second resin layer is provided on the transparent resin layer 116 on the optical element RA, extending from the upper end to the inside, is applied to FOWLP.

[0265] Figure 66 is a cross-sectional view showing an example of the configuration of an optical package according to the 18th embodiment.

[0266] In the figure, the optical package 1800 includes an extended redistribution layer HK1 and an underfill 1854 instead of the redistribution layer HR and underfill 154 of the first embodiment described above. Furthermore, the optical package 1800 has a sealing resin 1854 added to the optical package 100 of the first embodiment described above. The other configurations of the optical package 1800 of the 18th embodiment are the same as those of the optical package 100 of the first embodiment described above.

[0267] The sealing resin 1854 is provided around the circuit chip P11, optical chip P12, transparent substrate 118, transparent resin layer 116, and resin layer 117. The sealing resin 1854 may be flattened from its surface to the surface of the transparent substrate 118. Alternatively, the sealing resin 1854 may be flattened from its back surface to the back surface of the circuit chip P11. The sealing resin 1854 may be in contact with the sides of the circuit chip P11, optical chip P12, transparent substrate 118, transparent resin layer 116, and resin layer 117. The sealing resin 1854 may be a molding resin or a potting resin. The sides of the sealing resin 1854 may be dicing surfaces.

[0268] An extended redistribution layer HK1 is provided on the back surface of the semiconductor substrate 141 and the back surface of the sealing resin 1854. The extended redistribution layer HK1 extends from the back surface of the semiconductor substrate 141 to the back surface of the sealing resin 1854. The position of the horizontal edge of the extended redistribution layer HK1 can be made to coincide with the position of the horizontal edge of the sealing resin 1854. This allows the package 1800 to be a wafer-level packaged FOWLP. In this case, the placement position of the protruding electrodes 146 can be made free from the planar size of the circuit chip P11, and the number of external terminals can be increased while suppressing an increase in the planar size of the package 1800.

[0269] The extended redistribution layer HK1 is provided with through-electrodes 1843 and redistributions 1844. The through-electrode 1843 is embedded in the semiconductor substrate 141. The through-electrode 1843 penetrates from the back side of the semiconductor substrate 141 to the position of the wiring layer 131 and is connected to the wiring layer 131. The redistribution 1844 is connected to the through-electrode 1843. The through-electrode 1843 and the redistribution 1844 are insulated from the semiconductor substrate 141 via an insulating layer 1842. The inner surface of the through-electrode 1843 and the redistribution 1844 are covered with a protective film 1845. The redistribution 1844 and the protective film 1845 are stretched onto the back surface of the sealing resin 1854. At this time, the protruding electrode 146 may be placed not only on the back surface of the semiconductor substrate 141 but also on the back surface of the sealing resin 1854.

[0270] Figures 67 to 70 are cross-sectional views showing an example of a method for manufacturing an optical package according to the 18th embodiment. Figures 67 to 70 show the manufacturing process for two optical packages 1800.

[0271] In Figure 67a, after step c in Figure 4, the laminated wafer W10 is solidified into sections RK, and the laminated chips P3 are cut out. At this time, the laminated wafer W10 can be cut in the center of the resin layer 117.

[0272] Next, as shown in Figure 67b, the laminated chips P3 are placed on the support substrate HSB via the release tape RET. At this time, the spacing between the laminated chips P3 can be set to twice the width of the sealing resin 1854.

[0273] Next, as shown in Figure 68 a, the mold KN1 is placed on the release tape RET so as to span multiple laminated chips P3 via the release film REF1. At this time, a space can be formed between the mold KN1 and the release tape RET into which the sealing resin 1854 is injected. The release film REF1 can be made to adhere tightly to the inner surface of the mold KN1. At this time, the opening KA can be covered with the release film REF1, preventing the sealing resin 1854 from entering the opening KA. Then, the sealing resin 1854 is injected into the space between the mold KN1 and the release tape RET, and the laminated chips P3 are joined horizontally via the sealing resin 1854. Note that the molding may be done by injection molding or compression molding.

[0274] Next, as shown in Figure 68b, the mold KN1, support substrate HSB, release tape RET, and release film REF1 are removed, and the bonded wafer W8, on which the laminated chip P3 is horizontally bonded via the sealing resin 1854, is removed.

[0275] Next, as shown in Figure 69 a, an insulating layer 142 is formed on the back side of the semiconductor substrate 141 and on the back side of the sealing resin 1854. Then, the insulating layer 1842 on the bottom surface of the opening KA is removed.

[0276] Next, as shown in Figure 69b, through electrodes 1843 are formed in the opening KA for each laminated chip P3, and rewiring 1844 is formed on the insulating layer 1842. Then, a protective film 1845 is formed on the back side of the laminated chip P3 and the back side of the sealing resin 1854 so as to cover the through electrodes 1843 and rewiring 1844. Then, an opening KA2 is formed in the protective film 1845. The opening KA2 can be formed at the position where the protruding electrode 146 is located.

[0277] Next, as shown in Figure 70a, a protruding electrode 146 is formed on the back side of the laminated chip P3 through an opening KA2.

[0278] Next, as shown in Figure 70b, the bonded wafer W8 on which the protruding electrodes 146 are formed is separated into individual pieces at the center of the sealing resin 1854, and the optical package 1800 is cut out.

[0279] Thus, in the 18th embodiment described above, a configuration in which a second resin layer is provided from the upper end to the inside of the transparent resin layer 116 on the optical element RA is applied to FOWLP. This makes it possible to alleviate the stress applied from the upper end to the inside of the transparent resin layer 116, thereby improving reliability while making the optical package 1800 FOWLP.

[0280] <19. 19th Embodiment> In the 18th embodiment described above, a configuration in which a resin layer 117 is provided from the upper end to the inside of the transparent resin layer 116 on the optical element RA was applied to the FOWLP. In this 19th embodiment, a configuration in which a resin layer 117 is provided from the upper end to the inside of the transparent resin layer 116 on the optical element RA to form a chiplet is applied to the FOWLP.

[0281] Figure 71 is a cross-sectional view showing an example of the configuration of an optical package according to the 19th embodiment.

[0282] In the figure, the optical package 1900 includes an extended redistribution layer HK2, a sealing resin 1954, and an underfill 1954 instead of the redistribution layer HK1, sealing resin 1854, and underfill 1854 of the 18th embodiment described above. Furthermore, the optical package 1900 has a circuit chip P14 added to the optical package 1800 of the 18th embodiment described above. The other configurations of the optical package 1900 of the 19th embodiment are the same as those of the optical package 1800 of the 18th embodiment described above.

[0283] Circuit chip P14 is placed next to circuit chip P11. A circuit layer is formed on circuit chip P14. Semiconductor elements are formed on the circuit layer. These semiconductor elements may be a memory, a processor, a signal processing circuit, a data processing circuit, or an interface circuit.

[0284] The circuit chip P14 comprises a semiconductor substrate 1911 and a wiring layer 1912. The wiring layer 1912 is laminated on the semiconductor substrate 1911. A gate electrode embedded in an insulating layer is also formed on the semiconductor substrate 1911. At this time, an active region isolated by STI can be formed on the semiconductor substrate 1911. In the active region, a channel region located below the gate electrode and impurity diffusion layers located on both sides of the channel region can be formed. Wiring 1922 embedded in the insulating layer is provided on the wiring layer 1912. Vias 1923 used for interlayer connections are also provided on the wiring layer 1912.

[0285] The sealing resin 1954 is provided around each circuit chip P11, P14, optical chip P12, transparent substrate 118, transparent resin layer 116, and resin layer 117. The sealing resin 1954 may be planarized from its surface to the surface of the transparent substrate 118 and the surface of the circuit chip P4. Alternatively, the sealing resin 1954 may be planarized from its back surface to the back surface of the circuit chip P11 and the surface of the circuit chip P14. The sealing resin 1954 may be in contact with each side surface of each circuit chip P11, P14, optical chip P12, transparent substrate 118, transparent resin layer 116, and resin layer 117.

[0286] An extended redistribution layer HK2 is provided on the back surface of the semiconductor substrate 141, the surface of the wiring layer 1912, and the back surface of the sealing resin 1954. The extended redistribution layer HK2 extends from the back surface of the semiconductor substrate 141 to the surface of the wiring layer 1912 and the back surface of the sealing resin 1954. The position of the horizontal end of the extended redistribution layer HK2 can be made to coincide with the position of the horizontal end of the sealing resin 1954.

[0287] The extended redistribution layer HK2 is provided with through-electrodes 1943 and redistributions 1944. The through-electrode 1943 is embedded in the semiconductor substrate 141. The through-electrode 1943 penetrates from the back side of the semiconductor substrate 141 to the position of the wiring layer 131 and is connected to the wiring layer 131. The redistribution 1944 is connected to the through-electrode 1843. The through-electrode 1943 and the redistribution 1944 are insulated from the semiconductor substrate 141 and the wiring layer 1912 via an insulating layer 1942. The inner surface of the through-electrode 1943 and the redistribution 1944 are covered with a protective film 1945. The redistribution 1944 and the protective film 1945 are stretched onto the back surface of the sealing resin 1954. At this time, the protruding electrode 146 may be placed not only on the back surface of the semiconductor substrate 141, but also on the back surface of the sealing resin 1954 and on the surface of the insulating layer 1942.

[0288] Figures 72 to 74 are cross-sectional views showing an example of a method for manufacturing an optical package according to the 18th embodiment. Figures 72 to 74 show the manufacturing process for two optical packages 1900.

[0289] In Figure 72a, after step a in Figure 67, the laminated chip P3 and circuit chip P14 are placed on the support substrate HSB via the release tape RET. At this time, the laminated chip P3 and circuit chip P14 can be placed adjacent to each other as a pair. The spacing between pairs of laminated chip P3 and circuit chip P14 can be set to twice the width of the sealing resin 1954.

[0290] Next, as shown in Figure 72b, the mold KN2 is placed on the release tape RET so as to span multiple pairs of laminated chips P3 and circuit chips P14 via the release film REF2. At this time, a space can be formed between the mold KN2 and the release tape RET into which the sealing resin 1954 is injected. The release film REF2 can be made to adhere tightly to the inner surface of the mold KN2. At this time, the opening KA can be covered with the release film REF2, preventing the sealing resin 1954 from entering the opening KA. Then, the sealing resin 1954 is injected into the space between the mold KN2 and the release tape RET, and the laminated chips P3 and circuit chips P14 are joined alternately in the horizontal direction via the sealing resin 1954.

[0291] Next, as shown in c in Figure 72, the mold KN2, support substrate HSB, release tape RET, and release film REF2 are removed, and the bonded wafer W9, in which the laminated chips P3 and circuit chips P14 are alternately bonded horizontally via the sealing resin 1954, is removed.

[0292] Next, as shown in Figure 73a, an insulating layer 1942 is formed on the back side of the semiconductor substrate 141, the front side of the wiring layer 1912, and the back side of the sealing resin 1954. Then, the insulating layer 1942 on the bottom surface of the opening KA is removed.

[0293] Next, as shown in Figure 73b, through electrodes 1943 are formed in the opening KA for each laminated chip P3, and rewiring 1944 is formed on the insulating layer 1942. Then, protective films 1945 are formed on the back side of the laminated chip P3, the front side of the wiring layer 1912, and the back side of the sealing resin 1954 so as to cover the through electrodes 1943 and rewiring 1944. Finally, an opening KA2 is formed in the protective film 1945. The opening KA2 can be formed at the position where the protruding electrode 146 is located.

[0294] Next, as shown in Figure 74 a, a protruding electrode 146 is formed on the back side of the laminated chip P3 through an opening KA2.

[0295] Next, as shown in Figure 74b, the bonded wafer W9 on which the protruding electrodes 146 are formed is separated into individual pieces at the center of the sealing resin 1954 between the pair of laminated chips P3 and circuit chips P14, and the optical package 1900 is cut out.

[0296] Thus, in the 19th embodiment described above, a configuration in which a resin layer 117 is provided from the upper end to the inside of the transparent resin layer 116 on the optical element RA to form a chiplet is applied to FOWLP. This makes it possible to alleviate the stress applied from the upper end to the inside of the transparent resin layer 116, and improves reliability while implementing FOWLP in the chiplet configuration of the optical package 1900.

[0297] <20. Examples of Application to Mobile Devices> The technology relating to this disclosure (this technology) can be applied to various products. For example, the technology relating to this disclosure may be implemented as a device mounted on any type of mobile device such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility devices, airplanes, drones, ships, and robots.

[0298] Figure 75 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology described herein may be applied.

[0299] The vehicle control system 12000 comprises a plurality of electronic control units connected via a communication network 12001. In the example shown in Figure 75, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. The functional configuration of the integrated control unit 12050 is shown in the figure, which includes a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface 12053.

[0300] The drivetrain control unit 12010 controls the operation of devices related to the vehicle's drivetrain according to various programs. For example, the drivetrain control unit 12010 functions as a control device for a drivetrain generating device that generates driving force for the vehicle, such as an internal combustion engine or a drive motor; a drivetrain transmission mechanism that transmits driving force to the wheels; a steering mechanism that adjusts the steering angle of the vehicle; and a braking device that generates braking force for the vehicle.

[0301] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window system, or various lamps such as headlights, reverse lights, brake lights, turn signals, or fog lights. In this case, the body system control unit 12020 may receive radio waves transmitted from a portable device that replaces a key or signals from various switches. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock system, power window system, lamps, etc.

[0302] The external information detection unit 12030 detects information from outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the external information detection unit 12030. The external information detection unit 12030 causes the imaging unit 12031 to capture images of the outside of the vehicle and receives the captured images. Based on the received images, the external information detection unit 12030 may perform object detection processing such as detecting people, cars, obstacles, signs, or characters on the road surface, or distance detection processing.

[0303] The imaging unit 12031 is a light sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0304] The in-vehicle information detection unit 12040 detects information inside the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver status detection unit 12041 that detects the driver's state. The driver status detection unit 12041 includes, for example, a camera that captures images of the driver, and the in-vehicle information detection unit 12040 may calculate the driver's level of fatigue or concentration, or determine whether the driver is drowsy, based on the detection information input from the driver status detection unit 12041.

[0305] The microcomputer 12051 can calculate control target values ​​for the drive force generator, steering mechanism, or braking device based on information inside and outside the vehicle acquired by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing ADAS (Advanced Driver Assistance System) functions, including collision avoidance or impact mitigation, following driving based on distance between vehicles, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.

[0306] Furthermore, the microcomputer 12051 can perform cooperative control for purposes such as autonomous driving, where the vehicle drives autonomously without driver intervention, by controlling the drive force generating device, steering mechanism, or braking device, etc., based on information about the vehicle's surroundings acquired by the external information detection unit 12030 or the internal information detection unit 12040.

[0307] Furthermore, the microcomputer 12051 can output control commands to the body system control unit 12020 based on external information acquired by the external information detection unit 12030. For example, the microcomputer 12051 can control the headlights according to the position of a preceding or oncoming vehicle detected by the external information detection unit 12030, and perform coordinated control aimed at reducing glare, such as switching from high beams to low beams.

[0308] The audio-image output unit 12052 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying information to the vehicle's occupants or to those outside the vehicle. In the example shown in Figure 75, the output devices are exemplified as an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an onboard display and a head-up display.

[0309] Figure 76 shows an example of the installation position of the imaging unit 12031.

[0310] In Figure 76, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0311] The imaging units 12101, 12102, 12103, 12104, and 12105 are installed, for example, on the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle 12100. The imaging unit 12101 installed on the front nose and the imaging unit 12105 installed on the upper part of the windshield inside the vehicle mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 installed on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 installed on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 installed on the upper part of the windshield inside the vehicle is mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes.

[0312] Figure 76 shows an example of the imaging ranges of imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of imaging unit 12101 located on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of imaging units 12102 and 12103 located on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of imaging unit 12104 located on the rear bumper or back door. For example, by superimposing the image data captured by imaging units 12101 to 12104, an overhead view image of the vehicle 12100 can be obtained.

[0313] At least one of the imaging units 12101 to 12104 may have a function for acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera consisting of multiple image sensors, or an image sensor having pixels for phase difference detection.

[0314] For example, the microcomputer 12051, based on distance information obtained from the imaging units 12101 to 12104, can determine the distance to each object within the imaging range 12111 to 12114 and the temporal change of this distance (relative speed to the vehicle 12100). In particular, it can extract the closest object on the vehicle 12100's path that is traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or more) as the preceding vehicle. Furthermore, the microcomputer 12051 can set a predetermined distance to be maintained before the preceding vehicle and perform automatic braking control (including follow-and-stop control) and automatic acceleration control (including follow-and-start control), etc. In this way, cooperative control aimed at autonomous driving, etc., that drives autonomously without driver operation, can be performed.

[0315] For example, the microcomputer 12051 can use distance information obtained from imaging units 12101 to 12104 to classify and extract three-dimensional object data related to three-dimensional objects, such as motorcycles, passenger cars, large vehicles, pedestrians, utility poles, and other three-dimensional objects, and use this data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle. If the collision risk is above a set value and there is a possibility of collision, the microcomputer 12051 can provide driving assistance to avoid collisions by outputting a warning to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or evasive steering via the drive system control unit 12010.

[0316] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared light. For example, the microcomputer 12051 can recognize pedestrians by determining whether or not pedestrians are present in the images captured by the imaging units 12101 to 12104. Such pedestrian recognition is performed, for example, by a procedure to extract feature points from the images captured by the imaging units 12101 to 12104 as infrared cameras, and a procedure to perform pattern matching on a series of feature points that indicate the contour of an object to determine whether or not it is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the imaging units 12101 to 12104 and recognizes a pedestrian, the audio-image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio-image output unit 12052 may also control the display unit 12062 to display an icon indicating a pedestrian at a desired position.

[0317] The above describes an example of a vehicle control system to which the technology of this disclosure may be applied. The technology of this disclosure can be applied to the imaging unit 12031 of the configuration described above. Specifically, for example, each of the optical packages 100 to 1700 of the above embodiment can be applied to the imaging unit 12031. By applying the technology of this disclosure to the vehicle control system 12000, the imaging unit 12031 can be made more compact while improving its reliability.

[0318] The embodiments described above are merely examples for realizing the present technology, and there is a corresponding relationship between the matters in the embodiments and the inventive features in the claims. Similarly, there is a corresponding relationship between the inventive features in the claims and the matters in the embodiments of the present technology bearing the same name. However, the present technology is not limited to the embodiments and can be realized by making various modifications to the embodiments without departing from the gist of the technology. Furthermore, the effects described herein are merely examples and are not limiting, and other effects may also exist.

[0319] Furthermore, this technology can also take the following configurations: (1) An optical package comprising an optical chip on which an optical element is formed, a first resin layer located on the optical element and capable of transmitting light, and a second resin layer located from the edge inward of the first resin layer. (2) The optical package according to (1), wherein the second resin layer is located so as to surround the optical element. (3) The optical package according to (1) or (2), wherein a plurality of second resin layers are located in parallel so as to surround the optical element. (4) The optical package according to any one of (1) to (3), wherein the thickness of the second resin layer is less than or equal to the thickness of the first resin layer. (5) The optical package according to any one of (1) to (4), wherein the second resin layer is located either below or above the first resin layer in the thickness direction. (6) The optical package according to any one of (1) to (5), wherein the second resin layer has light-shielding properties. (7) The optical package according to any one of (1) to (6), comprising jaggies located on the inner circumferential surface of the second resin layer. (8) The optical package according to any one of (1) to (7), wherein the position of the horizontal end of the optical chip, the position of the horizontal end of the first resin layer, and the position of the horizontal end of the second resin layer are equal to each other. (9) The optical package according to (8), comprising an extended redistribution layer extended horizontally from the optical chip, and a sealing resin located on the extended redistribution layer and sealing the side surface of the optical chip. (10) The optical package according to any one of (1) to (9), comprising an underfill located below the optical chip. (11) The optical package according to (10), wherein the elastic modulus of the second resin layer is greater than the elastic modulus of the first resin layer and less than the elastic modulus of the underfill. (12) The optical package according to any one of (1) to (11), comprising a transparent substrate located on the first resin layer. (13) The optical package according to (12), wherein at least a portion of the second resin layer is embedded in the transparent substrate. (14) The optical package according to (13), wherein the position of the surface of the second resin layer in the thickness direction is equal to the position of the surface of the transparent substrate in the thickness direction.(15) The optical package according to any one of (1) to (14), wherein the second resin layer covers at least a portion of the side surface of the transparent substrate. (16) The optical package according to (15), wherein the second resin layer covers the edge on the transparent substrate. (17) A method for manufacturing an optical package, comprising the steps of: forming optical elements cut out for each optical chip on a wafer; forming a light-transmitting first resin layer located on the optical element and a second resin layer located outside the optical element such that the first resin layer and the second resin layer are in contact with each other in the thickness direction; and cutting the wafer at the position of the second resin layer for each optical chip. (18) The method for manufacturing an optical package according to (17), wherein the second resin layer is formed based on printing or lithography. (19) A method for manufacturing an optical package according to (18), comprising the steps of: forming a light-transmitting first resin layer located on the optical element and a second resin layer located outside the optical element such that the first resin layer and the second resin layer are in contact with each other in the thickness direction, the steps of: forming a groove in a transparent substrate corresponding to the position of the second resin layer; embedding the second resin layer in the groove of the transparent substrate; and bonding the transparent substrate with the second resin layer embedded in it onto the first resin layer. (20) A method for manufacturing an optical package according to (19), comprising the step of flattening the second resin layer embedded in the groove of the transparent substrate.

[0320] 100 Optical package P11 Circuit chip P12 Optical chip RA Optical element 111, 141 Semiconductor substrate 112 Wiring layer 114 Color filter 115 On-chip lens 116 Transparent resin layer 117 Resin layer 118 Transparent substrate 122, 132 Wiring 123, 133 Via 124, 134 Bonding electrode 142 Insulating layer 143 Through electrode 144 Rewiring 146 Protruding electrode 151 Mounting substrate 152 Land electrode 153, 145 Protective film 154 Underfill

Claims

1. An optical package comprising an optical chip on which an optical element is formed, a first resin layer located on the optical element and capable of transmitting light, and a second resin layer located from the edge inward of the first resin layer.

2. The optical package according to claim 1, wherein the second resin layer is positioned to surround the optical element.

3. The optical package according to claim 1, wherein the second resin layer is arranged in parallel in multiple locations so as to surround the optical element.

4. The optical package according to claim 1, wherein the thickness of the second resin layer is less than or equal to the thickness of the first resin layer.

5. The optical package according to claim 1, wherein the second resin layer is located either below or above the first resin layer in the thickness direction.

6. The optical package according to claim 1, wherein the second resin layer has light-shielding properties.

7. The optical package according to claim 1, further comprising jagged edges located on the inner surface of the second resin layer.

8. The optical package according to claim 1, wherein the position of the horizontal end of the optical chip, the position of the horizontal end of the first resin layer, and the position of the horizontal end of the second resin layer are equal to each other.

9. The optical package according to claim 1, comprising an extended redistribution layer extending horizontally from the optical chip, and a sealing resin located on the extended redistribution layer and sealing the side surface of the optical chip.

10. The optical package according to claim 1, comprising an underfill located beneath the optical chip.

11. The optical package according to claim 10, wherein the elastic modulus of the second resin layer is greater than the elastic modulus of the first resin layer and less than the elastic modulus of the underfill.

12. The optical package according to claim 1, comprising a transparent substrate located on the first resin layer.

13. The optical package according to claim 12, wherein at least a portion of the second resin layer is embedded in the transparent substrate.

14. The optical package according to claim 13, wherein the position of the surface of the second resin layer in the thickness direction is equal to the position of the surface of the transparent substrate in the thickness direction.

15. The optical package according to claim 1, wherein the second resin layer covers at least a portion of the side surface of the transparent substrate.

16. The optical package according to claim 15, wherein the second resin layer covers the edges on the transparent substrate.

17. A method for manufacturing an optical package, comprising the steps of: forming optical elements cut out for each optical chip on a wafer; forming a light-transmitting first resin layer located on the optical element and a second resin layer located outside the optical element such that the first resin layer and the second resin layer are in contact with each other in the thickness direction; and cutting the wafer at the position of the second resin layer for each optical chip.

18. The method for manufacturing an optical package according to claim 17, wherein the second resin layer is formed based on printing or lithography.

19. A method for manufacturing an optical package according to claim 18, comprising the steps of forming a light-transmitting first resin layer located on the optical element and a second resin layer located outside the optical element such that the first resin layer and the second resin layer are in contact with each other in the thickness direction, the steps of forming a groove in a transparent substrate corresponding to the position of the second resin layer, embedding the second resin layer in the groove of the transparent substrate, and bonding the transparent substrate with the second resin layer embedded on the first resin layer.

20. The method for manufacturing an optical package according to claim 19, further comprising the step of flattening the second resin layer embedded in the groove of the transparent substrate.

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