Method for manufacturing circuit board having padless design
By combining vacuum via plugging and electroplating tin plating, a pad-free circuit board design can be fabricated, solving the problems of pad space occupation and signal loss, and improving the high-density wiring and signal integrity of the circuit board.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- SHANGHAI MEADVILLE ELECTRONICS
- Filing Date
- 2025-03-14
- Publication Date
- 2026-05-07
AI Technical Summary
In existing circuit board designs, pads occupy a lot of space and increase signal loss during signal transmission, making it difficult to achieve high-density wiring and improve signal integrity.
Two different processing techniques are employed: vacuum via plugging and electroplating tin plating, each designed for different circuit boards. Vacuum via plugging uses plugging resin to protect the copper inside the vias, while electroplating tin plating coats the vias with a tin layer to avoid etching the copper and achieve a pad-free design.
It saves space for wiring and vias, supports closer via-to-wire or via-to-via distances, reduces signal reflection, improves signal integrity, and does not increase manufacturing costs.
Smart Images

Figure CN2025082658_07052026_PF_FP_ABST
Abstract
Description
A method for fabricating a circuit board with a padless design Technical Field
[0001] This invention relates to the field of PCB manufacturing technology, specifically a method for manufacturing a circuit board with a padless design. Background Technology
[0002] As electronic products become increasingly miniaturized and multifunctional, circuit boards are also evolving towards higher integration and miniaturization. Therefore, saving space on circuit boards and making the circuitry more dense has become a key focus of circuit board development.
[0003] According to the authorization announcement number CN 102869205A, a method for forming metallized holes on a PCB board is disclosed, including: an electroplating step, in which a substrate with drilled through holes is electroplated to obtain metallized holes; a plugging step, in which the metallized holes, where no solder pads need to be retained, are filled with an anti-corrosion material; a pattern processing step, in which a circuit pattern is processed on the base copper, exposing the non-circuit base copper and the solder pads of the metallized holes that do not need to be retained; and an etching step, in which an acidic etching solution is used to etch the non-circuit base copper, and the exposed solder pad base copper at at least one end of the metallized hole filled with anti-corrosion material is also etched away, thus obtaining a metallized hole with no solder pads at at least one end of the hole opening. This invention breaks through the limitations of traditional design and process, and the formed metallized holes have no solder pads at one or even both ends of the hole opening. It can also be used to achieve no solder pads for holes within steps, and is suitable for batch processing and is stable. The resulting PCB board products can effectively improve the signal quality of radio frequency products and can be widely used in fields such as communications and military where high-frequency microwave signals are required.
[0004] Most circuit boards (PCBs) incorporate vias or buried vias, which typically have corresponding solder pads. These pads are used during pattern fabrication to cover the copper within the vias with dry film or tin plating, preventing etching away the copper. In addition, some outer solder pads connect to electronic components subsequently mounted on the PCB surface; others are sealed under the ink after solder mask printing and serve no further purpose. To optimize these pads that occupy significant board space without additional functionality, a padless design has been proposed. By removing the surface pads of through-holes and blind vias, the distance between the via and surrounding patterns is further reduced, solving the problem of insufficient spacing. Therefore, a PCB fabrication method incorporating a padless design is needed. Summary of the Invention
[0005] The purpose of this invention is to provide a method for manufacturing circuit boards with a padless design. By selecting two different systems to perform different processing operations on circuit boards with different processing requirements, the method can meet the high-efficiency processing needs of different circuit boards and solve the technical problems mentioned in the background art.
[0006] To achieve the above objectives, the present invention provides the following technical solution: a method for manufacturing a circuit board with a padless design, comprising the following steps:
[0007] S1. Circuit board processing selection steps: By integrating the circuit board and placing it into the processing equipment, the processing route is selected according to the required processing method;
[0008] S2. Targeted Circuit Board Processing: There are two sets of circuit board processing technology. One set is vacuum via plugging process, and the other set is electroplating tin process. After the circuit board is processed according to the required processing technology, it is transported out.
[0009] S2.1 Vacuum plugging process: includes the following steps: drilling—electroplating—vacuum plugging—film application—exposure—development—etching—film removal;
[0010] S2.2, Pattern electroplating tin process: includes the following steps: drilling—electroplating—film application—exposure—development—pattern electroplating—etching—tin removal;
[0011] S3. Circuit Board Inspection and Shipment: After the circuit board has been processed using different processing techniques, the current and voltage of the processed circuit board are tested by the staff. At the same time, the staff observes whether the circuit board has completed the film removal and solder stripping, so as to avoid the problem of poor signal output during the use of the circuit board.
[0012] Preferably, in S1, the circuit boards need to be classified, and the classification requirements are based on whether the circuit board body includes vacuum plug holes or not.
[0013] Specifically, it can be distinguished based on whether there are buried holes or through holes on the surface of the circuit board. When transporting circuit boards, it is necessary to ensure the distance between them to avoid contact and reduce damage during the processing of the circuit boards.
[0014] If the S1 board process includes vacuum via plugging, the vacuum via plugging process can be selected for manufacturing. If the board process does not include vacuum via plugging, the electroplating tin process can be selected for manufacturing. No additional process is required.
[0015] Preferably, the vacuum via plugging process mentioned in S2 involves preparing to drill holes at the location of the circuit board and performing electroplating on the circuit board. The vacuum via plugging operation involves filling the target via with a filler, specifically via plugging resin, which protects the copper on the inner wall of the via.
[0016] Preferably, the film application-exposure-development mentioned in S2 is a protective operation for the circuit board. At the same time, it can specifically mark the drilling and electroplating positions of the circuit board, which facilitates subsequent etching operations and prevents all the copper in the drilling holes of the circuit board from being etched away during etching, thereby improving the processing quality of the circuit board.
[0017] Preferably, the patterned tin plating process mentioned in S2 differs from the vacuum plugging process in that it does not include a vacuum plugging operation. It advances the protective circuit board operation of film application, exposure, and development, thereby achieving direct protection of the circuit board after drilling and electroplating. Then, tin is plated into the through holes of the circuit board through the patterned tin plating operation.
[0018] Preferably, the tin plating process mentioned in S2 protects the copper inside the hole wall with a tin layer, so that the circuit board will not etch away all the copper inside the drilled hole during etching, thus improving the circuit board processing quality.
[0019] Preferably, the vacuum plugging process in S2 can be fabricated using either DES or SES etching. However, since the pattern electroplating tin process is fabricated using pattern electroplating tin, it is limited to SES etching.
[0020] Preferably, the two processing systems in S2 can work independently or synchronously, and the specific working system can be selected according to different processing needs to complete the processing operation of the circuit board;
[0021] The difference between the vacuum plugging process in the S2 system and the stripping process after etching in the electroplating tin process is illustrated in the diagram. This difference in the stripping process after etching is used to protect the circuit board and improve its processing quality.
[0022] Preferably, the vacuum plugging process and the tin plating process mentioned in S2 produce padless design circuit boards that retain the traditional pad manufacturing method. At the same time, they save a lot of wiring and via space through different protection methods, and can support closer via-to-line or via-to-via distances. The padless design can reduce the reflection of signals by non-functional pads during signal transmission, reduce signal loss, and improve signal integrity.
[0023] Preferably, in step S2, when the circuit board is transferred out after processing, the circuit needs to be classified and stored according to different processing methods. At the same time, after the circuit board is processed, multiple sets of tests need to be performed, including current and voltage tests, signal reflection tests, and signal integrity tests, to ensure the quality of circuit board processing.
[0024] Compared with the prior art, the beneficial effects of the present invention are:
[0025] By establishing two different systems to process the circuit board, and by tailoring the processing to specific requirements, this process creates a padless circuit board design that saves a significant amount of wiring and via space compared to traditional methods that retain pads. This allows for closer via-to-wire or via-to-via distances. The padless design also reduces signal reflection from non-functional pads during signal transmission, lowering signal loss and improving signal integrity. The process flow involved in this patent is not significantly different from conventional processes. If the board process includes vacuum via plugging, the vacuum via plugging process can be selected; if not, the electroplating tin process can be selected. No additional processes are required, ensuring that manufacturing costs are not increased. Attached Figure Description
[0026] Figure 1 is a schematic diagram of the processing flow of the present invention;
[0027] Figure 2 is a schematic diagram of the vacuum plugging process of the present invention;
[0028] Figure 3 is a schematic diagram of the electroplating tin process of the present invention. Detailed Implementation
[0029] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0030] This invention provides a method for manufacturing a circuit board with a padless design, as shown in Figures 1-3, including the following steps: S1, Circuit board processing selection step: By integrating the circuit board into the processing equipment, the processing route is selected according to the required processing method; S2, Targeted circuit board processing: Two sets of circuit board processing processes are set, one set is vacuum via plugging process, and the other set is pattern electroplating tin process. After processing the circuit board according to the selected processing process, the circuit board is transferred out; S2.1, Vacuum via plugging process: including the following steps: drilling—electroplating—vacuum via plugging—film application—exposure—development—etching—film removal; S2.2, Pattern electroplating tin process: including the following steps: drilling—electroplating—film application—exposure—development—pattern electroplating—etching—tin removal; S3, Circuit board inspection and delivery: After the circuit board is processed through different processing processes, the current and voltage of the processed circuit board are tested by the staff, and the film removal and tin removal of the circuit board are observed to avoid the problem of poor signal output during the use of the circuit board.
[0031] Preferably, in step S1, the circuit boards need to be classified. The classification requirements are based on whether the circuit board body includes vacuum-filled vias or not. Specifically, it can be distinguished based on whether there are buried or through holes on the surface of the circuit board. When transporting the circuit boards, it is necessary to ensure the distance between the circuit boards to avoid contact between them and reduce damage during the circuit board processing. In step S1, if the board process includes vacuum-filled vias, the vacuum-filled via process can be selected. If the board process does not include vacuum-filled vias, the electroplating tin process can be selected. No additional process is required.
[0032] Furthermore, the specific operation process of the vacuum via plugging process mentioned in S2 involves preparing to drill holes at the location of the circuit board and performing electroplating on the circuit board. The vacuum via plugging operation involves filling the target via with a filler, specifically via plugging resin, which protects the copper inside the via wall. The film application, exposure, and development mentioned in S2 are operations to protect the circuit board. At the same time, the drilling and electroplating locations on the circuit board can be specifically marked to facilitate subsequent etching operations. This ensures that not all the copper inside the drilled holes of the circuit board is etched away during etching, thereby improving the processing quality of the circuit board.
[0033] Furthermore, the tin plating process mentioned in S2 differs from the vacuum plugging process in that it does not include a vacuum plugging operation. It advances the protective circuit board operation of film application, exposure, and development, achieving direct protection of the circuit board after drilling and electroplating. Then, tin is plated into the through holes of the circuit board through the tin plating operation. The tin plating process mentioned in S2 protects the copper inside the hole wall through the tin layer, so that the circuit board will not etch away all the copper inside the drilled holes during etching, thus improving the quality of circuit board processing.
[0034] Specifically, the vacuum via plugging process in S2 can be fabricated using either DES or SES etching. The tin plating process, however, uses patterned tin plating and is therefore limited to SES etching. The two processing systems in S2 can operate independently or simultaneously, with the specific system selected based on different processing requirements to complete the circuit board processing. The difference between the etching and stripping steps in the vacuum via plugging process and the tin plating process is that the tin stripping step after etching in the tin plugging process in S2 protects the circuit board and improves its processing quality.
[0035] It is worth noting that the vacuum plugging process and the tin plating process mentioned in S2 both retain the traditional pad manufacturing method for the padless design circuit boards produced by this process. At the same time, they save a lot of wiring and via space through different protection methods, and can support closer via-to-line or via-to-via distances. The padless design can reduce the reflection of signals by non-functional pads during signal transmission, reduce signal loss, and improve signal integrity.
[0036] In addition, when the circuit board is transported out after processing in S2, it is necessary to classify and store the circuit according to different processing methods. At the same time, after the circuit board is processed, multiple sets of tests are required, including current and voltage tests, signal reflection tests, and signal integrity tests, to ensure the quality of circuit board processing.
[0037] The above is a general overview of the processing method selection and processing flow for different circuit boards in this embodiment. Specific implementation methods also include the following:
[0038] The specific processing route is selected according to production needs, and the work of circuit board screening, loading, processing and testing is planned. At the same time, independent staff are set up for different operation positions to complete specific operations.
[0039] For speed control after the circuit board is installed on the machine, spacing control of the circuit boards during the circuit board processing, and control of single-group or dual-group processing systems, etc.
[0040] When selecting any system to process a circuit board, the chosen route should be designed to ensure stable and continuous stripping or desoldering after etching. This ensures protection of the circuit board during processing and saves a significant amount of wiring and via space through different protection methods, supporting closer via-to-wire or via-to-via distances. The padless design reduces signal reflection from non-functional pads during signal transmission, lowers signal loss, and improves signal integrity.
[0041] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.
Claims
1. A method for manufacturing a circuit board with a padless design, characterized in that: Includes the following steps: S1. Circuit board processing selection steps: By integrating the circuit board and placing it into the processing equipment, the processing route is selected according to the required processing method; S2. Targeted Circuit Board Processing: There are two sets of circuit board processing technology. One set is vacuum via plugging process, and the other set is electroplating tin process. After the circuit board is processed according to the required processing technology, it is transported out. S2.1 Vacuum plugging process: includes the following steps: drilling—electroplating—vacuum plugging—film application—exposure—development—etching—film removal; S2.2, Pattern electroplating tin process: includes the following steps: drilling—electroplating—film application—exposure—development—pattern electroplating—etching—tin removal; S3. Circuit Board Inspection and Shipment: After the circuit board has been processed using different processing techniques, the current and voltage of the processed circuit board are tested by the staff. At the same time, the staff observes whether the circuit board has completed the film removal and solder stripping, so as to avoid the problem of poor signal output during the use of the circuit board.
2. The method for manufacturing a circuit board with a padless design according to claim 1, characterized in that: In S1, the circuit boards need to be classified. The classification requirements are based on whether the circuit board body includes vacuum plugs or not. Specifically, it can be distinguished based on whether there are buried holes or through holes on the surface of the circuit board. When transporting circuit boards, it is necessary to ensure the distance between them to avoid contact and reduce damage during the processing of the circuit boards. If the S1 board process includes vacuum via plugging, the vacuum via plugging process can be selected for manufacturing. If the board process does not include vacuum via plugging, the electroplating tin process can be selected for manufacturing. No additional process is required.
3. The method for manufacturing a circuit board with a padless design according to claim 2, characterized in that: The specific operation process of the vacuum via plugging process mentioned in S2 is to prepare for drilling at the location of the circuit board and to perform electroplating on the circuit board. The vacuum via plugging operation is to fill the target via with a filler, specifically via plugging resin, and to protect the copper on the inner wall of the via through the via plugging resin.
4. The method for manufacturing a circuit board with a padless design according to claim 3, characterized in that: The film application, exposure, and development process mentioned in S2 is a protective operation for the circuit board. It can also be used to specifically mark the drilling and electroplating locations on the circuit board, which facilitates subsequent etching operations. This prevents all the copper inside the drilled holes from being etched away during the etching process, thus improving the quality of the circuit board manufacturing.
5. A method for manufacturing a circuit board with a padless design according to claim 4, characterized in that: The tin plating process mentioned in S2 differs from the vacuum plugging process in that it does not include a vacuum plugging operation. It advances the protective circuit board operation of film application, exposure, and development, achieving direct protection of the circuit board after drilling and electroplating. Then, tin is plated into the through holes of the circuit board through the tin plating operation.
6. A method for manufacturing a circuit board with a padless design according to claim 5, characterized in that: The tin plating process mentioned in S2 protects the copper inside the hole walls with a tin layer, preventing all the copper inside the drilled holes from being etched away during the PCB etching process, thus improving the PCB manufacturing quality.
7. A method for manufacturing a circuit board with a padless design according to claim 6, characterized in that: The vacuum plugging process in S2 can be fabricated using either DES or SES etching. The pattern electroplating tin process, however, is only available using SES etching because it is fabricated using pattern electroplating tin.
8. A method for manufacturing a circuit board with a padless design according to claim 7, characterized in that: In S2, the two processing systems can work independently or synchronously. The specific working system can be selected according to different processing needs to complete the processing operation of the circuit board. The difference between the vacuum plugging process in the S2 system and the stripping process after etching in the electroplating tin process is illustrated in the diagram. This difference in the stripping process after etching is used to protect the circuit board and improve its processing quality.
9. A method for manufacturing a circuit board with a padless design according to claim 8, characterized in that: The vacuum plugging process and the electroplating tin process mentioned in S2 both retain the traditional pad manufacturing method for the padless design circuit boards. At the same time, they save a lot of wiring and via space through different protection methods, and can support closer via-to-line or via-to-via distances. The padless design can reduce the reflection of signals by non-functional pads during signal transmission, reduce signal loss, and improve signal integrity.
10. A method for manufacturing a circuit board with a padless design according to claim 9, characterized in that: In S2, after the circuit board is processed, it needs to be classified and stored according to different processing methods when it is transferred out. At the same time, after the circuit board is processed, multiple sets of tests need to be performed, including current and voltage tests, signal reflection tests, and signal integrity tests, to ensure the quality of circuit board processing.
Citation Information
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