Solar cell and photovoltaic module

Abstract

The present application relates to the technical field of photovoltaics, and provides a solar cell and a photovoltaic module. The solar cell comprises: a silicon substrate having a surface that comprises an N region and a P region; an N-type doped semiconductor layer located on the N region of the silicon substrate; a P-type doped semiconductor layer located on the P region of the silicon substrate; an N-region electrode located on the surface of the N-type doped semiconductor layer distant from the silicon substrate; a P-region electrode located on the surface of the P-type doped semiconductor layer distant from the silicon substrate; and metal crystals respectively located within the N-type doped semiconductor layer under the N-region electrode and within the P-type doped semiconductor layer under the P-region electrode, wherein the distribution density of the metal crystals under the N-region electrode is less than that of the metal crystals under the P-region electrode.

Description

Solar cells and photovoltaic modules

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese application No. 202411572208.0, filed on November 5, 2024, entitled "Solar Cells"; Chinese application No. 202411658546.6, filed on November 19, 2024, entitled "Solar Cells"; and Chinese application No. 202411659645.6, filed on November 19, 2024, entitled "Solar Cells and Photovoltaic Modules," the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of photovoltaic technology, specifically to a solar cell and a photovoltaic module. Background Technology

[0004] Solar energy is a new generation of mainstream clean and renewable energy, and solar cells have attracted widespread attention from the industry due to their excellent photoelectric conversion efficiency. Continuously improving the photoelectric conversion efficiency of solar cells and reducing the cost per kilowatt-hour is the goal pursued by solar cell research and industry. Traditional solar cells mainly consist of a silicon substrate and electrodes located on the silicon substrate. When the metal components in the electrodes are in direct contact with the silicon substrate, it leads to significant recombination losses at the metal-semiconductor contact. The resulting electrical losses are a major factor limiting the photoelectric conversion efficiency of solar cells.

[0005] To reduce electrical losses caused by direct contact between the electrode and the silicon substrate, one possible approach in related technologies is to directly contact the electrode with a doped semiconductor layer. However, the contact performance between the electrode and the doped semiconductor layer is affected by the doping type and concentration, leading to an imbalance in carrier collection between the N-region and the P-region, which is detrimental to improving battery performance. Summary of the Invention

[0006] In view of this, in order to at least partially solve at least one of the aforementioned technical problems, this application provides a solar cell and a photovoltaic module.

[0007] To achieve the above objectives, the technical solution of this application is as follows:

[0008] According to one aspect of this application, a solar cell is provided, comprising: a silicon substrate including a surface having an N-region and a P-region; an N-type doped semiconductor layer located on the N-region of the silicon substrate; a P-type doped semiconductor layer located on the P-region of the silicon substrate; an N-region electrode located on the surface of the N-type doped semiconductor layer away from the silicon substrate; a P-region electrode located on the surface of the P-type doped semiconductor layer away from the silicon substrate; and metal crystals located within the N-type doped semiconductor layer under the N-region electrode and within the P-type doped semiconductor layer under the P-region electrode, respectively; wherein the distribution density of the metal crystals located under the N-region electrode is less than the distribution density of the metal crystals located under the P-region electrode.

[0009] Based on the applicant's discovery that the presence and distribution of metal crystals help improve the contact performance between the doped semiconductor layer and the electrode, and in accordance with the solar cell provided in the embodiments of this application, in which the N-type doped semiconductor layer is easier to dopant than the P-type doped semiconductor layer and is more conducive to carrier transport and collection, by adjusting the distribution density of metal crystals in the P-type doped semiconductor layer to be greater than that in the N-type doped semiconductor layer, it is more conducive to reducing the difference in contact performance between the P-type doped semiconductor layer and the N-type doped semiconductor layer and the electrode, thereby achieving a balance in carrier collection between the N-region and the P-region.

[0010] According to an embodiment of this application, along the direction parallel to the electrode width, the N-region electrode and the P-region electrode each include a main body portion and peripheral portions adjacent to both sides of the main body portion, and the width of the peripheral portions is equal to 5% to 25% of the width of the N-region electrode or the P-region electrode; wherein, the distribution density of metal crystals under the main body portion of the P-region electrode is greater than the distribution density of metal crystals under the main body portion of the N-region electrode.

[0011] According to an embodiment of this application, the metal crystal includes a first metal crystal. Along the direction perpendicular to the electrode width, one end of the first metal crystal is connected to an N-region electrode or a P-region electrode, and the other end of the first metal crystal abuts against the side of the doped semiconductor layer near the silicon substrate. The length of the first metal crystal located under the P-region electrode is equal to or greater than the length of the first metal crystal located under the N-region electrode.

[0012] According to an embodiment of this application, the metal crystal includes a second metal crystal. Along the direction perpendicular to the electrode width, one end of the second metal crystal is connected to the N-region electrode or the P-region electrode, and the other end does not abut against the side of the doped semiconductor layer near the silicon substrate. The length of the second metal crystal located under the P-region electrode is equal to or greater than the length of the second metal crystal located under the N-region electrode.

[0013] According to an embodiment of this application, the length of the second metal crystal located under the P-region electrode is 60–200 nm, and the length of the second metal crystal located under the N-region electrode is 40–150 nm.

[0014] According to embodiments of this application, the number of second metal crystals located under the P-region electrode accounts for 50% to 90% of the total number of metal crystals located under the P-region electrode; and / or, the number of second metal crystals located under the N-region electrode accounts for 50% to 90% of the total number of metal crystals located under the N-region electrode.

[0015] According to an embodiment of this application, along a direction parallel to the surface of the silicon substrate, the width of the second metal crystal located under the P-region electrode is greater than the width of the second metal crystal located under the N-region electrode.

[0016] According to an embodiment of this application, the ratio of the contact resistance between the P-region electrode and the P-type doped semiconductor layer to the contact resistance between the N-region electrode and the N-type doped semiconductor layer is 1.25 to 3.

[0017] According to embodiments of this application, the contact resistance between the P-region electrode and the P-type doped semiconductor layer is 2.5–4 Ω / cm; the contact resistance between the N-region electrode and the N-type doped semiconductor layer is 0.5–2 Ω / cm.

[0018] According to an embodiment of this application, the solar cell of this application further includes: a first passivation antireflection layer located between a P-type doped semiconductor layer and a P-region electrode, and a second passivation antireflection layer located between an N-type doped semiconductor layer and an N-region electrode; wherein the refractive index of the first passivation antireflection layer located on the P-region is less than the refractive index of the second passivation antireflection layer located on the N-region.

[0019] According to an embodiment of this application, the difference between the refractive index of the first passivation antireflection layer and the refractive index of the second passivation antireflection layer ranges from 0.02 to 0.4.

[0020] According to embodiments of this application, the ratio of the doping concentration of the N-type doped semiconductor layer to the doping concentration of the P-type doped semiconductor layer ranges from 1 to 1E5.

[0021] According to another embodiment of this application, a solar cell is provided, comprising: a silicon substrate including a surface having an N-region and a P-region; an N-type doped semiconductor layer located on the N-region of the silicon substrate; a P-type doped semiconductor layer located on the P-region of the silicon substrate; an N-region electrode located on the surface of the N-type doped semiconductor layer away from the silicon substrate; and a P-region electrode located on the surface of the P-type doped semiconductor layer away from the silicon substrate; both the P-region electrode and the N-region electrode contain metal elements; the content of metal elements in the region corresponding to the P-region electrode in the P-type doped semiconductor layer is greater than the content of metal elements in the region corresponding to the N-region electrode in the N-type doped semiconductor layer.

[0022] According to an embodiment of this application, the content of metal elements in the P-region electrode is greater than the content of metal elements in the N-region electrode.

[0023] According to an embodiment of this application, the content of metal elements at the contact position between the P-region electrode and the P-type doped semiconductor layer is a first proportion relative to the content of metal elements in the P-region electrode; the content of metal elements at the contact position between the N-region electrode and the N-type doped semiconductor layer is a second proportion relative to the content of metal elements in the N-region electrode; wherein the first proportion is less than the second proportion.

[0024] According to embodiments of this application, the first ratio is 1:2.1 to 1:3.9; the second ratio is 1:1.5 to 1:2.1.

[0025] According to an embodiment of this application, the diffusion depth of the metal element in the P-region electrode in the P-type doped semiconductor layer is greater than the diffusion depth of the metal element in the N-region electrode in the N-type doped semiconductor layer.

[0026] According to an embodiment of this application, the ratio of the diffusion depth of the metal element of the P-region electrode in the P-type doped semiconductor layer to the diffusion depth of the metal element of the N-region electrode in the N-type doped semiconductor layer is greater than 1 and less than or equal to 8.

[0027] According to embodiments of this application, the diffusion depth of the metal element in the P-region electrode in the P-type doped semiconductor layer is 100 nm to 450 nm; the diffusion depth of the metal element in the N-region electrode in the N-type doped semiconductor layer is 50 nm to 300 nm.

[0028] According to an embodiment of this application, the solar cell further includes: a P-type inner extension layer located inside the silicon substrate near the P-type doped semiconductor layer and corresponding to the P region; the ratio of the doping concentration of the P-type doped semiconductor layer to the doping concentration of the P-type inner extension layer is 2 to 5E11; and an N-type inner extension layer located inside the silicon substrate near the N-type doped semiconductor layer and corresponding to the N region; the ratio of the doping concentration of the N-type doped semiconductor layer to the doping concentration of the N-type inner extension layer is 2 to 6E11.

[0029] According to another embodiment of this application, a solar cell is provided, comprising: a silicon substrate including a surface having an N-region and a P-region; an N-type doped semiconductor layer located on the N-region of the silicon substrate, the N-type doped semiconductor layer including a first electrode region, the surface of the first electrode region away from the silicon substrate having a plurality of first contact holes; and a P-type doped semiconductor layer located on the P-region of the silicon substrate, the P-type doped semiconductor layer including a second electrode region, the surface of the second electrode region away from the silicon substrate having a plurality of second contact holes; wherein the first areal density of the first contact holes on the first electrode region is less than the second areal density of the second contact holes on the second electrode region, and the first contact holes and the second contact holes are respectively adapted to accommodate metal crystals.

[0030] According to the solar cell provided in the embodiments of this application, where N-type doped semiconductor layers are easier to dopant than P-type doped semiconductor layers, thus facilitating carrier transport and collection, by adjusting the areal density of the second contact holes in the P-type doped semiconductor layer to be greater than the areal density of the first contact holes in the N-type doped semiconductor layer, the contact area between the P-type doped semiconductor layer and the electrode is larger than that between the N-type doped semiconductor layer and the electrode. This reduces the difference in contact performance between the P-type and N-type doped semiconductor layers and the electrode, thereby achieving a balance in carrier collection between the N-region and the P-region.

[0031] According to an embodiment of this application, along a direction parallel to the electrode width, the first electrode region and the second electrode region each include a main body portion and peripheral portions adjacent to both sides of the main body portion, and the width of the peripheral portions is equal to 5% to 25% of the width of the first electrode region or the second electrode region; wherein, the areal density of the second contact hole on the main body portion of the second electrode region is greater than the areal density of the first contact hole on the main body portion of the first electrode region.

[0032] According to embodiments of this application, the first areal density and the second areal density are 45% to 85%.

[0033] According to embodiments of this application, the first surface density is 50% to 64%; and / or, the second surface density is 65% to 80%.

[0034] According to an embodiment of this application, the difference between the first areal density and the second areal density ranges from 15% to 30%.

[0035] According to embodiments of this application, at least a portion of the first contact hole and / or at least a portion of the second contact hole are blind holes.

[0036] According to an embodiment of this application, the depth of the first contact hole is 1 to 200 nm and the depth of the second contact hole is 2 to 300 nm along the direction perpendicular to the surface of the semiconductor substrate.

[0037] According to another embodiment of this application, a photovoltaic module is provided, comprising: a plurality of battery strings, the battery strings including solar cells as described above. Attached Figure Description

[0038] The above and other objects, features and advantages of this application will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:

[0039] Figure 1 is a partial cross-sectional schematic diagram of a solar cell according to an embodiment of this application;

[0040] Figure 2 shows the distribution morphology of metal crystals under the P-region electrode according to an embodiment of this application;

[0041] Figure 3 shows the distribution morphology of metal crystals under the N-region electrode according to an embodiment of this application;

[0042] Figure 4 is a top view schematic diagram of an electrode according to an embodiment of this application;

[0043] Figure 5 is a distribution morphology diagram of metal crystals under the P-region electrode according to another embodiment of this application;

[0044] Figure 6 shows the cross-sectional morphology of the contact between the P-region electrode and the P-type doped semiconductor layer according to an embodiment of this application;

[0045] Figure 7 shows the cross-sectional morphology of the contact between the N-region electrode and the N-type doped semiconductor layer according to an embodiment of this application;

[0046] Figure 8 is a schematic cross-sectional view of a metal crystal under an electrode according to an embodiment of this application;

[0047] Figure 9 is a cross-sectional schematic diagram of a solar cell according to another embodiment of this application;

[0048] Figure 10 is a surface morphology diagram of a P-type doped semiconductor layer after the electrode in the P region has been washed away according to an embodiment of this application.

[0049] Figure 11 is a surface morphology diagram of an N-type doped semiconductor layer after the N-region electrode has been washed away according to an embodiment of this application;

[0050] Figure 12 is an enlarged view of the surface morphology of a P-type doped semiconductor layer in a tower base after the electrodes have been washed away in a P-region according to an embodiment of this application.

[0051] Figure 13 is an enlarged view of the surface morphology of an N-type doped semiconductor layer in a tower base after the electrodes have been washed away in an N-region according to an embodiment of this application;

[0052] Figure 14 is a partial cross-sectional schematic diagram of a solar cell according to an embodiment of the present application;

[0053] Figure 15 is a surface topography diagram of the contact position between the electrode and the doped semiconductor layer according to an embodiment of this application;

[0054] Figure 16 is a schematic diagram of the elemental distribution on a silicon substrate and one side thereof according to an embodiment of the present application. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.

[0056] In the following detailed description, numerous specific details are set forth for ease of explanation to provide a thorough understanding of the embodiments of this application. However, it will be apparent that one or more embodiments may be implemented without these specific details. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concepts of this application.

[0057] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "comprising" as used herein indicates the presence of features, steps, or operations, but does not exclude the presence or addition of one or more other features.

[0058] When using expressions such as "at least one of A, B, and C," the expression should generally be interpreted in accordance with the meaning commonly understood by a person skilled in the art (e.g., "a system having at least one of A, B, and C" should include, but is not limited to, systems having A alone, having B alone, having C alone, having A and B, having A and C, having B and C, and / or having A, B, and C, etc.). Similarly, when using expressions such as "at least one of A, B, or C," the expression should generally be interpreted in accordance with the meaning commonly understood by a person skilled in the art (e.g., "a system having at least one of A, B, or C" should include, but is not limited to, systems having A alone, having B alone, having C alone, having A and B, having A and C, having B and C, and / or having A, B, and C, etc.).

[0059] In this application, the relative positions between two components (e.g., films or regions), such as "above," "on," or "above," can refer to whether the two components are in direct contact or not. Similarly, the relative positions between two components, such as "below," "under," or "below," can refer to whether the two components are in direct contact or not. For example, when one component (e.g., a film or region) is referred to as "on another component," it can be directly on the other component, or there may be other components between them. On the other hand, when a component is referred to as "directly on another component," there are no components between them. Furthermore, when one component is referred to as "on another component," there is a vertical relationship between them in a top-down view, and this component can be above or below the other component; therefore, this vertical relationship depends on the orientation of the device. In related technologies, direct contact between the electrode and the silicon substrate leads to severe metal-semiconductor recombination, necessitating the design, optimization of the battery structure, and improvement of electrode characteristics for matching and enhancement. One alternative is to directly contact the electrode with the doped semiconductor layer. However, the types and amounts of doping elements differ significantly between the P-region and N-region, causing variations in the contact between the electrode and the doped semiconductor layer. Particularly in the P-region, the doping process for element IIIA is complex, resulting in a low doping concentration and leading to differences in the P-region and N-region contact, causing an imbalance in carrier collection. If these differences in P-region and N-region contact are not controlled, it can easily lead to over-corrosion of the N-region electrode or under-corrosion of the P-region electrode. Therefore, it is necessary to design the battery structure and match the P-region and N-region contacts to ensure efficient carrier separation and collection.

[0060] In realizing the concept of this application, it was discovered that by adjusting the distribution density of metal crystals in the P-region and N-region, the contact performance of the P-region and N-region can be matched to achieve a balance in carrier collection.

[0061] Specifically, according to one aspect of this application, a solar cell is provided, referring to FIG1. ​​The solar cell includes: a silicon substrate 101, a P-type doped semiconductor layer 104, an N-type doped semiconductor layer 105, a P-region electrode 108, and an N-region electrode 109. The silicon substrate 101 includes a surface having an N-region 1012 and a P-region 1011; the N-type doped semiconductor layer 105 is located on the N-region 1012 of the silicon substrate 101; the P-type doped semiconductor layer 104 is located on the P-region 1011 of the silicon substrate 101; the N-region electrode 109 is located on the surface of the N-type doped semiconductor layer 105 away from the silicon substrate 101; and the P-region electrode 108 is located on the surface of the P-type doped semiconductor layer 104 away from the silicon substrate 101.

[0062] According to an embodiment of this application, a solar cell includes: metal crystals (not shown in the figure) located in an N-type doped semiconductor layer 105 under an N-region electrode 109 and in a P-type doped semiconductor layer 104 under a P-region electrode 108; wherein the distribution density of the metal crystals located under the N-region electrode 109 is less than the distribution density of the metal crystals located under the P-region electrode 108.

[0063] According to embodiments of this application, the "distribution density" of metal crystals may be the number of metal crystals per unit cross-sectional area in the doped semiconductor layer under the N-region or P-region electrode, or it may be the area ratio of metal crystals per unit cross-sectional area under the N-region or P-region electrode.

[0064] This application does not impose any limitations on the measurement of distribution density. Those skilled in the art can determine it using conventional methods. For example, the number of metal crystals can be measured using a scanning electron microscope (SEM). Because metal crystals show significant brightness differences compared to other structures in the SEM test results of the electrode cross-section, they can be directly found on the SEM image. The electrode cross-section can be obtained by cutting the battery cell at a certain angle to the electrode extension direction, such as 90° (i.e., parallel to the electrode width), and then measuring the SEM image. A single area of ​​the same size is taken below the test electrode, and the number of metal crystals observed in that area is counted; this represents the number of metal crystals. Alternatively, multiple areas of the same size are taken below the test electrode, and the number of metal crystals observed in each area is counted. The average number of metal crystals in the multiple areas is then calculated; this average represents the total number of metal crystals.

[0065] For example, the area percentage of metallic crystals can be obtained through SEM measurement; the metallic crystals can be found in the SEM test image of the electrode cross-section. A region is selected below the test electrode, and image processing software is used to calculate the total area of ​​the observed metallic crystals in that region. The area percentage of the metallic crystals within the selected region is then calculated. Alternatively, multiple regions of the same size are selected below the test electrode, and image processing software is used to calculate the total area of ​​the observed metallic crystals in each region. The area percentage of the metallic crystals within the selected region is then calculated, and the average of these percentages across multiple regions is obtained as the area percentage of the metallic crystals.

[0066] It should be noted that the test method for the distribution density of metal crystals under the N-region electrode is the same as that for the P-region electrode. When comparing the distribution density, the test methods for the N-region and the P-region must be consistent.

[0067] According to embodiments of this application, the silicon substrate 101 can be an N-type silicon substrate or a P-type silicon substrate. Specifically, the silicon substrate 101 can be, for example, a semiconductor material selected from monocrystalline silicon, polycrystalline silicon, and microcrystalline silicon, preferably an N-type or P-type monocrystalline silicon substrate. Cells based on monocrystalline silicon substrates have higher conversion efficiency compared to other types, such as polycrystalline silicon cells. An N-type silicon substrate is obtained by introducing donor impurities such as phosphorus (P), arsenic (As), or antimony (Sb) into these semiconductor materials, or a P-type silicon substrate is obtained by introducing acceptor impurities such as boron (B), aluminum (Al), or gallium (Ga). Here, no particular limitation is placed on the specific type of silicon substrate 101; in practical applications, those skilled in the art can select a suitable silicon substrate 101 as needed.

[0068] According to an embodiment of this application, the silicon substrate 101 includes a first surface 101a and a second surface 101b disposed opposite to each other. The surface having an N-region 1012 and a P-region 1011 can be the first surface 101a located on the same side as shown in FIG. 1, where the N-region and the P-region can be located on a portion of the surface of the silicon substrate 101. However, this is not a limitation; the surface having an N-region 1012 and a P-region 1011 can also include a first surface 101a and a second surface 101b disposed opposite to each other. For example, the N-region 1012 may be located in at least a portion of the first surface 101a, and the P-region 1011 may be located in at least a portion of the second surface 101b.

[0069] According to embodiments of this application, the N-type and / or P-type doped semiconductor layers may include semiconductor materials such as monocrystalline silicon, polycrystalline silicon, or microcrystalline silicon. The N-type doped semiconductor layer 105 can be achieved by introducing donor impurities such as phosphorus (P), arsenic (As), or antimony (Sb) into the semiconductor material. The P-type doped semiconductor layer 104 can be achieved by introducing acceptor impurities such as boron (B), aluminum (Al), or gallium (Ga) into the aforementioned semiconductor material.

[0070] According to embodiments of this application, the P-region electrode 108 and N-region electrode 109 can be made of silver, silver-plated copper, aluminum, or copper, etc. Preferred electrode types include silver electrodes, doped aluminum electrodes (doped with Group IIIA elements), or silver-aluminum electrodes. The P-region electrode 108 and N-region electrode 109 can be made of the same material or different materials. They can be fabricated by printing, photolithography, or electroplating. The printing method can be, for example, screen printing or inkjet printing, with screen printing being the preferred method due to its lower cost. In the screen printing process for electrode fabrication, the P-region electrode 108 and N-region electrode 109 can be printed in the same step or in different steps.

[0071] According to the embodiments of this application, when it is more difficult to fabricate a doped semiconductor layer with a higher doping concentration in the P region than in the N region, by adjusting the distribution density of metal crystals in the P region and the N region, the metal crystals can improve the contact performance in the P region more effectively than in the N region, thus balancing the carrier transport and collection effects in the N and P regions and thereby improving battery performance.

[0072] According to embodiments of this application, as shown in Figures 2 and 3, the distribution morphology of metal crystals on the N-region and P-region are respectively displayed. It can be seen that the distribution density of metal crystals along the electrode width direction gradually increases from the two edges of the electrode towards the middle region. In order to more accurately control the distribution density of metal crystals in the N-region and P-region, along the direction parallel to the electrode width, the N-region electrode 109 (as shown in Figure 3) and the P-region electrode 108 (as shown in Figure 2) respectively include a main body portion and a peripheral portion adjacent to both sides of the main body portion, and the width of the peripheral portion is equal to 5% to 25% of the width of the N-region electrode 109 or the P-region electrode 108, for example, it can be 5%, 10%, 15%, 20%, 25%, etc., preferably 10%-25%; wherein, the distribution density of metal crystals under the main body portion of the P-region electrode 108 is greater than the distribution density of metal crystals under the main body portion of the N-region electrode 109.

[0073] To more clearly illustrate the relative positions of the main body and the outer perimeter, as shown in Figure 4, the main body is region A enclosed by the dashed line, and the outer perimeter is region B located on both sides of region A. Along the direction of electrode width L1, the width of the outer perimeter is L2, so L2 / L1 = 5%~25%.

[0074] Further optionally, the width L1 of the electrode can be 5 to 40 μm, for example, 5 μm, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, etc., and the width of the outer portion can be 0.25 to 10 μm, for example, 0.25 μm, 1 μm, 2 μm, 4 μm, 6 μm, 8 μm, 10 μm, etc.

[0075] According to an embodiment of this application, as shown in Figures 5, 6 and 7, the metal crystal includes a first metal crystal. Along the direction perpendicular to the electrode width, one end of the first metal crystal is connected to the N-region electrode 109 or the P-region electrode 108, and the other end of the first metal crystal abuts against the side of the doped semiconductor layer near the silicon substrate 101. The length of the first metal crystal located under the P-region electrode 108 is equal to or greater than the length of the first metal crystal located under the N-region electrode 109.

[0076] According to embodiments of this application, the shape of the metal crystal can be granular, spherical, or non-spherical. Non-spherical crystals can include pebble-like or irregular shapes. For a spherical first metal crystal, the length range of the first metal crystal can be the diameter of the sphere. For a non-spherical first metal crystal, the length range of the first metal crystal can be the equivalent length. It should be noted that this application does not limit the measurement of the length of the first metal crystal; it can be determined using conventional methods in the art, such as the farthest distance between the two end faces of the first metal crystal in an electrode cross-sectional view, perpendicular to the electrode width direction. Further exemplarily, as shown in FIG5, the length of the first metal crystal 1041 within the P-type doped semiconductor layer 104, for example H1, includes the length of the first metal crystal 1041 protruding from the P-type doped semiconductor layer 104 along the direction close to the P-region electrode 108.

[0077] According to an embodiment of this application, the length of the first metal crystal located under the P-region electrode 108 is equal to or greater than the length of the first metal crystal located under the N-region electrode 109. This can be because the average length of the first metal crystal located under the P-region electrode 108 is equal to or greater than the average length of the first metal crystal located under the N-region electrode 109, or because a certain proportion (for example, more than 50%, preferably more than 70%, more preferably more than 90%) of the first metal crystals located under the P-region electrode 108 has a length equal to or greater than the maximum length of the first metal crystal located under the N-region electrode 109.

[0078] According to embodiments of this application, a larger length of the first metal crystal is beneficial for increasing the contact area, thereby reducing the contact resistance. By adjusting the lengths of the first metal crystals in the N-region and P-region, the contacts in the N-region and P-region can be matched. According to embodiments of this application, as shown in Figures 5, 6, and 7, the metal crystal includes a second metal crystal. Along a direction perpendicular to the electrode width, one end of the second metal crystal is connected to the N-region electrode 109 or the P-region electrode 108, and the other end does not abut against the side of the doped semiconductor layer near the silicon substrate 101. The length of the second metal crystal located under the P-region electrode 108 is equal to or greater than the length of the second metal crystal located under the N-region electrode 109.

[0079] Furthermore, in order to effectively improve the contact performance between the doped semiconductor layer and the electrode by the second metal crystal, the length of the second metal crystal can preferably be the length extending from the surface of the N-type doped semiconductor layer 105 near the N-region electrode 109 into the N-type doped semiconductor layer 105 along the direction perpendicular to the electrode width, or the length extending from the surface of the P-type doped semiconductor layer 104 near the P-region electrode 108 into the P-type doped semiconductor layer 104.

[0080] At this point, the measurement of the length of the second metal crystal is not limited in this application; the measurement of the length of the first metal crystal can be referenced. The main difference is that, for example, in the electrode cross-sectional view, the measurement is the distance the second metal crystal extends into the N-type or P-type doped semiconductor layer in the direction perpendicular to the electrode width. Further exemplarily, as shown in FIG5, the length of the second metal crystal 1042 within the P-type doped semiconductor layer 104, for example H2, does not include the portion of the second metal crystal 1042 protruding from the P-type doped semiconductor layer 104 along the direction close to the P-region electrode 108.

[0081] This configuration, with its larger length in the direction perpendicular to the electrode width, increases the contact area, thereby reducing contact resistance and improving longitudinal carrier transport characteristics. By adjusting the relative lengths of the second metal crystals in the N-region and P-region, the contacts in the N-region and P-region can be matched. Simultaneously, the placement of the second metal crystals is more conducive to maintaining a good passivation effect in the doped semiconductor layer, achieving a balance between current transport characteristics and passivation effect.

[0082] According to embodiments of this application, the length of the second metal crystal located under the P-region electrode 108 is equal to or greater than the length of the second metal crystal located under the N-region electrode 109. This can be achieved by the average length of the second metal crystals located under the P-region electrode 108 being equal to or greater than the average length of the second metal crystals located under the N-region electrode 109, or by a certain percentage (e.g., more than 50%, preferably more than 70%, more preferably more than 90%) of the second metal crystals located under the P-region electrode 108 having a length equal to or greater than the maximum length of the second metal crystal located under the N-region electrode 109. Further optionally, the length of the second metal crystal located under the P-region electrode 108 is 60-300 nm, for example, it can be 60 nm, 80 nm, 100 nm, 120 nm, 150 nm, 180 nm, 200 nm, 230 nm, 250 nm, 280 nm, or 300 nm, preferably 60-200 nm, more preferably 80-200 nm, and the length of the second metal crystal located under the N-region electrode 109 is 40-200 nm, for example, it can be 40 nm, 60 nm, 80 nm, 100 nm, 130 nm, 150 nm, 180 nm, or 200 nm, preferably 40-150 nm, more preferably 60-150 nm.

[0083] Referring to Figures 6 and 7, according to an embodiment of this application, the length of the second metal crystal located under the P-region electrode 108 can be 107.0 nm, and the length of the first metal crystal located under the N-region electrode 109 can be 65.32 nm. According to an embodiment of this application, the length of the second metal crystal located under the P-region electrode 108 can be 93.25 nm, and the length of the first metal crystal located under the N-region electrode 109 can be 65.32 nm.

[0084] According to the embodiments of this application, controlling the length of the second metal crystal within the above-mentioned preferred range can avoid the second metal crystal being too short, which would prevent good contact from being formed, and too long, which would easily damage the passivation effect of the passivation layer, thereby achieving a balance between carrier transport performance and passivation effect.

[0085] According to embodiments of this application, in order to balance passivation effect and improved contact performance, it is preferable to provide metal crystals, primarily composed of second metal crystals, under both the N-region electrode and the P-region electrode. Further optionally, the number of second metal crystals located under the P-region electrode 108 accounts for 50% to 90% of the total number of metal crystals located under the P-region electrode 108, for example, 50%, 55%, 60%, 65%, 70%, 75%, 80%, 85%, 90%, etc.; and / or, the number of second metal crystals located under the N-region electrode 109 accounts for 50% to 90% of the total number of metal crystals located under the N-region electrode 109, for example, 50%, 55%, 60%, 65%, 70%, 75%, 80%, 85%, 90%, etc.

[0086] According to an embodiment of this application, along a direction parallel to the surface of the silicon substrate 101, the width of the second metal crystal located under the P-region electrode 108 is greater than the width of the second metal crystal located under the N-region electrode 109. This configuration, along a direction parallel to the surface of the silicon substrate 101, allows for a larger width of the second metal crystal, which increases the contact area, thereby reducing contact resistance and improving lateral carrier transport characteristics. By adjusting the relative widths of the second metal crystals in the N-region and P-region, the contacts in the N-region and P-region can be matched.

[0087] At this point, the length measurement of the second metal crystal is not limited in this application, and can be referred to the length measurement of the first metal crystal. The main difference is that, in the electrode cross-sectional view, the distance between the two end faces of the second metal crystal is measured in the direction of extension parallel to the surface of the silicon substrate 101.

[0088] For example, as shown in FIG8, taking the second metal crystal 1042 in the P-type doped semiconductor layer 104 as an example, in the electrode cross-sectional view, the one-dimensional width dimension of the second metal crystal is measured along the direction parallel to the electrode width aa' (that is, parallel to the silicon substrate surface direction), and the width of the second metal crystal is d2. At this time, the length of the second metal crystal is d1 along the direction perpendicular to the electrode width bb'.

[0089] According to embodiments of this application, a metal crystal with the aforementioned distribution density can be achieved by selecting a suitable electrode paste and performing electrode sintering. Specifically, the electrode paste mainly consists of metal powder, glass powder, and organic carriers, etc. The glass powder ensures reliable connection between the electrode and the doped semiconductor layer during electrode sintering and promotes diffusion and migration between the metal and silicon components. The N-region and P-region electrodes fabricated based on the electrode paste are then sintered to form a glass crystal.

[0090] Therefore, both the P-region electrode 108 and the N-region electrode 109 include glass frit, with the glass frit content of the P-region electrode 108 being greater than that of the N-region electrode 109. This arrangement results in a difference in the corrosion ability of the glass frit on the P-region and N-region electrodes, which is more conducive to the formation of metal crystals with a higher distribution density under the P-region electrode compared to the N-region electrode.

[0091] According to embodiments of this application, the ratio of the contact resistance between the P-region electrode 108 and the P-type doped semiconductor layer 104 to the contact resistance between the N-region electrode 109 and the N-type doped semiconductor layer 105 is 1.25 to 3, preferably 1.5 to 2.5. Specifically, the ratio of the contact resistance between the P-region electrode 108 and the P-type doped semiconductor layer 104 to the contact resistance between the N-region electrode 109 and the N-type doped semiconductor layer 105 can be 1.25, 1.5, 1.7, 1.9, 2.0, 2.25, 2.5, or 3.0.

[0092] According to the embodiments of this application, the arrangement of the metal crystal helps to control the ratio of the contact resistance between the P-region electrode 108 and the P-type doped semiconductor layer 104 to the contact resistance between the N-region electrode 109 and the N-type doped semiconductor layer 105 within the above-mentioned preferred range, thereby facilitating the balance of N-region and P-region carrier collection.

[0093] It should be noted that the contact resistance mentioned above is different from the parallel or series resistance that characterizes battery performance. It characterizes the contact performance between the electrode and the doped semiconductor layer. This application does not limit the measurement of contact resistance. Those skilled in the art can measure it using conventional methods in the field, such as the four-probe method.

[0094] According to embodiments of this application, optionally, the contact resistance between the P-region electrode 108 and the P-type doped semiconductor layer 104 can be 2.5–4 Ω / cm, preferably 3–3.5 Ω / cm. Exemplarily, the contact resistance between the P-region electrode 108 and the P-type doped semiconductor layer 104 can be 2.5 Ω / cm, 2.6 Ω / cm, 2.8 Ω / cm, 3.0 Ω / cm, 3.3 Ω / cm, 3.5 Ω / cm, 3.8 Ω / cm, or 4.0 Ω / cm.

[0095] According to embodiments of this application, optionally, the contact resistance between the N-region electrode 109 and the N-type doped semiconductor layer 105 can be 0.5–2 Ω / cm, preferably 1.0–1.5 Ω / cm. Exemplarily, the contact resistance between the N-region electrode 109 and the N-type doped semiconductor layer 105 can be 0.5 Ω / cm, 0.6 Ω / cm, 0.8 Ω / cm, 1.0 Ω / cm, 1.3 Ω / cm, 1.5 Ω / cm, 1.8 Ω / cm, or 2.0 Ω / cm.

[0096] According to an embodiment of this application, taking a TBC (TOPCon-Back Contact) solar cell as an example, as shown in Figure 1, N-regions and P-regions are alternately distributed on the same surface of the silicon substrate 101. The solar cell may further include a first tunneling layer 102 and a second tunneling layer 103, wherein: the first tunneling layer 102 is located between the silicon substrate 101 and the P-type doped semiconductor layer 104, and the second tunneling layer 103 is located between the silicon substrate 101 and the N-type doped semiconductor layer 105. A gap region (i.e., a GAP region) 101c is provided between the N-region and the P-region to electrically isolate the N-type doped semiconductor layer and the P-type doped semiconductor layer to prevent short circuits.

[0097] Among them, tunneling passivation contact structures are formed between the first tunneling layer 102 and the P-type doped semiconductor layer 104, and between the second tunneling layer 103 and the N-type doped semiconductor layer 105, respectively. Further optionally, the P-type doped semiconductor layer 104 and the N-type doped semiconductor layer 105 can be doped polysilicon layers, respectively.

[0098] For example, the P-type doped semiconductor layer 104 is formed by incorporating at least one element from Group IIIA into the polycrystalline silicon layer in an in-situ or out-of-situ doping manner, and the N-type doped semiconductor layer 105 is formed by incorporating at least one element from Group VA into the polycrystalline silicon layer in an in-situ or out-of-situ doping manner. In-situ doping can be achieved by simultaneously introducing a doping source during the fabrication of the polycrystalline silicon layer, thereby forming a doped polycrystalline silicon layer. Out-of-situ doping can be achieved by forming a doping source on the surface of the amorphous silicon and / or polycrystalline silicon layer after fabrication of the amorphous silicon and / or polycrystalline silicon layer, and then forming the doped polycrystalline silicon layer through a diffusion process such as phosphorus diffusion or boron diffusion.

[0099] For example, the first tunneling layer 102 and the second tunneling layer 103 may be made of materials such as silicon oxide (SiOx), gallium oxide, aluminum oxide, and titanium oxide, and serve as tunneling oxide layers to transport majority carriers and achieve passivation effects.

[0100] According to embodiments of this application, the thickness of the first tunneling layer 102 can be greater than the thickness of the second tunneling layer 103, and the difference in thickness can range from 0.1 to 2 nm, for example, 0.1 nm, 0.2 nm, 0.4 nm, 0.6 nm, 0.8 nm, 1 nm, 1.1 nm, 1.2 nm, 1.4 nm, 1.6 nm, 1.8 nm, 2 nm, etc. Preferably, the difference in thickness can range from 0.1 to 1 nm. Specifically, the thickness of the first tunneling layer 102 can be from 1 to 10 nm, for example, 1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, etc., and the thickness of the second tunneling layer 103 can be from 0.9 to 9 nm, for example, 0.9 nm, 1.1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, etc.

[0101] This design avoids the problem of different types of dopants having varying abilities to penetrate the silicon substrate during the formation of doped polycrystalline silicon. Specifically, Group IIIA elements penetrate the tunneling layer more easily than Group IV elements, which could lead to excessively high P-type doping concentrations in the silicon substrate and reduce the effectiveness of heterojunctions or high-low junctions. For example, if the P-type doped semiconductor layer 104 is formed using a boron diffusion process and the N-type doped semiconductor layer 105 is formed using a phosphorus diffusion process, boron will penetrate the tunneling layer more easily than phosphorus. Excessive boron doping in the silicon substrate can easily lead to recombination losses and is detrimental to ensuring the effectiveness of heterojunctions or high-low junction structures. By setting the thickness of the first tunneling layer 102 to be greater than that of the second tunneling layer 103, the diffusion depth of different types of dopants can be controlled, allowing N-type and P-type dopants to dissolve at higher concentrations within the polycrystalline silicon layer, ensuring the effectiveness of heterojunctions or high-low junction structures, while simultaneously enabling the N-type doped semiconductor layer 105 and the P-type doped semiconductor layer 104 to achieve good field passivation effects.

[0102] Based on the fine control of different types of doping elements, the ratio of the doping concentration of the N-type doped semiconductor layer to the doping concentration of the P-type doped semiconductor layer ranges from 1 to 1E5. At the same time, combined with the difference in the distribution density of the first metal crystal and the second metal crystal, the balance of carrier transport effect in the N-region and P-region can be effectively controlled, while further ensuring the passivation effect and effectively reducing carrier recombination.

[0103] It should be noted that in this application, when numerical values ​​are expressed in the form "A"E"B", "E" represents a power with a base of 10, and "A"E"B" represents A×10. B For example, the above "1E5" represents 1×10 5 .

[0104] For example, taking a p-type doped semiconductor layer as boron doped, the boron doping concentration can be 1E17cm⁻¹. -3 ~5E21cm -3 Taking an N-type doped semiconductor layer as an example, the phosphorus doping concentration can be 1E18cm⁻¹. -3 ~6E21cm -3 .

[0105] According to embodiments of this application, optionally, the thickness of the P-type doped semiconductor layer 104 can be greater than that of the N-type doped semiconductor layer 105. Preferably, the thickness of the P-type doped semiconductor layer 104 can be 1.1 to 1.5 times (e.g., 1.1, 1.2, 1.3, 1.4, 1.5) times the thickness of the N-type doped semiconductor layer 105. Specifically, the thickness of the P-type doped semiconductor layer 104 can be 100 to 600 nm, for example, 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, 400 nm, 500 nm, 600 nm, etc.; the thickness of the N-type doped semiconductor layer 105 can be 90 to 450 nm, for example, 90 nm, 100 nm, 120 nm, 150 nm, 170 nm, 200 nm, 250 nm, 300 nm, 350 nm, 400 nm, 450 nm, etc. The thickness of the P-type doped semiconductor layer 104 is greater than that of the N-type doped semiconductor layer 6. This arrangement helps to effectively avoid the problem of excessively high P-type doping concentration in the silicon substrate during the formation of doped polycrystalline silicon, which reduces the effectiveness of heterojunctions or high-low junctions. It also helps to prevent the more corrosive P-region electrode from easily burning through the doped semiconductor layer during electrode sintering. According to an embodiment of this application, as shown in FIG1, the solar cell may further include a first passivation antireflection layer 106 and a second passivation antireflection layer 107, wherein: the first passivation antireflection layer 106 is located between the P-type doped semiconductor layer 104 and the P-region electrode 108, and the second passivation antireflection layer 107 is located between the N-type doped semiconductor layer 105 and the N-region electrode 109; wherein the refractive index of the first passivation antireflection layer 106 located on the P-region is less than the refractive index of the second passivation antireflection layer 107 located on the N-region.

[0106] According to embodiments of this application, the first passivation antireflection layer 106 and the second passivation antireflection layer 107 achieve surface passivation. They can be formed in the same process step or in different process steps, both achieving the aforementioned refractive index distribution. Since factors influencing refractive index include the density, thickness, and composition of the passivation antireflection layer, and generally, higher density results in a higher refractive index, the refractive index distribution of the passivation antireflection layer indicates that the first passivation antireflection layer located in the P-region has a slightly lower density than the second passivation antireflection layer located in the N-region. This facilitates the formation of more numerous and longer metal crystals in the P-region, thereby achieving contact balance between the P-region and the N-region.

[0107] According to an embodiment of this application, the difference between the refractive index of the first passivation antireflection layer 106 and the refractive index of the second passivation antireflection layer 107 ranges from 0.02 to 0.4. Specifically, the difference between the refractive index of the first passivation antireflection layer 106 and the refractive index of the second passivation antireflection layer 107 can be 0.02, 0.05, 0.1, 0.12, 0.15, 0.18, 0.2, 0.22, 0.25, 0.28, 0.30, 0.32, 0.35, 0.38, or 0.4.

[0108] Further optionally, the refractive index of the first passivation antireflection layer 106 can be 1.95 to 2.05, for example, 1.95, 1.98, 2.01, 2.03, 2.05, etc. The refractive index of the second passivation antireflection layer 107 can be 2.05 to 2.35, for example, 2.05, 2.10, 2.15, 2.20, 2.22, 2.25, 2.28, 2.30, 2.33, 2.35, etc.

[0109] By controlling the refractive indices of the first passivation antireflection layer 106 and the second passivation antireflection layer 107 within the above-mentioned range, it is possible to avoid their density being too low, which would cause the electrode to be over-sintered and destroy the passivation effect, or to avoid their density being too high, which would be detrimental to good contact between the electrode and the doped semiconductor layer.

[0110] According to embodiments of this application, the first passivation antireflection layer 106 and the second passivation antireflection layer 107 may be a single-layer film formed of silicon dioxide, aluminum dioxide, silicon nitride or silicon oxynitride, or a multilayer film composed of one or more of the aforementioned materials.

[0111] According to an embodiment of this application, further (not shown in FIG1), taking a TBC cell as an example, the solar cell of this application embodiment may further include a third passivation antireflection layer located on the second surface 101b of the silicon substrate. Further optionally, the third passivation antireflection layer may be selected from a material similar to the first or second passivation antireflection layer, for example, it may be a single-layer film formed of silicon dioxide, aluminum dioxide, silicon nitride, or silicon oxynitride, or a multilayer film of one or more of the aforementioned materials.

[0112] For example, the first, second, or third passivation antireflection layer is a stacked structure of aluminum dioxide and silicon nitride disposed on the side of the aluminum dioxide layer facing away from the silicon substrate, or the first, second, or third passivation antireflection layer is a stacked structure of aluminum dioxide and silicon nitride and silicon oxynitride disposed on the side of the aluminum dioxide layer facing away from the silicon substrate. In this case, the refractive index is the refractive index obtained by measuring the entire passivation antireflection layer. The passivation antireflection layer can simultaneously provide protection and passivation for the underlying silicon substrate or functional layer, such as the P-type doped semiconductor layer 104 or the N-type doped semiconductor layer 105, as well as reduce the reflection of light incident on the first surface 101a or the second surface 101b.

[0113] According to another embodiment of this application, as shown in FIG14, a solar cell is provided, comprising: a silicon substrate 101, a P-type doped semiconductor layer 104, an N-type doped semiconductor layer 105, a P-region electrode 108, and an N-region electrode 109. The silicon substrate 101 includes a surface having an N-region 1012 and a P-region 1011; the N-type doped semiconductor layer 105 is located on the N-region 1012 of the silicon substrate 101; the P-type doped semiconductor layer 104 is located on the P-region 1011 of the silicon substrate 101; the N-region electrode 109 is located on the surface of the N-type doped semiconductor layer 105 away from the silicon substrate 101; the P-region electrode 108 is located on the surface of the P-type doped semiconductor layer 104 away from the silicon substrate 101; both the P-region electrode 108 and the N-region electrode 109 contain a metal element. The metal element may include silver (Ag), copper (Cu), aluminum (Al), etc. It should be noted that this application does not specifically limit whether the types of metal elements contained in the P-region electrode 108 are the same as those contained in the N-region electrode 109; they can be the same or different. Generally, silver is more corrosive and has stronger conductivity, and it forms a silver-silicon alloy with silicon. Aluminum also has strong conductivity, while copper is cheaper.

[0114] According to embodiments of this application, the content of metal elements in the region corresponding to the P-type electrode 108 in the P-type doped semiconductor layer 104 is greater than the content of metal elements in the region corresponding to the N-type electrode 109 in the N-type doped semiconductor layer 105. This results in more carrier transport paths being formed in the region corresponding to the P-type electrode 108 in the P-type doped semiconductor layer 104, improving the contact performance between the P-type electrode 108 and the P-type doped semiconductor layer 104, reducing the contact resistance corresponding to the P-type electrode 108, and narrowing the contact difference between the P-type electrode 1011 and the N-type electrode 1012. This achieves a good contact balance between the P-type electrode 1011 and the N-type electrode 1012, thereby improving the efficiency of the solar cell. According to embodiments of this application, the content of metal elements in the P-type electrode 108 is greater than the content of metal elements in the N-type electrode 109, which facilitates the diffusion of metal elements from the P-type electrode 108 into the P-type doped semiconductor layer 104, forming more contact paths and further improving the contact performance between the P-type electrode 108 and the P-type doped semiconductor layer 104.

[0115] According to an embodiment of this application, the proportion of metal element content at the contact site between the P-region electrode 108 and the P-type doped semiconductor layer 104 to the total metal element content of the P-region electrode 108 is a first proportion; the proportion of metal element content at the contact site between the N-region electrode 109 and the N-type doped semiconductor layer 105 to the total metal element content of the N-region electrode 109 is a second proportion. Here, the first proportion is calculated by comparing the metal element content at the contact site between the P-region electrode 108 and the P-type doped semiconductor layer 104 with the metal element content of the P-region electrode 108 itself. The second proportion is obtained similarly, and will not be described again here to avoid repetition.

[0116] The contact position between the P-region electrode 108 and the P-type doped semiconductor layer 104 can be the contact area between the P-region electrode 108 and the P-type doped semiconductor layer 104. The thickness of this contact area can be approximately 5 nm, and the direction of the thickness of this contact area is parallel to the thickness direction of the silicon substrate 101. In Figure 14, the thickness direction of the silicon substrate 101 is vertical. Within the contact position between the P-region electrode 108 and the P-type doped semiconductor layer 104, metal crystals are formed between the metal in the P-region electrode 108 and the silicon in the P-type doped semiconductor layer 104. Similarly, the contact position between the N-region electrode 109 and the N-type doped semiconductor layer 105 can be the contact area between the N-region electrode 109 and the N-type doped semiconductor layer 105. The thickness of this contact area can also be approximately 5 nm, and the direction of the thickness of this contact area is parallel to the thickness direction of the silicon substrate 101. Within the contact position between the N-region electrode 109 and the N-type doped semiconductor layer 105, metal crystals are formed between the metal in the N-region electrode 109 and the silicon in the N-type doped semiconductor layer 105. For example, if both the P-region electrode 108 and the N-region electrode 109 contain silver, then a silver-silicon alloy is formed at the contact position between the P-region electrode 108 and the P-type doped semiconductor layer 104, and at the contact position between the N-region electrode 109 and the N-type doped semiconductor layer 105.

[0117] The content of metal elements at the contact sites between the P-region electrode 108 and the P-type doped semiconductor layer 104, and at the contact sites between the N-region electrode 109 and the N-type doped semiconductor layer 105, can be determined by scanning electron microscopy (SEM) and X-ray energy dispersive spectroscopy (EDS). Specifically, EDS is performed using line scanning, with the scanning direction perpendicular to the length or extension direction of the P-region electrode 108 and the N-region electrode 109. The contact sites between the P-region electrode 108 and the P-type doped semiconductor layer 104, and between the N-region electrode 109 and the N-type doped semiconductor layer 105, can be determined based on the morphology and the variation in Si (silicon) content. Specifically, the contact sites between the P-region electrode 108 and the P-type doped semiconductor layer 104 are locations where the metal content decreases compared to the P-region electrode 108 itself, and where the silicon content decreases compared to the P-type doped semiconductor layer 104 itself. The contact position between the N-region electrode 109 and the N-type doped semiconductor layer 105 represents a decrease in metal element content compared to the N-region electrode 109 itself, and a decrease in silicon and other elements compared to the N-type doped semiconductor layer 105 itself. Figure 15 is a partial SEM image of the back-contact solar cell, specifically a surface morphology diagram of the contact position between the P-region electrode 108 and the P-type doped semiconductor layer 104. For example, both the P-region and N-region electrodes contain silver. In Figure 15, the upper part is the P-region electrode 108, and the lower part is the P-type doped semiconductor layer 104, silicon substrate 101, and other structures. The brighter dotted structures between them are the silver-silicon alloy formed at the contact position between the P-region electrode 108 and the P-type doped semiconductor layer 104. Simultaneously, a silver-silicon alloy is also formed at the contact position between the N-region electrode 109 and the N-type doped semiconductor layer 105. The location where the silver-silicon alloy forms is the contact position. As another example, Figure 16 is a schematic diagram of the elemental distribution of the silicon substrate 101 and one side of it in the solar cell. In Figure 16, the horizontal axis represents the thickness of the solar cell starting from the silicon substrate 101, in nm, and the vertical axis represents the distribution ratio of elements at the corresponding thickness position in the scanned area. The metal element of the electrode in Figure 16 is silver. The intersection of the silver and silicon curves represents the contact point between the electrode and the doped semiconductor layer in contact with it. The ratio of the silver content at this intersection point to the silver content at the highest point to the right of the intersection point indicates the proportion of silver content at the contact point relative to the total silver content in the electrode. The thickness between this intersection point and the leftmost endpoint of the silver curve characterizes the tendency of silver to enter the doped semiconductor layer. It should be noted that the line scan position needs to pass through the metal crystal formed by the metal elements in the P-region electrode 108 and the silicon in the P-type doped semiconductor layer 104, and the metal crystal formed by the metal elements in the N-region electrode 109 and the silicon in the N-type doped semiconductor layer 105; for example, in Figure 14, the scan position needs to pass through the location of the silver-silicon alloy.One or more regions can be selected at the contact position between the P-region electrode 108 and the P-type doped semiconductor layer 104. Each region is formed with the aforementioned metal crystal. The content of metal elements in each region is measured separately. Then, the average value of the metal element content in multiple regions is taken to obtain the metal element content at the contact position between the P-region electrode 108 and the P-type doped semiconductor layer 104. The multiple regions can be greater than or equal to two, for example, 2, 3, 4, 5, 6, 7, 8, 9, or 10.

[0118] The method for obtaining the metal element content at the contact site between the N-region electrode 109 and the N-type doped semiconductor layer 105 is similar and will not be repeated here. It should be noted that the method for obtaining the metal element content at the contact site between the N-region electrode 109 and the N-type doped semiconductor layer 105 should be consistent with the method for obtaining the metal element content at the contact site between the P-region electrode 108 and the P-type doped semiconductor layer 104. For example, three locations should be selected for measurement at both the contact sites of the P-region electrode 108 and the P-type doped semiconductor layer 104 and the N-region electrode 109 and the N-type doped semiconductor layer 105, and the average metal element content at the three locations should be calculated.

[0119] Here, the first ratio is smaller than the second ratio; the metal element content at the contact site between the P-region electrode 108 and the P-type doped semiconductor layer 104 is relatively lower than that of the P-region electrode 108. At the contact site between the N-region electrode 109 and the N-type doped semiconductor layer 105, the metal element content is relatively close to that of the N-region electrode 109. Typically, the P-type doped semiconductor layer 104 is obtained by boron diffusion. Due to the diffusion characteristics of boron, it is difficult to obtain a high boron doping concentration. That is, the doping concentration of the P-type doped semiconductor layer 104 is usually slightly lower, resulting in a slightly higher contact resistance corresponding to the P-region electrode 108. In this application, the metal elements are formed at the two contact positions in the above distribution manner, which means that more metal elements in the P-region electrode 108 enter the P-type doped semiconductor layer 104 than metal elements in the N-region electrode 109. More contact paths are formed in the region corresponding to the P-region electrode 108 in the P-type doped semiconductor layer 104, which can reduce the contact resistance corresponding to the P-region electrode 108, thereby reducing the contact difference between the P-region 1011 and the N-region 1012, achieving a good contact balance between the P-region 1011 and the N-region 1012, and thus improving the efficiency of the solar cell.

[0120] According to the embodiments of this application, the content of metal elements at the contact position between the P-region electrode 108 and the P-type doped semiconductor layer 104 is in a first ratio of 1:2.1 to 1:3.9 to the content of metal elements in the P-region electrode 108, and the content of metal elements at the contact position between the N-region electrode 109 and the N-type doped semiconductor layer 105 is in a second ratio of 1:1.5 to 1:21 to the content of metal elements in the N-region electrode 109. Both ratios are within the above range, making them easy to process and prepare, and they have a good effect on reducing the contact resistance corresponding to the P-region electrode 108.

[0121] For example, the first ratio can be 1:2.1, 1:2.2, 1:2.5, 1:2.7, 1:2.8, 1:3, 1:3.1, 1:3.3, 1:3.5, 1:3.6, 1:3.7, 1:3.8, or 1:3.9. The second ratio can be 1:1.5, 1:1.6, 1:1.7, 1:1.8, 1:1.9, 1:1.55, 1:1.65, 1:1.75, 1:1.85, 1:1.95, 1:2, or 1:21.

[0122] According to an embodiment of this application, the diffusion depth of the metal element in the P-type doped semiconductor layer 104 of the P-region electrode 108 is greater than the diffusion depth of the metal element in the N-type doped semiconductor layer 105 of the N-region electrode 109. Normally, due to the difficulty in obtaining a high boron doping concentration, the contact resistance between the P-region electrode 108 and the P-type doped semiconductor layer 104 is slightly higher. In this application, the diffusion depth of the metal element in the P-type doped semiconductor layer 104 is deeper, which can reduce the contact resistance between the P-region electrode 108 and the P-type doped semiconductor layer 104, thereby reducing the contact difference between the P-region 1011 and the N-region 1012. Both the P-region 1011 and the N-region 1012 achieve good contact, thus improving the efficiency of the solar cell.

[0123] It should be noted that, in this application, the diffusion depth of the metal element of the P-region electrode 108 in the P-type doped semiconductor layer 104 refers to the approximate distance from the point where the P-region electrode 108 and the P-type doped semiconductor layer 104 begin to contact each other in the direction away from the silicon substrate 101 and towards the silicon substrate 101, to the position of the P-region electrode 108 within the diffusion region of the P-type doped semiconductor layer 104 that is closest to the silicon substrate 101. Similarly, the diffusion depth of the metal element of the N-region electrode 109 in the N-type doped semiconductor layer 105 refers to the approximate distance from the point where the N-region electrode 109 and the N-type doped semiconductor layer 105 begin to contact each other in the direction away from the silicon substrate 101 and towards the silicon substrate 101, to the position of the N-region electrode 109 within the diffusion region of the N-type doped semiconductor layer 105 that is closest to the silicon substrate 101.

[0124] According to embodiments of this application, the ratio of the diffusion depth of the metal element in the P-type doped semiconductor layer 104 of the P-region electrode 108 to the diffusion depth of the metal element in the N-type doped semiconductor layer 105 of the N-region electrode 109 is greater than 1 and less than or equal to 8. The ratio of the diffusion depth of the metal element in the P-type doped semiconductor layer 104 to the diffusion depth of the metal element in the N-type doped semiconductor layer 105 of the N-region electrode 109 is within the aforementioned numerical range, which is considered appropriate. This ratio not only reduces the contact resistance between the P-region electrode 108 and the P-type doped semiconductor layer 104, thereby reducing the contact difference between the P-region 1011 and the N-region 1012, but also achieves good contact between the P-region 1011 and the N-region 1012, thus improving the efficiency of the solar cell. Furthermore, it is compatible with existing processes and easy to implement.

[0125] For example, the ratio of the diffusion depth of the metal element of the P-region electrode 108 in the P-type doped semiconductor layer 104 to the diffusion depth of the metal element of the N-region electrode 109 in the N-type doped semiconductor layer 105 can be 1.01, 1.5, 2, 2.5, 3, 3.5, 4, 4.5, 5, 6, 7, or 8.

[0126] According to the embodiments of this application, the diffusion depth of the metal element of the P-region electrode 108 in the P-type doped semiconductor layer 104 is 100 nm to 450 nm; the diffusion depth of the metal element of the N-region electrode 109 in the N-type doped semiconductor layer 105 is 50 nm to 300 nm. This not only reduces the contact resistance corresponding to the P-region electrode 108, but also reduces the contact difference between the P-region 1011 and the N-region 1012. The P-region 1011 and the N-region 1012 achieve good contact at the same time, thereby improving the efficiency of the solar cell. Moreover, it is compatible with existing processes and easy to implement.

[0127] For example, the diffusion depth of the metal element of the P-region electrode 108 in the P-type doped semiconductor layer 104 can be 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 130nm, 270nm, 390nm, 410nm, 430nm, 440nm, or 450nm. Similarly, the diffusion depth of the metal element of the N-region electrode 109 in the N-type doped semiconductor layer 105 can be 50nm, 90nm, 100nm, 150nm, 170nm, 200nm, 250nm, 280nm, or 300nm. It should be noted that the values ​​of both must satisfy the condition that the diffusion depth of the metal element of the P-region electrode 108 in the P-type doped semiconductor layer 104 is greater than the diffusion depth of the metal element of the N-region electrode 109 in the N-type doped semiconductor layer 105.

[0128] According to an embodiment of this application, the thickness of the P-type doped semiconductor layer 104 can be greater than the thickness of the N-type doped semiconductor layer 105. Increasing the thickness of the P-type doped semiconductor layer 104 facilitates higher concentrations of P-type dopant dissolved in the corresponding doped semiconductor layer and allows for greater diffusion depth of the metal elements in the P-type doped semiconductor layer 104, minimizing the diffusion of metal elements into the silicon substrate 101 and thus reducing recombination. It also ensures the electric field strength within the region, with both the P-region 1011 and N-region 1012 achieving good field effects, guaranteeing the effectiveness of the heterojunction and high / low junction structures. Furthermore, the difference between the thickness of the P-type doped semiconductor layer 104 and the N-type doped semiconductor layer 105 can be from 10 nm to 150 nm.

[0129] According to an embodiment of this application, the solar cell further includes a P-type inner expansion layer 110 and an N-type inner expansion layer 111. The P-type inner expansion layer 110 is the portion of the dopant element in the P-type doped semiconductor layer 104 that diffuses into the silicon substrate 101. The N-type inner expansion layer 111 is the portion of the dopant element in the N-type doped semiconductor layer 105 that diffuses into the silicon substrate 101. It should be noted that, regardless of whether the silicon substrate 101 itself has N-type doping or P-type doping, the doping concentration of the P-type inner expansion layer 110 and the N-type inner expansion layer 111 is usually higher than the doping concentration of the silicon substrate 101 itself. Moreover, the silicon substrate 101 itself and the P-type inner expansion layer 110 and the N-type inner expansion layer 111 can be conveniently and accurately distinguished by the location of the P-type inner expansion layer 110 and the N-type inner expansion layer 111. For back-contact solar cells, as shown in Figure 14, both the P-type inner expansion layer 110 and the N-type inner expansion layer 111 are located within the silicon substrate 101 and are positioned close to the back surface of the silicon substrate 101. The P-type inner expansion layer 110 corresponds to the position of the P-region 1011, and the N-type inner expansion layer 111 corresponds to the position of the N-region 1012. For bifacial electrode solar cells, both the P-type inner expansion layer 110 and the N-type inner expansion layer 111 are located within the silicon substrate 101. The P-type inner expansion layer 110 is positioned close to the surface of the silicon substrate 101 adjacent to the P-type doped semiconductor layer 104, and the N-type inner expansion layer 111 is positioned close to the surface of the silicon substrate 101 adjacent to the N-type doped semiconductor layer 105.

[0130] The P-type inner expansion layer 110 is located inside the silicon substrate 101 near the P-type doped semiconductor layer 104 and corresponds to the P-region 1011. The ratio of the doping concentration of the P-type doped semiconductor layer 104 to the doping concentration of the P-type inner expansion layer 110 is 2 to 5E11. The N-type inner expansion layer 111 is located inside the silicon substrate 101 near the N-type doped semiconductor layer 105 and corresponds to the N-region 1012. The ratio of the doping concentration of the N-type doped semiconductor layer 105 to the doping concentration of the N-type inner expansion layer 111 is 2 to 6E11. Controlling the ratios of the doping concentrations of the P-type doped semiconductor layer 104 to the P-type inner expansion layer 110, and the N-type doped semiconductor layer 105 to the N-type inner expansion layer 111 within the above ranges is to ensure that the electric field strength within the region provides a good carrier shunting effect.

[0131] For example, the ratio of the doping concentration of the P-type doped semiconductor layer 104 to the doping concentration of the P-type inner extension layer 110 can be 2, 10, 100, 1E, 5E, 1E4, 1E5, 5E6, 8E7, 1E8, 1E9, 1E10, 1E11, or 5E11. The ratio of the doping concentration of the N-type doped semiconductor layer 105 to the doping concentration of the N-type inner extension layer 111 can be 2, 50, 10, 1E, 1E4, 5E5, 1E6, 5E7, 1E8, 1E9, 1E10, 1E11, 5E11, or 6E11.

[0132] According to an embodiment of this application, the doping concentration of the p-type doped semiconductor layer 104 is 1E17cm⁻¹. -3 ~5E21cm -3 The doping concentration of the P-type inner extension layer 110 is 1E10cm. -3 Up to 5E16cm - 3 The doping concentrations of both the P-type doped semiconductor layer 104 and the P-type inner extension layer 110 are within the aforementioned range, making the doping concentration or amount of the P-type inner extension layer 110 within the silicon substrate 101 suitable, thus ensuring low contact resistance between the electrode and the P-type doped region. Furthermore, the variation in doping concentration between the P-type doped semiconductor layer 104 and the doping content of the P-type inner extension layer 110 along the depth direction of the silicon substrate 101 is suitable, ensuring effective carrier separation, improving the efficiency of the solar cell, and enhancing compatibility with existing processes.

[0133] For example, the doping concentration of the p-type doped semiconductor layer 104 can be 1E17cm. -3 5E17cm -3 1E18cm -3 5E18cm -3 1E19cm -3 5E19cm -31E20cm -3 5E20cm - 3 1E21cm -3 5E21cm -3 The doping concentration of the p-type inner extension layer 110 can be 1E10cm. -3 5E10cm -3 1E11cm -3 5E11cm -3 1E12cm -3 1E13cm -3 5E13cm -3 1E14cm - 3 1E15cm -3 1E16cm -3 5E16cm -3 It should be noted that the selection of doping concentrations for both must meet the aforementioned ratio constraints. Along the depth direction of the P-type doped semiconductor layer 104, the doping concentration at various points in the P-type doped semiconductor layer 104 can remain essentially constant, which can be characterized by surface concentration. That is to say, along the depth direction of the P-type doped semiconductor layer 104, the doping concentration at various points in the P-type doped semiconductor layer 104 is relatively uniform.

[0134] According to an embodiment of this application, the doping concentration of the N-type doped semiconductor layer 105 is 1E18cm⁻¹. -3 ~6E21cm -3 The doping concentration of the N-type inner extension layer 111 is 1E11cm. -3 ~5E17cm - 3 The doping concentrations of both layers are within the aforementioned range, resulting in a suitable doping concentration or amount for the N-type inner extension layer 111 within the silicon substrate 101. This ensures that the N-region electrode 109 and the N-type doped semiconductor layer 105 have low contact resistance. Furthermore, the variation between the doping concentration of the N-type doped semiconductor layer 105 and the doping content of the N-type inner extension layer 111 along the depth direction of the silicon substrate 101 is appropriate, ensuring effective carrier separation, improving the efficiency of the solar cell, and enhancing compatibility with existing processes.

[0135] For example, the doping concentration of the N-type doped semiconductor layer 105 can be 1E18cm⁻¹. -3 5E18cm -3 1E19cm -3 5E19cm -3 1E20cm -3 5E20cm -3 1E21cm -35E21cm - 3 6E21cm -3 The doping concentration of the N-type inner extension layer can be 1E¹¹cm. -3 5E11cm -3 1E12cm -3 1E13cm -3 5E13cm -3 1E14cm -3 1E15cm -3 1E16cm -3 5E16cm - 3 1E17cm -3 5E17cm -3 It should be noted that the selection of doping concentrations for both must meet the aforementioned ratio constraints. Along the depth direction of the N-type doped semiconductor layer 105, the doping concentration at various points in the N-type doped semiconductor layer 105 can remain essentially constant, which can be characterized by surface concentration. That is to say, along the depth direction of the N-type doped semiconductor layer 105, the doping concentration at various points in the N-type doped semiconductor layer 105 is relatively uniform.

[0136] According to embodiments of this application, the depth of the P-type inner layer 110 can be 50 nm to 100 nm greater than the depth of the N-type inner layer 111. This depth difference ensures passivation while reducing recombination, and also improves contact matching with the electrode, enabling efficient carrier separation. It should be noted that multiple locations can be selected in the N-type doped semiconductor layer 105 to obtain the doping concentration at each location. The average doping concentration at each location is then taken to obtain the doping concentration of the N-type doped semiconductor layer 105. These multiple locations can be 2, 3, 4, 5, 6, 7, 8, 9, or 10. The determination of the doping concentration of the P-type doped semiconductor layer 104 is similar. The ratio of the doping concentration of the N-type doped semiconductor layer 105 to the doping concentration of the P-type doped semiconductor layer 104 represents how much higher the doping concentration of the N-type doped semiconductor layer 105 is compared to the doping concentration of the P-type doped semiconductor layer 104. According to an embodiment of this application, the solar cell may further include: a first tunneling layer 102 located between a silicon substrate 101 and a P-type doped semiconductor layer 104; and a second tunneling layer 103 located between a silicon substrate 101 and an N-type doped semiconductor layer 105. The thickness of the first tunneling layer 102 is greater than the thickness of the second tunneling layer 103. In the case of a back-contact solar cell, as shown in Figure 14, both the first tunneling layer 102 and the second tunneling layer 103 are located on the back surface of the silicon substrate, and the first tunneling layer 102 corresponds to the P-region, while the second tunneling layer 103 corresponds to the N-region. The thickness of the first tunneling layer 102 is greater than the thickness of the second tunneling layer 103 mainly to accommodate the differences in the tunneling action of Group IIIA elements such as boron and Group VA elements such as phosphorus. Specifically, boron diffuses more easily to the silicon substrate 101 through the tunneling oxide layer than phosphorus. Therefore, during the diffusion process, a thicker first tunneling layer 102 is needed to control the diffusion concentration of boron and reduce recombination caused by excessively high doping concentration. Matching the thickness relationship between the first tunneling layer 102 and the second tunneling layer 103 can simultaneously achieve coordination and precise control of the two doping depths, resulting in good contact and carrier separation effects in both the N-region 1012 and the P-region 1011, which can further improve the efficiency of the solar cell. At the same time, the first tunneling layer 102 and the second tunneling layer 103 can also passivate the surface of the silicon substrate 101, reducing surface recombination.

[0137] In the embodiments of this application, a first tunneling layer 102 is located between a silicon substrate 101 and a P-type doped semiconductor layer 104; a second tunneling layer 103 is located between a silicon substrate 101 and an N-type doped semiconductor layer 105. The thickness of the first tunneling layer 102 is greater than the thickness of the second tunneling layer 103; and the diffusion depth of the metal element of the P-region electrode 108 in the P-type doped semiconductor layer 104 is greater than the diffusion depth of the metal element of the N-region electrode 109 in the N-type doped semiconductor layer 105. The thickness of the first tunneling layer 102 is greater than that of the second tunneling layer 103 to match the difference in diffusion depth between the metal elements in the P-region electrode 108 and the N-region electrode 109. Specifically, the tunneling layer is disposed between the doped semiconductor layer and the silicon substrate, which can block the diffusion of metal elements. Since the diffusion depth of the metal elements in the P-region electrode 108 in the P-type doped semiconductor layer 104 is greater than that of the metal elements in the N-region electrode 109 in the N-type doped semiconductor layer 105, setting the thickness of the first tunneling layer 102 to be greater than that of the second tunneling layer 103 can better block the probability of metal elements diffusing into the silicon substrate, reducing the possibility of passivation performance degradation. During the deposition of the first tunneling layer 102 and the second tunneling layer 103, tunneling layers of different thicknesses can be set in the PN region by adjusting parameters such as deposition rate or source concentration.

[0138] In the embodiments of this application, a first tunneling layer 102 is located between a silicon substrate 101 and a P-type doped semiconductor layer 104; a second tunneling layer 103 is located between a silicon substrate 101 and an N-type doped semiconductor layer 105. The thickness of the first tunneling layer 102 is greater than the thickness of the second tunneling layer 103; and the distribution density of the metal crystals under the N-region electrode is less than the distribution density of the metal crystals under the P-region electrode. The thickness of the first tunneling layer 102 is greater than the thickness of the second tunneling layer 103 to match the difference in the distribution density of the metal crystals of the P-region electrode 108 and the N-region electrode 109. Specifically, since the distribution density of the metal crystals of the P-region electrode 108 in the P-type doped semiconductor layer 104 is greater than the distribution density of the metal crystals of the N-region electrode 109 in the N-type doped semiconductor layer 105, and the metal crystals extend in the thickness direction of the doped semiconductor layer, setting the thickness of the first tunneling layer 102 to be greater than the thickness of the second tunneling layer 103 can better block the probability of the metal crystals contacting the silicon substrate and reduce the possibility of the metal crystals damaging the passivation performance of the silicon substrate.

[0139] It should be noted that in this solar cell, the side of the silicon substrate 101 can also be covered with a tunneling layer, and the side of the silicon substrate 101 connects the light-facing side and the back-light-facing side of the silicon substrate.

[0140] In the case of a bifacial electrode solar cell, the first tunneling layer and the second tunneling layer are located on opposite sides of the silicon substrate 101. The technical effect of the difference in thickness between the first tunneling layer and the second tunneling layer is the same as described above, and will not be repeated here.

[0141] According to an embodiment of this application, with the thickness of the first tunneling layer 102 being greater than the thickness of the second tunneling layer 103, the difference between the thickness of the first tunneling layer 102 and the thickness of the second tunneling layer 103 is 0.1 nm to 2 nm, which is easy to implement while being compatible with existing processes.

[0142] For example, based on the premise that the thickness of the first tunneling layer 102 is greater than the thickness of the second tunneling layer 103, the difference between the thickness of the first tunneling layer 102 and the thickness of the second tunneling layer 103 can be 0.1nm, 0.2nm, 0.5nm, 0.8nm, 1nm, 1.1nm, 1.05nm, 1.3nm, 1.5nm, 1.8nm, 1.9nm, or 2nm.

[0143] It should be noted that in the solar cell, the thickness of the first tunneling layer 102 can be 1.1nm, 1.3nm, 1.5nm, 2nm, 2.5nm, 3nm, 3.5nm, 4nm, 4.5nm, 5nm, 5.5nm, 6nm, 6.5nm, 7nm, 7.5nm, 8nm, 8.5nm, 9nm, 9.5nm, or 10nm, and the thickness of the second tunneling layer 103 can be 1nm, 1.1nm, 1.4nm, 1.5nm, 2nm, 2.5nm, 2.8nm, 3nm, 3.5nm, 4.2nm, 5nm, 5.6nm, 6nm, 6.7nm, 7nm, 7.5nm, 8nm, 8.5nm, or 9nm. When selecting the thickness of both layers within the corresponding range, it is necessary to ensure that the thickness of the first tunneling layer 102 is greater than the thickness of the second tunneling layer 103.

[0144] According to another embodiment of this application, a solar cell is provided. Referring to FIG. 14, it includes: a silicon substrate 101, a P-type doped semiconductor layer 104, an N-type doped semiconductor layer 105, a P-region electrode 108, and an N-region electrode 109. The silicon substrate 101 includes a surface having an N-region 1012 and a P-region 1011; the N-type doped semiconductor layer 105 is located on the N-region 1012 of the silicon substrate 101; the P-type doped semiconductor layer 104 is located on the P-region 1011 of the silicon substrate 101; the N-region electrode 109 is located on the surface of the N-type doped semiconductor layer 105 away from the silicon substrate 101; and the P-region electrode 108 is located on the surface of the P-type doped semiconductor layer 104 away from the silicon substrate 101. Both the P-region electrode 108 and the N-region electrode 109 contain a metal element. This metal element may include silver (Ag), copper (Cu), aluminum (Al), etc. According to an embodiment of this application, a solar cell includes: metal crystals (not shown) located in an N-type doped semiconductor layer 105 under an N-region electrode 109 and in a P-type doped semiconductor layer 104 under a P-region electrode 108; the distribution density of the metal crystals located under the N-region electrode 109 is less than that located under the P-region electrode 108, and the content of metal elements in the region corresponding to the P-region electrode in the P-type doped semiconductor layer is greater than the content of metal elements in the region corresponding to the N-region electrode in the N-type doped semiconductor layer. Forming more metal crystals below the P-region electrode can, to some extent, promote the presence of more metal elements in the doped semiconductor layer, thereby forming more carrier transport paths in the region corresponding to the P-region electrode 108 in the P-type doped semiconductor layer 104, improving the contact performance between the P-region electrode 108 and the P-type doped semiconductor layer 104, reducing the contact resistance corresponding to the P-region electrode 108, and narrowing the contact difference between the P-region 1011 and the N-region 1012, thereby achieving a good contact balance between the P-region 1011 and the N-region 1012 and improving the efficiency of the solar cell.

[0145] According to other embodiments of this application, the solar cell of this application is not limited to the TBC cell described above, but may also be other back contact (BC) cells or bifacial cells.

[0146] Exemplarily, the solar cell of this application can also be an HPBC (Hybrid Passivated Back Contact) cell. For example, the tunneling passivation contact structure located on the P-region in the above-mentioned TBC cell can be entirely replaced with an emitter structure. Exemplarily, by performing inward doping on the P-region 1011 using a boron-based doping process, or by using an aluminum-containing electrode to perform P-type doping on the silicon substrate of the P-region 1011, an emitter is obtained on the P-region 1011 as the above-mentioned P-type doped semiconductor layer 104. The distribution structure of the metal crystals within the emitter is the same as described above and will not be repeated here.

[0147] Exemplary, the solar cell of this application can also be a bifacial cell, such as a TOPCon cell. The main difference from the TBC cell described above is that the N-region and P-region are located on different surfaces of the silicon substrate 101, for example, the N-region is located on the first surface 101a and the P-region is located on the second surface 101b. Furthermore, the tunneling passivation structure on the P-region is entirely replaced by an emitter structure. Exemplary, by performing inward doping on the P-region using a boron diffusion process, an emitter is obtained on the second surface 101b of the silicon substrate 101, serving as the aforementioned P-type doped semiconductor layer 104. The distribution structure of the metal crystals within the emitter is the same as described above and will not be repeated here.

[0148] At this time, the N-type doped semiconductor layer 105 is located in at least a portion of the first surface 101a, for example, it can completely cover the first surface 101a or be disposed in a metallized region of the first surface 101a; the P-type doped semiconductor layer 104 is located in at least a portion of the second surface 101b, for example, it can completely cover the second surface 101b or be disposed in a metallized region of the second surface 101b. Here, "metallized region" refers to a region that can be used to form an electrode and achieve metallization, including regions where the electrode position can be reasonably adjusted.

[0149] For example, the solar cell of this application can also be a bifacial cell, such as a polyfinger (polycrystalline silicon comb-fin structure)-TOPCon cell. For ease of understanding, as shown in Figure 9, the main difference from the TOPCon cell is that the P-type doped semiconductor layer 104 covers the entire second surface 101b, and the N-type doped semiconductor layer 105 is disposed in the metallized region of the first surface 101a. This reduces recombination and parasitic absorption on the first surface 101a while maintaining passivation. The distribution structure of the metal crystals within the N-type and P-type doped semiconductor layers is the same as described above and will not be repeated here.

[0150] In realizing the concept of this application, it was discovered that a specific distribution of contact hole structures within the doped semiconductor layer is suitable for accommodating components such as metal crystals, as well as other electrode components such as glass frits. This helps to increase the contact performance between the electrode and the doped semiconductor layer, thereby improving the reliability of the connection. Furthermore, by controlling the distribution of contact holes on the P-type and N-type doped semiconductor layers, it is possible to control the difference in contact performance between the P-type and N-type doped semiconductor layers and the electrode, thereby achieving a balance in carrier collection between the N-region and the P-region.

[0151] According to another embodiment of this application, a solar cell is provided. Referring to FIG1, the solar cell includes a silicon substrate 101, a P-type doped semiconductor layer 104, an N-type doped semiconductor layer 105, a P-region electrode 108, and an N-region electrode 109. Specifically: the silicon substrate 101 includes surfaces having N-regions and P-regions; the N-type doped semiconductor layer 105 is located on the N-region of the silicon substrate 101, and includes a first electrode region, the surface of the first electrode region away from the silicon substrate 101 having a plurality of first contact holes; the P-type doped semiconductor layer 104 is located on the P-region of the silicon substrate 101, and includes a second electrode region, the surface of the second electrode region away from the silicon substrate 101 having a plurality of second contact holes; wherein the first areal density of the first contact holes on the first electrode region is less than the second areal density of the second contact holes on the second electrode region, and the first and second contact holes are respectively adapted to accommodate metal crystals.

[0152] According to embodiments of this application, the "first electrode region" refers to the area on the N-type doped semiconductor layer 105 that can contact the N-region electrode 109. Similarly, the "second electrode region" refers to the area on the N-type doped semiconductor layer 105 that can contact the P-region electrode 108. The "first areal density" can characterize the density of first contact holes on the surface of the first electrode region away from the silicon substrate 101, that is, the area ratio of first contact holes per unit area on the surface of the first electrode region away from the silicon substrate. Similarly, the "second areal density" can characterize the area ratio of second contact holes per unit area on the surface of the second electrode region away from the silicon substrate.

[0153] This application does not impose any limitations on the measurement of areal density. Those skilled in the art can determine it using conventional methods in the field. For example, areal density can be measured using a scanning electron microscope (SEM). Because contact holes show a significant brightness difference from other structures in the SEM test results, they can be directly located on the SEM test image of the doped semiconductor layer surface. Multiple regions are selected in the first electrode area for testing, as shown in Figures 12 and 13. Multiple tower base structure regions are selected for ease of measurement. Then, image processing software is used to calculate the total area of ​​contact holes observed in each region, calculate the area ratio of the contact hole area in the selected region, and then calculate the average of the area ratios of multiple regions, which is the area ratio of the contact holes.

[0154] According to embodiments of this application, the test method for the first areal density of the first contact hole on the first electrode region is the same as the test method for the second areal density of the second contact hole on the second electrode region, and will not be described in detail here. It should be emphasized that the test methods for the first areal density and the second areal density must be consistent when comparing areal densities.

[0155] According to embodiments of this application, in order to observe the contact hole structure more clearly, other layers above the doped semiconductor layer in the battery cell can be removed and then acid-washed, for example, by acid washing with a mixed acid of nitric acid and hydrofluoric acid, and then SEM measurement can be performed. As shown in Figures 10 to 13, when performing the first areal density measurement, the first electrode region of the N-type doped semiconductor layer 105 can be the surface morphology formed after cleaning and removal of metal crystals and glass frit.

[0156] According to the embodiments of this application, the material selection and arrangement of the silicon substrate 101, N-type and / or P-type doped semiconductor layers are the same as described above, and will not be repeated here.

[0157] According to the embodiments of this application, as shown in Figures 10 to 13, the distribution morphology of the second contact hole 1044 on the P region and the first contact hole 1043 on the N region are shown respectively. It can be seen that the extension direction of the first electrode region and the second electrode region is consistent with the electrode extension direction, and their sizes are matched with the N region electrode and the P region electrode respectively. The first contact hole and the second contact hole show a trend of gradually increasing distribution density from the two sides of the electrode region to the middle region along the electrode width direction intersecting with the electrode extension direction.

[0158] To more accurately control the distribution density of contact holes in the N-region and P-region, along the direction parallel to the electrode width, the first electrode region and the second electrode region may each include a main body portion and peripheral portions adjacent to both sides of the main body portion, and the width of the peripheral portions is equal to 5% to 25% of the width of the first electrode region or the second electrode region, for example, it can be 5%, 10%, 15%, 20%, 25%, etc., preferably 10%-25%; wherein, the distribution density of the second contact holes on the main body portion of the second electrode region is greater than the distribution density of the first contact holes on the main body portion of the first electrode region.

[0159] To more clearly illustrate the relative positions of the main body and the outer perimeter, as shown in Figure 4, the main body is region A enclosed by the dashed line, and the outer perimeter is region B located on both sides of region A. Along the direction parallel to the electrode width L1, the width of the outer perimeter is L2, so L2 / L1 = 5%~25%.

[0160] According to embodiments of this application, the first areal density and the second areal density can be 45% to 85%, preferably 50% to 80%. Specifically, the first areal density and the second areal density can be 45%, 50%, 55%, 60%, 64%, 65%, 70%, 75%, or 80%, respectively. Controlling the areal density within the above-mentioned suitable range is beneficial for achieving a balance between contact and passivation effects.

[0161] According to embodiments of this application, more preferably, the first surface density can be 50% to 64%. Specifically, exemplarily, the second surface density can be 50%, 52%, 55%, 57%, 60%, 62%, or 64%. More preferably, the second surface density can be 65% to 80%, specifically 65%, 67%, 69%, 70%, 72%, 75%, 78%, or 80%.

[0162] According to an embodiment of this application, more preferably, the difference between the first surface density and the second surface density can range from 15% to 30%. Specifically, the difference between the first surface density and the second surface density can range from 15%, 17%, 20%, 22%, 25%, 27%, or 30%.

[0163] According to embodiments of this application, since it is more difficult to fabricate a doped semiconductor layer with a higher doping concentration in the P-region compared to the N-region, the density of the second surface on the P-region is adjusted to be greater than that of the first surface on the N-region. Within the range of design differences, the P-region structure has electrode contact etch pits with a larger area, which compensates for the high contact resistance caused by the low doping concentration in the P-region by increasing the contact area; within the range of design differences, the N-region structure has electrode contact etch pits with a certain area to ensure contact and reduce recombination; within the range of design differences, it can also avoid the incompatibility of electrode sintering processes and the narrowing of the process window due to excessive differences in contact area.

[0164] According to embodiments of this application, at least a portion of the first contact hole and / or at least a portion of the second contact hole are blind holes. By providing blind holes, on the one hand, it is beneficial to increase the contact area, thereby improving current transport characteristics; on the other hand, it can avoid an excessive proportion of through holes within the contact hole, which would compromise the passivation effect of the doped semiconductor layer, thus achieving a balance between current transport characteristics and passivation effect.

[0165] According to embodiments of this application, optionally, the number of blind holes located in the first electrode region accounts for 50% to 90% of the total number of first contact holes, preferably 60% to 80%. Specifically, exemplarily, the number of blind holes located in the first electrode region may account for 50%, 55%, 60%, 65%, 70%, 75%, 80%, 85%, or 90% of the total number of first contact holes.

[0166] According to embodiments of this application, optionally, the number of blind holes located in the second electrode region accounts for 50% to 90% of the total number of second contact holes, preferably 60% to 80%. Specifically, the number of blind holes located in the second electrode region can account for 50%, 55%, 60%, 65%, 70%, 75%, 80%, 85%, or 90% of the total number of second contact holes.

[0167] According to embodiments of this application, the depth of the first contact hole along the direction perpendicular to the surface of the semiconductor substrate is 1–200 nm, preferably 100–200 nm. The depth of the first contact hole along the direction perpendicular to the surface of the semiconductor substrate can be 1 nm, 2 nm, 5 nm, 10 nm, 20 nm, 50 nm, 100 nm, 120 nm, 150 nm, 180 nm, or 200 nm.

[0168] The depth of the second contact hole along the direction perpendicular to the surface of the semiconductor substrate is 2 to 300 nm, preferably 100 to 300 nm. Specifically, the depth of the second contact hole along the direction perpendicular to the surface of the semiconductor substrate can be 2 nm, 5 nm, 10 nm, 20 nm, 50 nm, 100 nm, 120 nm, 150 nm, 180 nm, 200 nm, 220 nm, 250 nm, 280 nm or 300 nm.

[0169] By setting the depths of the first and second contact holes within the aforementioned range, direct burn-through caused by excessive corrosion depth of the P-region and N-region electrodes can be effectively avoided, thus preventing excessive recombination. Simultaneously, poor contact due to insufficient corrosion depth can be avoided, preventing an increase in contact resistance. Furthermore, setting the depth of the first contact hole to be less than that of the second contact hole can compensate for the higher contact resistance of the P-region compared to the N-region by increasing the contact depth between the P-region doped semiconductor layer and the P-region electrode, thereby achieving a balance between the current transport and collection performance of the N-region and P-region.

[0170] According to an embodiment of this application, the depth of the first contact hole is less than the depth of the second contact hole. Further optionally, the difference between the depths of the first and second contact holes ranges from 1 to 50 nm, preferably from 10 to 40 nm. Specifically, the difference between the depths of the first and second contact holes can be 1 nm, 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, or 50 nm.

[0171] Wherein, the depth of the first contact hole is less than the depth of the second contact hole. This can be because the average depth of the first contact holes located in the first electrode region is less than the average depth of the second contact holes located in the second electrode region, or because a certain percentage (for example, more than 50%, preferably more than 70%, more preferably more than 90%) of the first contact holes located in the first electrode region have a depth less than the minimum depth of the second contact holes located in the second electrode region.

[0172] Within the range of the aforementioned differences in contact hole depth design, the P-region structure has deeper corrosion pits, which compensates for the high contact resistance caused by the low doping concentration in the P-region by increasing the contact depth; within the range of the differences in design, the N-region structure has electrode corrosion pits of a certain depth, which ensures the contact performance of the N-region.

[0173] According to an embodiment of this application, as shown in FIG1, the solar cell of this application may further include an N-region electrode 109 and a P-region electrode 108, wherein: the N-region electrode 109 is located on the surface of the N-type doped semiconductor layer 105 away from the silicon substrate 101; and the P-region electrode 108 is located on the surface of the P-type doped semiconductor layer 104 away from the silicon substrate 101.

[0174] According to embodiments of this application, a first contact hole and a second contact hole having the aforementioned areal density distribution can be achieved by selecting a suitable electrode paste and performing electrode sintering. Specifically, the electrode paste mainly consists of metal powder, glass powder, and organic carriers, etc. The glass powder ensures reliable connection between the electrode and the doped semiconductor layer during electrode sintering and promotes diffusion and migration between the metal and silicon components. The N-region and P-region electrodes fabricated based on the electrode paste are then sintered to form a glass material.

[0175] Therefore, the P-region electrode 108 and the N-region electrode 109 each comprise glass frit, and the glass frit content of the P-region electrode 108 is greater than that of the N-region electrode 109. This arrangement results in a difference in the corrosion ability of the glass frit on the P-region and N-region electrodes, which is more conducive to forming contact holes with a higher surface density in the second electrode region compared to the first electrode region. According to an embodiment of this application, as shown in FIG1, the above-mentioned solar cell may further include a first passivation antireflection layer 106 and a second passivation antireflection layer 107, wherein: the first passivation antireflection layer 106 is located between the P-type doped semiconductor layer 104 and the P-region electrode 108, and the second passivation antireflection layer 107 is located between the N-type doped semiconductor layer 105 and the N-region electrode 109; wherein the refractive index of the first passivation antireflection layer 106 located on the P-region is less than the refractive index of the second passivation antireflection layer 107 located on the N-region.

[0176] According to embodiments of this application, the first passivation antireflection layer 106 and the second passivation antireflection layer 107 achieve surface passivation. They can be formed in the same process step or in different process steps, both achieving the aforementioned refractive index distribution. Since factors influencing refractive index include the density, thickness, and composition of the passivation antireflection layer, and generally, higher density results in a higher refractive index, the refractive index distribution of the passivation antireflection layer indicates that the first passivation antireflection layer located in the P region has a slightly lower density than the second passivation antireflection layer located in the N region. This facilitates the formation of contact holes in the P region with higher areal density and greater depth compared to the N region, thereby achieving contact balance between the P and N regions.

[0177] According to an embodiment of this application, the difference between the refractive index of the first passivation antireflection layer 106 and the refractive index of the second passivation antireflection layer 107 ranges from 0.02 to 0.4. Specifically, the difference between the refractive index of the first passivation antireflection layer 106 and the refractive index of the second passivation antireflection layer 107 can be 0.02, 0.05, 0.1, 0.12, 0.15, 0.18, 0.2, 0.22, 0.25, 0.28, 0.30, 0.32, 0.35, 0.38, or 0.4.

[0178] Further optionally, the refractive index of the first passivation antireflection layer 106 can be 1.95 to 2.05, for example, 1.95, 1.98, 2.01, 2.03, 2.05, etc. The refractive index of the second passivation antireflection layer 107 can be 2.05 to 2.35, for example, 2.05, 2.10, 2.15, 2.20, 2.22, 2.25, 2.28, 2.30, 2.33, 2.35, etc.

[0179] By controlling the refractive indices of the first passivation antireflection layer 106 and the second passivation antireflection layer 107 within the above-mentioned range, it is possible to avoid their density being too low, which would cause the electrode to be over-sintered and destroy the passivation effect, or to avoid their density being too high, which would be detrimental to good contact between the electrode and the doped semiconductor layer.

[0180] According to embodiments of this application, the material of the first or second passivation antireflection layer may be, for example, a single-layer film formed of silicon dioxide, aluminum dioxide, silicon nitride, or silicon oxynitride, or a multilayer film that may be a combination of one or more of the aforementioned materials.

[0181] According to an embodiment of this application, further (not shown in FIG1), taking a TBC cell as an example, the solar cell of this application embodiment may further include a third passivation antireflection layer located on the second surface 101b of the silicon substrate. Further optionally, the third passivation antireflection layer may be made of a material similar to the first or second passivation antireflection layer, for example, it may be a single-layer film formed of silicon dioxide, aluminum dioxide, silicon nitride, or silicon oxynitride, or a multilayer film composed of one or more of the aforementioned materials.

[0182] For example, the first, second, or third passivation antireflection layer is a stacked structure of aluminum dioxide and silicon nitride disposed on the side of the aluminum dioxide facing away from the silicon substrate, or the first, second, or third passivation antireflection layer is a stacked structure of aluminum dioxide and silicon nitride and silicon oxynitride disposed on the side of the aluminum dioxide layer facing away from the silicon substrate. In this case, the refractive index is the refractive index obtained by measuring the entire passivation antireflection layer. In this case, the passivation antireflection layer can simultaneously provide protection and passivation for the underlying silicon substrate or functional layer, such as the P-type doped semiconductor layer 104 or the N-type doped semiconductor layer 105, as well as antireflection for light incident on the first surface 101a or the second surface 101b.

[0183] According to other embodiments of this application, the solar cell of this application is not limited to the TBC cell described above, but may also be other back contact (BC) cells or bifacial cells.

[0184] Exemplarily, the solar cell of this application can also be an HPBC (Hybrid Passivated Back Contact) cell. For example, the tunneling passivation contact structure located on the P-region in the above-mentioned TBC cell can be entirely replaced with an emitter structure. Exemplarily, by performing inward doping on the P-region 1011 using a boron diffusion process, or by using an aluminum-containing electrode to perform P-type doping on the silicon substrate of the P-region 1011, an emitter is obtained on the P-region 1011 as the above-mentioned P-type doped semiconductor layer 104. The distribution structure of the second contact hole in the emitter is the same as described above, and will not be repeated here.

[0185] Exemplarily, the solar cell of this application can also be a bifacial cell, such as a TOPCon cell. The main difference from the TBC cell described above is that the N-region and P-region are located on different surfaces of the silicon substrate 101, for example, the N-region is located on the first surface 101a and the P-region is located on the second surface 101b. Furthermore, the tunneling passivation structure on the P-region is entirely replaced by an emitter structure. Exemplarily, by performing inward doping on the P-region using a boron diffusion process, an emitter is obtained on the second surface 101b of the silicon substrate 101, serving as the aforementioned P-type doped semiconductor layer 104. The distribution structure of the second contact holes within the emitter is the same as described above and will not be repeated here.

[0186] At this time, the N-type doped semiconductor layer 105 is located in at least a portion of the first surface 101a, for example, it can completely cover the first surface 101a or be disposed in a metallized region of the first surface 101a; the P-type doped semiconductor layer 104 is located in at least a portion of the second surface 101b, for example, it can completely cover the second surface 101b or be disposed in a metallized region of the second surface 101b. Here, "metallized region" refers to a region that can be used to form an electrode and achieve metallization, including regions where the electrode position can be reasonably adjusted.

[0187] For example, the solar cell of this application can also be a bifacial cell, such as a polyfinger (polycrystalline silicon comb-fin structure)-TOPCon cell. For ease of understanding, as shown in Figure 9, the main difference from the TOPCon cell is that the P-type doped semiconductor layer 104 covers the entire second surface 101b, and the N-type doped semiconductor layer 105 is disposed in the metallized region of the first surface 101a. This reduces recombination and parasitic absorption on the first surface 101a while maintaining passivation. The distribution structure of the contact holes within the N-type and P-type doped semiconductor layers is the same as described above and will not be repeated here.

[0188] According to another embodiment of this application, a photovoltaic module is provided, which includes a plurality of any of the aforementioned solar cells. The photovoltaic module may also include encapsulant films located on both sides of the solar cells, etc., without specific limitation. This photovoltaic module has the same or similar beneficial effects as any of the aforementioned solar cells, and related aspects can be referred to each other. To avoid repetition, further details are omitted here.

[0189] In one or more of the above embodiments, an embodiment may exist alone or in combination with other embodiments. The descriptions of each embodiment above each have their own emphasis; for parts not described in detail in a particular embodiment, please refer to the relevant descriptions of other embodiments. The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as the combination of these technical features does not contradict each other, it should be considered within the scope of this specification.

[0190] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of this application. It should be understood that the above descriptions are merely specific embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A solar cell, comprising: A silicon substrate, including a surface having N-regions and P-regions; An N-type doped semiconductor layer is located on the N-region of the silicon substrate; A P-type doped semiconductor layer is located on the P-region of the silicon substrate; The N-region electrode is located on the surface of the N-type doped semiconductor layer away from the silicon substrate; The P-region electrode is located on the surface of the P-type doped semiconductor layer away from the silicon substrate; Metal crystals are respectively located in the N-type doped semiconductor layer under the N-region electrode and in the P-type doped semiconductor layer under the P-region electrode; The distribution density of the metal crystals located under the N-region electrode is less than that of the metal crystals located under the P-region electrode.

2. The solar cell according to claim 1, wherein, Along the direction parallel to the electrode width, the N-region electrode and the P-region electrode each include a main body portion and peripheral portions adjacent to both sides of the main body portion, and the width of the peripheral portions is equal to 5% to 25% of the width of the N-region electrode or the P-region electrode. The distribution density of metal crystals under the main body portion of the P-region electrode is greater than that under the main body portion of the N-region electrode.

3. The solar cell according to claim 1 or 2, wherein, The metal crystal includes a first metal crystal along a direction perpendicular to the electrode width. One end of the first metal crystal is connected to the N-region electrode or the P-region electrode, and the other end of the first metal crystal abuts against the side of the doped semiconductor layer near the silicon substrate. The length of the first metal crystal located under the P-region electrode is equal to or greater than the length of the first metal crystal located under the N-region electrode.

4. The solar cell according to claim 1 or 2, wherein, The metal crystal includes a second metal crystal along a direction perpendicular to the electrode width. One end of the second metal crystal is connected to the N-region electrode or the P-region electrode, and the other end does not abut against the side of the doped semiconductor layer near the silicon substrate. The length of the second metal crystal located under the P-region electrode is equal to or greater than the length of the second metal crystal located under the N-region electrode.

5. The solar cell according to claim 4, wherein, The length of the second metal crystal located under the P-region electrode is 60–200 nm, and the length of the second metal crystal located under the N-region electrode is 40–150 nm.

6. The solar cell according to claim 4, wherein, The number of the second metal crystals located under the P-region electrode accounts for 50% to 90% of the total number of metal crystals located under the P-region electrode; and / or, The number of the second metal crystals located under the N-region electrode accounts for 50% to 90% of the total number of metal crystals located under the N-region electrode.

7. The solar cell according to claim 4, wherein, Along a direction parallel to the surface of the silicon substrate, the width of the second metal crystal located under the P-region electrode is greater than the width of the second metal crystal located under the N-region electrode.

8. The solar cell according to claim 1, wherein, The ratio of the contact resistance between the P-region electrode and the P-type doped semiconductor layer to the contact resistance between the N-region electrode and the N-type doped semiconductor layer is 1.25 to 3.

9. The solar cell according to claim 8, wherein: The contact resistance between the P-region electrode and the P-type doped semiconductor layer is 2.5–4 Ω / cm; The contact resistance between the N-region electrode and the N-type doped semiconductor layer is 0.5–2 Ω / cm.

10. The solar cell according to claim 1, further comprising: The first passivation antireflection layer is located between the P-type doped semiconductor layer and the P-region electrode, and The second passivation anti-reflection layer is located between the N-type doped semiconductor layer and the N-region electrode; The refractive index of the first passivation antireflection layer located in the P region is less than the refractive index of the second passivation antireflection layer located in the N region.

11. The solar cell according to claim 10, wherein, The difference between the refractive index of the first passivation antireflection layer and the refractive index of the second passivation antireflection layer ranges from 0.02 to 0.

4.

12. The solar cell according to claim 1, wherein, The ratio of the doping concentration of the N-type doped semiconductor layer to the doping concentration of the P-type doped semiconductor layer ranges from 1 to 1E5.

13. A solar cell, comprising: A silicon substrate, including a surface having N-regions and P-regions; An N-type doped semiconductor layer is located on the N-region of the silicon substrate; A P-type doped semiconductor layer is located on the P-region of the silicon substrate; The N-region electrode is located on the surface of the N-type doped semiconductor layer away from the silicon substrate; The P-region electrode is located on the surface of the P-type doped semiconductor layer away from the silicon substrate; Both the P-region electrode and the N-region electrode contain metal elements; the content of metal elements in the region corresponding to the P-region electrode in the P-type doped semiconductor layer is greater than the content of metal elements in the region corresponding to the N-region electrode in the N-type doped semiconductor layer.

14. The solar cell according to claim 13, wherein, The metal element content in the P-region electrode is greater than that in the N-region electrode.

15. The solar cell according to claim 13, wherein, The content of metal elements at the contact position between the P-region electrode and the P-type doped semiconductor layer is a first proportion relative to the content of metal elements in the P-region electrode; the content of metal elements at the contact position between the N-region electrode and the N-type doped semiconductor layer is a second proportion relative to the content of metal elements in the N-region electrode. Wherein, the first ratio is less than the second ratio.

16. The solar cell according to claim 15, wherein, The first ratio is between 1:2.1 and 1:3.9; The second ratio is 1:1.5 to 1:2.

1.

17. The solar cell according to claim 13, wherein, The diffusion depth of the metal element in the P-region electrode in the P-type doped semiconductor layer is greater than the diffusion depth of the metal element in the N-region electrode in the N-type doped semiconductor layer.

18. The solar cell according to claim 13, wherein, The ratio of the diffusion depth of the metal element of the P-region electrode in the P-type doped semiconductor layer to the diffusion depth of the metal element of the N-region electrode in the N-type doped semiconductor layer is greater than 1 and less than or equal to 8.

19. The solar cell according to claim 13, wherein, The diffusion depth of the metal element in the P-region electrode in the P-type doped semiconductor layer is 100 nm to 450 nm. The diffusion depth of the metal element in the N-region electrode in the N-type doped semiconductor layer is 50 nm to 300 nm.

20. The solar cell according to claim 13, wherein, Also includes: The P-type inner expansion layer is located inside the silicon substrate near the P-type doped semiconductor layer and corresponds to the P region; the ratio of the doping concentration of the P-type doped semiconductor layer to the doping concentration of the P-type inner expansion layer is 2 to 5E11. The N-type inner expansion layer is located inside the silicon substrate near the N-type doped semiconductor layer and corresponds to the N region; the ratio of the doping concentration of the N-type doped semiconductor layer to the doping concentration of the N-type inner expansion layer is 2 to 6E11.

21. A solar cell, comprising: A silicon substrate, including a surface having N-regions and P-regions; An N-type doped semiconductor layer is located on the N-region of the silicon substrate. The N-type doped semiconductor layer includes a first electrode region, and the surface of the first electrode region away from the silicon substrate has a plurality of first contact holes. A P-type doped semiconductor layer is located on the P-region of the silicon substrate. The P-type doped semiconductor layer includes a second electrode region, and the surface of the second electrode region away from the silicon substrate has a plurality of second contact holes. Wherein, the first surface density of the first contact hole on the first electrode region is less than the second surface density of the second contact hole on the second electrode region, and the first contact hole and the second contact hole are respectively suitable for accommodating metal crystals.

22. The solar cell according to claim 21, wherein, The first areal density and the second areal density are 45% to 85%.

23. The solar cell according to claim 21, wherein, The first areal density is 50% to 64%; and / or, the second areal density is 65% to 80%.

24. The solar cell according to any one of claims 21 to 23, wherein, The difference between the first areal density and the second areal density ranges from 15% to 30%.

25. The solar cell according to claim 21, wherein, At least a portion of the first contact hole and / or at least a portion of the second contact hole are blind holes.

26. The solar cell according to claim 21, wherein, Along the direction perpendicular to the surface of the semiconductor substrate, the depth of the first contact hole is 1–200 nm, and the depth of the second contact hole is 2–300 nm.

27. A photovoltaic module, wherein, include: Multiple battery strings, the battery strings comprising solar cells as described in any one of claims 1 to 26.

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