Multilayer board and electronic device

Abstract

Provided is a multilayer board capable of reducing an impedance mismatch in a multilayer board in which parts of a plurality of signal lines overlap in a plan view. A multilayer board (100) includes, in a plan view from a thickness direction of a laminated board (1), a first region (AR2) in which a first signal line (21) and a second signal line (22) overlap, and a second region (AR1, AR3) in which the first signal line (21) and the second signal line (22) do not overlap. The present invention includes a first insulating layer (12) in which a thickness change portion (through hole 121) is formed in the first region (AR2) or the second region (AR1, AR3). In the first region (AR2), a ground electrode (37) is positioned between the first signal line (21) and the second signal line (22). At least one of the first signal line (21) and the second signal line (22) bends toward the thickness change portion (through hole 121) of the first insulating layer (12) in the thickness direction of the laminated board (1), whereby a position in the thickness direction of the laminated board (1) differs between the first region (AR2) and the second region (AR1, AR3).

Description

Multilayer Substrate and Electronic Device

[0001] The present invention generally relates to a multilayer substrate and an electronic device, and more particularly to a multilayer substrate including a plurality of signal lines and an electronic device including the multilayer substrate.

[0002] Patent Document 1 discloses a multilayer circuit board (multilayer substrate). The multilayer circuit board disclosed in Patent Document 1 includes a first transmission line (first signal line) and a second transmission line (second signal line). The second transmission line is connected to a bypass line and a via conductor, and intersects the first transmission line through the bypass line.

[0003] Japanese Patent Application Laid-Open No. 2014-116574

[0004] However, in the multilayer circuit board of Patent Document 1, impedance mismatches may occur at each of the connection points between the second transmission line and the via conductor and the connection points between the via conductor and the bypass line.

[0005] An object of the present invention is to provide a multilayer substrate in which a part of a plurality of signal lines overlap in a plan view and can reduce impedance mismatches, and an electronic device including the multilayer substrate.

[0006] A multilayer substrate according to one aspect of the present invention comprises a laminated substrate, a first signal line, a second signal line, and a ground electrode. The laminated substrate has a plurality of insulating layers laminated on it. The first signal line is arranged within the laminated substrate. The second signal line is arranged within the laminated substrate. The ground electrode is arranged within the laminated substrate. The multilayer substrate includes a first region and a second region. The first region includes a portion where the first signal line and the second signal line overlap in a plan view from the thickness direction of the laminated substrate. The second region does not include a portion where the first signal line and the second signal line overlap in a plan view from the thickness direction of the laminated substrate. The plurality of insulating layers include a first insulating layer in which a thickness variation portion is formed in the first region or the second region. The thickness variation portion is a portion where the thickness of the first insulating layer is thinner than the thickness of the laminated substrate in the portion of the first insulating layer other than the thickness variation portion, or a through hole penetrating in the thickness direction of the laminated substrate. In the first region, the ground electrode is located between the first signal line and the second signal line. At least one of the first signal line and the second signal line is curved toward the thickness change portion of the first insulating layer in the thickness direction of the laminated substrate, so that the positions in the thickness direction of the laminated substrate are different in the first region and the second region.

[0007] An electronic device according to one aspect of the present invention comprises a multilayer substrate and electronic components arranged on the multilayer substrate.

[0008] According to one aspect of the present invention, a multilayer substrate and electronic device make it possible to reduce impedance mismatch in a multilayer substrate where multiple signal lines overlap in a plan view.

[0009] Figure 1 is a schematic diagram of the main part of a multilayer substrate according to Embodiment 1. Figure 2 is a cross-sectional view of the same multilayer substrate taken along line II-II in Figure 1. Figure 3 is a cross-sectional view of the same multilayer substrate taken along line III-III in Figure 1. Figure 4 is a cross-sectional view of the same multilayer substrate taken along line IV-IV in Figure 1. Figure 5 is a cross-sectional view of the same multilayer substrate taken along line V-V in Figure 1. Figure 6 is a schematic diagram showing each layer in the manufacturing process of the same multilayer substrate. Figure 7 is an exploded view showing each layer in the manufacturing process of the same multilayer substrate. Figure 8 is an exploded view of a different main part of the same multilayer substrate than that shown in Figure 7. Figure 9 is a cross-sectional view of the same multilayer substrate in the manufacturing process. Figure 10 is a cross-sectional view of the same multilayer substrate in the manufacturing process, showing a different cross-section than that shown in Figure 9. Figure 11 is a schematic diagram of the main part of a multilayer substrate according to Embodiment 2. Figure 12 is a cross-sectional view of the main part of an electronic device according to Embodiment 3. Figure 13 is a cross-sectional view of the main part of an electronic device according to a modified example of Embodiment 3. Figure 14 is a cross-sectional view of a multilayer substrate according to Embodiment 4 during the manufacturing process. Figure 15 is a cross-sectional view of a multilayer substrate according to Embodiment 5 during the manufacturing process. Figure 16 is a cross-sectional view of the same multilayer substrate during the manufacturing process. Figure 17 is a cross-sectional view of a multilayer substrate according to Embodiment 6, corresponding to Figure 2. Figure 18 is a cross-sectional view of the same multilayer substrate, corresponding to Figure 3. Figure 19 is a cross-sectional view of the same multilayer substrate, corresponding to Figure 5. Figure 20 is a cross-sectional view of a multilayer substrate according to Embodiment 7. Figure 21 is an exploded view of the same multilayer substrate.

[0010] Embodiments 1 to 7 will be described below with reference to the drawings. The drawings referenced in Embodiments 1 to 7 below are schematic diagrams, and the size and thickness of the components shown in the drawings do not necessarily reflect the actual dimensions, nor do the ratios of size and thickness between components necessarily reflect the actual dimensional ratios. Furthermore, each drawing defines and represents a Cartesian coordinate system with three mutually orthogonal axes: the X, Y, and Z axes. The X, Y, and Z axes are all virtual axes, and the arrows indicating "X," "Y," and "Z" in the drawings are merely for illustrative purposes and do not represent actual objects.

[0011] (Embodiment 1) The multilayer substrate 100 according to Embodiment 1 will be described with reference to Figures 1 to 10.

[0012] (1) Multilayer substrate Embodiment 1 The multilayer substrate 100 according to Embodiment 1 comprises a laminated substrate 1, a first signal line 21, a second signal line 22, and a third ground electrode 37, as shown in Figures 1 to 5. The third ground electrode 37 corresponds to the ground electrode of this disclosure. The multilayer substrate 100 further comprises a first ground electrode 31, a second ground electrode 32, a plurality of fourth ground electrodes 34, a plurality of fifth ground electrodes 35, a plurality of sixth ground electrodes 33, and a plurality of seventh ground electrodes 36, as shown in Figures 1 to 10. The multilayer substrate 100 further comprises a plurality of first connecting conductors 61, a plurality of second connecting conductors 62, a plurality of third connecting conductors 63, a plurality of fourth connecting conductors 64, a plurality of fifth connecting conductors 65, and a plurality of sixth connecting conductors 66, as shown in Figures 1 to 10.

[0013] As shown in Figure 1, in a plan view from the thickness direction of the laminated substrate 1, the multilayer substrate 100 includes a first region AR2 and a second region (two second regions AR1 and AR3 in this embodiment). The first region AR2 includes the portion where the first signal line 21 and the second signal line 22 overlap in a plan view from the thickness direction of the laminated substrate 1. Each of the second regions AR1 and AR3 does not include the portion where the first signal line 21 and the second signal line 22 overlap in a plan view from the thickness direction of the laminated substrate 1. In this embodiment, in a plan view from the thickness direction of the laminated substrate 1, the first signal line 21 and the second signal line 22 intersect in the first region AR2. Also, in this embodiment, in the second regions AR1 and AR3, the first signal line 21 and the second signal line 22 are separated in the X-axis direction, as shown in Figure 2. On the other hand, in the first region AR2, as shown in Figures 3 to 5, the first signal line 21 and the second signal line 22 are separated in the thickness direction (Z-axis direction) of the laminated substrate 1. In the first region AR2, the third ground electrode 37 is located between the first signal line 21 and the second signal line 22.

[0014] Hereinafter, each component of the multilayer substrate 100 according to this embodiment will be described with reference to the drawings.

[0015] (1.1) Laminated substrate In this embodiment, the laminated substrate 1 has an elongated shape with the width direction along the X-axis direction. The laminated substrate 1 may have a shape other than elongated.

[0016] As shown in Figures 6 to 8, the laminated substrate 1 has a plurality of insulating layers 11 to 17, which are stacked together. The thickness direction of the laminated substrate 1 is the stacking direction of the plurality of insulating layers 11, 12, 13, 14, 15, 16, and 17. As shown in Figures 2 to 5, the laminated substrate 1 has a first main surface 101 and a second main surface 102. The laminated substrate 1 has input and output electrodes connected to the first signal line 21 and the second signal line, respectively, on at least one of the first main surface 101 and the second main surface 102 of the laminated substrate 1, but this will not be explained in this embodiment. In addition, the laminated substrate 1 has a first region AR2 and two second regions AR1 and AR3 with the same thickness cut out, and the thickness of the laminated substrate 1 is less than the sum of the thicknesses of each of the plurality of insulating layers 11 to 17.

[0017] Each of the multiple insulating layers 11 to 17 is made of a material such as a thermoplastic resin. The thermoplastic resin is, for example, a liquid crystal polymer. The thermoplastic resin is not limited to a liquid crystal polymer, but may also be, for example, PTFE (polytetrafluoroethylene).

[0018] The thickness of each of the multiple insulating layers 11 to 17 is, for example, 10 μm or more and 120 μm or less. Of the multiple insulating layers 11 to 17, it is preferable that insulating layers 12 to 16 have equal thickness to each other. Here, "equal thickness to each other" includes not only cases where the thickness of each insulating layer 12 to 16 is exactly the same, but also cases where the difference in thickness between two insulating layers contained in each of the insulating layers 12 to 16 is 10% or less of the thickness of each insulating layer 12 to 16.

[0019] The insulating layer 11 (not shown in Figures 2 to 5) has a first main surface 114 and a second main surface 115, as shown in Figure 6. The first main surface 114 of the insulating layer 11 is in contact with the insulating layer 12. The first ground electrode 31 is positioned on the first main surface 114 of the insulating layer 11. As mentioned above, the first ground electrode 31 is positioned on the first main surface 114 of the insulating layer 11, but in Figures 6 and 7, the outer edge of the first ground electrode 31 is shown by a solid line.

[0020] As shown in Figure 6, the insulating layer 12 has a first main surface 124 and a second main surface 125. The second main surface 125 of the insulating layer 12 is in contact with the insulating layer 11. The first main surface 124 of the insulating layer 12 is in contact with the insulating layer 13. The insulating layer 12 has a through hole 121 that penetrates in the thickness direction of the laminated substrate 1. The through hole 121 is located in the first region AR2 (see Figure 1). The through hole 121 corresponds to the thickness change portion of this disclosure. The insulating layer 12 corresponds to the first insulating layer having the through hole 121 (thickness change portion). The sixth ground electrode 33 is located on the first main surface 124 of the insulating layer 12. As described above, the sixth ground electrode 33 is located on the first main surface 124 of the insulating layer 12, but in Figures 6 and 7, the outer edge of the sixth ground electrode 33 is shown by a solid line. Furthermore, in a plan view from the thickness direction of the laminated substrate 1, the entire area of ​​the through-hole 121 overlaps with the insulating layer 11. Therefore, the through-hole 121 is spaced apart from the first main surface 101 of the laminated substrate 1.

[0021] As shown in Figure 6, the insulating layer 13 has a first main surface 134 and a second main surface 135. The second main surface 135 of the insulating layer 13 is in contact with the insulating layer 12. The first main surface 134 of the insulating layer 13 is in contact with the insulating layer 14. As shown in Figures 6 and 7, the insulating layer 13 has two through holes 131 that penetrate in the thickness direction of the laminated substrate 1. The two through holes 131 are provided in each of the second regions AR1 and AR3 (see Figure 1) in portions that overlap with the first signal line 21 and a plurality of fourth ground electrodes 34 in a plan view from the thickness direction of the laminated substrate 1. The second signal line 22 and two fifth ground electrodes 35 are arranged on the first main surface 134 of the insulating layer 13. As mentioned above, the second signal line 22 and the two fifth ground electrodes 35 are located on the first main surface 134 of the insulating layer 13. In Figures 6 and 7, the outer edges of the second signal line 22 and the two fifth ground electrodes 35 are shown with solid lines. In a plan view from the thickness direction of the laminated substrate 1, the entire area of ​​the two through holes 131 overlaps with the insulating layer 11. Therefore, both through holes 131 are spaced apart from the first main surface 101 of the laminated substrate 1.

[0022] As shown in Figure 6, the insulating layer 14 has a first main surface 144 and a second main surface 145. The second main surface 145 of the insulating layer 14 is in contact with the insulating layer 13. The first main surface 144 of the insulating layer 14 is in contact with the insulating layer 15. As shown in Figures 6 and 7, the insulating layer 14 has two through holes 141 that penetrate in the thickness direction of the laminated substrate 1. The two through holes 141 are provided in the second region AR1 and the second region AR3 (see Figure 1), respectively. Here, the width of the second insulating layer 14 on which the third ground electrode 37 is placed is equal to the width of the laminated substrate 1 in the X direction, which is perpendicular to the Y direction in which the first region AR2 and the second regions AR1 and AR3 are aligned. As a result, the two through holes 141 of the insulating layer 14 are not aligned in the X direction, making it easy to align the insulating layer 14 regardless of its size. The third ground electrode 37 is positioned on the first main surface 144 of the insulating layer 14. As mentioned above, the third ground electrode 37 is positioned on the first main surface 144 of the insulating layer 14, but in Figures 6 and 7, the outer edge of the third ground electrode 37 is shown by a solid line. In a plan view from the thickness direction of the laminated substrate 1, the entire area of ​​the two through holes 141 overlaps with the insulating layer 11. Therefore, both of the two through holes 141 are spaced apart from the first main surface 101.

[0023] As shown in Figure 6, the insulating layer 15 has a first main surface 154 and a second main surface 155. The second main surface 155 of the insulating layer 15 is in contact with the insulating layer 14. The first main surface 154 of the insulating layer 15 is in contact with the insulating layer 16. As shown in Figures 6 and 8, the insulating layer 15 has two through holes 151 that penetrate in the thickness direction of the laminated substrate 1. The two through holes 151 are provided in the portions that overlap with the second signal line 22 (see Figure 7) and the plurality of fifth ground electrodes 35 in a plan view from the thickness direction of the laminated substrate 1 in each of the second regions AR1 (see Figure 1) and AR3 (see Figure 1). The first signal line 21 and the fourth ground electrode 34 are arranged on the first main surface 154 of the insulating layer 15. As mentioned above, the first signal line 21 and the fourth ground electrode 34 are located on the first main surface 154 of the insulating layer 15, and in Figures 6 and 8, the outer edges of the first signal line 21 and the fourth ground electrode 34 are shown with solid lines. In a plan view from the thickness direction of the laminated substrate 1, the entire area of ​​the two through holes 151 overlaps with the insulating layer 11. Therefore, both of the two through holes 151 are spaced apart from both the first main surface 101 and the second main surface 102 of the laminated substrate 1.

[0024] As shown in Figure 6, the insulating layer 16 has a first main surface 164 and a second main surface 165. The second main surface 165 of the insulating layer 16 is in contact with the insulating layer 15. The first main surface 164 of the insulating layer 16 is in contact with the insulating layer 17. As shown in Figures 6 and 8, the insulating layer 16 has through holes 161 that penetrate in the thickness direction of the laminated substrate 1. The through holes 161 are located in the first region AR2 (see Figure 1). The seventh ground electrode 36 is located on the first main surface 164 of the insulating layer 16. As mentioned above, the seventh ground electrode 36 is located on the first main surface 164 of the insulating layer 16, but in Figures 6 and 8, the outer edge of the seventh ground electrode 36 is shown by a solid line. In a plan view from the thickness direction of the laminated substrate 1, the entire area of ​​the through holes 161 overlaps with the insulating layer 11. Therefore, all the through holes 161 are spaced apart from the first main surface 101 of the laminated substrate 1.

[0025] As shown in Figure 6, the insulating layer 17 has a first main surface 174 and a second main surface 175. The second main surface 175 of the insulating layer 17 is in contact with the insulating layer 16. As shown in Figures 6 and 8, the second ground electrode 32 is positioned on the first main surface 174 of the insulating layer 17. As mentioned above, the second ground electrode 32 is positioned on the first main surface 174 of the insulating layer 17, but in Figures 6 and 8, the outer edge of the second ground electrode 32 is shown by a solid line. In a plan view from the thickness direction of the laminated substrate 1, the entire area of ​​the through hole 121, the entire area of ​​the two through holes 131, the entire area of ​​the two through holes 141, the entire area of ​​the two through holes 151, and the entire area of ​​the through hole 161 all overlap with the insulating layer 17. Therefore, the through hole 121, the two through holes 131, the two through holes 141, the two through holes 151, and the through hole 161 are all located between the first main surface 101 and the second main surface 102 of the laminated substrate 1, and are separated from the second main surface 102.

[0026] In the second region AR1 and the second region AR3, insulating layer 13 and insulating layer 15 are adjacent in the Z direction via through holes 141 in insulating layer 14. In the first region AR2, insulating layer 13 fits into through holes 121 in insulating layer 12, and insulating layer 15 fits into insulating layer 16. Therefore, if the thicknesses of insulating layer 13 and insulating layer 15 are equal, and the sum of the thicknesses of insulating layer 13 and insulating layer 14 is equal to the sum of the thicknesses of insulating layer 12 and insulating layer 16, then the thickness of the laminated substrate 1 will be equal in the second region AR1 and AR3 and in the first region AR2. Thus, it becomes possible to make the thickness of the laminated substrate 1 uniform.

[0027] Furthermore, in the second regions AR1 and AR3, insulating layers 16 and 17 exist between the first signal line 21 and the second ground electrode 32, but in the first region AR2, in a plan view from the thickness direction of the laminated substrate 1, the through-hole 161 of the insulating layer 16 overlaps with the first signal line 21. Therefore, the position of the first signal line 21 in the thickness direction of the laminated substrate 1 differs between the second regions AR1 and AR3 and the first region AR2. On the other hand, since the first signal line 21 is located on the first main surface 154 of the insulating layer 15, the change in the position of the first signal line 21 in the thickness direction of the laminated substrate 1 is formed by the deformation of the insulating layer 15. Therefore, as shown in Figure 4, the first signal line 21 does not have steps, and its position in the thickness direction of the laminated substrate 1 changes smoothly.

[0028] Similarly, in the second regions AR1 and AR3, insulating layers 12 and 13 exist between the second signal line 22 and the first ground electrode 31, but in the first region AR2, in a plan view from the thickness direction of the laminated substrate 1, the through-hole 121 of the insulating layer 12 overlaps with the second signal line 22. Therefore, the position of the second signal line 22 in the thickness direction of the laminated substrate 1 is different in the second regions AR1 and AR3 and in the first region AR2. On the other hand, since the second signal line 22 is located on the first main surface 134 of the insulating layer 13, the change in the position of the second signal line 22 in the thickness direction of the laminated substrate 1 is formed by the deformation of the insulating layer 13. Therefore, as shown in Figure 5, the second signal line 22 does not have a step, and its position in the thickness direction of the laminated substrate 1 changes smoothly.

[0029] Furthermore, in the multilayer substrate 100, the through holes 121 and 161 may have a tapered shape with a wider cross-sectional area intersecting the thickness direction of the laminated substrate 1 as they approach the third ground electrode 37. This makes it possible to increase the radius of curvature of the first signal line 21 and the second signal line 22 in the thickness direction of the laminated substrate 1 near the boundary between the second regions AR1 and AR3 and the first region AR2. Consequently, it becomes possible to reduce the impedance fluctuations of the first signal line 21 and the second signal line 22 between the second regions AR1 and AR3 and the first region AR2.

[0030] (1.2) First signal line and second signal line As shown in Figures 1 to 4, the first signal line 21 and the second signal line 22 are arranged in the laminated substrate 1. More specifically, the first signal line 21 is formed on the first main surface 154 of the insulating layer 15, as shown in Figure 8. The second signal line 22 is formed on the first main surface 134 of the insulating layer 13, as shown in Figure 7. The first signal line 21 and the second signal line 22 are signal lines on which high-frequency signals are transmitted, for example. The frequency of the high-frequency signal is, for example, 1 GHz or higher, but is not limited to 1 GHz or higher and may be less than 1 GHz. The multilayer substrate 100 of this embodiment is designed so that the impedance of each of the first signal line 21 and the second signal line 22 is 50 Ω. The first signal line 21 and the second signal line 22 are arranged between the first ground electrode 31 and the second ground electrode 32 in the thickness direction of the laminated substrate 1. In this embodiment, the strip line is configured with the laminated substrate 1, the first signal line 21, the first ground electrode 31, the second ground electrode 32, and the third ground electrode 37. In this embodiment, the strip line is configured with the laminated substrate 1, the second signal line 22, the first ground electrode 31, the second ground electrode 32, and the third ground electrode 37.

[0031] Each of the first signal line 21 and the second signal line 22 is conductive. The material of each of the first signal line 21 and the second signal line 22 includes, for example, copper. The thickness of each of the first signal line 21 and the second signal line 22 is, for example, 3 μm or more and 40 μm or less. Each of the first signal line 21 and the second signal line 22 is formed in a predetermined pattern. The first signal line 21 is formed, for example, by patterning copper foil attached to a resin layer that forms the basis of the insulating layer 15 (see Figures 6 and 8). The second signal line 22 is formed, for example, by patterning copper foil attached to a resin layer that forms the basis of the insulating layer 13 (see Figures 6 and 7). In other words, the first signal line 21 and the second signal line 22 are formed on a flat insulating layer (insulating layer 13 and insulating layer 15).

[0032] In a plan view of the laminated substrate 1 from the thickness direction, the first signal line 21 and the second signal line 22 overlap in the first region AR2. In this embodiment, in a plan view of the laminated substrate 1 from the thickness direction, the first signal line 21 and the second signal line 22 intersect in the first region AR2. Also in this embodiment, in the second regions AR1 and AR3, the first signal line 21 and the second signal line 22 are separated in the X-axis direction, as shown in Figure 2. On the other hand, in the first region AR2, as shown in Figures 3 to 5, the first signal line 21 and the second signal line 22 are separated in the thickness direction (Z-axis direction) of the laminated substrate 1 via the third ground electrode 37. In the first region AR2, the third ground electrode 37 is located between the first signal line 21 and the second signal line 22.

[0033] In a plan view from the thickness direction of the laminated substrate 1, the first signal line 21 is elongated in the direction along the Y-axis.

[0034] In this embodiment, as shown in Figure 8, the first signal line 21 includes two first portions 211 located in the second regions AR1 and AR3, and a second portion 212 located in the first region AR2. In this embodiment, the second portion 212 of the first signal line 21 is rectangular in shape. The two first portions 211 of the first signal line 21 include a portion along the Y-axis and a curved portion. In the first signal line 21, the line width of the second portion 212 is narrower than the line width of the first portion 211. Here, the line width of the first portion 211 of the first signal line 21 is, for example, the width in the X-axis direction in the portion along the Y-axis. The width of the second portion 212 of the first signal line 21 is the width along the minor axis. As shown in Figures 2 to 4, in the first region AR2, the distance between the first signal line 21 and the third ground electrode 37 is shorter than the distance between the first signal line 21 and the first ground electrode 31, and the distance between the first signal line 21 and the second ground electrode 32, in each of the second regions AR1 and AR3. Also, as shown in Figures 2 to 4, in the first region AR2, the distance between the first signal line 21 and the second ground electrode 32 is shorter than the distance between the first signal line 21 and the first ground electrode 31, and the distance between the first signal line 21 and the second ground electrode 32, in each of the second regions AR1 and AR3. In contrast, the first signal line 21 has a narrower line width in the first region AR2 than in the second regions AR1 and AR3, resulting in a small difference in impedance between the second regions AR1 and AR3 and the first region AR2. Furthermore, the first signal line 21 includes a tapered third portion 213 between the second portion 212 and the first portion 211. The line width of the third portion 213 is equal to that of the second portion 212 at the point where the third portion 213 connects to the second portion 212. The line width of the third portion 213 is equal to that of the first portion 211 at the point where the third portion 213 connects to the first portion 211. The line width of the third portion 213 is narrower closer to the second portion 212. Therefore, abrupt changes in impedance are unlikely to occur in the first signal line 21.

[0035] In a plan view from the thickness direction of the laminated substrate 1, the second signal line 22 is elongated in the direction along the Y axis. In this embodiment, the second signal line 22 includes two first portions 221 located in the second regions AR1 and AR3, and a second portion 222 located in the first region AR2. In this embodiment, the second portion 222 of the second signal line 22 is rectangular. The two first portions 221 of the second signal line 22 include a portion along the Y axis and a curved portion. In the second signal line 22, the line width of the second portion 222 is narrower than the line width of the first portion 221. Here, the line width of the first portion 221 of the second signal line 22 is, for example, the width in the X axis direction in the portion along the Y axis. Also, the width of the second portion 222 of the second signal line 22 is the width along the minor axis. As a result, as shown in Figures 2 to 5, in the first region AR2, the distance between the second signal line 22 and the third ground electrode 37 is shorter than the distance between the second signal line 22 and the first ground electrode 31, and the distance between the second signal line 22 and the second ground electrode 32, in each of the second regions AR1 and AR3. Also, as shown in Figures 2 to 5, in the first region AR2, the distance between the second signal line 22 and the first ground electrode 31 is shorter than the distance between the second signal line 22 and the first ground electrode 31, and the distance between the second signal line 22 and the second ground electrode 32, in each of the second regions AR1 and AR3. In contrast, the second signal line 22 has a narrower line width in the first region AR2 than in the second regions AR1 and AR3, resulting in a small difference in impedance between the second regions AR1 and AR3 and the first region AR2. Furthermore, the second signal line 22 includes a tapered third portion 223 between the second portion 222 and the first portion 221. The line width of the third portion 223 is equal to that of the second portion 222 at the point where the third portion 223 connects to the second portion 222. The line width of the third portion 223 is equal to that of the first portion 221 at the point where the third portion 223 connects to the first portion 221. The line width of the third portion 223 is narrower closer to the second portion 222. Therefore, abrupt changes in impedance are unlikely to occur in the second signal line 22.

[0036] (1.3) First ground electrode The first ground electrode 31 is located on the laminated substrate 1. As shown in Figure 2, the first ground electrode 31 is located on the first main surface 101 of the laminated substrate 1. The first main surface 101 of the laminated substrate 1 includes, for example, the second main surface 125 of the insulating layer 12. The first ground electrode 31 is in contact with the first main surface 101 of the laminated substrate 1. In the thickness direction of the laminated substrate 1, the first ground electrode 31 faces the first signal line 21, the second signal line 22, the second ground electrode 32, and the third ground electrode 37.

[0037] The first ground electrode 31 is conductive. The material of the first ground electrode 31 includes, for example, copper. The thickness of the first ground electrode 31 is, for example, 3 μm or more and 40 μm or less. The first ground electrode 31 is formed in a predetermined pattern. In a plan view from the thickness direction of the laminated substrate 1, the first ground electrode 31 has a long shape, for example, with a length in the direction along the Y axis being longer than a length in the direction along the X axis. As shown in Figures 6 and 7, the first ground electrode 31 is arranged on the first main surface 114 of the insulating layer 11 so as to cover most of the first main surface 114 of the insulating layer 11. The first ground electrode 31 is formed, for example, by patterning copper foil that is attached to the resin sheet that forms the basis of the insulating layer 11.

[0038] Although not shown in Figures 1 to 10, the multilayer substrate 100 may also include a first resist layer covering the insulating layer 11. The first resist layer includes, for example, a polyimide film and an adhesive layer. The material of the adhesive layer includes, for example, an acrylic resin, a silicone resin, an epoxy resin, or a urethane resin.

[0039] (1.4) Second ground electrode The second ground electrode 32 is located on the laminated substrate 1. As shown in Figure 2, the second ground electrode 32 is located on the second main surface 102 of the laminated substrate 1. The second main surface 102 of the laminated substrate 1 includes, for example, the first main surface 174 of the insulating layer 17. The first ground electrode 31 is in contact with the second main surface 102 of the laminated substrate 1. In the thickness direction of the laminated substrate 1, the second ground electrode 32 faces the first signal line 21, the second signal line 22, the first ground electrode 31, and the third ground electrode 37.

[0040] The second ground electrode 32 is conductive. The material of the second ground electrode 32 includes, for example, copper. The thickness of the second ground electrode 32 is, for example, 3 μm or more and 40 μm or less. The second ground electrode 32 is formed in a predetermined pattern. In a plan view from the thickness direction of the laminated substrate 1, the second ground electrode 32 has a long shape, for example, with a length in the direction along the Y axis being longer than the length in the direction along the X axis. As shown in Figures 6 and 8, the second ground electrode 32 is arranged on the first main surface 174 of the insulating layer 17 so as to cover most of the first main surface 174 of the insulating layer 17. The second ground electrode 32 is formed, for example, by patterning copper foil that is attached to the resin sheet that forms the basis of the insulating layer 17.

[0041] Although not shown in Figures 1 to 10, the multilayer substrate 100 may also include a second resist layer covering the second ground electrode 32 and the insulating layer 17. The second resist layer includes, for example, a polyimide film and an adhesive layer. The material of the adhesive layer includes, for example, an acrylic resin, a silicone resin, an epoxy resin, or a urethane resin.

[0042] (1.5) Third Ground Electrode The third ground electrode 37 is located within the laminated substrate 1. The third ground electrode 37 corresponds to the ground electrode of this disclosure. As shown in Figures 6 and 7, the third ground electrode 37 is located on the first main surface 144 of the insulating layer 14. The third ground electrode 37 is in contact with the first main surface 144 of the insulating layer 14. In the thickness direction of the laminated substrate 1, the third ground electrode 37 is located between the first ground electrode 31 and the second ground electrode 32. In the thickness direction of the laminated substrate 1, the third ground electrode 37 faces the first signal line 21, the second signal line 22, the first ground electrode 31, and the second ground electrode 32. In the first region AR2, as shown in Figures 1 and 3 to 5, the first signal line 21 is located between the third ground electrode 37 and the second ground electrode 32 in the thickness direction of the laminated substrate 1. Furthermore, in the first region AR2, as shown in Figures 1 to 5, the second signal line 22 is positioned between the first ground electrode 31 and the third ground electrode 37 in the thickness direction of the laminated substrate 1.

[0043] The third ground electrode 37 has conductivity. The material of the third ground electrode 37 includes, for example, copper. The thickness of the third ground electrode 37 is, for example, 3 μm or more and 40 μm or less. The third ground electrode 37 is formed in a predetermined pattern. In a plan view from the thickness direction of the laminated substrate 1, the third ground electrode 37 is, for example, in a square shape with two diagonals along the X-axis and the Y-axis, as shown in FIG. 7. In a plan view from the thickness direction of the laminated substrate 1, the third ground electrode 37 is formed so as to overlap neither the first signal line 21 nor the second signal line 22 in the first region AR2. The third ground electrode 37 is formed, for example, by patterning a copper foil attached to a resin sheet that becomes the insulating layer 14.

[0044] (1.6) Fourth Ground Electrodes A plurality of fourth ground electrodes 34 are arranged on the first main surface 154 of the insulating layer 15, as shown in FIGS. 6 and 8. In the present embodiment, two fourth ground electrodes 34 are arranged side by side adjacent to the first signal line 21 in the width direction of the first signal line 21, as shown in FIGS. 1 to 3, FIGS. 5 to 6, and FIG. 8. The first signal line 21 is arranged between the two fourth ground electrodes 34 in the width direction of the first signal line 21. In the present embodiment, each of the two fourth ground electrodes 34 is adjacent to the first signal line 21 in the width direction of the first signal line 21. "Each of the two fourth ground electrodes 34 is arranged side by side adjacent to the first signal line 21 in the width direction of the first signal line 21." means that each of the two fourth ground electrodes 34 and the first signal line 21 are arranged separately without any other conductor being arranged between each of the two fourth ground electrodes 34 and the first signal line 21 in the width direction of the first signal line 21.

[0045] Each of the two fourth ground electrodes 34 is conductive. The material of the two fourth ground electrodes 34 includes, for example, copper. The thickness of each of the two fourth ground electrodes 34 is, for example, 3 μm to 40 μm. The two fourth ground electrodes 34 are formed in a predetermined pattern. In this embodiment, each of the two fourth ground electrodes 34 is elongated. The two fourth ground electrodes 34 are formed, for example, by patterning copper foil attached to a resin sheet that forms the basis of the insulating layer 15, similar to the first signal line 21.

[0046] (1.7) Fifth Ground Electrodes The plurality of fifth ground electrodes 35 are arranged on the first main surface 134 of the insulating layer 13, as shown in Figures 6 and 7. In this embodiment, the two fifth ground electrodes 35 are arranged adjacent to the second signal line 22 in the width direction of the second signal line 22, as shown in Figures 1 to 4 and Figures 6 to 7. The second signal line 22 is arranged between the two fifth ground electrodes 35 in the width direction of the second signal line 22. In this embodiment, each of the two fifth ground electrodes 35 is adjacent to the second signal line 22 in the width direction of the second signal line 22. The statement, "Each of the two fifth ground electrodes 35 is adjacent to the second signal line 22 in the width direction of the second signal line 22," means that each of the two fifth ground electrodes 35 and the second signal line 22 are spaced apart in the width direction of the second signal line 22, with no other conductors placed between each of the two fifth ground electrodes 35 and the second signal line 22.

[0047] Each of the two fifth ground electrodes 35 is conductive. The material of the two fifth ground electrodes 35 includes, for example, copper. The thickness of each of the two fifth ground electrodes 35 is, for example, 3 μm or more and 40 μm or less. The two fifth ground electrodes 35 are formed in a predetermined pattern. In this embodiment, each of the two fifth ground electrodes 35 is elongated. The two fifth ground electrodes 35 are formed, for example, by patterning copper foil attached to a resin sheet that forms the basis of the insulating layer 13, similar to the second signal line 22.

[0048] (1.8) Sixth Ground Electrodes As shown in FIGS. 6 and 7, a plurality of sixth ground electrodes 33 are disposed on the first main surface 124 of the insulating layer 12. In the present embodiment, as shown in FIGS. 1 to 2, 6, and 7, in the second regions AR1 and AR3, the plurality of sixth ground electrodes 33 are disposed between two fourth ground electrodes 34, two fifth ground electrodes 35, and the first ground electrode 31 in the thickness direction of the laminated substrate 1.

[0049] The plurality of sixth ground electrodes 33 have conductivity. The material of the plurality of sixth ground electrodes 33 contains, for example, copper. The thickness of each of the plurality of sixth ground electrodes 33 is, for example, 3 μm or more and 40 μm or less. The plurality of sixth ground electrodes 33 are formed in a predetermined pattern. In the present embodiment, in the second regions AR1 and AR3, the plurality of sixth ground electrodes 33 have a shape overlapping with two fourth ground electrodes 34 and two fifth ground electrodes 35 in the thickness direction of the laminated substrate 1. Also, in the present embodiment, the plurality of sixth ground electrodes 33 are not disposed in the first region AR2. The plurality of sixth ground electrodes 33 are formed, for example, by patterning a copper foil attached to a resin sheet that becomes the insulating layer 12.

[0050] (1.9) Seventh Ground Electrodes As shown in FIGS. 6 and 8, a plurality of seventh ground electrodes 36 are disposed on the first main surface 164 of the insulating layer 16. In the present embodiment, as shown in FIGS. 1 to 2, 6, and 8, in the second regions AR1 and AR3, the plurality of seventh ground electrodes 36 are disposed between two fourth ground electrodes 34, two fifth ground electrodes 35, and the second ground electrode 32 in the thickness direction of the laminated substrate 1.

[0051] The multiple seventh ground electrodes 36 are conductive. The material of the multiple seventh ground electrodes 36 includes, for example, copper. The thickness of each of the multiple seventh ground electrodes 36 is, for example, 3 μm to 40 μm. The multiple seventh ground electrodes 36 are formed in a predetermined pattern. In this embodiment, the multiple seventh ground electrodes 36 have a shape that overlaps with the two fourth ground electrodes 34 and the two fifth ground electrodes 35 in the thickness direction of the laminated substrate 1 in the second regions AR1 and AR3. Also, in this embodiment, the multiple seventh ground electrodes 36 are not arranged in the first region AR2. The multiple seventh ground electrodes 36 are formed, for example, by patterning copper foil that is attached to a resin sheet which will be the basis of the insulating layer 16.

[0052] (1.10) Multiple connecting conductors The multiple first connecting conductors 61 penetrate the insulating layer 12 as shown in Figures 2 to 4 and are connected to the multiple sixth ground electrodes 33. In the second regions AR1 and AR3, the multiple first connecting conductors 61 connect the first ground electrode 31 and the multiple sixth ground electrodes 33.

[0053] As shown in Figures 3 and 4, the multiple second connecting conductors 62 penetrate the insulating layer 13 and are connected to the two fifth ground electrodes 35. In the second regions AR1 and AR3, the multiple second connecting conductors 62 connect the multiple sixth ground electrodes 33 and the two fifth ground electrodes 35, as shown in Figure 2. In the first region AR2, the multiple second connecting conductors 62 penetrate the through-hole 121 and connect the first ground electrode 31 and the two fifth ground electrodes 35, as shown in Figures 3 and 4.

[0054] As shown in Figures 3 and 5, the multiple third connecting conductors 63 penetrate the insulating layer 15 and are connected to the two fourth ground electrodes 34. In the first region AR2, the multiple third connecting conductors 63 connect the two fourth ground electrodes 34 and the third ground electrode 37, as shown in Figures 3 and 5. In the second regions AR1 and AR3, the multiple third connecting conductors 63 penetrate through holes 131 and 141 and connect the two fourth ground electrodes 34 and the multiple sixth ground electrodes 33, as shown in Figure 2.

[0055] As shown in Figure 2, the multiple fourth connecting conductors 64 penetrate the insulating layer 16 and are connected to the multiple seventh ground electrodes 36. In the second regions AR1 and AR3, some of the multiple fourth connecting conductors 64 connect the multiple seventh ground electrodes 36 to two fourth ground electrodes 34, as shown in Figure 2. Also in the second regions AR1 and AR3, some of the other fourth connecting conductors 64 penetrate through holes 141 and 151 and connect the multiple seventh ground electrodes 36 to two fifth ground electrodes 35, as shown in Figure 2.

[0056] As shown in Figures 2, 3, and 5, the multiple fifth connecting conductors 65 penetrate the insulating layer 17 and are connected to the second ground electrode 32. In the second regions AR1 and AR3, as shown in Figure 2, the multiple fifth connecting conductors 65 connect the second ground electrode 32 to the multiple seventh ground electrodes 36. In the first region AR2, the multiple fifth connecting conductors 65 penetrate the through-hole 161 and connect the second ground electrode 32 to the two fourth ground electrodes 34, as shown in Figures 3 and 5.

[0057] As shown in Figures 3 and 4, the multiple sixth connecting conductors 66 penetrate the insulating layer 14 and are connected to the third ground electrode 37. In the first region AR2, as shown in Figures 3 and 4, the multiple sixth connecting conductors 66 connect the third ground electrode 37 to the two fifth ground electrodes 35.

[0058] In this embodiment, as shown in Figure 2, the first ground electrode 31 and the two fourth ground electrodes 34 are electrically connected by a plurality of third connecting conductors 63, a plurality of sixth ground electrodes 33, and a plurality of first connecting conductors 61. Also, the second ground electrode 32 and the two fourth ground electrodes 34 are electrically connected by a plurality of fourth connecting conductors 64, a plurality of seventh ground electrodes 36, and a plurality of fifth connecting conductors 65. Furthermore, the first ground electrode 31 and the two fifth ground electrodes 35 are electrically connected by a second connecting conductor 62, a plurality of sixth ground electrodes 33, and a plurality of first connecting conductors 61. Also, the second ground electrode 32 and the two fifth ground electrodes 35 are electrically connected by a plurality of fourth connecting conductors 64, a plurality of seventh ground electrodes 36, and a plurality of fifth connecting conductors 65.

[0059] Furthermore, in this embodiment, as shown in Figure 3, in the first region AR2, the first ground electrode 31 and the third ground electrode 37 are electrically connected by a plurality of second connecting conductors 62, two fifth ground electrodes 35, and a plurality of sixth connecting conductors 66. Also, the second ground electrode 32 and the third ground electrode 37 are electrically connected by a plurality of fifth connecting conductors 65, two fourth ground electrodes 34, and a third connecting conductor 63.

[0060] Each of the multiple first connecting conductors 61, multiple second connecting conductors 62, multiple third connecting conductors 63, multiple fourth connecting conductors 64, multiple fifth connecting conductors 65, and multiple sixth connecting conductors 66 is electrically conductive. Each of the multiple first connecting conductors 61, multiple second connecting conductors 62, multiple third connecting conductors 63, multiple fourth connecting conductors 64, multiple fifth connecting conductors 65, and multiple sixth connecting conductors 66 includes, for example, copper, a copper-tin alloy, and a resin. The multiple first connecting conductors 61 are formed, for example, by filling multiple via holes formed in the insulating layer 12 with a conductive paste containing copper, a low-melting-point metal (e.g., tin), and a resin, with each of the multiple via holes formed in the insulating layer 12 being blocked by a portion of copper foil, and then heating the paste. The multiple second connecting conductors 62 are formed, for example, by filling multiple via holes formed in the insulating layer 13 with a conductive paste containing copper, a low-melting-point metal (e.g., tin), and a resin, with each of the multiple via holes formed in the insulating layer 13 being blocked by a portion of copper foil, and then heating the paste. Multiple third connecting conductors 63 are formed, for example, by filling multiple via holes formed in the insulating layer 15 with a conductive paste containing copper, a low-melting-point metal (e.g., tin), and resin, with each of the via holes being blocked by a portion of copper foil, and then heating the mixture. Multiple fourth connecting conductors 64 are formed, for example, by filling multiple via holes formed in the insulating layer 16 with a conductive paste containing copper, a low-melting-point metal (e.g., tin), and resin, with each of the via holes being blocked by a portion of copper foil, and then heating the mixture. Multiple fifth connecting conductors 65 are formed, for example, by filling multiple via holes formed in the insulating layer 17 with a conductive paste containing copper, a low-melting-point metal (e.g., tin), and resin, with each of the via holes being blocked by a portion of copper foil, and then heating the mixture. Multiple sixth connecting conductors 66 are formed, for example, by filling multiple via holes formed in the insulating layer 14 with a conductive paste containing copper, a low-melting-point metal (e.g., tin), and resin, with each of the via holes being blocked by a portion of copper foil, and then heating the mixture.

[0061] (2) Positional relationship In this embodiment, in the second region AR1 and AR3, the first signal line 21 is located between the first ground electrode 31 and the second ground electrode 32 in the thickness direction of the laminated substrate 1. Also in this embodiment, in the first region AR2, the first signal line 21 is located between the third ground electrode 37 and the second ground electrode 32. Also in this embodiment, the position of the first signal line 21 in the thickness direction of the laminated substrate 1 differs between the first region AR2 and the second region AR1 and AR3. The first signal line 21 does not include a connecting conductor, and the first portion 211 located in the first region AR2 and the second portion 212 located in the second region AR1 and AR3 are continuous without including a connecting conductor. Also in this embodiment, the first signal line 21 is located between the two fourth ground electrodes 34 in the width direction of the first signal line 21.

[0062] Furthermore, in this embodiment, in the second regions AR1 and AR3, the second signal line 22 is located between the first ground electrode 31 and the second ground electrode 32 in the thickness direction of the laminated substrate 1. Also, in this embodiment, in the first region AR2, the first signal line 21 is located between the first ground electrode 31 and the third ground electrode 37. Furthermore, in this embodiment, the position of the second signal line 22 in the thickness direction of the laminated substrate 1 differs between the first region AR2 and the second regions AR1 and AR3. The second signal line 22 does not include a connecting conductor, and the first portion 221 located in the first region AR2 and the second portion 222 located in the second regions AR1 and AR3 are continuous without a connecting conductor. Furthermore, in this embodiment, the second signal line 22 is located between the two fifth ground electrodes 35 in the width direction of the second signal line 22.

[0063] In the multilayer substrate 100 according to this embodiment, it is possible to reduce the impedance difference of the first signal line 21 between the first region AR2 and the second regions AR1 and AR3. Similarly, in the multilayer substrate 100 according to this embodiment, it is possible to reduce the impedance difference of the second signal line 22 between the first region AR2 and the second regions AR1 and AR3. As a result, it is possible to reduce reflection loss compared to a configuration in which a bypass line including a connecting conductor is provided in one of the two signal lines, as in Patent Document 1.

[0064] (3) Method for manufacturing a multilayer substrate The method for manufacturing a multilayer substrate comprises a first step, a second step, and a third step. In the method for manufacturing a multilayer substrate, for example, the first step, the second step, and the third step are performed in the order of the first step, the second step, and the third step.

[0065] In the first step, as shown in Figures 6 to 8, a first single-sided copper-clad film L1, a second single-sided copper-clad film L2, a third single-sided copper-clad film L3, a fourth single-sided copper-clad film L4, a fifth single-sided copper-clad film L5, a sixth single-sided copper-clad film L6, and a seventh single-sided copper-clad film L7 are prepared.

[0066] The first single-sided copper-clad film L1 is a single-sided copper-clad film in which a first ground electrode 31 is formed on the first main surface 114 of the insulating layer 11. The second single-sided copper-clad film L2 is a single-sided copper-clad film in which a plurality of sixth ground electrodes 33 are formed on the first main surface 124 of the insulating layer 12, and a plurality of via holes and through holes 121 are formed that penetrate in the thickness direction of the insulating layer 12. The third single-sided copper-clad film L3 is a single-sided copper-clad film in which a second signal line 22 and two fifth ground electrodes 35 are formed on the first main surface 134 of the insulating layer 13, and a plurality of via holes and two through holes 131 are formed that penetrate in the thickness direction of the insulating layer 13. The fourth single-sided copper-clad film L4 is a single-sided copper-clad film in which a third ground electrode 37 is formed on the first main surface 144 of the insulating layer 14, and a plurality of via holes and two through holes 141 are formed that penetrate in the thickness direction of the insulating layer 14. The fifth single-sided copper-clad film L5 is a single-sided copper-clad film in which a first signal line 21 and two fourth ground electrodes 34 are formed on the first main surface 154 of the insulating layer 15, and a plurality of via holes and two through holes 151 are formed penetrating in the thickness direction of the insulating layer 15. The sixth single-sided copper-clad film L6 is a single-sided copper-clad film in which a plurality of seventh ground electrodes 36 are formed on the first main surface 164 of the insulating layer 16, and a plurality of via holes and through holes 161 are formed penetrating in the thickness direction of the insulating layer 16. The seventh single-sided copper-clad film L7 is a single-sided copper-clad film in which a second ground electrode 32 is formed on the first main surface 174 of the insulating layer 17, and a plurality of via holes are formed penetrating in the thickness direction of the insulating layer 17. Each of the plurality of via holes, through holes 121, two through holes 131, two through holes 141, two through holes 151, and through hole 161 is formed, for example, by laser processing or wet etching.

[0067] In the second step, the first single-sided copper-clad film L1, the second single-sided copper-clad film L2 with conductive paste filling each of the multiple via holes, the third single-sided copper-clad film L3 with conductive paste filling each of the multiple via holes, the fourth single-sided copper-clad film L4 with conductive paste filling each of the multiple via holes, the fifth single-sided copper-clad film L5 with conductive paste filling each of the multiple via holes, the sixth single-sided copper-clad film L6 with conductive paste filling each of the multiple via holes, and the seventh single-sided copper-clad film L7 with conductive paste filling each of the multiple via holes are stacked on top of the first mold (not shown), and the second mold (not shown) is placed on top and pressed while heating.

[0068] In this case, in the second regions AR1 and AR3, as shown in Figure 9, the two through holes 141 of the fourth single-sided copper-clad film L4 extend across the entire area of ​​each of the second regions AR1 and AR3. Also, in the second regions AR1 and AR3, in the thickness direction of the laminated substrate 1, the entire area of ​​the second signal line 22 and the two fifth ground electrodes 35 overlaps with one of the two through holes 151. Furthermore, in the second regions AR1 and AR3, in the thickness direction of the laminated substrate 1, the entire area of ​​the first signal line 21 and the two fourth ground electrodes 34 overlaps with one of the two through holes 131. In other words, insulating layer 13 is in contact with insulating layer 16, and insulating layer 15 is in contact with insulating layer 12. Moreover, in the second regions AR1 and AR3, insulating layer 13 and insulating layer 15 do not overlap in the thickness direction of the laminated substrate 1. Therefore, both insulating layer 11 and insulating layer 12 are in contact with insulating layer 13 and insulating layer 15. Consequently, in the second regions AR1 and AR3, the cross-sectional shape is as shown in Figure 2, insulating layer 14 is absent, and insulating layer 13 and insulating layer 15 are adjacent in the X direction.

[0069] On the other hand, in the first region AR2, as shown in Figure 10, both the through-hole 121 of the second single-sided copper-clad film L2 and the through-hole 161 of the sixth single-sided copper-clad film L6 extend throughout the entire first region AR2. Therefore, the insulating layer 11 is in contact with the insulating layer 13, and the insulating layer 15 is in contact with the insulating layer 17. As a result, in the first region AR2, the cross-sectional shape is as shown in Figure 3, and the insulating layers 12 and 16 are absent.

[0070] In the third step, the first single-sided copper-clad film L1, the second single-sided copper-clad film L2, the third single-sided copper-clad film L3, the fourth single-sided copper-clad film L4, the fifth single-sided copper-clad film L5, the sixth single-sided copper-clad film L6, and the seventh single-sided copper-clad film L7 are cut off. As a result, the region adjacent to the laminated substrate 1 in the X direction, where the thickness of the first single-sided copper-clad film L1, the second single-sided copper-clad film L2, the third single-sided copper-clad film L3, the fourth single-sided copper-clad film L4, the fifth single-sided copper-clad film L5, the sixth single-sided copper-clad film L6, and the seventh single-sided copper-clad film L7 overlaps and is thicker than the laminated substrate 1, is separated from the laminated substrate 1. Therefore, it becomes possible to make the film thickness of the laminated substrate 1 smaller and more uniform.

[0071] (4) The multilayer substrate 100 according to the first embodiment comprises a laminated substrate 1, a first signal line 21, a second signal line 22, and a third ground electrode 37 (ground electrode). The laminated substrate 1 has a plurality of insulating layers laminated on it. The first ground electrode 31 is located on the laminated substrate 1. The second ground electrode 32 is located on the laminated substrate 1. The first signal line 21 is located inside the laminated substrate 1. The second signal line 22 is located inside the laminated substrate 1. The third ground electrode 37 is located inside the laminated substrate 1. The plurality of insulating layers include a first insulating layer 12. The first insulating layer 12 has through holes 121 (thickness change portions) formed in the first region AR2. The through holes 121 (thickness change portions) are through holes 121 that penetrate in the thickness direction of the laminated substrate 1. The multilayer substrate 100 includes a first region AR2 and second regions AR1 and AR3. The first region AR2 includes the portion where the first signal line 21 and the second signal line 22 overlap in a plan view from the thickness direction of the laminated substrate 1. The second regions AR1 and AR3 do not include the portion where the first signal line 21 and the second signal line 22 overlap in a plan view from the thickness direction of the laminated substrate 1. In the first region AR2, the third ground electrode 37 is located between the first signal line 21 and the second signal line 22. At least one of the first signal line 21 and the second signal line 22 curves toward the through hole 121 of the insulating layer 12 in the thickness direction of the laminated substrate 1, so that the positions in the thickness direction of the laminated substrate 1 differ between the first region AR2 and the second regions AR1 and AR3.

[0072] According to the above configuration, impedance mismatch can be reduced in the multilayer substrate 100 where the first signal line 21 and the second signal line 22 overlap in a plan view. More specifically, neither the first signal line 21 nor the second signal line 22 includes a connecting conductor and has no steps in the first region AR2. Therefore, in both the first signal line 21 and the second signal line 22, the impedance difference between the first region AR2 and the second regions AR1 and AR3 can be reduced.

[0073] Furthermore, in the multilayer substrate 100 according to Embodiment 1, in a plan view from the thickness direction of the laminated substrate 1, the first signal line 21 and the second signal line 22 overlap with the through hole 121 (thickness change portion) of the first insulating layer 12.

[0074] With the above configuration, it becomes easy to change the distance between the first signal line 21 or the second signal line 22 and the first main surface 101 of the laminated substrate 1 in the first region AR2 and the second regions AR1 and AR3. Therefore, it becomes possible to provide the first region AR2 and the second regions AR1 and AR3 without creating a step between the first signal line 21 and the second signal line 22. In addition, it becomes easy to reduce the thickness of the multilayer substrate 100.

[0075] Furthermore, in the multilayer substrate 100 according to Embodiment 1, the through-holes 121 (thickness change portion) of the first insulating layer 12 may have a tapered shape in which the cross-sectional area intersecting the thickness direction of the laminated substrate 1 is wider the closer they are to the third ground electrode 37.

[0076] According to the above configuration, it is possible to reduce the degree of bending in the thickness direction of the laminated substrate 1 with respect to the first signal line 21 or the second signal line 22. Therefore, in both the first signal line 21 and the second signal line 22, it is possible to further reduce the impedance difference between the first region AR2 and the second regions AR1 and AR3.

[0077] Furthermore, in the multilayer substrate 100 according to Embodiment 1, the materials of the plurality of insulating layers 11 to 17 include thermoplastic resin.

[0078] According to the above configuration, a multilayer substrate 100 can be easily manufactured by heating and pressing the multiple insulating layers 11 to 17. Furthermore, the deformation of the multiple insulating layers 11 to 17 by pressing makes it easy to create a change in the position of the first signal line 21 and the second signal line 22 in the thickness direction of the laminated substrate 1. Therefore, the change in the position of the first signal line 21 and the second signal line 22 in the thickness direction of the laminated substrate 1 does not become abrupt, making it easy to improve the reflective characteristics of the multilayer substrate 100.

[0079] Furthermore, in the multilayer substrate 100 according to Embodiment 1, the line width of the first portion 211, 221 located in the first region AR2 of the first signal line 21 and the second signal line 22 is narrower than the line width of the second portion 212, 222 located in the second regions AR1, AR3.

[0080] According to the above configuration, when the distance between the second portions 212, 222 and the third ground electrode 37 and the first ground electrode 31 or the second ground electrode 32 is shorter than the distance between the first portions 211, 221 and the first ground electrode 31 and the second ground electrode 32, it becomes possible to reduce the impedance difference between the first region AR2 and the second regions AR1, AR3 in the first signal line 21 and the second signal line 22. Therefore, it becomes easier to improve the reflection characteristics of the multilayer substrate 100.

[0081] Furthermore, in the multilayer substrate 100 according to Embodiment 1, the first signal line 21 and the second signal line 22 include tapered third portions 213 and 223 between the first portions 211 and 221 and the second portions 212 and 222.

[0082] According to the above configuration, the line width of the first signal line 21 or the second signal line 22 does not change abruptly at the connection point between the first sections 211, 221 and the second sections 212, 222. Therefore, it becomes possible to reduce signal reflection due to changes in the impedance of the first signal line 21 or the second signal line 22 at the boundary between the first region AR2 and the second regions AR1, AR3.

[0083] Furthermore, in the multilayer substrate 100 according to Embodiment 1, the plurality of insulating layers 11 to 17 include a second insulating layer 14 on which a third ground electrode 37 is arranged. The width of the second insulating layer 14 along the direction (X-axis direction) perpendicular to the direction (Y-axis direction) in which the first region AR2 and the second regions AR1 and AR3 are aligned is equal to the width of the laminated substrate 1.

[0084] According to the above configuration, in the Y-axis direction that intersects the X-axis direction in which the first region AR2 and the second regions AR1 and AR3 are aligned, it becomes possible to easily align the second insulating layer 14 during the manufacturing of the multilayer substrate 100 and improve the yield.

[0085] Furthermore, in the multilayer substrate 100 according to Embodiment 1, the laminated substrate 1 has a first main surface 101 and a second main surface 102 facing each other in the thickness direction of the laminated substrate 1. The through hole 121 (thickness change portion) is located between the first main surface 101 and the second main surface 102 of the laminated substrate 1 and is separated from both the first main surface 101 and the second main surface 102.

[0086] According to the above configuration, the first main surface 101 and the second main surface 102 of the laminated substrate 1 are both separated from the through hole 121 (thickness change portion), so they are flat without any steps.

[0087] (Embodiment 2) The multilayer substrate 100a according to Embodiment 2 will be described with reference to Figure 11. With respect to the multilayer substrate 100a according to Embodiment 2, components that are the same as those in the multilayer substrate 100 according to Embodiment 1 (see Figures 1 to 10) are denoted by the same reference numerals and their description is omitted.

[0088] (1) The multilayer substrate 100a according to Embodiment 2 differs from the multilayer substrate 100 according to Embodiment 1 in that it has a first signal line 21a and a third signal line 21b instead of the first signal line 21, and a second signal line 22a and a fourth signal line 22b instead of the second signal line 22.

[0089] As shown in Figure 11, the first signal line 21a and the third signal line 21b are arranged within the laminated substrate 1. More specifically, the first signal line 21a and the third signal line 21b are formed in the insulating layer 15 (see Figures 6 and 8). The first signal line 21a and the third signal line 21b are, for example, signal lines through which high-frequency signals are transmitted. The first signal line 21a and the third signal line 21b operate, for example, as a differential line.

[0090] Each of the first signal line 21a and the third signal line 21b is conductive. The first signal line 21a and the third signal line 21b are arranged spaced apart from each other between the two fourth ground electrodes 34 in the width direction of the first signal line 21a.

[0091] As shown in Figure 11, the second signal line 22a and the fourth signal line 22b are arranged within the laminated substrate 1. More specifically, the second signal line 22a and the fourth signal line 22b are formed in the insulating layer 13 (see Figures 6 and 7). The second signal line 22a and the fourth signal line 22b are, for example, signal lines through which high-frequency signals are transmitted. The second signal line 22a and the fourth signal line 22b operate, for example, as a differential line.

[0092] Each of the second signal line 22a and the fourth signal line 22b is conductive. The second signal line 22a and the fourth signal line 22b are arranged spaced apart from each other between the two fifth ground electrodes 35 in the width direction of the second signal line 22a.

[0093] In a plan view of the laminated substrate 1 from the thickness direction, the first signal line 21a and the third signal line 21b and the second signal line 22a and the fourth signal line 22b overlap in the first region AR2, but do not overlap in the second regions AR1 and AR3. Also, in the first region AR2, the third ground electrode 37 is located between the first signal line 21a and the third signal line 21b and the second signal line 22a and the fourth signal line 22b in the thickness direction of the laminated substrate 1.

[0094] (2) The multilayer substrate 100a according to the second embodiment further comprises a third signal line 21b arranged within the laminated substrate 1. The first signal line 21a and the third signal line 21b constitute a differential line. In a plan view from the thickness direction of the laminated substrate 1, the third signal line 21b and the second signal line 22a overlap in the first region AR2, but do not overlap in the second regions AR1 and AR3. In the first region AR2, the third ground electrode 37 is located between the third signal line 21b and the second signal line 22a.

[0095] With the above configuration, in the differential line between the first signal line 21a and the third signal line 21b, it is possible to reduce the impedance difference between the first region AR2 and the second regions AR1 and AR3. Furthermore, in the differential line between the second signal line 22a and the fourth signal line 22b, it is also possible to reduce the impedance difference between the first region AR2 and the second regions AR1 and AR3.

[0096] (Embodiment 3) A multilayer substrate 100b and an electronic device 500 equipped with the multilayer substrate 100b according to Embodiment 3 will be described with reference to Figure 12. With respect to the multilayer substrate 100b according to Embodiment 3, components that are the same as those in the multilayer substrate 100 according to Embodiment 1 (see Figures 1 to 10) are denoted by the same reference numerals and their description is omitted.

[0097] (1) Configuration of the multilayer substrate The multilayer substrate 100b according to Embodiment 3 differs from the multilayer substrate 100 according to Embodiment 1 in that it further comprises a plurality of signal electrodes 38a, a plurality of signal electrodes 38b, a plurality of signal electrodes 39a, a plurality of signal electrodes 39b, a plurality of connecting conductors 67a, a plurality of connecting conductors 67b, a plurality of connecting conductors 68a, and a plurality of connecting conductors 68b. Furthermore, the multilayer substrate 100b according to Embodiment 3 also differs from the multilayer substrate 100 according to Embodiment 1 in that the first ground electrode 31 does not cover most of the first main surface 101 (see Figure 2) of the laminated substrate 1.

[0098] The first ground electrode 31 covers a portion of the first main surface 101 of the laminated substrate 1. The first ground electrode 31 is formed such that, for example, in a plan view from the thickness direction of the laminated substrate 1, a portion of the first ground electrode 31 overlaps with the entire area of ​​the third ground electrode 37.

[0099] Multiple (two in Figure 12) signal electrodes 38a are arranged within the laminated substrate 1. The multiple signal electrodes 38a are arranged, for example, on the first main surface 124 of the insulating layer 12 (see Figure 6). In a plan view from the thickness direction of the laminated substrate 1, each of the multiple signal electrodes 38a overlaps with the second signal line 22.

[0100] Multiple (two in Figure 12) signal electrodes 38b are arranged within the laminated substrate 1. The multiple signal electrodes 38b are arranged, for example, on the first main surface 124 of the insulating layer 12 (see Figure 6). In a plan view from the thickness direction of the laminated substrate 1, each of the multiple signal electrodes 38b overlaps with the first signal line 21.

[0101] Multiple (two in Figure 12) signal electrodes 39a are arranged on the laminated substrate 1. The multiple signal electrodes 39a are arranged, for example, on the first main surface 114 of the insulating layer 11. Each of the multiple signal electrodes 39a corresponds to one of the multiple signal electrodes 38a. The multiple signal electrodes 39a correspond one-to-one with the multiple signal electrodes 38a. In a plan view from the thickness direction of the laminated substrate 1, each of the multiple signal electrodes 39a overlaps with the corresponding signal electrode 38a from the multiple signal electrodes 38a.

[0102] Multiple (two in Figure 12) signal electrodes 39b are arranged on the laminated substrate 1. The multiple signal electrodes 39b are arranged, for example, on the first main surface 114 of the insulating layer 11. Each of the multiple signal electrodes 39b corresponds to one of the multiple signal electrodes 38b. The multiple signal electrodes 39b correspond one-to-one with the multiple signal electrodes 38b. In a plan view from the thickness direction of the laminated substrate 1, the multiple signal electrodes 39b overlap with the corresponding signal electrode 38b among the multiple signal electrodes 38b.

[0103] Multiple (two in Figure 12) connecting conductors 67a penetrate one or more insulating layers included in the multiple insulating layers of the laminated substrate 1. For example, multiple connecting conductors 67a penetrate insulating layer 13. Multiple connecting conductors 67a correspond one-to-one with multiple signal electrodes 38a. Each of the multiple connecting conductors 67a connects the second signal line 22 to the corresponding signal electrode 38a among the multiple signal electrodes 38a.

[0104] Multiple (two in Figure 12) connecting conductors 67b penetrate one or more insulating layers included in the multiple insulating layers of the laminated substrate 1. For example, the multiple connecting conductors 67b penetrate insulating layer 15, through holes 131 in insulating layer 13, and through holes 141 in insulating layer 14. Each of the multiple connecting conductors 67b corresponds one-to-one with each of the multiple signal electrodes 38b. Each of the multiple connecting conductors 67b connects the first signal line 21 to the corresponding signal electrode 38b among the multiple signal electrodes 38b.

[0105] Multiple (two in Figure 12) connecting conductors 68a penetrate one or more insulating layers included in the multiple insulating layers of the laminated substrate 1. For example, multiple connecting conductors 68a penetrate insulating layer 12. Multiple connecting conductors 68a correspond one-to-one with multiple signal electrodes 39a. Each of the multiple connecting conductors 68a connects a corresponding signal electrode 39a from the multiple signal electrodes 39a to a signal electrode 38a from the multiple signal electrodes 38a that corresponds to the corresponding signal electrode 39a.

[0106] Multiple (two in Figure 12) connecting conductors 68b penetrate one or more insulating layers included in the multiple insulating layers 11 to 17 of the laminated substrate 1. For example, multiple connecting conductors 68b penetrate insulating layer 12. Multiple connecting conductors 68b correspond one-to-one with multiple signal electrodes 39b. Each of the multiple connecting conductors 68b connects a corresponding signal electrode 39b from the multiple signal electrodes 39b to a signal electrode 38b from the multiple signal electrodes 38b that corresponds to the corresponding signal electrode 39b.

[0107] (2) Configuration of the electronic device The electronic device 500 according to Embodiment 3 is, for example, a communication device. The communication device is, for example, a mobile phone (for example, a smartphone), but is not limited to a mobile phone, and may be, for example, a notebook personal computer, a wearable device (for example, a smartwatch), etc.

[0108] As shown in Figure 12, the electronic device 500 comprises a multilayer substrate 100b and a plurality of electronic components 510, 520, and 530. The electronic device 500 further comprises a housing (not shown) that houses the multilayer substrate 100b and the plurality of electronic components 510, 520, and 530.

[0109] Each of the electronic components 510, 520, and 530 is located on the multilayer substrate 100b. Each of the electronic components 510, 520, and 530 is, for example, an IC, a surface-mount passive element, or a connector. Passive elements include, for example, inductors, capacitors, and filters. Each of the electronic components 510, 520, and 530 is connected, for example, to one or more of the multiple signal electrodes 39a, multiple signal electrodes 39b, or first ground electrode 31 of the multilayer substrate 100b via bumps. Electronic component 510 is connected to one of the multiple signal electrodes 39a, one of the multiple signal electrodes 39b, and the first ground electrode 31. Electronic component 520 is connected to the first ground electrode 31. Electronic component 530 is connected to one of the multiple signal electrodes 39a, one of the multiple signal electrodes 39b, and one of the multiple signal electrodes 39b.

[0110] (3) The electronic device 500 according to the third embodiment comprises a multilayer substrate 100b and electronic components 510, 520, and 530 arranged on the multilayer substrate 100b.

[0111] According to the above configuration, impedance mismatch can be reduced in the multilayer substrate 100 where the first signal line 21 and the second signal line 22 overlap in a plan view. More specifically, neither the first signal line 21 nor the second signal line 22 includes a connecting conductor and has no steps. Therefore, in both the first signal line 21 and the second signal line 22, the impedance difference between the first region AR2 and the second regions AR1 and AR3 can be reduced. Furthermore, by arranging the electronic components 510, 520, and 530 on the multilayer substrate 100b, the wiring length between the electronic components 510, 520, and 530 and the first signal line 21, the second signal line 22, and the first ground electrode 31 can be shortened. Therefore, the electronic device 500 can be miniaturized, and the signal transmission loss can be reduced.

[0112] (Modified Version) A modified version of Embodiment 3, consisting of a multilayer substrate 100c and an electronic device 500a equipped with the multilayer substrate 100c, will be described with reference to Figure 13. With respect to the modified version of Embodiment 3, the same components as those in the multilayer substrate 100b and electronic device 500 (see Figure 12) of Embodiment 3 are denoted by the same reference numerals and their descriptions are omitted.

[0113] The multilayer substrate 100c according to a modification of Embodiment 3 differs from the multilayer substrate 100b according to Embodiment 3 in that it further comprises one or more (two in Figure 13) radiating electrodes 30a.

[0114] One or more radiating electrodes 30a are arranged on the laminated substrate 1. In this modified example, one or more radiating electrodes 30a are arranged inside the laminated substrate 1. Alternatively, one or more radiating electrodes 30a may be arranged on the main surface of the laminated substrate 1. One or more radiating electrodes 30a are arranged such that a second ground electrode 32 is placed between one or more radiating electrodes 30a and a first ground electrode 31. Each of the one or more radiating electrodes 30a is connected to a signal line (not shown). One or more radiating electrodes 30a, the second ground electrode 32, and one or more insulating layers placed between one or more radiating electrodes 30a and the second ground electrode 32 in the laminated substrate 1 function as a planar antenna.

[0115] As shown in Figure 13, the electronic device 500a according to a modified example of Embodiment 3 comprises a mounting substrate 540, a plurality of bumps 553, and a high-frequency module 550. The high-frequency module 550 comprises a multilayer substrate 100c, electronic components 510 and 520, a plurality (two in Figure 13) of columnar electrodes 552, and a resin layer 551.

[0116] Multiple columnar electrodes 552 are arranged on a multilayer substrate 100c. Multiple columnar electrodes 552 are conductive. The material of the multiple columnar electrodes 552 includes, for example, copper or a copper alloy. Each of the multiple columnar electrodes 552 is, for example, cylindrical. Each of the multiple columnar electrodes 552 is connected to one of the multiple signal electrodes 39a, multiple signal electrodes 39b, or the first ground electrode 31 of the multilayer substrate 100b.

[0117] The resin layer 551 is located on the first main surface 101 of the multilayer substrate 100c. The resin layer 551 covers the electronic components 510 and 520 and each of the sides of the plurality of columnar electrodes 552. The material of the resin layer 551 includes a resin. The resin is, for example, an epoxy resin.

[0118] The mounting substrate 540 is, for example, an LTCC (Low Temperature Co-fired Ceramics) substrate. Multiple electrodes (not shown) are arranged on the main surface of the mounting substrate 540. The multiple electrodes are connected to corresponding columnar electrodes 552 from among multiple columnar electrodes 552 via corresponding bumps 553 from among multiple bumps 553. The material of the multiple bumps 553 is, for example, solder.

[0119] The electronic device 500a according to the modified embodiment 3 also produces the same effects as the electronic device 500.

[0120] (Embodiment 4) The multilayer substrate 100d according to Embodiment 4 will be described with reference to Figure 14. With respect to the multilayer substrate 100d according to Embodiment 4, components that are the same as those in the multilayer substrate 100 according to Embodiment 1 (see Figures 1 to 10) are denoted by the same reference numerals and their description is omitted.

[0121] The multilayer substrate 100d according to Embodiment 4 differs from the multilayer substrate 100 according to Embodiment 1 in that it includes an insulating layer 12a instead of insulating layers 12 and 13, includes a plurality of fifth ground electrodes 35a instead of a portion of a plurality of sixth ground electrodes 33 and a plurality of fifth ground electrodes 35, and includes a plurality of second connecting conductors 62a instead of a portion of a plurality of first connecting conductors 61 and a plurality of second connecting conductors 62.

[0122] The insulating layer 12a according to this embodiment has a shape in which the insulating layer 12 and insulating layer 13 according to Embodiment 1 are stacked in the thickness direction of the laminated substrate 1. Of the two main surfaces of the insulating layer 12a, the main surface in contact with the insulating layer 15 has a recess 121a corresponding to the through hole 121. In a plan view from the thickness direction of the laminated substrate 1, the recess has the same shape as the through hole 121. The depth of the recess in the thickness direction of the laminated substrate 1 is the same as the thickness of the insulating layer 12.

[0123] Furthermore, of the two main surfaces of the insulating layer 12a, the main surface 124b that is in contact with the insulating layer 15 has a protrusion 122a that corresponds to the insulating layer 12. On the main surface 124a of the insulating layer 12a that is in contact with the insulating layer 15, the portion other than the protrusion 122a becomes a recess 121a. In a plan view from the thickness direction of the laminated substrate 1, the recess 121a has the same shape as the through hole 131 (see Figure 6).

[0124] Multiple sixth ground electrodes 33 are arranged on the main surface 124b within the recess 121a of the insulating layer 12a. In the second regions AR1 and AR3 (see Figure 1), the multiple sixth ground electrodes 33 have a shape that overlaps with the multiple fourth ground electrodes 34 in the thickness direction of the laminated substrate 1.

[0125] Multiple fifth ground electrodes 35a are arranged on the protrusions 122a of the insulating layer 12a.

[0126] Multiple first connecting conductors 61 penetrate the insulating layer 12a and are connected to multiple sixth ground electrodes 33. As shown in Figure 14, the multiple first connecting conductors 61 connect the first ground electrode 31 to the multiple sixth ground electrodes 33.

[0127] Multiple second connecting conductors 62a pass through the insulating layer 12a and are connected to multiple fifth ground electrodes 35a. As shown in Figure 14, the multiple second connecting conductors 62a connect the first ground electrode 31 to the multiple fifth ground electrodes 35a.

[0128] In the first step of the manufacturing method for the multilayer substrate 100d, a second single-sided copper-clad film L2a is prepared instead of the second single-sided copper-clad film L2 and the third single-sided copper-clad film L3 according to Embodiment 1. The second single-sided copper-clad film L2a is a single-sided copper-clad film in which a plurality of sixth ground electrodes 33 and a plurality of fifth ground electrodes 35a are formed on the first main surface 124 of the insulating layer 12a, and a plurality of via holes penetrating in the thickness direction of the insulating layer 12a and recesses 121a corresponding to through holes 121 are formed.

[0129] In the second step of the manufacturing method for the multilayer substrate 100d, a second single-sided copper-clad film L2a, which has conductive paste filled in each of its multiple via holes, is placed between a first single-sided copper-clad film L1 and a fourth single-sided copper-clad film L4, which has conductive paste filled in each of its multiple via holes. At this time, in the second regions AR1 and AR3, as shown in Figure 14, the through-holes 151 of the fifth single-sided copper-clad film L5 and the protrusions 122a of the second single-sided copper-clad film L2a overlap in a plan view from the thickness direction of the laminated substrate 1. Also, in the second regions AR1 and AR3, as shown in Figure 14, the recesses 121a of the second single-sided copper-clad film L2a and the insulating layer 15 overlap in a plan view from the thickness direction of the laminated substrate 1. Therefore, the insulating layer 12a is in contact with the insulating layer 16, and the insulating layer 15 is in contact with the insulating layer 12a. Furthermore, in the second regions AR1 and AR3, the protrusions 122a of the insulating layer 12a fit into the through holes 151 of the insulating layer 15, and the insulating layer 15 fits into the recesses 121a of the insulating layer 12a. Therefore, the multilayer substrate 100d has a cross-sectional shape similar to that shown in Figure 2, except that in the second regions AR1 and AR3, the plurality of fifth ground electrodes 35 and the first ground electrode 31 are connected by a plurality of second connecting conductors 62a.

[0130] Furthermore, in the first region AR2, the recess 121a of the insulating layer 12a corresponding to the through hole 121 functions as a thickness change portion. Therefore, except that the multiple fifth ground electrodes 35 and the first ground electrode 31 are connected by multiple second connecting conductors 62a, the cross-sectional shape of the multilayer substrate 100d is the same as the shape shown in Figures 3 to 5.

[0131] Therefore, the multilayer substrate 100d according to Embodiment 4 also provides the same effects as the multilayer substrate 100 according to Embodiment 1.

[0132] (Embodiment 5) The multilayer substrate 100e according to Embodiment 5 will be described with reference to Figures 15 and 16. With respect to the multilayer substrate 100e according to Embodiment 5, components that are the same as those in the multilayer substrate 100 according to Embodiment 1 (see Figures 1 to 10) are denoted by the same reference numerals and their description is omitted.

[0133] The multilayer substrate 100e according to Embodiment 5 differs from the multilayer substrate 100 according to Embodiment 1 in that it further comprises adhesive layers 72 to 77.

[0134] Each of the adhesive layers 72 to 77 adheres two insulating layers from among the multiple insulating layers 11 to 17 that are adjacent in the thickness direction of the laminated substrate 1.

[0135] As shown in Figure 15, the adhesive layer 72 is positioned between the insulating layer 11 and the insulating layer 12. The two main surfaces of the adhesive layer 72 are in contact with the insulating layer 11 and the insulating layer 12, respectively. The adhesive layer 72 has the same shape as, for example, the second main surface 125 of the insulating layer 12 (see Figure 6). The adhesive layer 72 has multiple through holes corresponding to the multiple via holes and through holes 121 of the insulating layer 12 (see Figure 6). In a plan view from the thickness direction of the laminated substrate 1, the multiple through holes of the adhesive layer 72 and the multiple via holes and through holes 121 of the insulating layer 12 overlap. Multiple first connecting conductors 61 pass through the adhesive layer 72 by passing through one of the multiple through holes of the adhesive layer 72.

[0136] The adhesive layer 73 is positioned between the insulating layer 11 or 12 and the insulating layer 13. The two main surfaces of the adhesive layer 73 are in contact with the insulating layer 11 or 12 and the insulating layer 13, respectively. The adhesive layer 73 has the same shape as, for example, the second main surface 135 of the insulating layer 13 (see Figure 6). The adhesive layer 73 has multiple through holes corresponding to the multiple via holes and two through holes 131 of the insulating layer 13 (see Figure 6). In a plan view from the thickness direction of the laminated substrate 1, the multiple through holes of the adhesive layer 73 and the multiple via holes and two through holes 131 of the insulating layer 13 overlap. Multiple second connecting conductors 62 pass through the adhesive layer 73 by passing through one of the multiple through holes of the adhesive layer 73.

[0137] The adhesive layer 74 is positioned between the insulating layer 13 and the insulating layer 14. The two main surfaces of the adhesive layer 74 are in contact with the insulating layer 13 and the insulating layer 14, respectively. The adhesive layer 74 has the same shape as, for example, the second main surface 145 of the insulating layer 14 (see Figure 6). The adhesive layer 74 has multiple through holes corresponding to the multiple via holes and two through holes 141 of the insulating layer 14 (see Figure 6). In a plan view from the thickness direction of the laminated substrate 1, the multiple through holes of the adhesive layer 74 and the multiple via holes and two through holes 141 of the insulating layer 14 overlap. Multiple sixth connecting conductors 66 pass through the adhesive layer 74 by passing through one of the multiple through holes of the adhesive layer 74.

[0138] The adhesive layer 75 is positioned between the insulating layer 13 or 14 and the insulating layer 15. The two main surfaces of the adhesive layer 75 are in contact with the insulating layer 13 or 14 and the insulating layer 15, respectively. The adhesive layer 75 has the same shape as, for example, the second main surface 155 of the insulating layer 15 (see Figure 6). The adhesive layer 75 has multiple through holes corresponding to the multiple via holes and two through holes 151 of the insulating layer 15 (see Figure 6). In a plan view from the thickness direction of the laminated substrate 1, the multiple through holes of the adhesive layer 75 and the multiple via holes and two through holes 151 of the insulating layer 15 overlap. Multiple third connecting conductors 63 pass through the adhesive layer 75 by passing through one of the multiple through holes of the adhesive layer 75.

[0139] The adhesive layer 76 is positioned between the insulating layer 13 or 15 and the insulating layer 16. The two main surfaces of the adhesive layer 76 are in contact with the insulating layer 13 or 15 and the insulating layer 16, respectively. The adhesive layer 76 has the same shape as, for example, the second main surface 165 of the insulating layer 16 (see Figure 6). The adhesive layer 76 has multiple through holes corresponding to the multiple via holes and two through holes 161 of the insulating layer 16 (see Figure 6). In a plan view from the thickness direction of the laminated substrate 1, the multiple through holes of the adhesive layer 76 and the multiple via holes and two through holes 161 of the insulating layer 16 overlap. Multiple fourth connecting conductors 64 pass through the adhesive layer 76 by passing through one of the multiple through holes of the adhesive layer 76.

[0140] The adhesive layer 77 is positioned between the insulating layer 16 and the insulating layer 17. The two main surfaces of the adhesive layer 77 are in contact with the insulating layer 16 and the insulating layer 17, respectively. The adhesive layer 77 has the same shape as, for example, the second main surface 175 of the insulating layer 17 (see Figure 6). The adhesive layer 77 has multiple through holes corresponding to the multiple via holes of the insulating layer 17. In a plan view from the thickness direction of the laminated substrate 1, the multiple through holes of the adhesive layer 77 and the multiple via holes of the insulating layer 16 overlap. Multiple fifth connecting conductors 65 pass through the adhesive layer 77 by passing through one of the multiple through holes of the adhesive layer 77.

[0141] In the first step of the manufacturing method for the multilayer substrate 100e, an adhesive layer 72 having multiple through holes is placed on the second main surface 125 of the insulating layer 12 of the second single-sided copper-clad film L2 according to Embodiment 1, thereby forming the second single-sided copper-clad film L2. Similarly, an adhesive layer 73 having multiple through holes is placed on the second main surface 135 of the insulating layer 13 of the third single-sided copper-clad film L3 according to Embodiment 1, thereby forming the third single-sided copper-clad film L3. Similarly, an adhesive layer 74 having multiple through holes is placed on the second main surface 145 of the insulating layer 14 of the fourth single-sided copper-clad film L4 according to Embodiment 1, thereby forming the fourth single-sided copper-clad film L4. Similarly, an adhesive layer 75 having multiple through holes is placed on the second main surface 155 of the insulating layer 15 of the fifth single-sided copper-clad film L5 according to Embodiment 1, thereby forming the fifth single-sided copper-clad film L5. Similarly, an adhesive layer 76 with multiple through holes is provided on the second main surface 165 of the insulating layer 16 of the sixth single-sided copper-clad film L6 according to Embodiment 1, thereby forming the sixth single-sided copper-clad film L6. Similarly, an adhesive layer 77 with multiple through holes is provided on the second main surface 175 of the insulating layer 17 of the seventh single-sided copper-clad film L7 according to Embodiment 1, thereby forming the seventh single-sided copper-clad film L7.

[0142] The second step of the method for manufacturing the multilayer substrate 100e is the same as the second step of the method for manufacturing the multilayer substrate 100. This produces a multilayer substrate 100e having the same configuration as the multilayer substrate 100 according to Embodiment 1.

[0143] Therefore, the multilayer substrate 100e according to Embodiment 5 also provides the same effects as the multilayer substrate 100 according to Embodiment 1. Furthermore, in the multilayer substrate 100e according to Embodiment 5, the material of the insulating layers 11 to 17 does not have to be a thermoplastic resin, as long as it is a flexible resin.

[0144] (Embodiment 6) The multilayer substrate 100f according to Embodiment 6 will be described with reference to Figures 17 to 19. With respect to the multilayer substrate 100f according to Embodiment 6, components that are the same as those in the multilayer substrate 100 according to Embodiment 1 (see Figures 1 to 10) are denoted by the same reference numerals and their description is omitted.

[0145] The multilayer substrate 100f according to Embodiment 6 differs from the multilayer substrate 100 according to Embodiment 1 in that the position of the first signal line 21 in the thickness direction of the laminated substrate 1 is different in the first region AR2 (see Figure 1) and the second regions AR1, AR3 (see Figure 1), while the position of the second signal line 22 in the thickness direction of the laminated substrate 1 is the same in the first region AR2 and the second regions AR1, AR3.

[0146] In the multilayer substrate 100f according to Embodiment 6, the insulating layer 12 (see Figures 6 and 7) does not have through holes 121. The multiple sixth ground electrodes 33 are formed so as to overlap with the two fifth ground electrodes 35 in a plan view from the thickness direction of the laminated substrate 1, even in the first region AR2.

[0147] Furthermore, in the multilayer substrate 100f according to Embodiment 6, it is preferable that the thickness of the insulating layer 16 (see Figures 6 and 7) is at least twice the thickness of the insulating layer 14 and the insulating layer 15. Also, the through-hole 161 penetrates the insulating layer 16.

[0148] As a result, in the multilayer substrate 100f according to this embodiment, multiple sixth ground electrodes 33 exist even in the first region AR2. Furthermore, the distance in the thickness direction of the laminated substrate 1 between the first ground electrode 31 and the second signal line 22 and the two fifth ground electrodes 35 does not change between the first region AR2 and the second regions AR1 and AR3. In addition, in the multilayer substrate 100f according to this embodiment, two layers, insulating layer 15 and insulating layer 14, are embedded in the through hole 161 in the first region AR2. As a result, there is no difference in the thickness of the multiple insulating layers laminated in the first region AR2 and the second regions AR1 and AR3.

[0149] Therefore, as shown in Figure 17, the cross-section of the first region AR2 of the multilayer substrate 100f has the third ground electrode 37 positioned between the first signal line 21 and the second signal line 22. Also, as shown in Figure 18, in the first signal line 21, the difference in position in the thickness direction of the laminated substrate 1 between the first region AR2 and the second regions AR1 and AR3 is greater than in the multilayer substrate 100 according to Embodiment 1. On the other hand, as shown in Figure 19, in the second signal line 22, the position in the thickness direction of the laminated substrate 1 is the same between the first region AR2 and the second regions AR1 and AR3.

[0150] Therefore, the multilayer substrate 100f according to Embodiment 6 also provides the same effects as the multilayer substrate 100 according to Embodiment 1.

[0151] (Embodiment 7) The multilayer substrate 100g according to Embodiment 7 will be described with reference to Figures 20 and 21. With respect to the multilayer substrate 100g according to Embodiment 7, components similar to those in the multilayer substrate 100b according to Embodiment 3 are denoted by the same reference numerals and their description is omitted. Note that the exploded view in Figure 21 is not a disassembled view of the multiple insulating layers constituting the laminated substrate 1, but rather a diagram showing cross-sections along the main surfaces L1b and L5b of the laminated substrate 1, and along virtual surfaces L2b, L3b, and L4b that are arranged at equal intervals in the thickness direction of the laminated substrate 1 between the main surfaces L1b and L5b.

[0152] The multilayer substrate 100g according to Embodiment 7 differs from the multilayer substrate 100b according to Embodiment 3 in that it has multiple (three in Figure 21) signal electrodes 39c instead of multiple signal electrodes 39b, and has connecting conductors 69a and 69c instead of multiple signal electrodes 38a, multiple signal electrodes 38b, multiple connecting conductors 67a, multiple connecting conductors 67b, multiple connecting conductors 68a, and multiple connecting conductors 68b.

[0153] As shown in Figure 21, the multiple signal electrodes 39a are arranged on the laminated substrate 1. The multiple signal electrodes 39a and the first ground electrode 31 are arranged on the insulating layer 11b having the same main surface L1b of the laminated substrate 1.

[0154] Furthermore, as shown in Figure 21, the multiple signal electrodes 39c are arranged on the laminated substrate 1. The multiple signal electrodes 39c and the second ground electrode 32 are arranged on the insulating layer 15b having the same main surface L5b of the laminated substrate 1.

[0155] The first signal line 21 and the second signal line 22 are arranged on an insulating layer 13b having a virtual plane L3b in the portion that overlaps with the first ground electrode 31 and the second ground electrode 32 when viewed from the thickness direction of the laminated substrate 1.

[0156] On the other hand, the first signal line 21 is arranged on an insulating layer 14b having a virtual surface L4b located between a virtual surface L3b and a main surface L5b in the portion that overlaps with the multiple signal electrodes 39c in a plan view from the thickness direction of the laminated substrate 1. Such a configuration can be realized, for example, by providing through holes in the insulating layer 16 (see Figure 6) in the portion that overlaps with the multiple signal electrodes 39c in a plan view from the thickness direction of the laminated substrate 1, and not providing through holes 141 in the insulating layer 14 in the portion that overlaps with the multiple signal electrodes 39c in a plan view from the thickness direction of the laminated substrate 1.

[0157] Furthermore, the second signal line 22 is positioned on an insulating layer 12b having a virtual surface L2b located between a virtual surface L3b and a main surface L5b in the portion that overlaps with the multiple signal electrodes 39a in a plan view from the thickness direction of the laminated substrate 1. Such a configuration can be realized, for example, by providing through holes in the insulating layer 12 (see Figure 6) in the portion that overlaps with the multiple signal electrodes 39a in a plan view from the thickness direction of the laminated substrate 1, and by not providing through holes 141 in the insulating layer 14 in the portion that overlaps with the multiple signal electrodes 39a in a plan view from the thickness direction of the laminated substrate 1.

[0158] The connecting conductor 69a connects the signal electrode 39a to the second signal line 22.

[0159] The connecting conductor 69c connects the signal electrode 39c to the first signal line 21.

[0160] According to the above configuration, the signal electrode 39c connected to the first signal line 21 and the signal electrode 39a connected to the second signal line 22 can be arranged on different main surfaces of the multilayer substrate 100g. Therefore, the degree of freedom in the relative positional relationship between the multilayer substrate 100g, the electronic components 510-530 and the mounting substrate 540 in the electronic devices 500 and 500a is improved. Consequently, this is effective in miniaturizing the electronic devices 500 or 500a.

[0161] (Modifications) Embodiments 1 to 7 described above are merely one of many embodiments of the present invention. Embodiments 1 to 7 described above can be modified in various ways depending on the design, etc., as long as the objective of the present invention is achieved, and may be combined as appropriate.

[0162] For example, in multilayer substrates 100b to 100g, similar to multilayer substrate 100a, either the first signal line 21 or the second signal line 22 may be a differential line. Also, in multilayer substrate 100a, either the third signal line 21b or the fourth signal line 22b may be omitted, and only one differential line may be provided.

[0163] Furthermore, in multilayer substrates 100 to 100 g, the first signal line 21 and the second signal line 22 intersect when viewed from the thickness direction of the laminated substrate 1 in plan view. However, they do not need to intersect as long as there are overlapping and non-overlapping portions of the first signal line 21 and the second signal line 22.

[0164] Furthermore, in the multilayer substrate 100d, similar to the insulating layer 12a, a single insulating layer having protrusions and recesses may be provided instead of the insulating layers 15 and 16.

[0165] 1. Laminated substrate 101. First main surface of the laminated substrate 102. Second main surface of the laminated substrate 11. Insulating layer 114. First main surface of the insulating layer 115. Second main surface of the insulating layer 12. Insulating layer (first insulating layer) 121. Through hole (thickness change portion) 12a. Insulating layer (first insulating layer) 121a. Recess (thickness change portion) 122a. Protrusion 124. First main surface of the insulating layer 125. Second main surface of the insulating layer 13. Insulating layer 131. Through hole 134. First main surface of the insulating layer 135. Second main surface of the insulating layer 14. Insulating layer (second insulating layer) 141. Through hole 144. First main surface of the insulating layer 145. Second main surface of the insulating layer 15. Insulating layer 151. Through hole 154. First main surface of the insulating layer 155. Second main surface of the insulating layer 16 Insulating layer 161 Through hole 164 First main surface of insulating layer 165 Second main surface of insulating layer 17 Insulating layer 174 First main surface of insulating layer 175 Second main surface of insulating layer 11b, 12b, 13b, 14b, 15b Insulating layer 21, 21a First signal line 21b Third signal line 211 First part of first signal line 212 Second part of first signal line 213 Third part of first signal line 22, 22a Second signal line 22b Fourth signal line 221 First part of second signal line 222 Second part of second signal line 223 Third part of second signal line 30a Radiating electrode 31 First ground electrode 32 Second ground electrode 33 Sixth ground electrode 34 Fourth ground electrode 35, 35a Fifth ground electrode 36 Seventh ground electrode 37 Third ground electrode (ground electrode) 38a, 38b Signal electrodes 39a, 39b, 39c Signal electrodes 61 First connecting conductor 62, 62a Second connecting conductor 63 Third connecting conductor 64 Fourth connecting conductor 65 Fifth connecting conductor 66 Sixth connecting conductor 67a, 67b Connecting conductor 68a, 68b Connecting conductor 69a, 69c Connecting conductor 73, 74, 75, 76, 77 Adhesive layer 100, 100a, 100b, 100c, 100d, 100e, 100f, 100g Multilayer substrate 500, 500a Electronic equipment 510, 520, 530 Electronic components 540 Mounting board 550 High-frequency module 551 Resin layer 552 Columnar electrode 553 Bump AR1 2nd areaAR2 First region AR3 Second region L1 First single-sided copper-clad film L2, L2a Second single-sided copper-clad film L3 Third single-sided copper-clad film L4 Fourth single-sided copper-clad film L5 Fifth single-sided copper-clad film L6 Sixth single-sided copper-clad film L7 Seventh single-sided copper-clad film L1b Main surface L2b Virtual surface L3b Virtual surface L4b Virtual surface L5b Main surface

Claims

1. A laminated substrate having a plurality of insulating layers stacked on top of each other; a first signal line disposed within the laminated substrate; a second signal line disposed within the laminated substrate; and a ground electrode disposed within the laminated substrate, comprising: a first region including a portion where the first signal line and the second signal line overlap in a plan view from the thickness direction of the laminated substrate; and a second region not including a portion where the first signal line and the second signal line overlap in a plan view from the thickness direction of the laminated substrate; wherein the plurality of insulating layers include a first insulating layer having a thickness variation portion formed in the first region or the second region; the thickness variation portion is a portion of the first insulating layer whose thickness is thinner than the thickness of the laminated substrate in a portion of the first insulating layer other than the thickness variation portion, or a through hole penetrating in the thickness direction of the laminated substrate; and in the first region, the ground electrode is located between the first signal line and the second signal line. A multilayer substrate in which at least one of the first signal line and the second signal line is curved toward the thickness change portion of the first insulating layer in the thickness direction of the laminated substrate, so that the positions in the thickness direction of the laminated substrate are different in the first region and the second region.

2. In a plan view from the thickness direction of the laminated substrate, the first signal line or the second signal line overlaps with the thickness change portion of the first insulating layer, as described in claim 1.

3. The multilayer substrate according to claim 1 or 2, wherein the thickness-changing portion of the first insulating layer has a tapered shape in which the cross-sectional area intersecting the thickness direction of the laminated substrate is wider the closer it is to the ground electrode.

4. The multilayer substrate according to any one of claims 1 to 3, wherein the material of the plurality of insulating layers includes a thermoplastic resin.

5. The multilayer substrate according to any one of claims 1 to 4, wherein at least one of the first signal line and the second signal line has a line width in the first portion located in the first region that is narrower than the line width in the second portion located in the second region.

6. The multilayer substrate according to claim 5, wherein at least one of the first signal line and the second signal line includes a tapered third portion between the first portion and the second portion.

7. The multilayer substrate according to any one of claims 1 to 6, wherein the plurality of insulating layers include a second insulating layer on which the ground electrode is located, and the width of the second insulating layer along a direction perpendicular to the direction in which the first region and the second region are aligned is equal to the width of the laminated substrate.

8. A multilayer substrate according to any one of claims 1 to 7, further comprising a third signal line disposed within the laminated substrate, wherein the first signal line and the third signal line constitute a differential line, and in a plan view from the thickness direction of the laminated substrate, the third signal line and the second signal line overlap in the first region but do not overlap in the second region, and in the first region, the ground electrode is located between the third signal line and the second signal line.

9. The multilayer substrate according to any one of claims 1 to 8, wherein the laminated substrate has a first main surface and a second main surface facing each other in the thickness direction of the laminated substrate, and the thickness variation portion is disposed between the first main surface and the second main surface of the laminated substrate and is separated from both the first main surface and the second main surface.

10. An electronic device comprising: a multilayer substrate according to any one of claims 1 to 9; and an electronic component disposed on the multilayer substrate.

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