Semiconductor test apparatus including multiple probe pins
The semiconductor test device addresses probe pin interference by using a configuration of alternating hole rows with wider second and third holes, ensuring stable and accurate semiconductor testing by allowing probe pins to penetrate at different locations.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- OKINS ELECTRONICS
- Filing Date
- 2025-08-21
- Publication Date
- 2026-06-04
AI Technical Summary
As the spacing between contact balls or contact pads on semiconductors becomes smaller, probe pins in semiconductor test devices interfere with each other during testing, leading to errors in electrical signals and deteriorating the quality of semiconductor testing.
A semiconductor test device with a configuration of first and second plates having alternating rows of holes for probe pins, where the second and third holes are spaced wider than the first holes, allowing first and second probe pins to be inserted at different locations without interference, with the first pins having a longer body length than the second pins.
Prevents interference between probe pins, ensuring stable and accurate semiconductor testing by allowing probe pins to penetrate at different locations, maintaining operational control and reducing signal errors.
Smart Images
Figure KR2025012726_04062026_PF_FP_ABST