Cut-off control circuit for switching power transistor, and driving chip for switching power transistor

Abstract

A cut-off control circuit for a switching power transistor, and a driving chip for a switching power transistor. The circuit comprises a first controllable switch, a voltage-drop measuring circuit and a switch controller; the first controllable switch is coupled to a switching power transistor, and when the first controllable switch is turned on, the switching power transistor is controlled to be turned off; the switch controller is used for receiving a forced turn-on signal output by the voltage-drop measuring circuit and an input turn-on signal, and, on the basis of the signal having the longest duration, controlling the on-time of the first controllable switch. The voltage-drop measuring circuit is used to determine a current output to the driven switching power transistor when the first controllable switch is turned on, so as to ensure that during switching the on / off state of the switching power transistor by turning off the first controllable switch, the output current is sufficiently low, thus reducing the oscillation voltage generated on parasitic inductance, and enabling full discharge of the voltage of capacitive loads, thereby improving the use safety and prolonging the service life of the driving chip for a switching power transistor.

Description

A switching power transistor cutoff control circuit and driver chip

[0001] This application claims priority to Chinese Patent Application No. 202411866298.4, filed on December 17, 2024, entitled "A Switching Power Transistor Cut-off Control Circuit and Driver Chip", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This invention relates to the field of power electronics technology, and in particular to a switching power transistor cutoff control circuit and a switching power transistor driver chip. Background Technology

[0003] Currently, there is parasitic inductance between the circuit driving the load (i.e., the switching power transistor) and the load. When the oscillating voltage generated by this inductance exceeds the withstand voltage of components in the circuit (such as transistors), it will damage the components. Furthermore, if the turn-off signal output by the circuit is too short, the voltage of the capacitive load may not be discharged, preventing the load from turning off. Therefore, how to reduce the impact of parasitic inductance between the control circuit and the switching power transistor on the driving of the switching power transistor, and improve the safety of the circuit and the lifespan of components, is an urgent problem to be solved. Summary of the Invention

[0004] The purpose of this invention is to provide a switching power transistor cutoff control circuit and driver chip to reduce the impact of parasitic inductance in the line between the control circuit and the switching power transistor on the driving of the switching power transistor, thereby improving the safety of the circuit and the lifespan of the components.

[0005] To solve the above-mentioned technical problems, the present invention provides a switching power transistor cutoff control circuit, comprising: a first controllable switch, a voltage drop detection circuit, and a switch controller;

[0006] The first controllable switch is coupled to the switching power transistor, and controls the switching power transistor to turn off when the first controllable switch is turned on.

[0007] The input terminal of the voltage drop detection circuit is controllably connected to the first controllable switch during the conduction phase of the first controllable switch, and the conduction voltage drop of the first controllable switch is detected during the connection; and when the conduction voltage drop of the first controllable switch is greater than or equal to the first reference voltage, a forced conduction signal is output until the conduction voltage drop of the first controllable switch is less than the second reference voltage;

[0008] The first input terminal of the switch controller is connected to the output terminal of the voltage drop detection circuit, and the output terminal of the switch controller is connected to the control terminal of the first controllable switch. The switch controller is used to receive the forced conduction signal and the input conduction signal, and to control the conduction time of the first controllable switch based on the signal with the longest duration.

[0009] On the other hand, the circuit also includes: an on-time controller;

[0010] The input terminal of the voltage drop detection circuit is connected to the first controllable switch through the on-time controller. The on-time controller controls the first controllable switch to be connected to the voltage drop detection circuit for all or part of the time it is in the on state.

[0011] On the other hand, the partial time is from when the first controllable switch is turned on until the on-state voltage drop of the first controllable switch reaches its peak value.

[0012] On the other hand, the partial time is the set time after the first controllable switch is turned on.

[0013] On the other hand, the voltage drop detection circuit includes: a comparator circuit and a reference voltage output circuit;

[0014] The first input terminal of the comparator circuit is connected to the voltage drop detection terminal through the on-time controller. The voltage drop detection terminal is the end of the first controllable switch that is connected to the control terminal of the switching power transistor. The on-time controller is used to connect the first input terminal of the comparator circuit to the voltage drop detection terminal when the first controllable switch is turned on.

[0015] The output terminal of the comparator circuit is connected to the control terminal of the reference voltage output circuit, and the first reference voltage output terminal and the second reference voltage output terminal of the reference voltage output circuit are both connected to the second input terminal of the comparator circuit.

[0016] The reference voltage output circuit is used to output a first reference voltage to the second input terminal of the comparator circuit when the comparator circuit outputs a first level signal, and to output a second reference voltage to the second input terminal of the comparator circuit when the comparator circuit outputs a second level signal.

[0017] The comparator circuit is used to output a first level signal when the voltage at the voltage drop detection terminal input to the first input terminal is greater than the first reference voltage or the second reference voltage input to the second input terminal; and to output a second level signal when the voltage at the voltage drop detection terminal input to the non-inverting input terminal is less than the first reference voltage or the second reference voltage input to the inverting input terminal.

[0018] The common terminal of the comparator circuit output and the control terminal of the reference voltage output circuit is connected as the output terminal of the voltage drop detection circuit and is connected to the first input terminal of the switch controller.

[0019] In another aspect, the comparator circuit includes: an operational amplifier; wherein the forced conduction signal is a high-level signal; the non-inverting input terminal of the operational amplifier is connected to the voltage drop detection terminal through the conduction controller, the inverting input terminal of the operational amplifier is connected to the first reference voltage output terminal and the second reference voltage output terminal of the reference voltage output circuit, and the output terminal of the operational amplifier is connected to the control terminal of the reference voltage output circuit;

[0020] The reference voltage output circuit is used to output a first reference voltage to the inverting input terminal of the operational amplifier when the operational amplifier outputs a high-level signal, and to output a second reference voltage to the inverting input terminal of the operational amplifier when the operational amplifier outputs a low-level signal.

[0021] On the other hand, the reference voltage output circuit includes: a first reference voltage circuit, a second reference voltage circuit, an inverter, a first reference voltage switch, and a second reference voltage switch;

[0022] Wherein, the control terminal of the second reference voltage switch serves as the control terminal of the reference voltage output circuit and is connected to the output terminal of the operational amplifier, and its common terminal is connected to the control terminal of the first reference voltage switch through the inverter; the inverting input terminal of the operational amplifier is connected to the first terminal of the first reference voltage circuit and the second reference voltage circuit respectively; the second terminals of the first reference voltage circuit and the second reference voltage circuit are grounded; the first reference voltage switch and the second reference voltage switch are turned on when a high-level signal is input to the control terminal and turned off when a low-level signal is input to the control terminal;

[0023] Specifically, the operational amplifier is configured to: output a low-level signal when the voltage at the voltage drop detection terminal input to the non-inverting input is less than the first reference voltage input to the inverting input; turn off the second reference voltage switch and turn on the first reference voltage switch, so that the first reference voltage provided by the first reference voltage circuit is input to the inverting input; output a high-level signal when the voltage at the voltage drop detection terminal input to the non-inverting input is greater than the first reference voltage input to the inverting input; turn on the second reference voltage switch and turn off the first reference voltage switch, so that the second reference voltage provided by the second reference voltage circuit is input to the inverting input; and output a low-level signal when the voltage at the voltage drop detection terminal input to the non-inverting input is less than the second reference voltage input to the inverting input, so that the first reference voltage switch is turned on and the second reference voltage switch is turned off, so that the first reference voltage provided by the first reference voltage circuit is input to the inverting input.

[0024] On the other hand, the circuit also includes: a second controllable switch;

[0025] The first end of the first controllable switch is connected to the power supply terminal through the second controllable switch. The common terminal of the first end of the first controllable switch and the second controllable switch is connected to the control terminal of the power transistor. The second end of the first controllable switch is connected to one end of the power transistor and grounded.

[0026] On the other hand, the switch controller is specifically used to receive the forced conduction signal, the input conduction signal and the minimum conduction time control signal, and to control the conduction time of the first controllable switch based on the signal with the longest time.

[0027] In addition, the present invention also provides a switching power transistor driver chip, including: the switching power transistor cutoff control circuit as described above.

[0028] The present invention provides a switching power transistor cutoff control circuit, comprising: a first controllable switch, a voltage drop detection circuit, and a switch controller; wherein, the first controllable switch is coupled to the switching power transistor, and controls the switching power transistor to cut off when the first controllable switch is turned on; the input terminal of the voltage drop detection circuit is controllably connected to the first controllable switch during the first controllable switch conduction phase, and detects the conduction voltage drop of the first controllable switch during connection; and when the conduction voltage drop of the first controllable switch is greater than or equal to a first reference voltage, outputs a forced conduction signal until the conduction voltage drop of the first controllable switch is less than a second reference voltage; the first input terminal of the switch controller is connected to the output terminal of the voltage drop detection circuit, and the output terminal of the switch controller is connected to the control terminal of the first controllable switch; the switch controller is used to receive the forced conduction signal and the input conduction signal, and controls the conduction time of the first controllable switch based on the signal with the longest duration;

[0029] As can be seen, this invention utilizes a voltage drop detection circuit to detect the current output to the driving power transistor when the first controllable switch is turned on. This ensures that the output current is sufficiently small when switching the power transistor's on / off state by turning off the first controllable switch, reducing the oscillating voltage generated on the parasitic inductance and effectively discharging the voltage of the capacitive load, preventing the load from failing to turn off. It also reduces the impact of parasitic inductance in the line between the control circuit and the power transistor on the power transistor's drive, thereby improving circuit safety and component lifespan. Furthermore, this invention also provides a power transistor driver chip, which also possesses the aforementioned beneficial effects. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0031] Figure 1 is a structural block diagram of a switching power transistor cutoff control circuit provided in an embodiment of the present invention;

[0032] Figure 2 is a structural block diagram of another switching power transistor cutoff control circuit provided in an embodiment of the present invention;

[0033] Figure 3 is a schematic diagram of the on-state voltage drop of a first controllable switch provided in an embodiment of the present invention;

[0034] Figure 4 is a structural block diagram of a switching power transistor driver chip provided in an embodiment of the present invention. Detailed Implementation

[0035] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0036] Please refer to Figure 1, which is a structural block diagram of a switching power transistor cutoff control circuit provided in an embodiment of the present invention. The circuit may include: a first controllable switch 10, a voltage drop detection circuit 20, and a switch controller 30;

[0037] The first controllable switch 10 is coupled to the switching power transistor, and the switching power transistor is turned off when the first controllable switch 10 is turned on.

[0038] The input terminal of the voltage drop detection circuit 20 is controllably connected to the first controllable switch 10 during the first controllable switch 10 conduction phase, and the conduction voltage drop of the first controllable switch 10 is detected during the connection; and when the conduction voltage drop of the first controllable switch 10 is greater than or equal to the first reference voltage, a forced conduction signal is output until the conduction voltage drop of the first controllable switch 10 is less than the second reference voltage.

[0039] The first input terminal of the switch controller 30 is connected to the output terminal of the voltage drop detection circuit 20, and the output terminal of the switch controller 30 is connected to the control terminal of the first controllable switch 10. The switch controller 30 is used to receive the forced conduction signal and the input conduction signal, and controls the conduction time of the first controllable switch 10 based on the signal with the longest duration.

[0040] It is understood that in this embodiment, the switch controller 30 can drive and control the switching power transistor to turn on and off (i.e., turn off) by controlling the first controllable switch 10 coupled to the switching power transistor. In other words, the switching power transistor can be turned off when the first controllable switch 10 is on and turned on when the first controllable switch 10 is off.

[0041] Correspondingly, the specific coupling connection method between the first controllable switch 10 and the switching power transistor in this embodiment can be set by the designer according to the practical scenario and user needs. For example, when the input terminal of the voltage drop detection circuit 20 is connected to the first controllable switch 10 during the conduction phase of the first controllable switch 10, the input terminal of the voltage drop detection circuit 20 can be connected to the first terminal of the first controllable switch 10, and the common terminal can be connected to the control terminal of the switching power transistor. This common terminal can be used as a voltage drop detection terminal for detecting the conduction voltage drop of the first controllable switch 10, so that the voltage drop detection circuit 20 can detect the conduction voltage drop (i.e., voltage) of the first controllable switch 10 through the voltage drop detection terminal, determine the current driving the switching power transistor when the first controllable switch 10 is turned on, and thus control the conduction and cutoff of the switching power transistor accordingly. For example, as shown in Figure 2, the first terminal of the first controllable switch 10 (T2) is connected to the power supply terminal (VCC) through the second controllable switch (T1). The common terminal of the first terminal of the first controllable switch 10 and the second controllable switch is connected to the control terminal of the switching power transistor. The second terminal of the first controllable switch 10 is connected to one end of the switching power transistor and grounded. Correspondingly, the first terminal of the first controllable switch 10 can also be directly connected to the power supply terminal or the output terminal of an external power supply circuit, and the second terminal of the first controllable switch 10 can also be grounded through other circuit elements (such as resistors). This embodiment does not impose any restrictions on this.

[0042] It should be noted that the voltage drop detection circuit 20 in this embodiment can be used to output a corresponding safety drive signal based on the comparison between the on-state voltage drop of the first controllable switch 10 and the first reference voltage and the second reference voltage. When the on-state voltage drop is greater than or equal to the first reference voltage, a safety drive signal (i.e., a forced on-state signal) is output to control the first controllable switch 10 to conduct until the on-state voltage drop is less than the second reference voltage, thereby ensuring that the current driving the switching power transistor is sufficiently small when the first controllable switch 10 is turned off; when the on-state voltage drop is less than the second reference voltage, a safety drive signal is output to control the first controllable switch 10 to turn off. In other words, the voltage drop detection circuit 20 can output a safety drive signal as a forced on-state signal when the voltage at the voltage drop detection terminal (i.e., the on-state voltage drop) is greater than or equal to the first reference voltage, controlling the first controllable switch 10 to conduct, thereby reducing the voltage at the voltage drop detection terminal; when the voltage at the subsequent voltage drop detection terminal is less than the second reference voltage, the output safety drive signal is adjusted to a turn-off signal, so that the first controllable switch 1020 can maintain conduction or switch off according to the control requirements of the switching power transistor. This embodiment does not impose any limitations on this.

[0043] Correspondingly, in this embodiment, the first reference voltage can be greater than the second reference voltage to ensure that the current driving the power transistor is sufficiently small when the first controllable switch 10 is turned off. In this embodiment, the input terminal of the voltage drop detection circuit 20 can be controllably connected to the first controllable switch 10 during the first controllable switch 10's conduction phase to detect the conduction voltage drop of the first controllable switch 10 during connection. As shown in Figure 2, the switching power transistor cutoff control circuit provided in this embodiment may further include a conduction time controller; wherein, the input terminal of the voltage drop detection circuit 20 is connected to the first controllable switch 10 through the conduction time controller, and the conduction time controller controls the first controllable switch 10 to be connected to the voltage drop detection circuit 20 for all or part of the time when it is in the conduction state; that is, the input terminal of the voltage drop detection circuit 20 can be connected to one end of the first controllable switch 10 as the voltage drop detection terminal (i.e., the end connected to the control terminal of the switching power transistor) through the conduction time controller, so that the input terminal of the voltage drop detection circuit 20 can be connected to the first controllable switch 10 for all or part of the time when the first controllable switch 10 is in the conduction state, thereby detecting the conduction voltage drop of the first controllable switch 10.

[0044] Accordingly, the specific on-time of the aforementioned on-time controller can be set by the designer according to the practical scenario and user requirements. For example, the on-time controller can be on simultaneously with the first controllable switch 10 being on, and the on-time of the on-time controller can be less than or equal to the on-time of the first controllable switch 10. For instance, the on-time of the on-time controller can be the same as the on-time of the first controllable switch 10, so that the input terminal of the voltage drop detection circuit 20 can be connected to the first controllable switch 10 for the entire time the first controllable switch 10 is in the on state. The on-time controller can also be on for a pre-set time (e.g., 20ns), meaning that the aforementioned partial time can be the set time period after the first controllable switch 10 is on. The on-time controller can also be on during the period from when the first controllable switch 10 is on until the on-state voltage drop of the first controllable switch 10 reaches its peak value, meaning that the aforementioned partial time can be from when the first controllable switch 10 is on until the on-state voltage drop of the first controllable switch 10 reaches its peak value.

[0045] For example, the on-state voltage drop of the first controllable switch 10 can be as shown in Figure 3. The on-time controller can turn on the first controllable switch 10 simultaneously with its on-state and turn it off when the on-state voltage drop of the first controllable switch 10 reaches its peak value (point A in Figure 3), thereby improving the accuracy of control. For instance, by differentiating the difference between two consecutive detected on-state voltage drops, the moment when the on-state voltage drop of the first controllable switch 10 reaches its peak value can be determined. For example, if the derivative result is 0, the on-state voltage drop of the first controllable switch 10 is determined to have reached its peak value.

[0046] The specific circuit structure of the voltage drop detection circuit 20 in this embodiment can be set by the designer. For example, the voltage drop detection circuit 20 may include a comparator circuit, used to compare the on-state voltage drop of the first controllable switch input at the first input terminal with the first reference voltage or the second reference voltage input at the second input terminal; when the on-state voltage drop is greater than the first reference voltage or the second reference voltage, a first level signal (i.e., a forced conduction signal) is output to the first input terminal of the switch controller 30; when the on-state voltage drop is less than the first reference voltage or the second reference voltage, a second level signal is output. Accordingly, when the comparator circuit outputs the first level signal, the second input terminal of the comparator circuit can input the second reference voltage; when the comparator circuit outputs the second level signal, the second input terminal of the comparator circuit can input the first reference voltage.

[0047] Correspondingly, to achieve automatic switching between the first reference voltage and the second reference voltage input to the second input terminal of the comparator circuit, the voltage drop detection circuit 20 may also include: a comparator circuit and a reference voltage output circuit; wherein, the first input terminal of the comparator circuit is connected to the voltage drop detection terminal through a conduction controller, and the voltage drop detection terminal is the end of the first controllable switch 10 used to connect to the control terminal of the switching power transistor; the conduction time controller is used to connect the first input terminal of the comparator circuit to the voltage drop detection terminal when the first controllable switch 10 is turned on; the output terminal of the comparator circuit is connected to the control terminal of the reference voltage output circuit, and the first reference voltage output terminal and the second reference voltage output terminal of the reference voltage output circuit are both connected to the second input terminal of the comparator circuit; the reference voltage output... The circuit is used to output a first reference voltage to the second input terminal of the comparator circuit when the comparator circuit outputs a first level signal; and to output a second reference voltage to the second input terminal of the comparator circuit when the comparator circuit outputs a second level signal. The comparator circuit is used to output a first level signal when the voltage (i.e., the on-state voltage drop) at the voltage drop detection terminal input at the first input terminal is greater than the first or second reference voltage input at the second input terminal; and to output a second level signal when the voltage at the voltage drop detection terminal input at the non-inverting input terminal is less than the first or second reference voltage input at the inverting input terminal. The common terminal of the comparator circuit output terminal and the control terminal of the reference voltage output circuit is connected as the output terminal of the voltage drop detection circuit 20 and connected to the first input terminal of the switch controller 30.

[0048] For example, the comparator circuit described above may include an operational amplifier; wherein, when the forced conduction signal is a high-level signal, the non-inverting input of the operational amplifier is connected to the voltage drop detection terminal through a conduction controller, the inverting input of the operational amplifier is connected to the first reference voltage output terminal and the second reference voltage output terminal of the reference voltage output circuit, and the output terminal of the operational amplifier is connected to the control terminal of the reference voltage output circuit; the reference voltage output circuit is used to output the first reference voltage to the inverting input terminal of the operational amplifier when the operational amplifier outputs a high-level signal, and to output the second reference voltage to the inverting input terminal of the operational amplifier when the operational amplifier outputs a low-level signal. Correspondingly, when the forced conduction signal is a low-level signal, it can be set in a manner corresponding to the above connection method. As long as the reference voltage output circuit can switch the voltage output to the operational amplifier from the first reference voltage to the second reference voltage when the on-state voltage drop of the first controllable switch 10 is greater than or equal to the first reference voltage, the operational amplifier can output a forced conduction signal (i.e., the first level signal mentioned above) when the on-state voltage drop of the first controllable switch 10 is greater than or equal to the first reference voltage, until the on-state voltage drop of the first controllable switch 10 is less than the second reference voltage. This embodiment does not impose any restrictions on this.

[0049] Accordingly, as shown in Figure 2, the reference voltage output circuit may include: a first reference voltage circuit, a second reference voltage circuit, an inverter (U2), a first reference voltage switch (S2), and a second reference voltage switch (S1); wherein, the control terminal of the second reference voltage switch serves as the control terminal of the reference voltage output circuit and is connected to the output terminal of the operational amplifier, and its common terminal is connected to the control terminal of the first reference voltage switch through the inverter; the inverting input terminal of the operational amplifier is connected to the first terminal of the first reference voltage circuit and the first reference voltage circuit respectively; the second terminals of the first reference voltage circuit and the second reference voltage circuit are grounded; the first reference voltage switch and the second reference voltage switch are used to conduct when a high-level signal is input to the control terminal and to turn off when a low-level signal is input to the control terminal; the operational amplifier is specifically used to detect the voltage drop input at the non-inverting input terminal. When the voltage at the non-inverting input terminal is less than the first reference voltage (VREF2) input to the inverting input terminal, a low-level signal is output to turn off the second reference voltage switch and turn on the first reference voltage switch, so that the inverting input terminal receives the first reference voltage provided by the first reference voltage circuit; when the voltage at the voltage drop detection terminal input to the non-inverting input terminal is greater than the first reference voltage input to the inverting input terminal, a high-level signal is output to turn on the second reference voltage switch and turn off the first reference voltage switch, so that the inverting input terminal receives the second reference voltage (VREF1) provided by the second reference voltage circuit; when the voltage at the voltage drop detection terminal input to the non-inverting input terminal is less than the second reference voltage input to the inverting input terminal, a low-level signal is output to turn on the first reference voltage switch and turn off the second reference voltage switch, so that the inverting input terminal receives the first reference voltage provided by the first reference voltage circuit.

[0050] It is understood that in this embodiment, the switch controller 30 can output a corresponding final drive signal to the control terminal of the first controllable switch 10 based on the input first control signal for controlling the on / off state of the switching power transistor and the safety drive signal output by the voltage drop detection circuit 20, thereby driving the first controllable switch 10 to turn on and off, and correspondingly controlling the on / off state of the switching power transistor. The first control signal is an externally input control signal (VIN in Figure 2) used to control the on / off state of the switching power transistor through the switching power transistor cutoff control circuit; the final drive signal can be the drive signal ultimately output by the switch controller 30 to the control terminal of the first controllable switch 10. In other words, the switch controller 30 can control the on / off state of the first controllable switch 10 based on the input first control signal and the safety drive signal, thereby adjusting the voltage at the voltage drop detection terminal of the switching power transistor cutoff control circuit, i.e., the voltage (or current) output to the control terminal of the switching power transistor, and correspondingly driving the switching power transistor to turn on and off. That is, in this embodiment, the second input terminal of the switch controller 30 can be connected to the output terminal of the input on signal (such as the first control signal output terminal).

[0051] Correspondingly, when the switch controller 30 receives the forced conduction signal and the input conduction signal, it can use the signal with the longest duration to control the conduction time of the first controllable switch 10. That is, when the safety drive signal is the forced conduction signal, regardless of whether the first control signal drives the first controllable switch 10 to conduct as an input conduction signal or drives the first controllable switch 10 to turn off as an input turn-off signal, the final drive signal output by the switch controller 30 is the conduction signal, so as to maintain the conduction of the first controllable switch 10 and reduce the voltage at the voltage drop detection terminal.

[0052] Furthermore, in some embodiments, the switch controller 30 may specifically receive a forced turn-on signal, an input turn-on signal, and a minimum turn-on time control signal, and control the turn-on time of the first controllable switch 10 based on the signal with the longest time; wherein, the minimum turn-on time control signal may be a signal used to control the turn-on time of the first controllable switch 10 to be greater than or equal to a preset time. That is, the third input terminal of the switch controller 30 may be connected to the output terminal of the minimum turn-on time control signal, and the input of the minimum turn-on time control signal may be controlled by the switch controller 30 to ensure that the turn-on time of the first controllable switch 10 (i.e., the turn-off time of the switching power transistor) is greater than or equal to the specified minimum time (i.e., the preset time).

[0053] As shown in Figure 2, the switching power transistor cutoff control circuit provided in this embodiment may further include a minimum turn-off time controller, used to output a minimum turn-on time control signal of a preset time to the switch controller 30. For example, the output terminal of the minimum turn-off time controller can be connected to the third input terminal of the switch controller 30. The switch controller 30 can output a corresponding final drive signal to the control terminal of the first controllable switch 10 according to the second control signal, the first control signal, and the safety drive signal output by the minimum turn-off time controller. That is, when the second control signal is the minimum turn-on time control signal for driving the first controllable switch 10 to turn on or the safety drive signal is a forced turn-on signal, regardless of whether the externally input first control signal for controlling the first controllable switch 10 is a turn-on signal (i.e., an input turn-on signal) or a turn-off signal, the final drive signal is controlled to be a turn-on signal to maintain the turn-on of the first controllable switch 10.

[0054] It should be noted that for the specific switching types of the first controllable switch 10, the second controllable switch, and the switching power transistor in this embodiment, they can be set by designers according to practical scenarios and user requirements. For example, the first controllable switch 10, the second controllable switch, and the switching power transistor can adopt power triodes, power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) transistors, IGBT (Insulated Gate Bipolar Transistor), etc. As shown in Figure 2, the first controllable switch 10 (T2) can be an NMOS transistor, and the second controllable switch (T1) can be a PMOS transistor; the drain of the second controllable switch is connected to the power supply terminal, the source of the second controllable switch is connected to the drain of the first controllable switch 10, the source of the first controllable switch 10 is grounded, and the gates of the second controllable switch and the first controllable switch 10 are connected to the output terminal of the switch controller 30 (such as the adder in Figure 2); the switching power transistor (T3) can be an NMOS transistor, and the common terminal where the source of the second controllable switch (T2) is connected to the drain of the first controllable switch 1020 (T1) serves as the voltage drop detection terminal and is connected to the gate of the switching power transistor. The source of the switching power transistor is grounded together with the source of the first controllable switch 10, so that the switching power transistor can be turned off when the first controllable switch 10 is turned on. This embodiment does not impose any restrictions on this.

[0055] For example, as shown in Figure 2, before the T2 transistor (i.e., the first controllable switch 10) is turned on, the reference voltage at the inverting input terminal of the operational amplifier U1 is VREF2 (i.e., the first reference voltage); when the T2 transistor is turned on, the external T3 transistor (i.e., the switching power transistor) is turned off; the Time Controller (conduction time controller) switch is also turned on simultaneously. At this time, the conduction voltage drop of the T2 transistor can be detected at the non-inverting input terminal of U1; there are two durations for controlling the on-time of the Time Controller. One is to turn on for 20 ns, and the other is to turn on during the conduction time of the T2 transistor; during the on-time of the Time Controller, if the conduction voltage drop of the T2 transistor exceeds VREF2, the output of U1 will flip, and at the same time, the reference voltage at the inverting input terminal of U1 becomes VREF1 (i.e., the second reference voltage), and VREF1 < VREF2. In this way, the T2 transistor will be locked in the on state; only when the conduction voltage drop of the T2 transistor is less than VREF1, the output state of U1 will return to the original state, and at this time, the conduction of T2 will be released and controlled by other signals (such as the first control signal VIN and the second control signal of the minimum off-time controller Min Off Controller).

[0056] It should be noted that the switching power transistor cutoff control circuit provided in this embodiment can be set within the switching power transistor driver chip (such as a gate isolation driver chip) used to drive the switching power transistor to turn on and off. That is, the input turn-on signal input to the switch controller 30 can be an external control signal input to the switching power transistor driver chip for controlling the switching power transistor to turn off; in other words, the aforementioned first control signal can be an external control signal input to the switching power transistor driver chip for controlling the switching power transistor to turn on or off. For example, the switching power transistor cutoff control circuit shown in Figure 2 can be set within the gate isolation driver chip so that the gate isolation driver chip can control the first controllable switch 10 (T2) to turn on for the longest time based on the externally input turn-on signal, the generated forced turn-on signal, and the minimum turn-on time control signal, correspondingly controlling the cutoff time of the switching power transistor (T3) connected to the gate isolation driver chip. Correspondingly, the switching power transistor cutoff control circuit provided in this embodiment can also be directly applied to devices such as inverters, chargers, or motor drives, that is, the input turn-on signal input to the switch controller 30 can be a control signal directly input to the switch controller 30 from outside the circuit.

[0057] In this embodiment, the voltage drop detection circuit 20 detects the current output to the driving power transistor when the first controllable switch 10 is turned on. This ensures that when the power transistor is switched on and off by turning off the first controllable switch 10, the output current is small enough, reducing the oscillating voltage generated on the parasitic inductance. It also allows for sufficient discharge of the capacitive load voltage, preventing the load from failing to turn off. This reduces the impact of parasitic inductance between the control circuit and the power transistor on the driving of the power transistor, thereby improving the safety of the circuit and the lifespan of the components.

[0058] Corresponding to the circuit embodiment above, this embodiment of the invention also provides a switching power transistor driver chip. The switching power transistor driver chip described below and the switching power transistor cutoff control circuit described above can be referred to in correspondence.

[0059] Please refer to Figure 4, which is a structural block diagram of a switching power transistor driver chip provided in an embodiment of the present invention. The switching power transistor driver chip may include: a switching power transistor cutoff control circuit 100 as provided in the circuit embodiment above.

[0060] This embodiment does not limit the specific chip type of the switching power transistor driver chip. For example, the switching power transistor driver chip can be a gate isolation driver chip, or it can be other driver chips used in inverters, chargers, or motor drives to drive the switching power transistor.

[0061] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the chips disclosed in the embodiments, since they correspond to the circuits disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the circuit section description.

[0062] The foregoing has provided a detailed description of the switching power transistor cutoff control circuit and driver chip provided by this invention. Specific examples have been used to illustrate the principles and implementation methods of this invention. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of this invention. It should be noted that those skilled in the art can make various improvements and modifications to this invention without departing from its principles, and these improvements and modifications also fall within the protection scope of this invention.

Claims

1. A switching power transistor cutoff control circuit, characterized in that, include: First controllable switch, voltage drop detection circuit and switch controller; The first controllable switch is coupled to the switching power transistor, and controls the switching power transistor to turn off when the first controllable switch is turned on. The input terminal of the voltage drop detection circuit is controllably connected to the first controllable switch during the conduction phase of the first controllable switch, and the conduction voltage drop of the first controllable switch is detected during the connection; and when the conduction voltage drop of the first controllable switch is greater than or equal to the first reference voltage, a forced conduction signal is output until the conduction voltage drop of the first controllable switch is less than the second reference voltage; The first input terminal of the switch controller is connected to the output terminal of the voltage drop detection circuit, and the output terminal of the switch controller is connected to the control terminal of the first controllable switch. The switch controller is used to receive the forced conduction signal and the input conduction signal, and to control the conduction time of the first controllable switch based on the signal with the longest duration.

2. The switching power transistor cutoff control circuit according to claim 1, characterized in that, Also includes: On-time controller; The input terminal of the voltage drop detection circuit is connected to the first controllable switch through the on-time controller. The on-time controller controls the first controllable switch to be connected to the voltage drop detection circuit for all or part of the time it is in the on state.

3. The switching power transistor cutoff control circuit according to claim 2, characterized in that, The specified time period is from when the first controllable switch is turned on until the on-state voltage drop of the first controllable switch reaches its peak value.

4. The switching power transistor cutoff control circuit according to claim 2, characterized in that, The specified time period is the set time period after the first controllable switch is turned on.

5. The switching power transistor cutoff control circuit according to claim 2, characterized in that, The voltage drop detection circuit includes: a comparator circuit and a reference voltage output circuit; The first input terminal of the comparator circuit is connected to the voltage drop detection terminal through the on-time controller. The voltage drop detection terminal is the end of the first controllable switch that is connected to the control terminal of the switching power transistor. The on-time controller is used to connect the first input terminal of the comparator circuit to the voltage drop detection terminal when the first controllable switch is turned on. The output terminal of the comparator circuit is connected to the control terminal of the reference voltage output circuit, and the first reference voltage output terminal and the second reference voltage output terminal of the reference voltage output circuit are both connected to the second input terminal of the comparator circuit. The reference voltage output circuit is used to output a first reference voltage to the second input terminal of the comparator circuit when the comparator circuit outputs a first level signal, and to output a second reference voltage to the second input terminal of the comparator circuit when the comparator circuit outputs a second level signal. The comparator circuit is used to output a first level signal when the voltage at the voltage drop detection terminal input to the first input terminal is greater than the first reference voltage or the second reference voltage input to the second input terminal; and to output a second level signal when the voltage at the voltage drop detection terminal input to the non-inverting input terminal is less than the first reference voltage or the second reference voltage input to the inverting input terminal. The common terminal of the comparator circuit output and the control terminal of the reference voltage output circuit is connected as the output terminal of the voltage drop detection circuit and is connected to the first input terminal of the switch controller.

6. The switching power transistor cutoff control circuit according to claim 5, characterized in that, The comparator circuit includes: an operational amplifier; wherein the forced conduction signal is a high-level signal; the non-inverting input terminal of the operational amplifier is connected to the voltage drop detection terminal through the conduction controller, the inverting input terminal of the operational amplifier is connected to the first reference voltage output terminal and the second reference voltage output terminal of the reference voltage output circuit, and the output terminal of the operational amplifier is connected to the control terminal of the reference voltage output circuit; The reference voltage output circuit is used to output a first reference voltage to the inverting input terminal of the operational amplifier when the operational amplifier outputs a high-level signal, and to output a second reference voltage to the inverting input terminal of the operational amplifier when the operational amplifier outputs a low-level signal.

7. The switching power transistor cutoff control circuit according to claim 6, characterized in that, The reference voltage output circuit includes: a first reference voltage circuit, a second reference voltage circuit, an inverter, a first reference voltage switch, and a second reference voltage switch; Wherein, the control terminal of the second reference voltage switch serves as the control terminal of the reference voltage output circuit and is connected to the output terminal of the operational amplifier, and its common terminal is connected to the control terminal of the first reference voltage switch through the inverter; the inverting input terminal of the operational amplifier is connected to the first terminal of the first reference voltage circuit and the second reference voltage circuit respectively; the second terminals of the first reference voltage circuit and the second reference voltage circuit are grounded; the first reference voltage switch and the second reference voltage switch are turned on when a high-level signal is input to the control terminal and turned off when a low-level signal is input to the control terminal; Specifically, the operational amplifier is configured to: output a low-level signal when the voltage at the voltage drop detection terminal input to the non-inverting input is less than the first reference voltage input to the inverting input; turn off the second reference voltage switch and turn on the first reference voltage switch, so that the first reference voltage provided by the first reference voltage circuit is input to the inverting input; output a high-level signal when the voltage at the voltage drop detection terminal input to the non-inverting input is greater than the first reference voltage input to the inverting input; turn on the second reference voltage switch and turn off the first reference voltage switch, so that the second reference voltage provided by the second reference voltage circuit is input to the inverting input; and output a low-level signal when the voltage at the voltage drop detection terminal input to the non-inverting input is less than the second reference voltage input to the inverting input, so that the first reference voltage switch is turned on and the second reference voltage switch is turned off, so that the first reference voltage provided by the first reference voltage circuit is input to the inverting input.

8. The switching power transistor cutoff control circuit according to claim 1, characterized in that, Also includes: Second controllable switch; The first end of the first controllable switch is connected to the power supply terminal through the second controllable switch. The common terminal of the first end of the first controllable switch and the second controllable switch is connected to the control terminal of the power transistor. The second end of the first controllable switch is connected to one end of the power transistor and grounded.

9. The switching power transistor cutoff control circuit according to any one of claims 1 to 8, characterized in that, The switch controller is specifically used to receive the forced conduction signal, the input conduction signal, and the minimum conduction time control signal, and to control the conduction time of the first controllable switch based on the signal with the longest time.

10. A switching power transistor driver chip, characterized in that, include: The switching power transistor cutoff control circuit as described in any one of claims 1 to 9.

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