Back-contact solar cell, solar cell assembly, and photovoltaic system

Abstract

Provided in the present disclosure is a back-contact solar cell, comprising a silicon substrate having non-recessed regions and recessed regions alternately arranged on a rear surface thereof and having extensions protruding above the recessed regions at edges between the non-recessed regions and the recessed regions. A first dielectric layer and a first conductivity-type doped layer are stacked on the non-recessed regions and the extensions. A second dielectric layer comprises a first portion on the first conductivity-type doped layer and a second portion in the recessed regions. A second conductivity-type doped layer is stacked on the first portion and the second portion.

Description

Back contact batteries, battery modules and photovoltaic systems

[0001] Cross-reference to related applications

[0002] This disclosure claims priority to Chinese Patent Application No. 202411896505.0, filed on December 20, 2024, with the China National Intellectual Property Administration, entitled “A Back Contact Solar Cell, Battery Module and Photovoltaic System”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure belongs to the field of photovoltaic technology, and in particular relates to a back contact battery, battery module and photovoltaic system. Background Technology

[0004] In back-contact batteries, due to manufacturing limitations, there is often a height difference between two adjacent regions. This results in a sidewall between the two regions, where two doped layers of different polarities come into contact, forming a leakage path. These leakage paths significantly reduce the battery's series resistance (Rsh), thereby increasing the risk of leakage and severely impacting the battery's reliability and overall performance.

[0005] To address this issue, a common practice is to create grooves between two doped regions of different polarities to achieve physical isolation. While these grooves can prevent contact between the two polarity-selective contact layers to some extent, their fabrication is complex, requiring additional etching steps, which increases the difficulty and cost of manufacturing. The presence of grooves can also lead to localized stress concentration, increasing the risk of mechanical damage to the solar cell during manufacturing and use. Furthermore, grooves can affect the light propagation path, reducing the effective light-collecting area and thus negatively impacting the photoelectric conversion efficiency of the cell. Summary of the Invention

[0006] This disclosure provides a back-contact battery designed to address the problem that leakage current channels can cause a significant reduction in the series resistance of the battery without compromising photoelectric conversion efficiency.

[0007] This disclosure is achieved as follows: a back contact battery includes:

[0008] A silicon substrate having a backlight surface and a light-facing surface disposed opposite to each other, the backlight surface of the silicon substrate including a non-recessed area and a recessed area disposed alternately in a first direction, the non-recessed area and the recessed area extending along a second direction, the second direction intersecting the first direction; along the first direction, the silicon substrate having an extension portion extending and protruding above the recessed area at the edge of the non-recessed area and the recessed area.

[0009] A first dielectric layer is disposed on the surface of the non-recessed region and the light-facing surface of the extended portion facing away from the silicon substrate.

[0010] A first polar doped layer is disposed on the first dielectric layer;

[0011] The second dielectric layer includes a first portion disposed on the first polar doped layer and a second portion disposed on the bottom surface of the recessed region;

[0012] A second polar doped layer is disposed on the first portion and the second portion.

[0013] Optionally, the second dielectric layer further includes a wrapping portion connecting the first portion and the second portion. The wrapping portion includes a second wrapping portion disposed on the light-facing surface of the extension portion toward the silicon substrate and a third wrapping portion disposed on the sidewall of the extension portion, the first dielectric layer and the first polar doped layer along the first direction near the recessed region.

[0014] Optionally, a portion of the second polar doped layer is disposed on the third wrapping portion.

[0015] Optionally, a portion of the second polar doped layer is disposed on the second wrapping portion, and the thickness of the second polar doped layer located at the position of the second wrapping portion gradually increases along the extension protrusion direction of the extension portion.

[0016] Optionally, the wrapping portion further includes a first wrapping part, which is disposed on the sidewall of the recessed area.

[0017] Optionally, a portion of the second polar doped layer is disposed on the first wrapping portion, and the thickness of the second polar doped layer on the first wrapping portion gradually decreases in the direction approaching the extension portion.

[0018] Optionally, the bottom surface of the recessed area has a textured structure.

[0019] Optionally, the length of the extension portion along the first direction is 0.2 μm to 50 μm.

[0020] Optionally, the length of the extended portion along the first direction is 1μm-15μm.

[0021] Optionally, the sidewall of the recessed area is a slope.

[0022] Optionally, the angle between the inclined surface and the bottom surface of the recessed area is an acute angle.

[0023] Optionally, the angle between the inclined surface and the bottom surface of the recessed area is an obtuse angle.

[0024] This disclosure also provides a battery assembly including any of the aforementioned back-contact batteries.

[0025] This disclosure also provides a photovoltaic system including the aforementioned battery module.

[0026] The beneficial effects achieved by this disclosure are that, due to the alternating arrangement of non-recessed and recessed regions on the back surface of the silicon substrate, the recessed regions are lower than the non-recessed regions, and the silicon substrate has an extension portion extending above the recessed regions at the edges of the non-recessed and recessed regions. A first dielectric layer, a first polar doped layer, a second dielectric layer, and a second polar doped layer are stacked on the non-recessed regions and the extension portion. Under the shielding effect of the extension portion, the first polar doped layer material in the non-recessed regions and the second polar doped layer material in the recessed regions are effectively isolated, preventing leakage current. Attached Figure Description

[0027] Figure 1 is a schematic diagram of the structure of the first type of back contact battery provided in this disclosure;

[0028] Figure 2 is a schematic diagram of the structure of the second type of back contact battery provided in this disclosure;

[0029] Figure 3 is a schematic diagram of the structure of the third type of back contact battery provided in this disclosure;

[0030] Figure 4 is a structural schematic diagram of the fourth type of back contact battery provided in this disclosure;

[0031] Figure 5 is a schematic diagram of the SEM of the extended portion provided in this disclosure;

[0032] Figure 6 is an enlarged view of point A;

[0033] Figure 7 is a schematic diagram of several structures of the enclosed portion in this disclosure;

[0034] Figure 8 is a structural schematic diagram of the fifth type of back contact battery provided in this disclosure;

[0035] Figure 9 is a structural schematic diagram of the sixth type of back contact battery provided in this disclosure;

[0036] Figure 10 is a schematic diagram of the structure of the seventh type of back contact battery provided in this disclosure.

[0037] Explanation of reference numerals in the attached figures: 100, back contact cell; 101, non-recessed region; 102, recessed region; 110, silicon substrate; 111, extension portion; 120, first dielectric layer; 130, first polar doped layer; 140, second dielectric layer; 141, first portion; 142, second portion; 143, wrapping portion; 1431, first wrapping portion; 1432, second wrapping portion; 1433, third wrapping portion; 150, second polar doped layer; 160, passivation film layer; 170, first electrode; 180, second electrode. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this disclosure, and should not be construed as limiting this disclosure. Furthermore, it should be understood that the specific embodiments described herein are merely for explaining this disclosure and are not intended to limit this disclosure.

[0039] In the description of this disclosure, it should be understood that the terms “length”, “width”, “upper”, “lower”, “left”, “right”, “horizontal”, “top”, “bottom”, etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this disclosure and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this disclosure.

[0040] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this disclosure, "a plurality of" means two or more, unless otherwise explicitly specified.

[0041] In the description of this disclosure, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linkage" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this disclosure according to the specific circumstances.

[0042] In this disclosure, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0043] The following disclosure provides numerous different embodiments or examples for implementing various structures of this disclosure. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of this disclosure. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this disclosure, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0044] In this embodiment, the present disclosure involves alternating non-recessed and recessed regions on the back surface of a silicon substrate. The recessed regions are lower than the non-recessed regions, and the silicon substrate has an extension portion extending beyond the recessed regions at the edges of the non-recessed and recessed regions. A first dielectric layer, a first polar doped layer, a second dielectric layer, and a second polar doped layer are stacked on the non-recessed regions and the extension portion. A second dielectric layer and a second polar doped layer are stacked on the recessed regions. The second polar doped layer and the first polar doped layer form a leakage contact, reducing the high thermal risk of hot spot effects. Simultaneously, the shielding effect of the extension portion effectively isolates the materials of the first polar doped layer in the non-recessed regions and the second polar doped layer in the recessed regions, preventing leakage.

[0045] Example 1

[0046] As shown in Figure 8, this embodiment provides a back contact battery 100, including:

[0047] A silicon substrate 110 has a backlight surface and a light-facing surface disposed opposite to each other. A non-recessed region 101 and a recessed region 102 are alternately disposed on the backlight surface of the silicon substrate 110. The distance between the bottom surface of the recessed region 102 and the light-facing surface is less than the distance between the bottom surface of the non-recessed region 101 and the light-facing surface. In the arrangement direction of the non-recessed region 101 and the recessed region 102, the silicon substrate 110 has an extension portion 111 extending and protruding above the recessed region 102 at the edge of the non-recessed region 101 and the recessed region 102.

[0048] The first dielectric layer 120 is stacked on the surface of the non-recessed region 101 and the extension portion 111 facing away from the silicon substrate 110.

[0049] A first polar doped layer 130 is stacked on a first dielectric layer 120;

[0050] The second dielectric layer 140 includes a first portion 141 stacked on the first polar doped layer 130 and a second portion 142 stacked on the bottom surface of the recessed region 102.

[0051] A second polar doped layer 150 is stacked in the first portion 141 and the second portion 142.

[0052] The silicon substrate 110 has two main surfaces: a light-facing surface and a back-lighting surface. The light-facing surface directly faces the sunlight, while the back-lighting surface is the other side, and the two surfaces are arranged opposite each other.

[0053] Two distinct regions, a non-recessed region 101 and a recessed region 102, are arranged on the backlight surface of the silicon substrate 110. These two regions are arranged alternately, with the recessed region having a bottom surface and a sidewall connecting to the non-recessed region. Specifically, a plurality of non-recessed regions 101 and a plurality of recessed regions 102 are arranged alternately along a first direction, and both non-recessed regions 101 and recessed regions 102 extend along a second direction, which intersects the first direction. The non-recessed regions 101 and recessed regions 102 can be arranged alternately along the lateral direction of the silicon substrate 110 and both extend along the longitudinal direction. That is, the first direction can be the lateral direction of the back contact cell, and the second direction can be the longitudinal direction of the back contact cell, and the two are perpendicular to each other. Of course, in other embodiments, the first direction and the second direction can also be other directions, for example, they can be the diagonal directions of the silicon substrate 110, and no specific limitation is made here. The non-recessed regions 101 and recessed regions 102 are arranged adjacently and alternately.

[0054] The silicon substrate 110 is typically a plate of uniform thickness, meaning that the distance between the light-facing side and the back-light-facing side is equal. The distance between the bottom surface of the recessed region 102 and the light-facing side is less than the distance between the bottom surface of the non-recessed region 101 and the light-facing side; that is, the bottom surface of the recessed region 102 sinks into the silicon substrate 110.

[0055] In the alignment direction of the non-recessed regions 101 and 102, the silicon substrate 110 has an extension portion 111 extending beyond the recessed regions 102 at the edges of the non-recessed regions 101 and 102. A first dielectric layer 120 is stacked on the surfaces of the non-recessed regions 101 and the extension portion 111 facing away from the silicon substrate 110. A first polar doped layer 130 is stacked on the first dielectric layer 120 (including the first dielectric layer 120 stacked in the non-recessed regions 101 and the first dielectric layer 120 stacked on the extension portion 111). The first dielectric layer 120 may specifically be a tunneling layer, serving as a transport path for charge carriers and reducing recombination losses at the interface.

[0056] As shown in Figure 8, the second dielectric layer 140 includes a first portion 141 and a second portion 142. The first portion 141 is stacked on the first polar doped layer 130, and the second portion 142 is stacked on the bottom surface of the recessed region 102. There is a height difference between the non-recessed region and the recessed region; that is, there is a height difference between the first portion 141 and the second portion 142 of the second dielectric layer 140, and the first portion 141 and the second portion 142 are not connected. Specifically, the second dielectric layer 140 can be a tunneling layer, used as a transport path for charge carriers, reducing recombination losses of charge carriers at the interface.

[0057] As shown in Figure 8, the second polar doped layer 150 is stacked on the first portion 141 and the second portion 142, respectively. The second polar doped layer 150 is stacked on the first portion 141. Due to the shielding effect of the extension portion 111, the second polar doped layer 150 cannot be placed at the position blocked by the extension portion 111. This prevents the second polar doped layer 150 on the second portion 142 from extending along the sidewall to form contact with the first polar doped layer 130, thereby isolating the two polar doped layers and preventing leakage.

[0058] The first polar doped layer 130 and the second polar doped layer 150 have opposite polarities. Specifically, the first polar doped layer 130 can be a P-type doped layer and the second polar doped layer 150 can be an N-type doped layer, or the first polar doped layer 130 can be an N-type doped layer and the second polar doped layer 150 can be a P-type doped layer. The first polar doped layer 130 and the second polar doped layer 150 form a region with different electrical characteristics, supporting the formation of the PN junction and the separation of charge carriers.

[0059] Understandably, when depositing the second polar doped layer 150, a directional physical vapor deposition (PVD) method can be selected. During the deposition of the second polar doped layer 150, the material of the second polar doped layer 150 is minimized or almost entirely absent in the recessed region due to the shielding effect of the extended portion 111, thereby achieving effective isolation between the first polar doped layer 130 and the second polar doped layer 150 and preventing leakage current.

[0060] When depositing the first dielectric layer 120, the first polar doped layer 130, and the second dielectric layer 140, chemical vapor deposition (CVD), atomic layer deposition (ALD), plasma enhanced chemical vapor deposition (PECVD), etc., can be used, and no specific method is specified here.

[0061] When depositing the second polar doped layer 150, it is possible that a small amount of material from the second polar doped layer 150 may be deposited on the second dielectric layer 140 in the recessed region, so that the first polar doped layer 130 and the second polar doped layer 150 achieve partial leakage contact, which acts similarly to a bypass diode.

[0062] When the solar cell is generating electricity normally, the contact area between the first polar doped layer 130 and the second polar doped layer 150 also performs photoelectric conversion to generate electricity, thereby increasing the power output of the solar cell. When the solar cell is shaded, insufficient light will cause the current output of the shaded part to decrease, thereby increasing the voltage of that part. The contact area forms a conductive path, and other solar cells connected in series with it provide reverse current to the shaded solar cell. A suitable composite leakage current can be generated between the first polar doped layer 130 and the second polar doped layer 150 of the solar cell, reducing the voltage across the shaded solar cell (the voltage is less than the sum of the voltages of other solar cells connected in series with it and not shaded). The heat output of the solar cell will decrease, thereby reducing the high heat risk of hot spot effect.

[0063] In practice, the depth of the concave structure and the thickness of the material deposited in the concave structure can be controlled by adjusting the wet process (etching time and concentration) or the thickness of the BSG layer and the doping concentration of poly-Si. This controls the degree of contact between the two materials and thus the degree of leakage current, achieving the above-mentioned function of preventing hot spots.

[0064] In this embodiment, non-recessed regions 101 and recessed regions 102 are alternately disposed on the back surface of the silicon substrate 110. The recessed region 102 is recessed compared to the non-recessed region 101, and the silicon substrate 110 has an extension portion 111 extending above the recessed region 102 at the edge of the non-recessed region 101 and the recessed region 102. A first dielectric layer 120, a first polar doped layer 130, a second dielectric layer 140, and a second polar doped layer 150 are stacked on the non-recessed region 101 and the extension portion 111. Under the shielding effect of the extension portion 111, the materials of the first polar doped layer 130 and the second polar doped layer 150 are effectively isolated, avoiding leakage current.

[0065] Understandably, the extension portion 111, the first dielectric layer 120 and the first polar doped layer 130 may have a second polar doped layer 150 partially disposed on the sidewall of the recessed region 102 along the first direction, as shown in FIG9. Due to different manufacturing processes, the second polar doped layer 150 may form a deposition of a certain thickness at this sidewall location.

[0066] In some embodiments, as shown in FIG6, the second dielectric layer further includes a wrapping portion 143 connecting the first portion 141 and the second portion 142. The wrapping portion 143 includes a second wrapping portion 1432 in which the extended portion 111 is stacked and disposed toward the surface of the silicon substrate 110, and a third wrapping portion 1433 in which the extended portion 111, the first dielectric layer 120 and the first polar doped layer 130 are stacked and disposed along a first direction near the sidewall of the recessed region 102.

[0067] Because there is a height difference between the non-recessed region 101 and the recessed region 102, there is a sidewall connecting the two regions. The wrapping portion 143 extends along this sidewall, connecting the first portion 141 and the second portion 142. However, in some cases, the extension portion 111 extends towards the recessed region 102 at an acute angle from the connection position between the bottom surface and the sidewall of the recessed region 102, such that the surface of the extension portion 111 facing the silicon substrate 110 constitutes the sidewall of the recessed region 102. The first wrapping portion 1431 is stacked on the sidewall between the recessed region 102 and the non-recessed region 101. As shown in FIG7(b), the wrapping portion 143 includes a second wrapping portion 1432 and a third wrapping portion 1433. The third wrapping portion 1433 is stacked on the sidewall of the extension portion 111, the first dielectric layer 120, and the first polar doped layer 130 along the first direction near the recessed region 102. The second wrapping portion 1432 is connected to the third wrapping portion 1433. In some special cases, the extension portion is triangular, and the first dielectric layer 120 and the first polar doped layer 130 are stacked on one side of the triangle. In this case, the third wrapping portion 1433 is only stacked on the sidewall of the first dielectric layer 120 and the first polar doped layer 130 along the first direction near the recessed region 102. It can be regarded that the thickness of the extension portion 111 at the stacking position of the third wrapping portion 1433 is 0.

[0068] In this embodiment, a first dielectric layer 120 and a first polar doped layer 130 are arranged on the back surface of the silicon substrate 110, and a second dielectric layer 140 is stacked on the outermost contour of the back surface of the silicon substrate 110, the first dielectric layer 120 and the first polar doped layer 130, which facilitates processing.

[0069] In some embodiments, as shown in FIG6, a portion of the second polar doped layer 150 is stacked in the third wrapping portion 1433.

[0070] Specifically, when the side surface formed by the extension portion 111, the first dielectric layer 120, and the first polar doped layer 130 along the first direction near the sidewall of the recessed region forms an angle of less than 90° with the bottom surface of the recessed region 102, as shown in FIG7(d), that is, the side surface is inclined toward the bottom surface of the recessed region 102, and the position on the side surface that is farther away from the bottom surface of the recessed region 102 blocks the position on the side surface that is closer to the bottom surface of the recessed region 102, then the second polar doped layer 150 is not provided on the side surface, as shown in FIG2, and the second polar doped layer is only stacked on the first portion 141 and the second portion 142.

[0071] When the side surface formed by the extension portion, the first dielectric layer and the first polar doped layer along the first direction near the sidewall of the recessed region forms an angle equal to or greater than 90° with the bottom surface of the recessed region 102, as shown in Figures 7(a)(b)(c), that is, the side surface is inclined in the direction away from the bottom surface of the recessed region 102, and there is no obstructed position on the side surface, then the upper part of the side surface is provided with a second polar doped layer 150, and the second polar doped layer 150 is stacked on the first portion 141, the second portion 142 and the third wrapping portion 1433, as shown in Figures 1, 3 and 9.

[0072] In this embodiment, a portion of the second polar doped layer 150 is stacked in the third wrapping portion 1433, which can improve the passivation effect on the first polar doped layer and the side of the extended portion, and reduce edge recombination.

[0073] In some embodiments, as shown in FIG4, a portion of the second polar doped layer 150 is stacked in the second wrapping portion 1432, and the thickness of the second polar doped layer 150 at the position of the second wrapping portion 1432 gradually decreases in the direction close to the extension position of the extension portion 111.

[0074] The extension portion 111 has a shielding effect, which causes the thickness of the second polar doped layer 150 located in the shielded area to vary. Along the first direction, the thickness of the second polar doped layer 150 is greater closer to the extension portion 111 and smaller further away from the extension portion 111. The smaller the thickness, the worse its conductivity.

[0075] In other embodiments, as shown in Figures 1, 3 and 6, the wrapping portion 143 further includes a first wrapping portion 1431, which is stacked on the sidewall of the recessed region 102.

[0076] Specifically, the extension portion 111 extends from a position at a certain distance from the recessed region 102 along the thickness direction of the silicon substrate 110 toward the recessed region 102. The extension portion 111 protrudes from the sidewall of the recessed region 102, and the first wrapping portion 1431 is stacked on the sidewall of the recessed region 102.

[0077] In this embodiment, a first dielectric layer 120 and a first polar doped layer 130 are arranged on the back surface of the silicon substrate 110, and a second dielectric layer 140 is stacked on the outermost contour of the back surface of the silicon substrate 110, the first dielectric layer 120 and the first polar doped layer 130, which facilitates processing.

[0078] In some embodiments, a portion of the second polar doped layer 150 is stacked in the first wrapping portion 1431, and the thickness of the second polar doped layer 150 at the location of the first wrapping portion 1431 gradually decreases in the direction close to the extension portion 111.

[0079] The extension portion 111 has a shielding effect, which causes the thickness of the second polar doped layer 150 located in the shielded area to vary. Along the thickness direction of the silicon substrate 110, the thickness of the second polar doped layer 150 is smaller closer to the extension portion 111 and larger further away from the extension portion 111. The smaller the thickness, the worse its conductivity.

[0080] Furthermore, in embodiments of this disclosure, as shown in FIG10, the back contact battery 100 may further include a first electrode 170 and a second electrode 180. A passivation film layer 160 may also be provided on the backlight surface of the silicon substrate 110, which may cover the entire backlight surface. The first electrode may be located in the non-recessed region 101 and pass through the passivation film layer 160 to form an ohmic contact with the first polar doped layer 130 and be insulated from the second polar doped layer 150. For example, the first electrode may be located at a position where the first polar doped layer 130 is not covered by the first extension portion 111 (i.e., the projection of the first polar doped layer 130 on the silicon substrate 110 is not covered by the projection of the first extension portion 111 on the silicon substrate 110), and the second electrode may be located in the recessed region 102 and pass through the passivation film layer 160 to form an ohmic contact with the second polar doped layer 150.

[0081] Example 2

[0082] In some embodiments, the bottom surface of the recessed area 102 has a textured structure.

[0083] On the one hand, the textured structure can alter the light propagation path to some extent, causing the incident light to be reflected multiple times on the bottom surface of the recessed region 102, increasing the optical path length within the silicon substrate 110, thereby improving the light absorption rate. This effect is particularly important for long-wavelength light, as long-wavelength light has a lower absorption coefficient and penetrates the silicon substrate 110 more easily. On the other hand, the textured structure can increase the contact area between the second polar doped layer 150 and the silicon substrate 110, improving the contact performance of the electrode and reducing the contact resistance.

[0084] Example 3

[0085] In some embodiments, the length of the extension portion 111 along the first direction is 0.2 μm-50 μm.

[0086] Typically, as shown in Figure 10, a passivation film layer 160 covering the entire backlight surface is provided on the backlight surface of the silicon substrate 110. In this way, keeping the length of the extension portion 111 within this reasonable range can avoid the extension portion 111 being too short, which would prevent it from effectively reducing the exchange between plasma and the outside world during the deposition of the passivation film layer 160. It can also avoid the extension portion 111 being too long, which would result in the groove opening being too small and the etching process being too difficult. At the same time, it can also avoid the extension portion 111 being too long, which would make it prone to breakage.

[0087] Specifically, in such an embodiment, the length of the extension portion 111 can be any value between 0.2μm, 0.4μm, 0.6μm, 0.8μm, 1μm, 2μm, 3μm, 4μm, 5μm, 6μm, 7μm, 8μm, 9μm, 10μm, 20μm, 30μm, 40μm, 50μm, or 0.2μm-50μm.

[0088] Furthermore, according to the inventors' research and verification, in order to better prevent the extension portion 111 from breaking, and at the same time ensure the function of reducing the exchange of plasma with the outside world during the deposition of the passivation film layer 160, the length of the extension portion 111 (along the first direction) in this disclosure is preferably in the range of 1μm-15μm.

[0089] Example 4

[0090] In some embodiments, the sidewalls of the recessed area 102 are inclined surfaces.

[0091] Thus, there are more vertical crystal plane defects, but by forming an inclined side, the bottom surface defect state of the recessed region 102 can be reduced. Forming an inclined surface can reduce bottom surface recombination and improve battery performance.

[0092] In some embodiments, the inclined surface may form an obtuse angle with the bottom surface of the recessed area 102. As shown in Figures 3 and 5, the angle between the inclined surface and the bottom surface of the recessed area 102 is α, where α > 90°. That is, the inclined surface and the bottom surface of the recessed area 102 form a flared shape, where the flared shape gradually increases in the direction away from the light-facing surface.

[0093] Obtuse-angled bevels can reduce dead angles during material deposition, allowing for more uniform layering of material on the bottom surface and reducing the formation of voids and defects. Obtuse-angled bevels can also better disperse stress, reducing stress concentration at joints and improving the mechanical strength and crack resistance of the solar cells.

[0094] In other embodiments, the inclined surface forms an acute angle with the bottom surface of the recessed area 102. As shown in Figure 2, the angle between the inclined surface and the bottom surface of the recessed area 102 is α, where α < 90°. That is, the inclined surface and the bottom surface of the recessed area 102 form a tapering shape, where the tapering refers to the gradual decrease in size in the direction away from the light-facing surface.

[0095] An acute-angled bevel can serve as a center for light reflection and scattering, changing the incident angle of light so that more light can enter the silicon substrate 110 instead of being reflected by the bottom surface, thus extending the path of light within the silicon substrate 110 and improving light transmittance and absorption.

[0096] In some special cases, as shown in Figure 7(d), the inclined surface forms an acute angle with the bottom surface of the recessed region 102. In this case, the extension direction of the inclined surface is consistent with the extension direction of the extension portion 111, and the inclined surface and the extension portion 111 are coplanar. In addition, the extension portion 111, the first dielectric layer 120 and the first polar doped layer 130 are also coplanar with the inclined surface along the first direction near the sidewall of the recessed region 102. In this case, the connection angle between the first wrapping portion 1431 and the third wrapping portion 1433 is 180 degrees, that is, they are on the same plane.

[0097] Example 5

[0098] This embodiment provides a battery assembly, including the back contact battery 100 in the above embodiment.

[0099] The battery assembly may include multiple back contact batteries 100. The multiple back contact batteries 100 in the battery assembly can be connected in series to form a battery string. The battery strings can be connected in series, in parallel, or in a series-parallel combination to achieve current charging output. For example, the connection between the individual battery cells can be achieved by welding solder strips, or the connection between the individual battery strings can be achieved by busbars.

[0100] The battery module may also include a metal frame, a backsheet, photovoltaic glass, and an encapsulating film (not shown in the figures). The encapsulating film may be filled between the front and photovoltaic glass, the back and backsheet of the back contact cell 100, and adjacent cells. As a filler, it may be a transparent colloid with good light transmittance and aging resistance. For example, the encapsulating film may be an EVA film or a POE film. The specific choice can be made according to the actual situation and is not limited here.

[0101] Photovoltaic glass can be laminated onto the encapsulating film on the front side of the back contact cell 100. The photovoltaic glass can be ultra-clear glass, which has high light transmittance, high transparency, and superior physical, mechanical, and optical properties. For example, ultra-clear glass can have a light transmittance of over 92%, protecting the back contact cell 100 while minimizing impact on its efficiency. Simultaneously, the encapsulating film bonds the photovoltaic glass and the back contact cell 100 together, providing sealing, insulation, and waterproofing / moisture protection for the back contact cell 100.

[0102] The backsheet can be attached to the adhesive film on the back of the back contact cell 100. The backsheet provides protection and support for the back contact cell 100, and has reliable insulation, water resistance, and aging resistance. Multiple options are available for the backsheet, typically tempered glass, acrylic glass, aluminum alloy TPT composite adhesive film, etc., and the specific choice is determined based on the specific circumstances and is not limited here. The backsheet, back contact cell 100, adhesive film, and photovoltaic glass can be mounted on a metal frame. The metal frame serves as the main external support structure for the entire battery module, providing stable support and installation. For example, the battery module can be installed at the desired location using the metal frame.

[0103] The beneficial effects of the battery assembly in this embodiment are equivalent to those of the back contact battery 100 described above, and will not be repeated here.

[0104] Example 6

[0105] This embodiment provides a photovoltaic system, including the battery module described in the above embodiment.

[0106] Photovoltaic systems can be applied in photovoltaic power plants, such as ground-mounted, rooftop, and floating power plants, as well as in equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, and solar buildings. Of course, it's understandable that the application scenarios of photovoltaic systems are not limited to these; that is, photovoltaic systems can be applied in all fields that require solar energy to generate electricity. Taking a photovoltaic power generation network as an example, a photovoltaic system can include photovoltaic arrays, combiner boxes, and inverters. A photovoltaic array can be a combination of multiple battery modules; for example, multiple battery modules can form multiple photovoltaic arrays. The photovoltaic arrays are connected to combiner boxes, which collect the current generated by the photovoltaic arrays. The collected current flows through an inverter and is converted into AC power required by the mains grid before being connected to the mains grid to achieve solar power supply.

[0107] The beneficial effects of the photovoltaic module in this embodiment are equivalent to those of the battery module described above, and will not be repeated here.

[0108] The above are merely preferred embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A back-contact battery, characterized in that, include: A silicon substrate having a backlight surface and a light-facing surface disposed opposite to each other, the backlight surface of the silicon substrate including a non-recessed area and a recessed area disposed alternately along a first direction, the non-recessed area and the recessed area extending along a second direction, the second direction intersecting the first direction; along the first direction, the silicon substrate having an extension portion extending and protruding above the recessed area at the edge of the non-recessed area and the recessed area. A first dielectric layer is disposed on the surface of the non-recessed region and the light-facing surface of the extended portion facing away from the silicon substrate. A first polar doped layer is disposed on the first dielectric layer; The second dielectric layer includes a first portion disposed on the first polar doped layer and a second portion disposed on the bottom surface of the recessed region; A second polar doped layer is disposed on the first portion and the second portion.

2. The back contact battery as described in claim 1, characterized in that, The second dielectric layer further includes a wrapping portion connecting the first portion and the second portion. The wrapping portion includes a second wrapping portion disposed on the light-facing surface of the extension portion toward the silicon substrate and a third wrapping portion disposed on the sidewall of the extension portion, the first dielectric layer and the first polar doped layer along the first direction near the recessed region.

3. The back contact battery as described in claim 2, characterized in that, A portion of the second polar doped layer is disposed on the third wrapping portion.

4. The back contact battery as described in claim 3, characterized in that, A portion of the second polar doped layer is disposed on the second wrapping portion, and the thickness of the second polar doped layer on the second wrapping portion gradually increases along the extension protrusion direction of the extension portion.

5. The back contact battery as described in claim 2 or 4, characterized in that, The wrapping portion further includes a first wrapping part, which is disposed on the sidewall of the recessed area.

6. The back contact battery as described in claim 5, characterized in that, A portion of the second polar doped layer is disposed on the first wrapping portion, and the thickness of the second polar doped layer on the first wrapping portion gradually decreases in the direction approaching the extension portion.

7. The back contact battery as described in claim 1, characterized in that, The bottom surface of the recessed area has a textured structure.

8. The back contact battery as described in claim 1, characterized in that, The length of the extended portion along the first direction is 0.2 μm-50 μm.

9. The back contact battery as described in claim 8, characterized in that, Along the first direction, the length of the extended portion is 1μm-15μm.

10. The back contact battery as described in claim 1, characterized in that, The sidewalls of the recessed area are inclined surfaces.

11. The back contact battery as described in claim 10, characterized in that, The angle between the inclined surface and the bottom surface of the recessed area is an acute angle.

12. The back contact battery as described in claim 10, characterized in that, The angle between the inclined surface and the bottom surface of the recessed area is an obtuse angle.

13. A battery assembly, characterized in that, Includes the back contact battery according to any one of claims 1-12.

14. A photovoltaic system, characterized in that, Includes the battery assembly as described in claim 13.

Images