Pulse combination device

Abstract

In the present invention, DAC by means of an R-2R ladder circuit is used in a variable resistance circuit 10b of a low frequency correction circuit 10 to control a control signal of the variable resistance circuit 10b, whereby it becomes possible to correct a low frequency signal component of a pulse signal attenuated in a transmission line from a pulse generator 110 to a bias tee 130 and to supply, to a quantum bit, a DC offset signal added by an addition circuit 10d of the low frequency correction circuit 10. Furthermore, by using the DAC by means of the R-2R ladder circuit in the variable resistance circuit 10b, it is possible to prevent the DC offset signal from changing even when the resistivity of the variable resistance circuit 10b is made to be variable.

Description

Pulse coupling device

[0001] The present invention relates to a pulse coupling device that can suppress waveform distortion of a pulse signal when a DC offset signal is superimposed on a pulse signal used to control a device operating in an extremely low-temperature environment.

[0002] Conventionally, quantum computers require the operation of qubits in extremely low-temperature environments, thus necessitating the avoidance of heat generation. Furthermore, when using pulse control for qubit initialization, manipulation, and readout, it is necessary to superimpose a DC offset signal onto the pulse waveform to perform pulse control.

[0003] When attempting to capacitively couple a pulse signal to a DC offset signal, distortion may occur in the waveform of the pulse signal. For this reason, techniques for correcting the distortion of the pulse signal waveform are known. For example, Non-Patent Document 1 discloses a technique in which a low-frequency signal component is extracted from a pulse signal and superimposed on the DC offset signal.

[0004] Jacob Z. Blumoff, Andrew S. Pan, Tyer E. Keating, Reed W. Andrews, Davit W. Barnets, Teresa L. Brecht, Edward T. Croke, Larken E. Euliss, Jacob A. Fast et al., “Fast and High-Fidelity State Preparation and Measurement in Triple-Quantum-Dot Spin Qubits,” PRX Quantum 3, 010352, 29 March, 2022

[0005] However, the device described in Non-Patent Document 1 above has a problem in that it lacks the resolution to adjust the amplitude of the low-frequency signal component because it uses a variable resistor of an analog element to adjust the amplitude of the low-frequency signal component. In addition, there is a problem that the DC offset signal component changes when adjusting the low-frequency signal component.

[0006] The present invention was made to solve the problems (issues) of the above-mentioned prior art, and aims to provide a pulse coupling device that can suppress waveform distortion of a pulse signal when a DC offset signal is superimposed on a pulse signal used to control a device that operates in an extremely low-temperature environment, such as a quantum computer.

[0007] To solve the above-mentioned problems and achieve the objective, the present invention provides a pulse coupling device that superimposes a DC offset signal on the low-frequency signal component of a pulse signal and couples the superimposed signal to the high-frequency signal component of the pulse signal, characterized in that it comprises a variable resistor circuit that controls the resistance value of a variable resistor by a predetermined digital signal to adjust the amplitude of the low-frequency signal component, and an adder circuit that adds the low-frequency signal component whose amplitude has been adjusted by the variable resistor circuit and the DC offset signal.

[0008] Furthermore, the present invention is characterized in that, in the above invention, the variable resistor circuit is a digital-to-analog converter using an R-2R ladder circuit.

[0009] Furthermore, the present invention is characterized in that, in the above invention, the R-2R ladder circuit is a current-adding type or a voltage-adding type circuit.

[0010] Furthermore, the present invention is characterized in that, in the above invention, a current-voltage conversion circuit using an active element is further provided between the variable resistor circuit and the adder circuit.

[0011] Furthermore, the present invention is characterized in that, in the above invention, the adding circuit is a circuit using an active element.

[0012] The present invention is characterized in that, in the above invention, it further comprises a switch circuit that switches between the output from the adding circuit and a predetermined voltage.

[0013] Furthermore, the present invention relates to a pulse coupling device that superimposes a DC offset signal onto the low-frequency signal component of a pulse signal and couples the superimposed signal onto the high-frequency signal component of the pulse signal, comprising: a variable resistor circuit that controls the resistance value of a variable resistor by a predetermined digital signal to adjust the amplitude of the low-frequency signal component; an addition circuit that adds the low-frequency signal component whose amplitude has been adjusted by the variable resistor circuit and the DC offset signal; a detection circuit that detects a coupled pulse signal obtained by coupling the signal obtained by superimposing the DC offset signal onto the low-frequency signal component of the pulse signal onto the high-frequency signal component of the pulse signal; and an adjustment unit that adjusts the resistance value of the variable resistor circuit based on the detection signal detected by the detection circuit.

[0014] Furthermore, the present invention is characterized in that, in the above invention, the adjustment unit calculates the error between the waveform of the coupled pulse signal detected by the detection circuit and the reference pulse waveform of the pulse signal, and adjusts the resistance value of the variable resistor circuit based on the calculated error.

[0015] Furthermore, the present invention is characterized in that, in the above invention, the adjustment unit calculates the voltage gradient of the portion of the waveform of the coupled pulse signal detected by the detection circuit where the digital signal is 1 and / or 0, and adjusts the resistance value of the variable resistor circuit based on the calculated voltage gradient.

[0016] The present invention is characterized in that, in the above invention, a coupled pulse signal is input to the device, which is obtained by superimposing the DC offset signal on the low-frequency signal component of the pulse signal and coupling the DC offset signal to the high-frequency signal component of the pulse signal; the state of the device is read; the error rate of the state of the device is calculated; and the variable resistor circuit is adjusted based on the error rate.

[0017] Furthermore, the present invention is characterized in that, in the above invention, the pulse signal is a pulse signal for controlling the qubits of a quantum computer.

[0018] According to the present invention, when a DC offset signal is superimposed on a pulse signal of a device operating in an extremely low-temperature environment, distortion of the pulse signal waveform can be suppressed.

[0019] Figure 1 is a diagram showing an overview of the pulse coupling device according to Embodiment 1. Figure 2 is a diagram showing an example of the circuit configuration of the pulse coupling device shown in Figure 1. Figure 3 is a diagram showing an example of the circuit configuration of the variable resistor circuit shown in Figure 2. Figure 4 is a diagram showing an example of the characteristics when the control signal of the variable resistor circuit of the pulse coupling device shown in Figure 2 is "0000". Figure 5 is a diagram showing an example of the characteristics when the control signal of the variable resistor circuit of the pulse coupling device shown in Figure 2 is "8000". Figure 6 is a diagram showing an example of the characteristics when the control signal of the variable resistor circuit of the pulse coupling device shown in Figure 2 is "FFFF". Figure 7 is a diagram showing an overview of the pulse coupling device according to Embodiment 2. Figure 8 is a diagram showing an overview of the pulse coupling device according to Modification 1. Figure 9 is a diagram showing an overview of the pulse coupling device according to Modification 2. Figure 10 is a diagram showing an overview of the pulse coupling device according to Embodiment 3. Figure 11 is a functional block diagram showing the configuration of the adjustment unit shown in Figure 10. Figure 12 is a flowchart showing the processing procedure of the adjustment unit shown in Figure 11. Figure 13 is a functional block diagram showing the configuration of the adjustment unit of the pulse coupling device according to Modification 3. Figure 14 is a flowchart showing the processing procedure of the adjustment unit shown in Figure 13. Figure 15 is a diagram showing an overview of the pulse coupling device according to Embodiment 4. Figure 16 is a functional block diagram showing the configuration of the error rate calculation processing unit shown in Figure 15. Figure 17 is a flowchart showing the processing procedure of the error rate calculation processing unit shown in Figure 16.

[0020] The embodiments of the pulse coupling device according to the present invention will be described in detail below with reference to the drawings. Here, we will describe the case in which it is applied to pulse signals used for the initialization, manipulation, and reading of qubits in a quantum computer.

[0021] [Embodiment 1] <Overview of the pulse coupling device> An overview of the pulse coupling device according to this embodiment 1 will be described. Figure 1 is a diagram showing an overview of the pulse coupling device according to embodiment 1. As shown in Figure 1, the pulse coupling device has a low-frequency correction circuit 10, a pulse generator 100, a gain adjustment circuit 110, and a bias tee 130. The low-frequency correction circuit 10 has a gain adjustment circuit 10a, a variable resistor circuit 10b, a current-voltage conversion circuit 10c, and an adder circuit 10d.

[0022] The gain adjustment circuit 10a is a circuit that adjusts the signal power after branching the signal from the pulse generator 100. Specifically, it is an attenuator that reduces a certain amount of power, composed of passive circuits such as resistors. The variable resistor circuit 10b is a circuit that varies the signal power output from the gain adjustment circuit 10a. Specifically, it is a circuit that takes multiple control signals as input and changes the current based on the control signals to effectively change the resistance value.

[0023] The current-voltage conversion circuit 10c is a circuit that converts the current of the output signal of the variable resistor circuit 10b into a voltage. Specifically, it is a transimpedance amplifier circuit that converts current into voltage using an active element such as an operational amplifier. The adder circuit 10d is a circuit that adds a DC voltage offset to the output signal of the current-voltage conversion circuit 10c. Specifically, it is an adder circuit using an operational amplifier or the like.

[0024] The pulse generator 100 is a device that generates pulse signals to be supplied to the qubits. The gain adjustment circuit 110 is a circuit that adjusts the signal power of the pulse signal output from the pulse generator 100. Specifically, it is an attenuator that reduces a certain amount of power, composed of passive circuits such as resistors. The bias tee 130 is a circuit that superimposes the low-frequency signal component and DC voltage generated by the low-frequency correction circuit 10 onto the pulse signal output from the gain adjustment circuit 110.

[0025] The pulse coupling device according to Embodiment 1 is a device that can correct low-frequency signal components lost due to parasitic capacitance existing in the transmission line between the pulse generator 100 and the bias tee 130 and the resistance of the transmission line by a low-frequency correction circuit, add a DC offset signal to the pulse signal, and supply the pulse signal with the DC offset signal to a qubit.

[0026] <Example of Circuit Configuration of Pulse Coupling Device> Next, an example of the circuit configuration of the pulse coupling device will be described. FIG. 2 is a diagram showing an example of the circuit configuration of the pulse coupling device shown in FIG. 1. As shown in FIG. 2, the gain adjustment circuit 10a is an attenuator using a resistor of a passive element. For the circuit configuration, for example, an n-type unbalanced attenuator in which resistors are arranged in an n-type or a T-type unbalanced attenuator in which resistors are arranged in a T-type is used.

[0027] ]>The variable resistance circuit 10b is a circuit that varies the attenuation amount according to a control signal by a control signal not shown. For example, as shown in FIG. 3, a DAC (Digital Analog Convertor) using a 16-bit R-2R ladder circuit is used. In the R-2R ladder circuit, if the output is virtually grounded, it appears as a parallel connection of resistors with a resistance value of 2R from any node, so the current value becomes half for each node.

[0028] That is, if the current flowing through the node of the switch S0 is I ０ then the current I １ flowing through the node of the switch S1 is I １ = I ０ / 2, and the current I ２ flowing through the node of the switch S2 is I ２ = I ０ / 2 ２ and the current I １５ flowing through the node of the switch S15 is I １５ = I [[ID=3)] ０ / 2 １６ and becomes.

[0029] Thus, the variable resistance circuit 10b divides the input signal from the gain adjustment circuit 10a by 1 / 2 １６With a resolution of, it can be attenuated based on a control signal. When the control signal is "0000", the maximum attenuation amount is obtained, and when the control signal is "FFFF", the minimum attenuation amount is obtained.

[0030] The current-voltage conversion circuit 10c includes an operational amplifier OA Ｔ and a resistor R Ｔ１ and a resistor R Ｔ２ It has. Assuming that the current input to the current-voltage conversion circuit 10c is I ｉｎ the output voltage V ｏｕｔ is V ｏｕｔ = -R ＴＩ × I ｉｎ The current-voltage conversion circuit 10c is a circuit that converts the output current of the variable resistance circuit 10b into a voltage.

[0031] The addition circuit 10d includes a DAC1, a buffer amplifier BA, and an operational amplifier OA Ａ and a resistor R Ａ１ , R Ａ２ , R Ａ３ , R Ａ４ It has. The voltage of the DC offset signal is set based on the digital control signal of the DAC1 not shown, and the voltage of the DC offset signal is input to the non-inverting input terminal of the operational amplifier OA Ｔ . Also, the output signal (low-frequency signal component) of the current-voltage conversion circuit 10c is input to the inverting input terminal of the operational amplifier OA Ｔ . Since the input terminals of the operational amplifier OA Ｔ are in virtual short circuit, the output voltage of the addition circuit 10d is an output signal obtained by adding the DC offset signal to the output signal of the current-voltage conversion circuit 10c. When the addition circuit 10d uses an operational amplifier, the output signal of the current-voltage conversion circuit is input to the inverting input of the operational amplifier OA Ｔ , so the output signal of the current-voltage conversion circuit is subtracted from the DC offset signal.

[0032] The gain adjustment circuit 110 is an attenuator using passive resistors. The circuit configuration can be, for example, an n-type unbalanced attenuator with resistors arranged in an n-type configuration, or a T-type unbalanced attenuator with resistors arranged in a T-type configuration. The resistors used in the gain adjustment circuit 110 are non-inductive resistors with small inductance components, considering the frequency characteristics. The bias tee 130 has capacitance C. ＢＴ And, resistor R ＢＴ The bias tee 130 combines the pulse signal with a correction signal in which the low-frequency signal component, which is the output signal of the low-frequency correction circuit 10, and the DC offset signal are superimposed, and supplies this combined pulse signal to the qubit.

[0033] <An Example of Pulse Coupler Characteristics> Next, an example of the characteristics of the pulse coupler will be described. Figure 4 shows an example of the characteristics when the control signal of the variable resistor circuit of the pulse coupler shown in Figure 2 is "0000". As shown in Figure 4, when the control signal of the variable resistor circuit 10b is "0000", the voltage characteristics at the output of the bias tee 130 are waveforms in which the low-frequency signal component is attenuated, depending on whether the DC offset signal voltage is +2V (see Figure 4(a)), 0V (see Figure 4(b)), or -2V (see Figure 4(c)). Here, the voltage characteristics at the output of the bias tee 130 (coupled pulse signal) show almost the same waveform even when the DC offset signal voltage changes.

[0034] Figure 5 shows an example of the characteristics when the control signal of the variable resistor circuit of the pulse coupling device shown in Figure 2 is "8000". As shown in Figure 5, when the control signal of the variable resistor circuit 10b is "8000", the voltage characteristics at the output of the bias tee 130 are corrected to form a rectangular pulse waveform when the DC offset signal voltage is +2V (see Figure 5(a)), when the DC offset signal voltage is 0V (see Figure 5(b)), and when the DC offset signal voltage is -2V (see Figure 5(c)).

[0035] Figure 6 shows an example of the characteristics when the control signal of the variable resistor circuit of the pulse coupling device shown in Figure 2 is "FFFF". When the control signal of the variable resistor circuit 10b is "FFFF", the voltage characteristics at the output of the bias tee 130 are waveforms in which the low-frequency signal component is overcorrected, depending on whether the DC offset signal voltage is +2V (see Figure 6(a)), 0V (see Figure 6(b)), or -2V (see Figure 6(c)). The voltage characteristics at the output of the bias tee 130 (coupled pulse signal) show almost the same waveform even when the DC offset signal voltage changes.

[0036] In the example described above, the pulse coupling device pre-sets the control signal of the variable resistor circuit 10b to "8000" so that the output of the bias tee 130 supplied to the qubit (coupled pulse signal) becomes a pulse signal as shown in Figure 5.

[0037] As described above, in this embodiment 1, by controlling the control signal of the variable resistor circuit 10b of the low-frequency correction circuit 10, it is possible to correct the low-frequency signal component of the pulse signal that is attenuated in the transmission line from the pulse generator 100 to the bias tee 130, and to supply the DC offset signal added in the adder circuit 10d of the low-frequency correction circuit 10 to the qubit. Furthermore, by using an active element (operational amplifier) ​​in the adder circuit 10d, it is possible to prevent the voltage of the DC offset signal from changing even when the resistance value of the variable resistor circuit 10b is varied.

[0038] [Embodiment 2] In Embodiment 1, the case in which the output of the low-frequency correction circuit 10 is applied to the qubit via the bias tee 130 was described, but in Embodiment 2, the output of the low-frequency correction circuit 10 and the external standard voltage terminal T ＶＣ We will now describe the case where the output of a switch circuit 60, which switches between a standard voltage applied to the qubit and the output of a switch circuit 60, is applied to the qubit.

[0039] Figure 7 is a diagram showing an overview of the pulse coupling device according to Embodiment 2. Parts similar to those in Embodiment 1 are denoted by the same reference numerals, and their detailed descriptions are omitted. As shown in Figure 7, the pulse coupling device according to Embodiment 2 includes a low-frequency correction circuit 10, a switch circuit 60, a pulse generator 100, a gain adjustment circuit 110, and a bias tee 130.

[0040] The switch circuit 60 includes a switch 61 and a pull-down device 62. The switch 61 either sets the signal applied to the bias tee 130 to the output signal of the low-frequency correction circuit 10, or to an external standard voltage terminal T. ＶＣ This is a switch that toggles whether the input voltage is from the source. Switch 61 is switched by an external switch signal (not shown). The pull-down device 62 is a circuit that prevents the impedance of the transmission line from the input of switch 61 to the output of switch circuit 60 from becoming high impedance. A photorelay circuit such as a photoMOSFET is used here.

[0041] As described above, in this second embodiment, the output of the low-frequency correction circuit 10 and the external standard voltage terminal T ＶＣ Since the output of the switch circuit 60, which switches between the standard voltage applied to the qubit and the qubit itself, is applied to the qubit, when applying a predetermined standard voltage to the qubit and performing calibration or checking of the qubit, calibration or checking can be performed by switching the switch 61 without having to reconnect the low-frequency correction circuit 10.

[0042] <Modification 1> In the above embodiment 2, the case in which the output of the low-frequency correction circuit 10 is applied to one qubit was described. In modification 1, the case in which the output of the low-frequency correction circuit 10 is applied to multiple qubits will be described.

[0043] Figure 8 is a diagram showing an overview of the pulse coupling device according to Modification 1. Note that the same reference numerals are used for parts similar to those in Embodiment 2, and their detailed descriptions are omitted. As shown in Figure 8, the pulse coupling device according to Modification 1 includes a plurality of low-frequency correction circuits 10, a plurality of switch circuits 60, a pulse generator 100, a plurality of gain adjustment circuits 110, and a plurality of bias tees 130.

[0044] Specifically, if we define one channel as a set consisting of the low-frequency correction circuit 10 (excluding the pulse generator 100 of the pulse imaging apparatus according to Embodiment 2), the switch circuit 60, the gain adjustment circuit 110, and the bias tee 130, then multiple such channels are arranged in parallel. One channel applies the output of the low-frequency correction circuit 10 to one qubit.

[0045] With the above configuration, when multiple qubits exist, it becomes possible to apply the output of the low-frequency correction circuit 10 or a standard voltage to each qubit.

[0046] <Modification 2> In Modification 1 described the case where a standard voltage is applied independently to each of the multiple qubits, but in Modification 2, we will describe the case where a common standard voltage is applied to the multiple qubits.

[0047] Figure 9 is a diagram showing an overview of the pulse coupling device according to the modified example 2. Note that the same reference numerals are used for parts similar to those in embodiment 2, and their detailed descriptions are omitted. As shown in Figure 9, the pulse coupling device according to the modified example 2 includes a plurality of low-frequency correction circuits 10, a switch matrix 63, a plurality of pull-down circuits 64, a plurality of gain adjustment circuits 110, and a bias tee 130.

[0048] The switch matrix 63 is a circuit that can electronically control the connection and disconnection of signals between multiple input ports and output ports. The switch matrix 63 can connect the output of any low-frequency correction circuit 10 to any pull-down circuit 64. In addition, the switch matrix 63 has a standard voltage terminal T ＶＣThe standard voltage from can be connected to any pull-down circuit 64, or to all pull-down circuits 64. The switch matrix 63 is switched by a switch signal (not shown).

[0049] The pull-down circuit 64 includes a pull-down device 62. Since the pull-down device 62 has already been described, a detailed explanation will be omitted.

[0050] With the above configuration, when multiple qubits exist, it becomes possible to apply the output of the low-frequency correction circuit 10 or a standard voltage to each qubit.

[0051] [Embodiment 3] In Embodiment 1, the variable resistor circuit 10b of the low-frequency correction circuit 10 was described in advance when the waveform of the output of the bias tee 130 (coupled pulse signal) is set to a rectangular pulse waveform. However, in Embodiment 3, the waveform of the output of the bias tee 130 (coupled pulse signal) is detected and the appropriate value of the control signal of the variable resistor circuit 10b is automatically set.

[0052] Figure 10 is a diagram showing an overview of the pulse coupling device according to Embodiment 3. Note that the same reference numerals are used for parts similar to those in Embodiment 1, and their detailed descriptions are omitted. As shown in Figure 10, the pulse coupling device according to Embodiment 3 includes a low-frequency correction circuit 10, a sensor 20, an adjustment unit 30, a pulse generator 100, a gain adjustment turntable 110, and a bias tee 130.

[0053] Sensor 20 is a sensor for detecting the waveform of the output (coupled pulse signal) of the bias tee 130. Sensor 20 uses a high impedance sensor so as not to affect the coupled pulse signal supplied from the bias tee 130 to the qubit.

[0054] The adjustment unit 30 stores a reference pulse waveform for one period to be supplied to the qubit in the memory unit, detects a coupled pulse waveform for one period using the sensor 20, calculates the error between the reference pulse waveform and the detected coupled pulse waveform, and controls the control signal of the variable resistor circuit based on the error.

[0055] For example, the error is calculated from the difference between the voltage value of the reference pulse waveform for one cycle and the voltage value of the coupled pulse waveform detected by the sensor 20. If the error decreases, the control signal of the variable resistor circuit 10b is increased, and the coupled pulse waveform is detected again by the sensor 20 to calculate the error. If the error is larger than the previous error, it is determined that overcorrection has been performed, and the control signal of the variable resistor circuit is decreased to the appropriate value.

[0056] <Configuration of the Adjustment Unit 30> Next, the configuration of the adjustment unit 30 of the pulse coupling device according to Embodiment 3 will be described. Figure 11 is a functional block diagram showing the configuration of the adjustment unit 30 shown in Figure 10. As shown in Figure 11, the adjustment unit 30 has a storage unit 31 and a control unit 32. A sensor 20 and a variable resistor circuit 10b are also connected to the adjustment unit 30.

[0057] The memory unit 31 is a storage device such as a non-volatile memory. The memory unit 31 stores reference pulse waveform data 31a, waveform data 31b, error calculation count data 31c, and error data 31d. The reference pulse waveform data 31a is the reference waveform data of the pulse signal supplied to the device.

[0058] Waveform data 31b is data of the combined pulse waveform for one period acquired from sensor 20. Error calculation count data 31c is data of the number of times the error was calculated. Error calculation count data 31c is set to "0" when the power is turned on. Error data 31d is error data calculated as the difference between reference pulse waveform data 31a and waveform data 31b.

[0059] The control unit 32 is a control unit that controls the entire adjustment unit 30, and includes a waveform acquisition unit 32a, an error calculation processing unit 32b, an error calculation count determination unit 32c, an error determination unit 32d, a control signal transmission processing unit 32e, and a control termination determination unit 32f. In practice, by loading these programs into the CPU and executing them, the waveform acquisition unit 32a, the error calculation processing unit 32b, the error calculation count determination unit 32c, the error determination unit 32d, the control signal transmission processing unit 32e, and the control termination determination unit 32f are made to execute the processes corresponding to each of them.

[0060] The waveform acquisition unit 32a is a processing unit that acquires the voltage waveform of one cycle of pulse signal from the sensor 20 and stores the acquired voltage waveform as waveform data 31b in the storage unit 31.

[0061] The error calculation processing unit 32b reads the reference pulse waveform data 31a from the storage unit 31, calculates the error of the difference between it and the waveform data 31b, and stores it in the storage unit 31 as error data 31d. Furthermore, if the error calculation processing unit 32b has calculated an error, it performs a process to increment and update the error calculation count data 31c by one.

[0062] The error calculation count determination unit 32c is a processing unit that determines the number of error calculations based on the error calculation count data 31c. Specifically, the error calculation count determination unit 32c determines that the number of error calculations is 0 if the error calculation count data 31c is "0", and determines that the number of error calculations is not 0 if the error calculation count data 31c is not "0".

[0063] The error determination unit 32d is a processing unit that determines whether or not the error has decreased. Specifically, it reads the error data 31d from the storage unit 31, compares it with the error calculated by the error calculation processing unit 32b, and determines that the error has "decreased" if the calculated error has decreased, and determines that the error has "not decreased" if the calculated error has increased.

[0064] The control signal transmission processing unit 32e is a processing unit that increases or decreases the control signal based on the error determination result and sends the control signal to the variable resistor circuit 10b. Specifically, if the determination result of the error determination unit 32d is "decrease", the control signal transmission processing unit 32e increases the control signal by "1" and sends the control signal to the variable resistor circuit 10b. Also, if the determination result of the error determination unit 32d is "no decrease", the control signal transmission processing unit 32e decreases the control signal by "1" and sends the control signal to the variable resistor circuit 10b.

[0065] The control termination determination unit 32f is a processing unit that determines whether or not to terminate control based on a change (change in control direction) in the control signal transmission processing unit 32e. Specifically, it determines that control has terminated when the control signal of the control signal transmission processing unit 32e changes from decreasing to increasing, or from increasing to decreasing, and determines that control continues if there is no change. The adjustment unit 30 may be implemented as a circuit using an SoCFPGA that integrates a CPU and memory.

[0066] <Processing Procedure of Adjustment Unit 30> Next, the processing procedure of the adjustment unit 30 will be explained. Figure 12 is a flowchart of the processing procedure of the adjustment unit shown in Figure 11. As shown in Figure 12, the adjustment unit 30 sets the control signal to "0000" (step S101). Then, the adjustment unit 30 sets the error calculation count to "0" (step 102). After that, the adjustment unit 30 reads the reference pulse waveform from the storage unit (step S103).

[0067] The adjustment unit 30 then acquires the waveform of one period of the coupled pulse signal from the sensor (step S104). Subsequently, the adjustment unit 30 calculates the error between the reference pulse waveform and the acquired coupled pulse waveform and stores it in the storage unit 31 (step S105). The adjustment unit 30 then determines whether the number of error calculations is "0" or not (step S106).

[0068] If the error calculation count is "0" (step S106: Yes), the adjustment unit 30 increases the error calculation count by "1" (step S107), increases the control signal of the variable resistor circuit, sends the control signal to the variable resistor circuit 10b (step S108), and proceeds to step S104. If the error calculation count is not "0" (step S106: No), the adjustment unit 30 determines whether the error has decreased or not (step S109).

[0069] If the error does not decrease (step S109: No), the adjustment unit 30 sends a control signal to the variable resistor circuit 10b that decreases by one (step S110). If the error does decrease (step S109: Yes), the adjustment unit 30 sends a control signal to the variable resistor circuit 10b that increases by one (step S111).

[0070] After sending the control signal, the adjustment unit 30 determines whether or not the direction of the control signal has changed (step S112). If the direction of the control signal has not changed (step S112: No), the adjustment unit 30 proceeds to step S104. If the direction of the control signal has changed (step S112: Yes), the adjustment unit 30 terminates the process.

[0071] As described above, in this embodiment 3, the output signal (coupled pulse waveform) of the bias tee 130 is detected by the sensor 20, the error between the reference pulse waveform and the detected coupled pulse waveform is calculated in the adjustment unit 30, and the control signal of the variable resistor circuit 10b is increased or decreased based on the error, thereby making it possible to control the coupled pulse waveform of the bias tee 130 output to approach the reference pulse waveform.

[0072] <Modification 3> In the above embodiment 3, the control signal of the variable resistor circuit 10b was described in a case where the control signal is increased or decreased based on the error between the reference pulse waveform and the detected coupled pulse waveform. Modification 3 describes a case in which the control signal is increased or decreased based on the voltage change of the "1" portion of the digital signal of the detected coupled pulse waveform. Note that the same reference numerals are used for parts that are the same as in embodiment 2, and their detailed explanation is omitted.

[0073] <Configuration of the Adjustment Unit 40> Figure 13 is a functional block diagram showing the configuration of the adjustment unit 40 of the pulse coupling device according to the modified example 3. As shown in Figure 13, the adjustment unit 40 has a storage unit 41 and a control unit 42. The adjustment unit 40 is also connected to a sensor 20 and a variable resistor circuit 10b.

[0074] The memory unit 41 is a storage device such as a non-volatile memory. The memory unit 41 stores waveform data 31b and voltage gradient data 41a. The voltage gradient data 41a is the voltage gradient data of the portion of the waveform data 31b that corresponds to "1" in the digital signal.

[0075] The control unit 42 is a control unit that controls the entire adjustment unit 40 and includes a waveform acquisition unit 32a, a control termination determination unit 32f, a voltage gradient calculation unit 42a, a voltage gradient determination unit 42b, and a control signal transmission processing unit 42c. In practice, by loading these programs into the CPU and executing them, the waveform acquisition unit 32a, the control termination determination unit 32f, the voltage gradient calculation unit 42a, the voltage gradient determination unit 42b, and the control signal transmission processing unit 42c are made to execute the processes corresponding to each of them.

[0076] The voltage gradient calculation unit 42a is a processing unit that reads the waveform data 31b and calculates the voltage gradient of the portion of the waveform data 31b corresponding to the digital signal "1". To calculate the gradient, for example, the regression line of the voltage value of the portion of the waveform data 31b corresponding to the digital signal "1" is calculated, and the slope of that regression line is calculated. The voltage gradient determination unit 42b is a processing unit that determines whether the voltage gradient calculated by the voltage gradient calculation unit 42a is a positive gradient or not.

[0077] The control signal transmission processing unit 42c is a processing unit that increases or decreases the control signal based on the voltage gradient and sends the control signal to the variable resistor circuit 10b. Specifically, if the determination result of the voltage gradient determination unit 42b is positive, the control signal transmission processing unit 42c decreases the control signal by "1" and sends it to the variable resistor circuit 10b. If the determination result of the voltage gradient determination unit 42b is negative, the control signal transmission processing unit 42c increases the control signal by "1" and sends it to the variable resistor circuit 10b. The adjustment unit 40 may be implemented as a circuit using an SoCFPGA that integrates a CPU and memory.

[0078] <Processing Procedure of Adjustment Unit 40> Next, the processing procedure of the adjustment unit 40 according to the modified example 3 will be described. Figure 14 is a flowchart showing the processing procedure of the adjustment unit 40 shown in Figure 13. As shown in Figure 14, the adjustment unit 40 acquires the waveform of one period of the coupled pulse waveform from the sensor (step S201).

[0079] The adjustment unit 40 then calculates the voltage gradient of the portion of the acquired waveform's digital signal corresponding to "1" (step S202). After that, the adjustment unit 40 determines whether the voltage gradient is positive or not (step S203). If the voltage gradient is positive (step S203: Yes), the adjustment unit 40 decreases the control signal of the variable resistor circuit and sends it to the variable resistor circuit 10b (step S204). If the voltage gradient is not positive (step S203: No), the adjustment unit 40 increases the control signal of the variable resistor circuit and sends it to the variable resistor circuit 10b (step S204).

[0080] Then, after the adjustment unit 40 transmits a control signal to the variable resistor circuit 10b, it determines whether or not the voltage gradient of the control signal has changed (step S206). If the voltage gradient of the control signal has not changed (step S206: No), the adjustment unit 40 proceeds to step S201. If the voltage gradient of the control signal has changed (step S206: Yes), the adjustment unit 40 terminates the process.

[0081] In the above modified example 3, the case in which the variable resistor circuit 10b is adjusted based on the voltage gradient of the portion of the pulse signal waveform where the digital signal is "1" was described. However, the variable resistor circuit 10b may also be adjusted based on the voltage gradient of the portion of the pulse waveform where the digital signal is "0", or the voltage gradient of the portion of the pulse signal waveform where the digital signal is both "0" and "1".

[0082] By the way, in Embodiment 3 described above, the case in which the coupled pulse waveform is detected and the variable resistor circuit is controlled based on the coupled pulse waveform was explained. However, in Embodiment 4, the case in which the state of the device is detected after the coupled pulse is supplied to the device and the variable resistor circuit is controlled based on the state of the device will be explained.

[0083] [Embodiment 4] <Outline of the pulse coupling device according to Embodiment 4> Figure 15 is a diagram showing an overview of the pulse coupling device according to Embodiment 4. The same reference numerals are used for parts that are the same as in Figure 10, and their detailed descriptions are omitted. As shown in Figure 15, the pulse coupling device according to Embodiment 4 includes a low-frequency correction circuit 10, an error rate calculation processing unit 50, a pulse generator 100, a gain adjustment circuit 110, and a bias tee 130.

[0084] The output (coupled pulse signal) of the bias tee 130 is input to the qubit device 140. The error rate calculation processing unit 50 calculates the error rate of the qubit device and sends a control signal to the variable resistor circuit 10b based on the change in the error rate, performing processing to minimize the error rate. The error rate calculation processing unit 50 performs initial setup processing, quantum gate operation processing of the qubit device 140, quantum gate state detection processing, error rate calculation processing, error rate determination processing, and control signal transmission processing to the variable resistor circuit 10b.

[0085] <Configuration of Error Rate Calculation Processing Unit 50> Next, the configuration of the error rate calculation processing unit 50 will be described. Figure 16 is a functional block diagram showing the configuration of the error rate calculation processing unit shown in Figure 15. As shown in Figure 16, the error rate calculation processing unit 50 has a storage unit 51 and a control unit 52. In addition, a variable resistor circuit 10b, a pulse generator 100, and a qubit device 140 are connected to the error rate calculation processing unit 50.

[0086] The memory unit 51 is a storage device such as a non-volatile memory. The memory unit 51 stores reference state data 51a, state data 51b, and error rate data 51c. The reference state data 51a is data of the state of the quantum device when there are no errors. The state data 51b is data resulting from detecting the state of the qubits of the qubit device 140. The error rate data 51c is data resulting from calculating the error rate.

[0087] The control unit 52 is a control unit that controls the entire error rate calculation processing unit 50, and includes an initial setting unit 52a, a quantum gate operation processing unit 52b, a state detection unit 52c, an error rate calculation unit 52d, an error rate determination unit 52e, and a control signal transmission processing unit 52f. In practice, by loading these programs into the CPU and executing them, the processes corresponding to the initial setting unit 52a, the quantum gate operation processing unit 52b, the state detection unit 52c, the error rate calculation unit 52d, the error rate determination unit 52e, and the control signal transmission processing unit 52f are made to execute, respectively.

[0088] The initial setup unit 52a is a processing unit that performs the initial setup of the pulse coupling device. Specifically, it performs the process of setting the control signal to "0000", setting the error rate data to "1", setting the conditions for the pulses to be generated by the pulse generator 100, and initializing the qubit device to a known state (for example, the zero state or the ground state).

[0089] The quantum gate operation processing unit 52b is a processing unit that performs operations on quantum gates, which are basic arithmetic units for manipulating the state of qubits, and which may contain errors. The state detection unit 52c is a processing unit that detects the state of the quantum gates of the qubit device 140.

[0090] The error rate calculation unit 52d is a processing unit that compares the detected quantum gate state with the quantum gate state when there is no error stored in the reference state data 51a and calculates the error rate. The error rate determination unit 52e is a processing unit that compares the calculated error rate with the previous error rate and determines whether the error rate has decreased or not. The error rate determination unit 52e determines "decreased" if the error rate has decreased, and "not decreased" if the error rate has not decreased.

[0091] The control signal transmission processing unit 52f is a processing unit that increases or decreases the control signal based on the determination result of the error rate determination unit 52e and sends the control signal to the variable resistor circuit 10b. Specifically, if the determination result of the error rate determination unit 52e is "decreasing", the control signal transmission processing unit 52f increases the control signal by "1", and if the determination result is "not decreasing", it decreases the control signal by "1" and sends the signal. The error rate calculation processing unit 50 may be implemented as a circuit using an SoCFPGA that integrates a CPU and memory.

[0092] <Processing Procedure of Error Rate Calculation Processing Unit 50> Next, the processing procedure of the error rate calculation processing unit 50 will be described. Figure 17 is a flowchart showing the processing procedure of the error rate calculation processing unit shown in Figure 16. As shown in Figure 17, the error rate calculation processing unit 50 sets the control signal to "0000" (step S301).

[0093] Then, the error rate calculation processing unit 50 sets the error rate data to "1" (step S302). After that, the error rate calculation processing unit 50 controls the pulse generator 100 to initialize the qubit to a known state (step S303). Then, the error rate calculation processing unit 50 controls the pulse generator 100 to execute a quantum gate operation (step S304).

[0094] Subsequently, the error rate calculation processing unit 50 determines whether or not the quantum gate operation has been performed n times (step S305). If the error rate calculation processing unit 50 has not performed the quantum gate operation n times (step S305: No), it proceeds to step S304. If the error rate calculation processing unit 50 has performed the quantum gate operation n times (step S305: Yes), it detects the state of the qubit (step S306).

[0095] Then, the error rate calculation processing unit 50 calculates the error rate (step S307). After that, the error rate calculation processing unit 50 determines whether the error rate has decreased or not (step S308). Specifically, the error rate calculation processing unit 50 reads the error rate data 51d stored in the storage unit 51 and compares it with the error rate calculated by the error rate calculation unit 52d. If the calculated error rate is smaller than the read error rate data 51d, it determines that the error rate has "decreased" and stores the calculated error rate as error rate data 51d in the storage unit 51. If the calculated error rate is larger than the read error rate data 51d, the error rate calculation processing unit 50 determines that the error rate has "not decreased".

[0096] If the error rate decreases (step S308: Yes), the error rate calculation processing unit 50 increases the control signal to the variable resistor circuit and sends the control signal to the variable resistor circuit (step S309), then proceeds to step S303. If the error rate does not decrease (step S308: No), the error rate calculation processing unit 50 decreases the control signal to the variable resistor circuit and sends the control signal to the variable resistor circuit (step S310), then terminates the process.

[0097] As described above, in this embodiment 4, the output of the bias tee 130 (coupled pulse signal) is input to the qubit device 140. The error rate calculation processing unit 50 calculates the error rate of the qubit device, increases or decreases the control signal based on the change in the error rate, and transmits it to the variable resistor circuit 10b, thereby enabling control to minimize the error rate.

[0098] In the above embodiment 4, the case in which the waveform of the pulse generator 100 is manipulated when performing quantum gate operations was described. However, quantum gate operations may also be performed by using a microwave generator (not shown externally), modulating the amplitude of the microwaves with pulses, and irradiating the qubits with the resulting microwaves.

[0099] In the embodiments described above, the case in which a DAC using a current-adding R-2R ladder circuit in the variable resistor circuit 10b is combined with a current-voltage conversion circuit 10c was explained. However, it is also possible to use a DAC using a voltage-adding R-2R ladder circuit in the variable resistor circuit 10b and place an inverting amplifier in the subsequent stage.

[0100] Furthermore, in the above embodiments, the case where the gain adjustment circuit 10a of the low-frequency correction circuit 10 has a preset attenuation amount was described. However, the gain adjustment circuit 10a may be made to have a variable attenuation amount similar to the variable resistor circuit 10b, and the low-frequency correction value may be determined by adjusting the attenuation amount of the gain adjustment circuit 10a and the attenuation amount of the variable resistor circuit 10b.

[0101] Furthermore, while the above embodiments described the case where the device is applied to pulse signals for controlling qubits in a quantum computer, it can also be applied to pulse signals in devices that use cryogenic coolers in quantum sensing and the like.

[0102] The configurations illustrated in each of the above embodiments are functionally schematic and do not necessarily have to be physically represented as shown. In other words, the forms of distribution and integration of each circuit are not limited to those shown, and all or part of them can be functionally or physically distributed and integrated in any unit according to various loads and usage conditions.

[0103] The pulse coupling device according to the present invention is suitable for suppressing waveform distortion of pulse signals when a DC offset signal is superimposed on a pulse signal used for controlling a device operating in an extremely low-temperature environment.

[0104] 10 Low-frequency correction circuit 10a Gain adjustment circuit 10b Variable resistor circuit 10c Current-voltage conversion circuit 10d Adding circuit 20 Sensor 30 Adjustment unit 31 Memory unit 31a Reference pulse waveform data 31b Waveform data 31c Error calculation count data 31d Error data 32 Control unit 32a Waveform acquisition unit 32b Error calculation processing unit 32c Error calculation count determination unit 32d Error determination unit 32e Control signal transmission processing unit 32f Control termination determination unit 40 Adjustment unit 41 Memory unit 41a Voltage change data 42 Control unit 42a Voltage gradient calculation unit 42b Voltage gradient determination unit 42c Control signal transmission processing unit 50 Error calculation processing unit 51 Memory unit 51a Reference state data 51b State data 51c Error rate data 52 Control unit 52a Initial setting unit 52b Quantum gate operation processing unit 52c State detection unit 52d Error rate calculation unit 52e Error rate determination unit 52f Control signal transmission processing unit 60 Switch circuit 61 Switch 62 Pull-down device 63 Switch matrix 64 Pull-down circuit 100 Pulse generator 110 Gain adjustment circuit 130 Bias tee 140 Qubit device

Claims

1. A pulse coupling device that superimposes a DC offset signal onto the low-frequency signal component of a pulse signal and couples the superimposed signal onto the high-frequency signal component of the pulse signal, comprising: a variable resistor circuit that controls the resistance value of a variable resistor by a predetermined digital signal to adjust the amplitude of the low-frequency signal component; and an adder circuit that adds the low-frequency signal component whose amplitude has been adjusted by the variable resistor circuit and the DC offset signal.

2. The pulse coupling device according to claim 1, characterized in that the variable resistor circuit is a digital-to-analog converter using an R-2R ladder circuit.

3. The pulse coupling device according to claim 2, characterized in that the R-2R ladder circuit is a current-adding type or a voltage-adding type circuit.

4. The pulse coupling device according to any one of claims 1 to 3, further comprising a current-voltage conversion circuit using an active element between the variable resistor circuit and the summing circuit.

5. The pulse coupling device according to claim 4, characterized in that the summing circuit is a circuit using an active element.

6. The pulse coupling device according to claim 1, further comprising a switch circuit that switches between the output from the summing circuit and a predetermined voltage.

7. A pulse coupling device that superimposes a DC offset signal onto the low-frequency signal component of a pulse signal and couples the superimposed signal onto the high-frequency signal component of the pulse signal, comprising: a variable resistor circuit that controls the resistance value of a variable resistor by a predetermined digital signal to adjust the amplitude of the low-frequency signal component; an additive circuit that adds the low-frequency signal component whose amplitude has been adjusted by the variable resistor circuit and the DC offset signal; a detection circuit that detects a coupled pulse signal obtained by coupling the signal obtained by superimposing the DC offset signal onto the low-frequency signal component of the pulse signal onto the high-frequency signal component of the pulse signal; and an adjustment unit that adjusts the resistance value of the variable resistor circuit based on the detection signal detected by the detection circuit.

8. The pulse coupling device according to claim 7, characterized in that the adjustment unit calculates the error between the waveform of the coupled pulse signal detected by the detection circuit and the reference pulse waveform of the pulse signal, and adjusts the resistance value of the variable resistor circuit based on the calculated error.

9. The pulse coupling device according to claim 7, characterized in that the adjustment unit calculates the voltage gradient of the portion of the waveform of the coupled pulse signal detected by the detection circuit in which the digital signal is 1 and / or 0, and adjusts the resistance value of the variable resistor circuit based on the calculated voltage gradient.

10. The pulse coupling device according to claim 1, further comprising an error rate calculation processing unit that inputs a coupled pulse signal obtained by superimposing the DC offset signal on the low-frequency signal component of the pulse signal and coupling the coupled pulse signal obtained by coupling the DC offset signal with the high-frequency signal component of the pulse signal to the device, reads the state of the device, calculates the error rate of the state of the device, and adjusts the variable resistor circuit based on the error rate.

11. The pulse coupling device according to claim 1 or 7, characterized in that the pulse signal is a pulse signal for controlling a quantum computer's qubits.

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