Power converters and power conversion methods using delay elements

Abstract

Disclosed are systems for and method of conversion of electrical power using delay elements that exploit the inherent delay of a signal traveling along a length of conductor combined with switching devices to enable power conversion to take place without the losses experienced by current power conversion technologies. Embodiments of the invention can be configured to utilize power distribution components to form the delay elements used by power converters that are the subject of the invention.

Description

Matter No. MAN0002POWER CONVERTERS AND POWER CONVERSION METHODS USING DELAY ELEMENTSCROSS REFERENCE TO RELATED APPLICATIONS[oooi] This application claims priority to U.S. Provisional application 63 / 761,581 filed February 21, 2025, which is incorporated herein by reference in its entirety.TECHNICAL FIELD.

[0002] The present invention relates to the field of power conversion. Specifically, but not by way of limitation, the disclosure includes a novel method of power conversion utilizing the properties of electric delay elements.BACKGROUND OF THE INVENTION.

[0003] This section provides background information to facilitate a better understanding of the various aspects of the disclosure. The statements in this section of this document are to be read in this light, and not as admissions of prior art.

[0004] Power Converters are present in most of the electrical devices, due to their ability to scale the voltage up or down to a level needed by the rest of the electrical equipment in the device. In recent years, the goal of power converters to reduce the losses and to reach higher efficiency levels, requires new solutions.

[0005] In current electric power transmission and distribution, some of the power converters are situated on the source end and others are on the receiving end of the power line. This way they leave the power line with only the function of transmitting the power, rather than incorporating the power line as a part of the power converter. It is shown in embodiments of the invention disclosed herein how the power lines can be utilized to become an essential component of the power converter itself.

[0006] The most widely used power electronics converters in the known art are based on silicon switches, inductors and capacitors as shown on Figure 1. The topology depicted on Figure 1 , also known as a boost converter topology, is widely used in practice and well matured, however it is not free of inherent issues, especially when the difference between the voltages on its two sides is large. Illustrated in Figure 1 is a schematic diagram 100 of a boost type converter, consisting of an input voltage source 102, a boost inductor 104, a semiconductor switch 106, a boost diode 108, a boost capacitor 110 and a load 112. The prior art boost converter as shown on Figure 1 is a typical power electronics device and utilizes an inductorMatter No. MAN0002to store an electrical charge. In boost converter circuits, the boost inductor requires balanced volt-seconds during steady state operation. This means that during a first portion of the power conversion cycle, the inductor experiences a certain voltage applied over it with a certain polarity for a certain period of time. During a second portion of the cycle, the inductor needs to get an opposite voltage applied for a period of time, such that the sum of the products of the voltage and the time for both portions of the cycle sum to be zero. This balance is disrupted only for short period of time when the load, or input voltage, or output voltage are changing. When the ratio of the input to output voltages of boost type power converters is high, the boost inductor may experience high peak current resulting in power losses.

[0007] What is needed is a device for and method of generating or converting voltages without the power loss characteristics of known power converters.BRIEF SUMMARY OF THE INVENTION.

[0008] The present invention comprises a novel method of utilizing delay elements, which supplement and, in some embodiments, take over the function of the inductors, or other components, in the conventional power electronics converter, as well as novel power electronics converters and topologies utilizing the unique properties of the delay elements.

[0009] The delay element may have different designs but a common property is that when a signal or a power flow, or a disruption of the power flow, appears on one of its ends, the delay element provides a time delay before the same signal or power flow, or the power flow disruption, appears on its other end. The most common embodiment of delay elements are power line delay elements, which are based on the length of a conductor, or a power line adopting different configurations. These delay elements are utilizing the conductor’s property that the speed of electricity through any conductor cannot exceed the speed of light. The power line delay elements are used in the following description, for the purpose of explanation, and to provide a thorough understanding of the various embodiments of the invention. It will be evident to one skilled in the art, however, that the certain embodiments may be made and practiced with other types of delay elements, some of which are based on superconductivity or other specific material properties, rather than on the length of a conductor or a superconductor. An important point here is the difference between the properties of delay elements and the properties of inductors. Instead of storing the energy in a magnetic field as is the case with the conventional inductor, the delay element accumulates the events happening at one of its ends before allowing them to reach the other end. These events can be, but are not limited to a voltage change, a current change, a current flow occurrence, or a current flow disruption.Matter No. MAN0002Utilizing the above properties and manipulating them through alternation of the ON and OFF states of the power switches on both ends of the delay element, the electric charges traveling into the delay element can be manipulated and forced to increase the voltage over the delay element’s parasitic capacitance or over external capacitors on any of its ends. In some embodiments, the manipulation of the ON and OFF states of the power switches causes the delay element to build a static electric charge, which may be further processed for the purpose of power conversion or for other purposes. The main difference between an inductor and a delay element is that while the inductor is being charged with current while a voltage is applied over it, the charge in the delay element occurs when the current that it is conducting is being discontinued on one side. In this case, the electric current on the other side does not know that the switch on the opposite side is being open, so the current continues to flow until the information about the one side event reaches the other side. This allows the delay element to accumulate electric charge without the need of the voltage applied over it to increase. A similar process occurs when a voltage source and subsequently current is applied on one side of the delay element, while the other side is not aware of this event. Manipulation of the switches on both ends of the delay element allow for the charges accumulated this way to get trapped and to have nowhere to go except to charge the parasitic capacitance of the delay element to ground, or to charge an external capacitor. This feature allows the voltage converters based on delay elements to achieve high voltage ratios between the voltages on its two sides.[ooio] It is the object of the invention to provide power conversion methods, topologies and power converters, of the type generally described herein, being adapted for the purposes set forth herein, and overcoming disadvantages found in the prior art. The above summary is not intended to describe each illustrated embodiment or every implementation of the invention. Rather, the exemplary embodiments are chosen and described so as to provide an overview or framework for understanding the nature and character of the claimed aspects and implementations so that those skilled in the art can appreciate and understand the principles and practices of the invention. The figures and the detailed description that follow more particularly exemplify these exemplary embodiments and are incorporated in and constitute a part of this specification.BRIEF DESCRIPTION OF SEVERAL VIEWS OF THE DRAWINGS.

[0011] Novel features and advantages of the present invention, in addition to those mentioned above, will become apparent to those skilled in the art from a reading of theMatter No. MAN0002following detailed description in conjunction with the accompanying drawings wherein identical reference characters refer to identical parts and in which:

[0012] Figure 1 is a schematic diagram of a prior art boost type power converter;

[0013] Figure 2 is a schematic diagram of an exemplary power converter embodiment;

[0014] Figure 3 is a diagram of an exemplary delay element embodiment illustrating exemplary parasitic inductances and capacitances;

[0015] Figure 4 presents an exemplary arrangement of two delay elements showing parasitic impedances present when two delay elements are used in the same converter;

[0016] Figure 5 is a drawing of an exemplary delay element embodiment;

[0017] Figure 6 presents an exemplary delay element embodiment comprising conductor or conductive tape going back and forth between the two sides of a rectangular frame;

[0018] Figure 7 presents an exemplary embodiment of a delay element;

[0019] Figure 8 presents another exemplary embodiment of a delay element;

[0020] Figure 9 presents yet another exemplary embodiment of a delay element comprising conductors hanging on electric poles;

[0021] Figure 10 presents an exemplary power electronics converter, comprising two delay elements;

[0022] Figure 11 is a schematic diagram of an exemplary embodiment of a power converter comprising two delay elements and a discharge / recuperate module;

[0023] Figure 12 is a schematic diagram of an exemplary embodiment of a power converter comprising a single delay element;

[0024] Figure 13 is a schematic diagram of an exemplary embodiment of a power converter comprising a single delay element showing parasitic capacitance and parasitic inductance of the delay element;

[0025] Figure 14 is a schematic diagram of an exemplary example of a power converter comprising two delay elements of a “wire hanging type” and also illustrating a discharge / recuperate module;

[0026] Figure 15 is a schematic diagram of an exemplary power converter comprising a single delay element of a “wire hanging type” and also illustrating discharge / recuperate module;

[0027] Figure 16 is a schematic diagram of an exemplary embodiment of a power converter comprising a single delay element formed from a coaxial style cable;Matter No. MAN0002

[0028] Figure 17 presents another exemplary embodiment of a delay element comprised from conductors arranged in zones with low parasitic capacitance and high parasitic inductance and zones with higher parasitic capacitance and lower parasitic inductance;

[0029] Figure 18 is a block diagram of an exemplary general power converter based on the properties of the delay elements;

[0030] Figure 19 is a block diagram of another exemplary embodiment of a power converter;

[0031] Figure 20 is a block diagram of yet another exemplary embodiment of a power converter;

[0032] Figure 21 illustrates an exemplary magnetic recuperation module;

[0033] Figure 22 is a schematic diagram of an exemplary embodiment of a power converter comprising two delay elements and magnetic recuperation modules;

[0034] Figure 23 is a diagram of an exemplary embodiment of a delay element comprising multiple delay elements;

[0035] Figure 24 is a schematic diagram of an exemplary embodiment of a power converter illustrating outputs at either end of the delay elements; and

[0036] Figure 25 is a schematic diagram of an exemplary embodiment of an electric generator utilizing two delay elements.

[0037] While various embodiments are amenable to various modifications and alternative forms, specifics thereof have been shown by way of example in the drawings and will be described in detail. It should be understood, however, that the intention is not to limit the claimed inventions to the particular embodiments described. On the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the subject matter as defined by the claims.DETAILED DESCRIPTION OF THE INVENTION.

[0038] The terminology used herein is for the purpose of describing the embodiments and is not intended to be a limiting factor of the invention.

[0039] New methods of utilizing delay elements in power conversion topologies are disclosed herein. In the following description, for the purpose of explanation, numerous specific details are set forth to provide a thorough understanding of the present invention. It will be evident to one skilled in the art, however, that the embodiments of the invention may be made and practiced without these specific details. The present disclosure is to be viewed asMatter No. MAN0002an elaboration of the invention and is not intended to limit the invention to the embodiments illustrated by the figures or the description below. The present invention will be described by referencing the figures representing various embodiments.

[0040] The exemplary embodiment of Figure 2 is a schematic diagram of a power circuit 200 illustrating the principle of power conversion based on delay elements properties. It comprises: Input voltage source 202, delay elements 204 and 206, disconnect switches 208 and 210 between the voltage source 202 and the delay elements (204 and 206), bypass diode 212, output capacitor 214, impedance 216, and output disconnect switch 218. A power converter 220 is connected to the output capacitor. During the operation of the circuit 200, when all the switches are closed, the current from the voltage source 202 goes through the delay element 206, the impedance 216, the power switch 218, and then through the second delay element 204, with switch 210 closing the loop. In exemplary embodiments, impedance 216 may be, but is not limited to, an inductor, resistor, power converter, or a power element of another type. When the switch 218 opens, the current flowing from the source 202 to the sides of the delay elements 206 and 204 indicated as point 222 and point 224 is not immediately discontinued. It should be understood that when discussing delay elements, the term “information” will be used herein to describe voltage or current changes that propagate through the delay element over a period of time. As noted, these changes move at slightly less than the speed of light. Thus, when a change takes place at a first end of the delay element, the information is available at the time of the change at that first end. Conversely, a short period of time elapses before the change is apparent (the information become available) at the second end of the delay element. This change becoming apparent is referred to as “information” herein. The short period of time before the change becomes apparent is because the information that the switch 218 is open takes time to propagate from point 226 to point 222 and from point 228 to point 224. During this time, while the information is being delayed, the current from the source 202 flows freely through points 222 and 224 and goes inside the delay elements 204 and 206. Since the power switch 218 is open at this time, an electric charge is accumulated in the delay elements 204 and 206. When the information that the switch 218 is open reaches points 222 and 224 of the delay elements 204 and 206, the switches 208 and 210 are opened and the electric charge builds for the time period between the moment switch 218 was opened and the moment the switches 208 and 210 are opened. This charge gets accumulated by the delay elements 204 and 206. A portion of this charge also gets absorbed by the parasitic capacitance 230 and 232 between delay elements 204 and 206. Another portion of the charge charges the external capacitor 214 if such an external capacitor 214 is present. In an arrangement in which capacitor 214 is notMatter No. MAN0002present and the parasitic capacitance 230 and 232 is small enough, the charge absorbed as described above creates a static electric charge over the two delay elements 204 and 206. In such cases, the electric charge built this way may be further processed by a circuit or circuits presented on Figure 2 as 220. It will be evident to one skilled in the art, however, that in certain exemplary embodiments, the switches 208 and 210 may be replaced by diodes to prevent reverse current flow when voltage across delay elements 204 and 206 increases. Such arrangements are illustrated in several other exemplary configurations illustrated and described herein. It is important to note here that although the delay elements 204 and 206 of Figure 12 are illustrated as a conductor in a zig-zag arrangement, any other type of a delay element can be utilizes in the same circuit, including delay elements based on the physical length of wire, or another type of electric conductor.

[0041] To better illustrate the operation of the circuit presented on Figure 2 the mathematical formulas describing the circuit operation are as follows:The time needed for an electric signal to travel between the two ends of a Delay element is given by the formula:Where “At” is the time needed for an electric signal to travel between the two ends of a delay element, “Z” is the length of the conductor present in a conventional delay element and “v” is the velocity of transfer of the electrical signal, in other words: the velocity of transfer of the information through the conductor of the Delay element. In many cases the velocity “v” is very close to the speed of light. The electric charge “Q” accumulated by the Delay element during the time interval between opening the switch 10 on the load side of the power converter and the termination of the power flow through points 222 and 224 on the source side of the power converter is given by the formula:Q = I x Atis the magnitude of the current flowing from the power source in the Delay Element. The magnitude of the voltage potential built between the two delay elements at the end of the cycle is a function of the electric charge accumulated by the delay elements during the time interval “At” and the capacitance between the two delay elements “C”, Where “C” is the total capacitance between the two delay elements. In the specific embodiment presented on Figure 2, “C” is equal to the sum of the capacitances designated on Figure 2 as 222, 224 and 214.Matter No. MAN0002As a result, the voltage built between the two delay elements at the end of the cycle is:Since “At” is a function of the length of the electrical conductor “Z” and the the velocity of transfer of the electrical signal inside the conductor of the Delay element “v”, we may present the voltage that is built over the delay elements once the switch is open with the formula:This voltage can be either directly used as output of the exemplary power circuit 200 presented in Figure 2, or it can be processed by the power converter 220 to get the output of the power circuit 200 to a desired voltage level.

[0042] The schematic diagram on Figure 3 illustrates the parasitic inductance and capacitance in a generic delay element 300 having an ideal delay element illustrated as 306. The parasitic inductance is serial to the delay element and is shown in Figure 3 as inductors 302 and 304. Even though it is illustrated as discrete elements, the parasitic inductance in most cases is distributed inside the delay element 306. The parasitic capacitance to ground, or to another surface, or to another delay element is represented in Figure 3 by the capacitors 308 and 310. However, in most cases this capacitance is also distributed inside the delay element 306. Another parasitic capacitance which may exist in some delay elements embodiments is found in parallel to the delay element. It is illustrated in Figure 3 by capacitor 312. The parallel capacitance of capacitor 312 may deteriorate the function of the delay element 306 since it may serve as a bypass between two ends of the delay element 306, causing an adverse effect to its delay function. In certain delay elements, special measures can be taken to reduce or eliminate this capacitance 312.

[0043] The schematic diagram of Figure 4 illustrates the parasitic inductance and capacitance in a delay element combination 400 used in a power converter. The parasitic inductances 402 and 404 are serial parasitic inductances of a first delay element 406, while the parasitic inductances 408 and 410 are serial parasitic inductances of a second delay element 412. These parasitic inductances are in most cases not discrete elements as illustrated but are distributed inside the delay elements 406 and 412. A parasitic capacitance is also likely between the two delay elements 406 and 412. The parasitic capacitance is represented in Figure 4 by the capacitors 414 and 416. A parasitic capacitance may also potentially exist in parallel with the delay elements. This parallel parasitic capacitance is illustrated as capacitors 418 and 420 in Figure 4. The parallel parasitic capacitance may deteriorate the function of each delayMatter No. MAN0002element 406 and 412, as well as the function of the delay elements combination 400, since it adversely affects their delay function. In certain delay elements embodiments special measures should be taken to reduce or eliminate the parasitic parallel capacitance.

[0044] The delay element embodiment 500 presented in Figure 5 consists of a length of wire 502 or other conductive material going back and forth between the sides of a frame or other structure that holds the wire 502 in place. The delay element 500 is arranged in a way that the length of wire 502 or other conductive material can achieve a low parasitic inductance and low parasitic capacitance. One must be careful with this exemplary delay element embodiment, since its appeal due to the low parasitic inductance and low capacitance to ground, can be reduced by the existence of a parasitic capacitance in parallel with the delay element 500. Careful consideration should be directed to the space 504 between each two adjacent lengths of wire 502 in this configuration, so that a compromise between the series parasitic inductance and the parallel parasitic capacitance of such a delay element can be achieved. It will be evident to one skilled in the art, however, that any conductive material, including superconductor can be used in embodiments of this type.

[0045] The delay element embodiment 600 presented in Figure 6 consists of a conductor tape 602 going back and forth between the sides of a frame or other structure that holds the tape 602 in place. Utilizing a conductive tape 602 instead of a conductive wire has the advantage that the shape of the conductive tape 602 reduces the parasitic series inductance. However, while the parasitic series inductance may be reduced with this arrangement, the parasitic parallel capacitance may increase, since in general, the surface area of the conductive tape 602 is larger than the surface area of a wire. This parallel capacitance needs to be taken into account and the space 604 between each adjacent lengths of the conductive tape 602 needs to be carefully determined to achieve the best compromise between the parasitic series inductance and the parasitic parallel capacitance. It will be evident to one skilled in the art, however, that any conductive material, including superconductor can be utilized in the delay element embodiment presented on Figure 6.

[0046] The exemplary delay element 700 presented in Figure 7 consists of a conductive tape 702 going back and forth between two sides of a frame or other structure that holds the tape 702 in place. In this exemplary embodiment 700, the tape 702 is positioned above the surface of a conductive plate 704. In the exemplary embodiment 700, utilizing a conductive plate 704 as a foundation reduces the parasitic series inductance and allows for the adjacent portions of conductive tape 702 forming the delay element 700 to be positioned further apart from each other to reduce the parasitic parallel capacitance. Here all the distances, specifically:Matter No. MAN0002the distance between two adjacent portions of the tape 702, the distance between the plate and the conductive tape 702, as well as the width of the conductive tape 702, should be considered so that a reasonable compromise between the parasitic series inductance and the parasitic parallel capacitance to be achieved.

[0047] The exemplary delay element 800 of Figure 8 consists of a conductor 802 formed from a conventional wire or conductive tape, or a superconductive material arranged in a way going back and forth between two sides of a frame or other structure that holds the tape 802 in place. In the illustrated embodiment, the conductor 802 is shielded by a grounded shield (804 and 806), which reduces direct influence between adjacent sections of the conductor 802. The shield (804 and 806) reduces the electromagnetic connection between any two adjacent turns and subsequently reduces the parasitic inductance and the parallel capacitance of such a delay element 800. The price for the reduction of the parasitic series inductance and the parasitic parallel capacitance in this exemplary embodiment is increased capacitance to ground. Again, the mechanical dimensions and clearances should be considered to achieve an optimal balance between the parasitic inductance and the parasitic capacitance.

[0048] The exemplary delay element 900 presented in Figure 9 consists of conductors 902 and 904 suspended from electric utility poles 914 and 916. Each of the conductors 902 and 904 when considered from point 906 to point 908 and from point 910 to point 912 can be utilized as a separate delay element. A delay element of such a configuration has the disadvantage that its ends are further apart from each other compared to any of the other of the delay elements previously discussed. Thus, it is apparent that this embodiment is not a compact delay element and when arranged in a manner similar to that of Figure 2, requires the power source and power load to be located some distance away from each other. Such an embodiment will be convenient in applications where the input and the output of the power converter are located far away from each other. It is also an appropriate configuration in cases where the parasitic capacitance between the input and output of delay element needs to be low, since the input to output parasitic capacitance of such a configuration can have a minimal effect on its performance due to the physical distance between its two ends (906 and 910 to 908 and 912). One skilled in the art will understand that additional utility poles placed along the length of the conductors 902 and 904 would represent a similar embodiment.

[0049] The exemplary embodiment of Figure 10 depicts two delay elements (1002 and 1004) of the type presented on Figure 6. The impedance 1006 can be of any type including, but not limited to, inductors and various types of power converter circuits. During operation, the switches 1008, 1010 and 1012 are initially closed until the current through the delay elementsMatter No. MAN00021002 and 1004 builds up to a predetermined level. At this point in time, the switch 1012 opens, while the switches 1008 and 1010 stay closed. This allows for extra electric current to flow through points 1014 and 1016 of the delay elements 1002 and 1004, while no current is allowed to exit the delay element at point 1018 and point 1020. The switches 1008 and 1010 open shortly before, or at the point of time at which the information that the switch 1012 is open, reaches points 1014 and 1016. The electric carriers trapped inside the delay elements 1002 and 1004 during the period of time between opening of the switch 1012 and opening of the switches 1008 and 1010 creates an electrical charge between the delay elements 1002 and 1004. The energy of this charge can be extracted out of the delay elements 1002 and 1004 either from points 1014 and 1016, or from points 1018 and 1020, or both. It will be evident to one skilled in the art, however, that the switches 1008 and 1010 can be replaced by diodes to prevent reverse current flow when the volage formed over the delay elements 1002 and 1004 rises to a high level relative to the source 1022.

[0050] The exemplary power circuit 1100 shown in Figure 11 presents two delay elements 1102 and 1104 of unspecified type, connected to a voltage source 1106 through diodes 1108 and 1110. When switch 1112 is closed, the current from the voltage source 1106 flows through the loop created by the delay elements (1102 and 1104), the diodes (1108 and 1110), and the impedance 1114. The impedance 1114 can be a simple inductor, another inductive element, or it can be an input of a power converter. Once the current through the points 1116 and 1118 reaches a desired value, the switch 1112 opens and the power flow from points 1120 and 1122 is limited to the current charging the capacitor 1124. Current continues to flow through points 1116 and 1118 of the delay elements (1102 and 1104) for a period of time after switch 1112 opens, since the information about the opening of the loop formed by delay elements 1102 and 1104, diodes 1108 and 1110, and voltage source 1106 is being delayed by the delay elements 1102 and 1104. Once the delay time caused by the delay elements 1102 and 1104 is over, the voltage at points 1116 and 1118 of the delay elements 1102 and 1104 changes so that the diodes 1108 and 1110 are reverse biased, causing the current from the voltage source 1106 to be interrupted. This causes an electrical charge to form in the delay elements (1102 and 1104). This charge transfers to the parasitic capacitors 1126, 1128, and 1130, and the output capacitor 1124. This charge can be extracted either from the output capacitor 1124, points 1120 and 1122 or from points 1116 and 1118 of the delay elements (1102 and 1104), or both. In some cases, after the electric charge is extracted from the output capacitor 1124, the residual electric charge in the parasitic capacitance (1126, 1128, and 1130) needs to be recovered before a new cycle of current flow through the delay elements (1102 and 1104) starts. This may be done throughMatter No. MAN0002a discharge / recovery module 1132 as illustrated. In certain embodiments, the recovery module may be alternately referred to as a recoupment module. It will be evident to one skilled in the art, however, that in many cases the output capacitor 1124 may be unnecessary since its function can be performed entirely by the parasitic capacitance (1126, 1128, and 1130) between the two delay elements (1102 and 1104). It is important to note here that although the delay elements 1102 and 1104 on Figure 11 are illustrated as a conductor in a zig-zag arrangement, any other type of a delay element can be utilizes in the same circuit including delay elements based on the physical length of wire, or another type of electric conductor.

[0051] Figure 12 shows an exemplary embodiment of a power converter 1200 comprising a delay element 1202 connected at the inductor position of an exemplary boost power converter circuit. In this manner, the power converter 1200 operates fundamentally differently than a boost converter, due to the unique properties of the delay element 1202. Unlike the inductor found in a conventional boost power converter circuit, which takes the energy from the voltage applied to the inductor to generate a magnetic field, which releases the magnetic field into an output capacitor, the circuit shown on Figure 12 allows a period of time so that the voltage from the voltage source 1204 applied over the delay element 1202 has a chance to increase the current through the delay element 1202 and through the parasitic inductance (not shown) of the delay element 1202 until the current reaches a certain value. At that point in time, the switch 1206 opens, allowing the current coming from the delay element 1202 and its parasitic inductance to flow through the diode 1208 and to charge the capacitor 1210. The novelty here lays in the fact that when the current flows into the diode 1208, the input side of the delay element 1202 at point 1212 does not have the information that the switch 1206 is open. Hence the current from the voltage source 1204 continues to flow through the delay element for a time approximately equal to the length of the delay element conductor 1214 divided by the speed of the electric signal, which is close to the speed of light, through the delay element conductor 1214. This gives the delay element 1202 a chance to accumulate extra electric charge for the time between the opening of the switch 1206 and an opening of the switch 1216. When the information about the voltage at point 1218 of the delay element 1202 reaches point 1212, the switch 1216 opens and the electric charge is trapped in the delay element 1202. Assuming that any delay element parasitic capacitance (not illustrated) to ground is negligible compared to the capacitance of the output capacitor 1210, then the only avenue for the charge accumulated by the delay component is to charge the output capacitor 1210. This charge raises the voltage on the capacitor 1210, providing an efficient boost function. It will be evident to one skilled in the art, however, that the function of the switch 1216 can be performed by a diode. It isMatter No. MAN0002important to note here that although the delay element 1202 on Figure 12 is illustrated as a conductor in a zig-zag arrangement, any other type of a delay element can be utilized in the same circuit including a delay element based on the physical length of wire, or another type of electric conductor.

[0052] Figure 13 shows an exemplary embodiment of a power converter 1300 comprising a delay element 1302. In the exemplary embodiment 1300, the delay element 1302 is connected at the inductor position of a circuit similar to a boost converter. The current through the delay element 1302 increases when the voltage of the voltage source 1304 is being applied over the delay element 1302 through the diode 1306 and the switch 1308. When the switch 1308 opens, the voltage at point 1312 of the delay element 1302 raises, although the voltage at point 1310 does not have the information that the switch 1308 is open. When the switch 1308 opening information comes to point 1310, the voltage at point 1310 rises, effectively applying a reverse voltage over the diode 1306. The electric current flowing through point 1310 of the delay element 1302 between the point of time when the switch 1308 opens and the time a reverse voltage is applied over the diode 1306 causes an electric charge to build which stays trapped in the delay element 1302. This electric charge causes an electric charge to build in the parasitic capacitors (1314 and 1316) of the delay element 1302. There are two incentives to design the delay element 1302 to have lower value parasitic capacitance, the first being that the lower the value of the parasitic capacitance, the higher a voltage resulting from the charge trapped inside the delay element will build. The second reason to keep the parasitic capacitance low is to avoid transferring the information about a voltage at one side of a delay element (for example, point 1312 of Figure 13) over to the second side (point 1310 of Figure 13) through the parasitic capacitance 1314 and 1316. For example, when the parasitic capacitance 1314 and 1316 is higher than desired, the information can be transferred as the current from the high voltage point 1312 flows through the parasitic capacitance 1314 and 1316 to point 1310. In case of low parasitic capacitance, this current will be low enough so that it would have minimal effect over the current from the voltage source 1304 entering at point 1310 of the delay element 1302. If the parasitic capacitance is significant though, it may reduce the current entering at point 1310 of the delay element 1302, reducing the effectiveness of the power converter 1300. Once the power conversion cycle comprising opening switch 1308 and reverse biasing diode 1306 is complete and the electric charge trapped in the delay element 1302 is being transferred through the diode 1318 to the output capacitor 1320, the residual energy in the parasitic capacitance (1314 and 1316) of the delay element 1302 to ground can be processed back to the source 1304Matter No. MAN0002through a discharging and recuperating module 1322. After this is completed, a new power conversion cycle may start by closing the switch 1308 as described above.

[0053] The exemplary embodiment of Figure 14 presents a power converter 1400 utilizing delay elements such as described in Figure 9. The voltage source 1402 is on a first side of the power lines (1404 and 1406), while most of the active converter components 1408 are located at the second side of the power lines (1404 and 1406). The fact that the two ends of the power lines (1404 and 1406) are physically distant from one another helps to reduce the negative effect of any possible parasitic capacitance in parallel with the power lines (1404 and 1406) (which the reader will recognize as forming a delay element 1414 as discussed in the description of Figure 9). Existing power lines can be utilized in this exemplary embodiment. The operation of the power converter 1400 starts when the switch 1410 closes and the current through the impedance 1412 and the power lines (1404 and 1406) forming the delay element 1414 increases. Once the current reaches a desired value, switch 1410 opens and the current coming from the delay element 1414 continues to flow through diode 1416 charging the capacitor 1418. This type of operation resembles the operation of a boost converter. However, the fundamental difference between a conventional boost converter and the exemplary power converter 1400 shown in Figure 14 is in the fact that when the energy stored in the inductor 1412 is discharged and the current at points 1420 and 1422 of the delay element 1414 is terminated, points 1424 and 1426 of the delay element 1414 does not know that this has already happened. So, after the current through points 1420 and 1422 of the delay element 1414 becomes zero, points 1424 and 1426 continue to maintain a current flow until the information for the event reaches them. This current flow creates a charge which is trapped in the power lines 1404 and 1406 forming the delay element 1414 and effectively charges the parasitic capacitance 1428 between the power lines 1404 and 1406 and the capacitance (1430 and 1432) of the lines to ground. A portion of this charge trapped in capacitors 1428, 1430, and 1432 also charges the output capacitor 1434 if it is present. The charge trapped in the power lines 1404 and 1406 due to the delay feature of the delay element 1414 leads to quite a high voltage, the value of the voltage depending on the parasitic capacitance 1428, 1430, and 1432 between the two power lines 1404 and 1406. The energy stored in these parasitic capacitances 1428, 1430, and 1432 leads to current through the inductor 1412 and diode 1416 and further charges the output capacitor 1418. It is important to point out that impedance 1412 is in most cases a simple inductor, although a general impedance symbol is being used in Figure 14 because other components can be used in this position as well. Examples of such other components include, but are not limited to, power conversion and regulating circuits. It will be evident to one skilledMatter No. MAN0002in the art, however, that the function of the impedance 1412 in some embodiments can be performed by the parasitic impedances of the delay elements (for example, impedances 1436 and 1437).

[0054] The exemplary power converter 1500 of Figure 15 is similar to the one shown on Figure 14. The difference is that the illustrated embodiment has a single line 1502 to be used as a delay element 1504, while the circuit closes through ground. The active portion of the power converter 1506 is again in connection with point 1508 located at a second side of the delay element 1504. Current is being built through the inductor 1510 while the switch 1512 is closed. When the switch 1512 opens, the energy stored in inductor 1510 gets discharged in the output capacitor 1514. Diode 1516 serves the purpose of eliminating any chance of reverse bias on at point 1508 of the delay component 1504, which may happen due to the impedance 1518 of the line 1502. Once the current at point 1508 of the delay element 1504 is terminated, it continues to accumulate electric charge from the source side 1520 of the delay element 1504 for the period of time necessary for the information from on the point 1508 to reach the source side 1520. This electrical charge increases the voltage over the parasitic capacitance 1522 of the delay element 1504 to ground. After this process ends, diode 1524 becomes reverse biased and the charge trapped inside the power line 1502 is processed toward the output capacitor 1514. The discharging and recuperating module 1526, which is connected to the source side 1520 of the delay element 1504 serves the purpose of eliminating any residual charge of the power line 1502 back to the source side 1520. It will be evident to one skilled in the art, that the function of the inductor 1510 in certain embodiments can be performed by the parasitic impedance 1518 of the delay element 1504.

[0055] The exemplary power converter 1600 of Figure 16 is similar to the one illustrated in Figure 15. The difference is in the delay element 1602, which in this embodiment is a coaxial cable 1604. Utilizing coaxial cable as a delay element does not create fundamental difference from embodiments shown in earlier figures. In general, coaxial cable has lower parasitic inductance and higher parasitic capacitance than that of previously described embodiments, so the charge trapped in its center conductor applied over the parasitic capacitance of the coaxial cable will charge it to a lower voltage than the same amount of charge would have had created over a power line hanging over the ground as shown in Figure 15. The advantage here though is the fact that coaxial cable may take different shapes and this way the physical distance between points 1606 and 1608 of the delay element 1602 can be smaller. The shape depicted on Figure 16 is just an example of how the coaxial cable can be arranged.Matter No. MAN0002

[0056] The exemplary delay element 1700 presented on Figure 17 consists of two conducting lines (1702 and 1704), which may be two wires, two pieces of conductive tape, or other conductive material. The advantage of conducting tape over wire is that the parasitic inductance of the tape is lower than the parasitic inductance of the wire. However, a tape-based delay element has, in general, higher parasitic capacitance compared with the wire. Another way to affect the parasitic inductance and capacitance is through the spacing between the conducting lines. This is a flexible parameter and those skilled in the art will recognize that multiple ways of arrangement of the parasitic inductances and capacitances based on the distance between the conductors are possible. The embodiment shown on Figure 17 illustrates three zones (1706, 1708, and 1710) inside the delay element 1700. The parasitic inductance is lower in the middle zone 1708 since the conducting lines (1702 and 1704) are closer there, while the parasitic capacitance between the conducing lines is lower at the areas closer to the ends of the delay elements (1706 and 1710). The effect of the parasitic capacitance over the converter performance is represented by the equation Voltage=Charge / Capacitance. In general, for the delay element shown on Figure 17, the above equation is applied for the total amount of charge over the total capacitance between the conductors. However, during the time the charge is being built, the voltage present over different parts of the conducting lines will be different. This type of arrangement allows less switching stress due to the lower parasitic capacitance present on both ends of the delay elements. It will be evident to one skilled in the art, however, that any conductive material, including superconductors can be used with a similar effect as is discussed regarding Figure 17.

[0057] Figure 18 presents a general description of an exemplary power circuit 1800 based on the properties of delay elements. The illustrated power circuit 1800 comprises a source 1802, delay elements 1804 and 1806 and switch-based sink circuit 1808. The source 1802 presented on the left side of the figure is able through its internal switches 1810 and 1812 to be alternately connected to and disconnected from the delay elements 1804 and 1806. The delay Elements 1804 and 1806 can be of any type, as presented in Figure 3, Figure 4, Figure 5, Figure 6, Figure 7, Figure 8, Figure 9, and Figure 10 herein, as well as other types of delay elements, as long as they can conduct electric current or transfer electric power, and the speed of information transfer from one of the delay element ends to their other end is limited. The sink 1808 presented on the right side of Figure 18 consists of a device consuming electric power and being able to be connected or disconnected from the ends 1818 and 1820 of the delay elements 1804 and 1806. It is important to note that this sink 1808 should also be able to recuperate some portion, or all of the energy it consumes back into the delay elements 1804Matter No. MAN0002and 1806. The power from the source 1802 after being processed by the delay elements 1804 and 1806 and converted to a different voltage level by circuitry found in the sink 1808 portion of the device 1800. The recuperated energy can be extracted from the terminals 1814 and 1816, as well as from terminals 1818 and 1820. Another application of the device 1800 presented in Figure 18 is as an electric charge generator. It can be used to generate electrostatic charges in the delay elements 1804 and 1806 and their terminals 1814, 1816, 1818 and 1820, as well as to generate fast alternating electric charges in the first delay element 1804 and second delay element 1806, as well as fast alternating electric charges on their terminals 1814, 1816, 1818 and 1820. The exemplary circuit can be configured as a low-voltage to high-voltage converter. In similar embodiments in which parasitic capacitance is kept low, the circuit can be configured as an electrostatic generator.

[0058] Figure 19 is a block diagram of an exemplary power converter 1900, comprising a source 1902 with a blocking diode or diodes (1904 and 1906), delay elements 1908 and 1910, and a sink circuit 1912 consisting of two switches (1914 and 1916) and an inductor 1918. The operation of the power converter 1900 presented in Figure 19 is as follows: The source 1902 provides electric current flowing through the delay elements 1908 and 1910, the switches (1914 and 1916) of the sink 1912 and the inductor 1918 during the time while the switches (1914 and 1916) of the sink 1912 are closed. Once the switches (1914 and 1916) of the sink 1912 become open, the current in the inductor 1918 gets redirected through the diodes (1920 and 1922) of the sink 1912 back toward terminals 1924 and 1926 of delay elements 1908 and 1910. The power from the source 1902, after being processed by the delay elements 1908 and 1910 and converted to a different voltage level, can be extracted from terminals 1928 and 1930, as well as from terminals 1924 and 1926. Another application of the power converter 1900 presented in Figure 19 is as an electric charge generator. It can be used to generate electrostatic charges in the delay elements 1908 and 1910 and their terminals 1928, 1930, 1924 and 1926, as well as to generate fast alternating electric charges in the delay elements 1908 and 1910. It can also produce fast alternating electric charges on terminals 1928, 1930, 1924 and 1926.

[0059] Figure 20 is a block diagram of an exemplary power converter 2000, comprising a source 2002, delay elements (2012 and 2014). The source 2002 comprises alternating switches (2004, 2006, 2008, and 2010) providing an ability to connect a voltage source 2003 to the delay elements (2012 and 2014) at either polarity, while also being able to disconnect the source 2002 from the delay elements (2012 and 2014) and being able to short the 2016 and 2018 sides of the delay elements (2012 and 2014). The power converter 2000 also comprises a sink circuit 2020 which comprises four switches (2022, 2024, 2026, and 2028), being able to connect anMatter No. MAN0002inductor 2030, an electrical impedance, or a general load to the points 2030 and 2032 of the delay elements (2012 and 2014) either way, as well as being able to short points 2030 and 2032 of the Delay elements (2012 and 2014). The operation of the embodiment presented on Figure 20 is as follows: The source 2002 provides electric current flowing through the delay elements (2012 and 2014), two of the switches (for example, 2022 and 2028) of the Sink 2020 and the inductor 2030 for a period of time while the two switches of the sink 2020 are closed. Once the two switches of the sink 2020 that conducted current are open, the current in the inductor 2030 gets redirected through the other two switches (for example, 2024 and 2028) of the Sink 2020 back toward the delay elements (2012 and 2014). The power from the source 2002 can be processed by the delay elements (2012 and 2014) and converted to a different voltage level and then extracted from the terminals 2016 and 2018, as well as from the terminals 2030 and 2032. Another application of the device 2000 presented in Figure 20 is as an electric charge generator. The exemplary device 2000 can be used to generate electric charges in the delay elements (2012 and 2014) and their terminals 2016, 2018, 2030 and 2032 with alternating polarity. The exemplary device 2000 can also generate a rapidly changing electric field generated by the delay elements (2012 and 2014) or generated by conducting elements connected to their terminals 2016, 2018, 2030 and 2032. Exemplary embodiments such as Figure 20 can be used as voltage converters and in configurations in which parasitic capacitance values are kept very low, the circuit can generate high voltages a low or zero current to function as an electrostatic filed generator.

[0060] Figure 21 illustrates an exemplary magnetic recuperation module 2100. This module may also be referred to as a recovery module. As illustrated, the exemplary magnetic recuperation module 2100 comprises a magnetic recuperation module conductor 2104 with a limited length and positioned in close proximity to a current carrying conductor 2101 of a delay element. When a current flows through the current carrying conductor 2101 a magnetic field 2112 forms around it. A portion of this field 2112 also forms around the magnetic recuperation module conductor 2104, magnetically coupling the current carrying conductor 2101 to the recuperation module conductor 2104. When the current through the delay element (and thus conductor 2101) changes, the magnetic field 2112 around the conductor 2101 generates a voltage across both ends of the recuperation module conductor 2104. This voltage is then transferred to a capacitor 2116 which serves as short-term storage before the energy stored by the capacitor 2116 is transferred to an input of the delay element. In another exemplary embodiment, the energy stored by the capacitor 2116 may be boosted and transferred to an output of the delay element. Certain exemplary embodiments may implement both aMatter No. MAN0002transference to the input and output depending upon the needs of the circuit at a particular moment in time. Inductors 2106, 2108, and 2110 are placed in this position to ensure high frequency decoupling between the conductor 2104 and the destination point 2118 of the recuperated energy. Diodes 2102 and 2124 ensure that recovery of the energy from the magnetic field of the delay element conductor 2101 will happen at either at a moment of increase, or a moment of decrease of the current flowing through the delay element conductor 2101.

[0061] The embodiment of Figure 22 presents a power converter 2200 formed by a power source 2202, output circuit 2244, and two delay elements which in Figure 22 are presented as long current conducting lines 2203 and 2205, connecting the power source 2202 with the output circuit 2244. The circuit presented on Figure 22 as well as its principle of operation is similar to the circuit presented on Figure 11 and its principle of operation. Additionally, it will be evident that an embodiment of the magnetic recuperation module presented in Figure 21 is illustrated at 2216, 2236, and 2240 in Figure 22. During operation, the current flowing through the delay element current conducting line 2203 undergoes changes of its magnitude, which are reflected in subsequent changes of the magnitude of the magnetic field 2214 around a portion of the conducting line 2203. A portion of the magnetic field 2214 encloses a conductor 2206 of the recuperate module 2216. This change generates voltage potential difference between the two ends of the conductor 2206. The voltage potential gets transferred through the diodes 2201 and 2224 to the capacitor 2218, which subsequently accumulates the energy induced in the conductor 2206 of the recuperate module 2216. The energy which is stored in the capacitor 2218 is transferred to either the power source 2202 or to the output circuit 2244 of the power converter 2200. Throughout the circuit operation, recovery modules , 2236, 2240 and other potential recovery modules are situated on the current conducting line 2203, operate the same way as recuperation module 2016 by delivering portion of the energy stored in the magnetic field of the current conducting line 2203 to either the power source 2202, the output circuit 2244 or both in certain exemplary embodiments of power circuit converter 2200 of Figure 22. In the illustrated exemplary embodiment, this energy stored in the magnetic field of the current conducting line 2203 is provided using conductors 2242 and 2246. As illustrated, similar power recovery modules (2248, 2250, and 2252) can be placed on the delay element formed by the current conducting line 2205.

[0062] The circuit shown in Figure 23 presents an exemplary composite delay element 2300 consisting of multiple delay elements (2302, 2304 and 2306) connected through diodes 2308 and 2310 located between the various delay elements. The individual delay elements mayMatter No. MAN0002have similar or different properties, and they may be connected together through diodes or through different electrical components between them. Such a composite delay element has the advantage that a power recovery circuit may be connected on the junction points of the individual delay elements that form the composite delay element, better utilizing the process of harvesting the losses from the individual delay elements (2302, 2304 and 2306) of such a composite delay element 2300.

[0063] The exemplary power converter 2400 presented in Figure 24 consists of two delay elements 2402 and 2404 with current source 2406 connected on one side of the delay elements 2402 and 2404 and a diode 2408 on the other. The switches 2410 and 2412 serve the purpose of connecting the source 2406 to the delay elements 2402 and 2404 at the beginning of the power conversion cycle and then disconnecting delay elements 2402 and 2404 during the power conversion cycle. The switch 2414 is optional for the purpose of shorting the current source 2406 while it is disconnected from the delay elements 2402 and 2404, this way helping to avoid overvoltage the current source 2406. During the time the current source 2406 is connected to the delay elements 2402 and 2404, current flows through the delay elements 2402 and 2404 and the diode 2408, which closes the loop. When switches 2410 and 2412 open, the current through the terminals 2416 and 2418 of the delay elements 2402 and 2404 stops, while the current through the diode 2408 and subsequently through the terminals 2420 and 2422 of the delay elements 2402 and 2404 continues to flow for the time period equal to the time delay that the delay elements 2402 and 2404 provide. During the time while there is no current through the terminals 2416 and 2418 but there is a current flow through 2420 and 2422, the delay elements 2402 and 2404 accumulate an electric charge, which builds a voltage potential difference over delay elements 2402 and 2404. This voltage is the output voltage of the power converter 2400 presented in Figure 24. Providing that in some cases the physical size of the delay elements 2402 and 2404 can be quite long, there are two options for configuring the output of this exemplary power converter 2400. Both options presented on Figure 24. In a first configuration, the output can be from the terminals 2416 and 2418, shown on Figure 24 as output 2424, or the output can be from terminals 2420 and 2422, shown on Figure 24 as output 2426. It will be evident to one skilled in the art that the diode 2408 can be a switch which opens when the voltage potential of the terminal 2420 grows positive and the voltage potential of the terminal 2422 grows negative.

[0064] Figure 25 illustrates an exemplary electric generator 2500 utilizing delay elements. The electric generator 2500 comprises an input voltage source 2502, delay elements 2512 and 2514 of unspecified type, with parasitic capacitance between them illustrated as capacitorsMatter No. MAN00022516 and 2518, diodes 2504 and 2506 between the voltage source 2502 and the delay elements 2512 and 2514, a switch 2522, and output capacitor 2526, connected to the delay elements 2512 and 2514 through diodes 2525 and 2528. During operation of the exemplary electric generator 2500, when the switch 2522 is closed, current from the voltage source 2502 passes through diodes 2504 and 2506, delay elements 2514 and 2512, and switch 2522 to complete the illustrated circuit. When this current reaches a desired level, the switch 2522 is opened and the current flowing through the delay elements 2512 and 2514 at terminals 2520 and 2524 is terminated. The current through terminals 2508 and 2510 of the delay elements 2512 and 2514 continues to flow for the period of time needed for the information about the discontinued current to run through the delay elements 2512 and 2514 from terminals 2520 and 2524 to terminals on the other side 2508 and 2510 of the delay elements 2512 and 2514. This During this time, the current running from the power source 2502 charges the parasitic capacitance 2516 and 2518 between the delay elements 2512 and 2514 to a voltage level that is limited by the output voltage over the output capacitor 2526. The electric charge, for this purpose, is being transferred from the delay elements 2512 and 2514 through the reverse flow blocking diodes 2525 and 2528 to the output capacitor 2526. This cycle repeats and in this way, the generator output voltage over the output terminals 2530 exceeds the voltage of the power source 2502. Although the delay elements 2512 and 2514 of Figure 25 are illustrated as a wire arranged in a zig-zag configuration, any other type of a delay element can be utilized in an exemplary power generator including delay elements based on the physical length of wire, or another type of electric conductor.

[0065] Various embodiments of systems, devices, and methods have been described herein. These embodiments are given only by way of example and are not intended to limit the scope of the claimed inventions. It should be appreciated, moreover, that the various features of the embodiments that have been described may be combined in various ways to produce numerous additional embodiments. Moreover, while various materials, dimensions, shapes, configurations and locations, etc. have been described for use with disclosed embodiments, others besides those disclosed may be utilized without exceeding the scope of the claimed inventions.

[0066] Persons of ordinary skill in the relevant arts will recognize that the subject matter hereof may comprise fewer features than illustrated in any individual embodiment described above. The embodiments described herein are not meant to be an exhaustive presentation of the ways in which the various features of the subject matter hereof may be combined.Matter No. MAN0002Accordingly, the embodiments are not mutually exclusive combinations of features; rather, the various embodiments can comprise a combination of different individual features selected from different individual embodiments, as understood by persons of ordinary skill in the art. Moreover, elements described with respect to one embodiment can be implemented in other embodiments even when not described in such embodiments unless otherwise noted.

[0067] Any implementation or embodiment disclosed herein can be combined with any other implementation or embodiment, and references to “an implementation,” “some implementations,” “one implementation,” “an embodiment,” “some embodiments,” “certain embodiments,” or the like, are not necessarily mutually exclusive and are intended to indicate that a particular feature, structure, or characteristic described in connection with the implementation can be included in at least one implementation or embodiment. Such terms as used herein are not necessarily all referring to the same implementation. Any implementation or embodiment can be combined with any other implementation or embodiment, inclusively or exclusively, in any manner consistent with the aspects and implementations disclosed herein.

[0068] Where technical features in the drawings, detailed description or any claim are followed by reference numbers, the reference numbers have been included to increase the intelligibility of the drawings, detailed description, and claims. Accordingly, neither the reference numbers nor their absence have any limiting effect on the scope of any claim elements.

[0069] Coupled elements can be electrically, magnetically, mechanically, or physically coupled with one another directly or with intervening elements. Scope of the systems and methods described herein is thus indicated by the appended claims, rather than the foregoing description, and changes that come within the meaning and range of equivalency of the claims are embraced therein.

Claims

Matter No. MAN0002CLAIMS.What is claimed is:Claim 1. A method for generating electric power comprising:arranging an electrical power source, a delay element, and a first switch such that the delay element is located between the electrical power source and the first switch, the electrical power source connected to a first end of the delay element and the first switch connected to a second end of the delay element;closing the first switch to complete an electrical circuit in which electrical current flows from the electrical power source, through the delay element and through the first switch;monitoring an electrical current through the switch;opening the first switch when a predetermined level of electrical current is detected; after opening the switch, allowing an electrical charge to build on the delay element and harvesting the electrical charge from the second end of the delay element.Claim 2. The method of claim 1, further comprising:isolating the electrical power source from the first end of the delay element prior to harvesting the electrical charge from the second end of the delay element.Claim 3. The method of claim 2, where the isolation of the power source from the first end of the delay element is caused by a semiconductor configured as a diode located between the power source and the delay element, the diode becoming reverse biased before the charge is harvested.Claim 4. The method of claim 1, further comprising receiving the harvested electrical charge from the at least one delay element by a power converter in electrical communication with the second end of the at least one delay element.Claim 5. The method of claim 1, further comprising utilizing a recuperation circuit to recover a portion of a residual charge in the delay element after the electrical charge is harvested, where the recovered portion of the charge is transferred to the power source.Claim 6. The method of Claim 5, wherein the recuperation circuit uses magnetic coupling to generate a voltage across a conductor, the generated voltage being stored in a capacitor. Claim 7. The method of claim 1, further comprising placing a semiconductor configured as one of a switch or a diode in electronic communication with the second end of the delay element such that the electrical charge from the delay element is transferred through the semiconductor to a capacitor.Matter No. MAN0002Claim 8. A device for generating electric power, the device comprising:at least one delay element having a first end and a second end;a power source in electrical communication with the first end of the delay element; a switch in electrical communication with the second end of the delay element; for a first period of time, the switch being in a conducting state causing electrical current to flow from the power source into the at least one delay element;for a second period of time, the switch being in a nonconducting state and during that second period of time, current continuing to flow from the power source into the at least one delay element, causing an electrical charge to form on the delay element; andat and end of the second period of time, the power source being isolated from the at least one delay element such that the electrical charge remains on the delay element.Claim 9. The device of claim 8, where the isolation of the power source from the at least one delay element is caused by a semiconductor configures as one of a switch or a diode, the semiconductor located between the power source and the delay element.Claim 10. The device of claim 8, where the isolation of the power source from the at least one delay element is caused by a semiconductor configured as a diode located between the power source and the delay element.Claim 11. The device of claim 8, further comprising:a semiconductor configured as a diode connected between the power source and the first end of the at least one delay element, the semiconductor arranged so that it prevents current from the delay element from flowing into the power source; anda power converter in electrical communication with the second end of the at least one delay element, the power converter receiving a first portion of the electrical charge from the delay element at the end of the second period of time.Claim 12. The device of claim 8, wherein the delay element comprises a length of electrical conductor formed from a superconducting material.Claim 13. The device of claim 8, wherein the delay element comprises a wire suspended above the earth.Claim 14. The device of claim 8, further comprising an inductor through which the electrical current flows when the switch is in a conducting state.Claim 15. The device of claim 12, further comprising a recuperation circuit to recover second portion of electrical charge remaining in the delay element after the power converter receives first the portion of the electrical charge from the delay element, where the recovered charge is transferred to the power source.Matter No. MAN0002Claim 16. The device of claim 15, wherein the recuperation circuit uses a magnetically coupled conductor to generate a voltage across the magnetically coupled conductor, the voltage stored in a capacitor.Claim 17. A power generation system comprising:a voltage source;a semiconductor configured to function as a diode;a first delay element;a switch;a first terminal of the voltage source in electric communication, via the semiconductor, with a first end of the first delay element, the switch in communication with a second end of the first delay element;the switch being in a conducting configuration until a current flowing from the first terminal of the voltage source through the semiconductor and the switch to a second terminal of the voltage source reaches a predetermined value;the switch then being caused to be in a non-conducting configuration, the current continuing to flow from the voltage source into the first delay element until a lack of current passing through the switch propagates through the first delay element, an electrical charge building at the second end of the first delay element as a result of the current flowing from the voltage source during a period when the switch is in a non-conducting state.Claim 18. The power generating system of claim 17, further comprising:a second semiconductor configured as a diode;a capacitor;the second semiconductor in electrical communication with the second end of the first delay element and arranged such that the electrical charge at the second end of the first delay element passes through the second semiconductor configured as a diode into the capacitor. Claim 19. The power generating system of claim 17, further comprising:a second delay element arranged such that a first end of the second delay element is in electrical communication with the switch such that the switch is connected between the second and first delay elements; anda second end of the second delay element in electrical communication with a second semiconductor configured as a diode and arranged to permit electrical current to flow from the second delay element to one of, the second terminal of the voltage source or an output capacitor.Claim 20. The power generating system of claim 19, further comprising:Matter No. MAN0002a third semiconductor configured as a diode;a fourth semiconductor configured as a diode;a capacitor;the third semiconductor in electrical communication with the second end of the first delay element, the fourth semiconductor in electrical communication with the first end of the second delay element, the capacitor arranged such that the charge from the second end of the first delay element and the charge from the first end of the second delay element are transferred into the capacitor.Claim 21. The power generating system of claim 19, further comprising a power conversion circuit connected across the capacitor.Claim 22. A method of power conversion, comprising storing energy in a delay element, the delay element storing energy utilizing a delay in propagation of a power flow from a first end of a delay element to a second end of the delay element, the delay caused by the propagation traveling at a speed not exceeding the speed of light.Claim 23. A power converting system comprising:a power source with a first and a second output;a first semiconductor device configured as one of a switch or a diode, the first semiconductor device in electrical communication with the first power source output;a second semiconductor device configured as one of a switch or a diode, the first semiconductor device in electrical communication with the first power source output;a power sink with a first and second input;a third semiconductor device configured as one of a switch or a diode, the third semiconductor device in electrical communication with the first input of the power sink and configured to control current to the power sink;a fourth semiconductor device configured as one of a switch or a diode, the fourth semiconductor device in electrical communication with the second input of the power sink and configured to control current to the power sink; andat least one delay element having a first and a second end, the first end in electrical communication with the first output of power source terminals via the first semiconductor device, the second end in electrical communication with the first input of the power sink via the third semiconductor device.

Images