Computing grain dispatching device in matrix inversion

A technology of matrix inversion and scheduling device, which is applied in the field of data computing and can solve problems such as poor data processing capability and low processing efficiency.

Active Publication Date: 2018-05-29
TIANJIN CHIP SEA INNOVATION TECH CO LTD
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  • Abstract
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Problems solved by technology

[0004] In view of this, the object of the present invention is to provide a calculation particle scheduling device in matrix inversion, to alleviate the technical problems of low processing efficiency and poor data processing ability in the matrix inversion algorithm in the prior art

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  • Computing grain dispatching device in matrix inversion
  • Computing grain dispatching device in matrix inversion
  • Computing grain dispatching device in matrix inversion

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[0042] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, not all of them. the embodiment. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0043] At present, the matrix inversion algorithm in the prior art has low processing efficiency and poor data processing capability. Based on this, the embodiment of the present invention provides a calculation particle scheduling device and method in matrix inversion, and the application can be reconfigured The calculation method performs calculation granule splitting, high-efficie...

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Abstract

The invention discloses a computing grain dispatching device and method in matrix inversion, and relates to the technical field of data computing. The device comprises a computing distribution dispatching module, multiplication computing grains, accumulation and multiplication computing grains and a multiplication result judgment module. The method comprises the following steps: when the computingdistribution module receives a to-be-treated equation, determining the accumulation and multiplication computing grains and the computing grain identification in an idle state, generating equation additional information for the to-be-treated equation according to the computing grain identification, and separately distributing a plurality of multiplication in the to-be-treated equation into at least two mortification computing grains to obtain a plurality of multiplication values; and delivering a plurality of multiplication values and constant terms of the to-be-treated equation to the accumulation and multiplication computing grains corresponding to the computing grain identification by the multiplication result judgment module according to the equation additional information so as to obtain a computing result. By the computing grain dispatching device and method in matrix inversion, a computing equation in a matrix inversion constitution is subjected to computing grain disassembling, computing grain efficient dispatching and moderate parallel treatment, reconfigurable matrix inversion computing is realized, and thus, accelerating treatment on FPGA hardware is realized.

Description

technical field [0001] The invention relates to the technical field of data calculation, in particular to a calculation particle scheduling device in matrix inversion. Background technique [0002] In the field of data computing, how to apply a general-purpose computing platform for efficient data computing has always been the research direction of the large data processing application environment. Especially in the field of radar signal processing, the matrix inversion operation in the STAP (Space-Time Adaptive Processing) operation has always been the bottleneck restricting the real-time and efficient processing of radar signals. It is very critical in signal processing. [0003] At present, the matrix inversion algorithm developed by FPGA (Field-Programmable Gate Array) mainly includes pipeline processing and parallel processing, but because the amount of data calculation in matrix inversion will gradually increase, so pipeline The processing is not efficient; parallel ...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/16G06F7/53
CPCG06F7/53G06F17/16
Inventor 王元磊张兴明宋克刘勤让沈剑良吕平朱珂刘冬培王盼高彦钊谭力波陶常勇杨堃王封张帆张新顺汪欣
Owner TIANJIN CHIP SEA INNOVATION TECH CO LTD
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