40results about How to "Save hardware resources" patented technology

The invention provides a communication and sensing integration method and system, electronic equipment and a storage medium. The method comprises the following steps: under the condition that a target object needs to be sensed, detecting the target object based on a passive detection technology to obtain a detection distance of the target object; and determining a target signal transmission mode adapted to the detection distance for sensing. And according to the target signal transmission mode, performing communication processing based on the target antenna in the communication time slot, and performing sensing processing based on the target antenna in the sensing time slot. Based on the scheme of the application, communication and sensing functions can be realized only by deploying a set of target antennas, so that spectrum and hardware resources are saved. In addition, in the sensing process, the signal transmission mode is adapted according to the detection distance of the target object determined by the passive detection technology, and the sensing precision for the target object can be improved. Meanwhile, the passive detection technology can assist in locking the target object in the sensing process, and the blind area possibly caused by switching the signal transmission mode of the target antenna is made up.

The invention belongs to the field of photoelectric detection, and discloses a germanium-silicon photoelectric detector array and a signal reading method thereof, and the germanium-silicon photoelectric detector array comprises a plurality of macro pixel units which are sequentially arranged side by side according to a set interval; each macro pixel unit comprises a plurality of pixel units and an output bus, the pixel units are sequentially arranged from top to bottom according to a set interval, the output end of each pixel unit is electrically connected with the output bus, and the voltage input end of each pixel unit is connected with a bias voltage output module. Providing a bias voltage for each pixel unit to enable each pixel unit to work in a bias state; inputting an optical signal to a detector of each pixel unit to generate a light current, and performing signal conversion and amplification on the light current to obtain an amplified voltage signal; and the voltage signal is output to the output bus after passing through the driver. According to the technical scheme, layout, wiring and hardware resources can be saved, and meanwhile the adverse effect caused by the power supply crosstalk problem is reduced.

The invention provides a PCIe clock gating circuit and a PCIe clock control method. The PCIe clock gating circuit comprises a link width control circuit, a link rate control circuit and a link state control circuit, the link width control circuit is used for outputting a control signal for closing a clock of a module not related to the current width when the current link width is smaller than the maximum width; the link rate control circuit is used for outputting a control signal for closing a clock of a non-current rate related module, and the link state control circuit is used for outputting a control signal for closing a clock of an abnormal working state related module when the current link state is an abnormal working state. The abnormal working state related modules comprise related modules corresponding to other link states except the current link state; and the link state control circuit is also used for outputting a control signal for closing clocks of the training code stream sending module, the training code stream receiving module and the link training related module in a normal working state.

The invention discloses a method and equipment for processing a multi-channel signal of a low-orbit satellite, relates to the technical field of satellite communication, and is used for solving the problems of high difficulty in realizing parallel processing of multi-channel data and high consumption of computing resources in a multi-channel carrier aggregation scene of the low-orbit satellite in related technologies. The method comprises the following steps: firstly, receiving multiple paths of baseband signals, converting the multiple paths of baseband signals from a time domain to a frequency domain through first fast Fourier transform to obtain multiple paths of frequency domain baseband data, then, carrying out up-sampling processing, up-conversion processing and carrier aggregation processing on the multiple paths of frequency domain baseband data to obtain multi-channel carrier aggregation data, and finally, carrying out up-conversion processing on the multi-channel carrier aggregation data to obtain multi-channel carrier aggregation data. And converting the multi-channel carrier aggregation data from a frequency domain to a time domain through first inverse fast Fourier transform to obtain a multi-channel carrier aggregation signal, and sending the multi-channel carrier aggregation signal to a digital front end of a receiving end. According to the embodiment of the invention, in a multi-channel carrier aggregation scene, aggregation processing of multi-channel carrier signals is realized with relatively low calculation amount and relatively low complexity.

The invention discloses a streamlined design circuit of an NTT algorithm, and belongs to the technical field of integrated circuit design, the circuit comprises a streamlined butterfly unit, a data storage module, a butterfly address remapping module and a twiddle factor module, the circuit supports a forward NTT algorithm and a reverse NTT algorithm at the same time, supports operation of variable parameters on different domains, and adopts a streamlined method. Based on a single-port SRAM storage polynomial coefficient, a butterfly address remapping method is provided, and the method has the remarkable advantages of being small in circuit area and high in performance.

The invention discloses a reusable double-domain multiplier design method and system, and the method comprises the steps: double-domain non-logic base-4Booth coding: setting a coding logic which simultaneously supports the complement operation of a prime number domain and a binary extension domain and a symbol extension bit, and easily realizing the generation of a partial product under double domains through extension; dual-domain partial product generation: generating a partial product array based on the coded values; performing Wallace tree-shaped compression: on the basis of a compressor of a Wallace tree-shaped compression structure, realizing dual-domain compression by introducing a domain control bit; and adder operation: obtaining two partial products based on compression, and adding the two partial products through an adder to obtain a final multiplication result. According to the method, Booth coding, double-domain partial product generation and double-domain compression logic on the prime number domain and the binary extension domain are designed, the symbol extension bit preprocessing technology and the complement plus one-bit optimization technology are combined, multiplication on the double domains can be supported at the same time, and the method has the remarkable advantages of being small in resource occupation and high in performance.

The invention relates to a multi-task joint image recognition method, and relates to the technical field of computer vision and deep learning. Comprises: constructing a training sample; constructing a multi-task joint image recognition model, setting model training hyper-parameters, inputting training data into the feature extraction backbone network, and obtaining a backbone network output feature map; inputting the feature map into a check network, and outputting a multi-scale feature map; inputting the multi-scale feature map into a multi-task detection branch to obtain a plurality of task prediction results; calculating and evaluating a loss value according to the result and a data set label, and iteratively training and optimizing through an optimizer; obtaining a model weight and then loading test data evaluation; a target detection result is post-processed by adopting non-maximum suppression, a drivable region segmentation result is subjected to discontinuous and small hole filling by adopting a morphological operation method to extract boundary points, a lane line segmentation result is subjected to clustering and sliding window search, and lane line fitting is performed after isolated feature point clusters are removed; and finally, reasoning the model deployment controller.

The present invention belongs to the technical field of computer technology server-side data processing, and discloses a templated business cache processing method and system. For a relational database using structured data, this method completes data storage in the relational database by defining a fixed data model as a cache data structure; the data stored in the cache is converted into a usable binary format in a serialized manner; an abstract interface for the data structure and an abstract interface for data operations are defined, and cache commands are performed on the detailed problem data used by the template class. The present invention uses a template to encapsulate the specific implementation of the operation steps into the template class, so that a general processing that supports multiple data types can be used to improve the code reuse rate and reduce redundancy. At the same time, the template class can be easily expanded to support new data types, and the unified maintenance method in the template class makes the code easier to maintain and expand.

The invention designs an FPGA-based bearing signal fault diagnosis method and device. The device comprises a data acquisition module, an analog-to-digital conversion module, a filtering module and a fault classification module. The method comprises the steps that the data acquisition module controls acceleration sensors installed at multiple positions through the acquisition control unit to carry out acquisition control on bearing state information, and the analog-to-digital conversion module converts analog signals into digital signals through an internal analog-to-digital conversion unit; the filtering unit carries out filtering through an internal data delay module and an adaptive filtering module, and the fault classification module carries out fault diagnosis through a signal processing module and a signal analysis module, and transmits a processing result. The bearing vibration signal collecting and preprocessing device based on the FPGA is achieved and has high flexibility and adaptability.

The present invention discloses a FFT calculation zero-filling control device and method based on data reading indication control, the device comprises a storage space for receiving M data required for FFT calculation collected in real time by a real-time data collection module for storage, and further comprises: a data reading module for storing the M data required for FFT calculation according to the number of calculation points N supported by the FFT processor. x Generate the corresponding N x The original access address stream is mapped to N actual storage spaces. x The actual access address is generated according to the original access address stream and the number of acquisition points M of the real-time data acquisition module, and the zero-filling judgment signal corresponding to each access address is generated synchronously; the data reading control module is used to receive the data reading request, according to the N output of the data reading module x The actual access address and the corresponding zero-fill judgment signal control the output of N from the storage space x The invention has the advantages of simple implementation method, low complexity and cost, and high execution efficiency and accuracy.

The embodiments of the present specification disclose a CPLD-based I2C signal transparent transmission method, device and medium, and relate to the technical field of switch hardware. The method comprises: based on the triggering of a reset signal of an I2C signal transparent transmission system, a direction signal of an I2C signal to be transmitted is generated according to the reset signal by a direction judgment module; wherein the direction signal of the I2C signal to be transmitted is used to indicate the transmission direction of the I2C signal to be transmitted, including a first direction and a second direction, the first direction being the signal transmission direction output by an I2C master device and input by an I2C slave device, and the second direction being the signal transmission direction output by an I2C slave device and input by an I2C master device; and according to the direction signal of the I2C signal to be transmitted, the I2C signal to be transmitted is controlled to be transparently transmitted according to the direction signal by a direction control module, the CPLD is only used for transmission, and there is no need to store data and then read it, thereby saving the hardware resources of the CPLD and ensuring the real-time performance of signal transmission.

The application discloses a parking control method, device, automatic parking auxiliary controller, terminal and system. The parking control method is applied to an automatic parking auxiliary (APA) controller and includes the following steps: determining parking space information according to images collected by multiple cameras arranged on a vehicle; sending the parking space information, radar data and an electronic map constructed according to the images to a terminal, so that the terminal generates parking control information according to the parking space information, the radar data and the electronic map; and controlling the vehicle to park in a target parking space according to the parking control information. The technical scheme saves the hardware resources of the vehicle and improves the user experience by sending the parking space information, the radar data and the electronic map to the terminal through the APA controller, generating the parking control information in the terminal and returning the parking control information to the APA controller, so that the APA controller controls the vehicle to park in the target parking space according to the parking control information.

The present invention provides a navigation scene recognition method, system, device and medium based on satellite distribution, the method comprising: presetting multiple navigation scenes, and respectively collecting multi-constellation GNSS measured data corresponding to each navigation scene; constructing a navigation scene recognition data set according to the multi-constellation GNSS measured data of all navigation scenes, and dividing the navigation scene recognition data set into a training set and a verification set according to a preset ratio; training a CNN network according to the training set and the verification set to obtain a navigation scene prediction model; obtaining the multi-constellation GNSS measured data to be identified, and obtaining a scene recognition result according to the multi-constellation GNSS measured data to be identified and the navigation scene prediction model. The present invention directly uses measured GNSS data for scene recognition, which not only consumes less hardware resources, but also can mine the deep features of GNSS data, effectively improve recognition accuracy and generalization ability, and provide reliable guarantee for navigation tasks in complex urban environments.

The present invention discloses a zero-filling control device and method for FFT calculation based on data storage indication control, the device comprises: a real-time data acquisition module, used for real-time acquisition of data required for FFT calculation and writing it into a designated storage space, and sending the storage state and storage address of the written data in the storage space to an indication register module; an indication register module, used for configuring each data bit in the indication register according to the data storage state and storage address, wherein each data bit corresponding to the stored data is configured as a first flag, and the remaining data bits are configured as a second flag; a data output control module, used for, when receiving a data read request, controlling the output of data to a data reading module in an FFT processor according to each data bit in the indication register. The present invention has the advantages of simple implementation method, low complexity, low hardware resource consumption, strong real-time performance and robustness.

The application discloses an AM transmitting signal modulation depth calibration method and device, and relates to the technical field of communication. The method comprises the following steps: initializing and configuring an AM transmitting link according to a control signal sent by an AM detection control link to obtain an initial AM amplitude modulation signal; performing signal conversion on the initial AM amplitude modulation signal to obtain an AM envelope digital signal, and performing preliminary AM carrier signal and modulation signal amplitude calibration according to the AM envelope digital signal to obtain a preliminary amplitude calibration result; generating a control signal of the AM transmitting link, traversing a working frequency range of the AM transmitting link according to the control signal of the AM transmitting link, and performing S2 to complete the AM modulation depth calibration point by point. The application can make the modulation depth of the AM transmitting signal meet the corresponding standard requirements, thereby improving the transmission quality and power utilization rate of the AM transmitting signal and ensuring the signal transmission efficiency.

The utility model discloses a vehicle-mounted image processing system and an automobile. The vehicle-mounted image processing system comprises a first image acquisition module, a first deserializer, a first serializer, a second serializer, a first display part, a second display part and an image processing module, wherein the output end of the first image acquisition module is connected with the input end of the first deserializer; the first deserializer is provided with two output ends, one output end of the first deserializer is connected with the input end of the first serializer, and the output end of the first serializer is connected with the input end of the first display part; the other output end of the first deserializer is connected with the input end of the image processing module, the output end of the image processing module is connected with the input end of the second serializer, and the output end of the second serializer is connected with the input end of the second display part. According to the scheme disclosed by the utility model, the cost of the driving and parking integrated domain controller can be reduced, the image processing speed is improved, the real-time performance of image display of an image output system is improved, and the driving safety is improved.

The present invention discloses a narrowband multi-subband time division radio frequency remote unit and a sub-band separation and combination method, wherein the narrowband multi-subband time division radio frequency remote unit comprises a multi-channel direct digital frequency synthesizer group, a downlink digital up-converter unit, an uplink digital down-converter unit, a multiplier group for downlink sub-band combination, a multiplier group and an accumulator for uplink sub-band separation. The present invention can save a lot of hardware resources and logic resources in the application scenario of ultra-multi-carrier by multiplexing the direct digital frequency synthesizer group.

A display driving device includes a driving unit and a burn-in compensation device. The driving unit drives a display panel to display a display frame on the display panel. The burn-in compensation device accumulates the luminous time of each sub-pixel unit in a camera area under the screen of the display panel, and finds out the compensation gain value of each sub-pixel unit in the camera area under the screen based on the accumulated luminous time to compensate for the decayed luminous brightness of the camera area under the screen.

The present application relates to the technical field of air quality monitoring, and aims at the problems of difficult air organic acid gas perception, high monitoring cost and difficult hardware deployment for museum users, and provides a kind of organic acid visual three-dimensional diffusion simulation method and system, current environmental parameters are collected and filtered, improved multi-parameter lookup table method and trapezoidal numerical integration method are innovatively used to calculate the cumulative corrosion exposure of the week, and the cultural relic health index is calculated;Finally, the cultural relic health index and the cumulative corrosion exposure of the week are jointly mapped into the corrosion risk level, the organic acid corrosion risk level heat map is generated through the three-dimensional simulation engine, and the adjustment mechanism is triggered.Compared with the prior art, the present application reduces the cost of organic acid gas monitoring, while improving the visualization degree of organic acid monitoring and cultural relic health degree evaluation, and is suitable for museum whole exhibition hall, bronze exhibit cabinet, painting warehouse and other scenes.

The application discloses a low-bit matrix calculation device with a floating-point scaling factor and a calculation method thereof. The device comprises a scaling factor processing module, an input module, a matrix calculation module, a floating-point accumulation module and an output module. The method first groups and quantizes weight and eigenvalue matrices to obtain quantization values and floating-point scaling factors; then, the scaling factor product is calculated in advance with a single accumulation length as a grouping unit; then, matrix multiplication and accumulation operation is performed, the result is multiplied by the scaling factor product after being converted into an fp16 or bfp16 format, and then accumulated into a final result; and finally, the result is output after being dequantized. The application simplifies the group-wise calculation process, saves hardware resources, guarantees calculation accuracy, meets different scene requirements and improves calculation efficiency by sharing the scaling factor product and using fp16 or bfp16 as an accumulator.

This invention discloses a vehicle control method, device, automatic parking assist controller, terminal, and system. The vehicle control method, applied to an automatic parking assist (APA) controller, includes: sending images and camera calibration data collected by multiple cameras installed on the vehicle to a terminal, enabling the terminal to determine parking space information and construct an electronic map based on the images and camera calibration data; receiving parking space information and electronic map information returned by the terminal; determining a parking trajectory based on the parking space information, electronic map information, and radar data; and controlling the vehicle to park in the target parking space according to the parking trajectory. This technical solution, through the APA controller sending images and camera calibration data to the terminal, where the parking space information is determined and an electronic map is constructed, and then the terminal returning the parking space information and electronic map information to the APA controller, enables the APA controller to determine the parking trajectory and control the vehicle to park in the target parking space according to the parking trajectory, thus saving vehicle hardware resources.

The present application provides a signal detection method and system for a large-scale MIMO system, which determines a first damping coefficient and a second damping coefficient according to the number of antennas at the transmitting end and the number of antennas at the receiving end; determines the initial mean of the posterior probability distribution of the transmitted signal according to the received signal, the channel matrix, the average symbol energy and the first damping coefficient; uses the SORI method to perform SORI iteration on the mean of the posterior probability distribution of the transmitted signal, and determines the initial mean of the Gaussian distribution obeyed by the cavity edge probability according to the mean vector after the SORI iteration; uses the EPA iteration method to iteratively update the mean of the Gaussian distribution obeyed by the cavity edge probability, and uses the mean of the Gaussian distribution obeyed by the cavity edge probability that reaches the preset number of EPA iterations as the estimated value of the transmitted signal. SORI and EPA algorithms are combined, and SORI is used to approximate the matrix inversion of the initialization part of the EPA algorithm, thereby greatly improving the convergence speed.

The invention discloses a frequency measurement method and device, a storage medium and electronic equipment. The method comprises the following steps: carrying out analog-to-digital sampling on a signal to be measured at a first sampling rate to obtain a first sampling signal, and carrying out first N-point fast Fourier transform on the first sampling signal to obtain a first frequency; carrying out sampling down-sampling on the first sampling signal based on a preset sampling rate to obtain a second sampling signal sampled under a second sampling rate corresponding to the preset sampling rate; performing second N-point fast Fourier transform on the second sampling signal to obtain a second frequency; under the condition that frequency aliasing does not occur, determining a frequency measurement value of the to-be-measured signal according to the second frequency; and under the condition that frequency aliasing occurs, performing de-aliasing according to the second sampling rate and the first frequency to obtain a frequency after de-aliasing, and determining a frequency measurement value of the to-be-measured signal according to the frequency after de-aliasing and the first frequency. According to the technical scheme provided by the invention, the interference signal radiation delay time in the electronic warfare system can be shortened, and hardware resources required by frequency measurement of the system are saved.

This application provides a training method, apparatus, and electronic device for a multi-task risk prediction model. For predicting the probability of an event occurring at different time periods, the core of the multi-task risk prediction model provided in this application includes two layers: a general information extraction layer and a specific information extraction layer. The specific information extraction layer includes several expert networks corresponding to different prediction period nodes. Using the embodiments of this application, risk probability prediction for different prediction period nodes can be achieved without creating multiple independent models, effectively saving the hardware resources required for the prediction model. Furthermore, by penalizing the target loss function with a group constraint loss function, the multi-task risk prediction model trained based on this target loss function can accurately identify the group distribution of the input data, thereby outputting risk prediction results that conform to the group distribution, thus ensuring the accuracy and stability of the prediction results.

The invention relates to the technical field of signal processing, in particular to a Cholesky matrix decomposition inversion method based on an FPGA (Field Programmable Gate Array), which comprises the following steps that: a first state machine indexes corresponding elements which need to be subjected to multiplication, addition or division calculation at the moment according to an address sequence of elements in matrixes L and C, and performs Cholesky decomposition on an input covariance matrix A to obtain lower triangular matrixes C and L; after calculation is completed, a result is stored in the RAMs of the corresponding matrixes L and C, and LC matrix decomposition is completed; after LC matrix decomposition is completed, switching to a second state machine, repeating the steps, and after element data of all Y matrixes are calculated and stored, completing solving of an inverse matrix Y of the matrix C; and after the inverse matrix Y of the matrix C is solved, switching to the third state machine, calculating and storing the inverse matrix W of the matrix A, and finally outputting the matrix W. According to the invention, hardware resources of the FPGA are saved; and the operation time of the operation state pipeline is reduced through the element address index.

The invention provides a configurable depth perception convolution operator hardware architecture which can be applied to the technical field of hardware design. Comprising a task scheduling module used for generating a data enable signal and controlling the execution sequence of convolution tasks based on the data enable signal; the configurable module is used for determining a working mode based on the mode enable signal; the depth value cache module is used for determining at least one depth value corresponding to the working mode under the condition that the depth value determination enable signal is received, and respectively sending the at least one depth value corresponding to the working mode to the depth coefficient calculation module under the condition that the depth value sending enable signal is received; the depth coefficient calculation module is used for obtaining a depth coefficient set corresponding to the at least one depth value based on the at least one depth value; the pre-calculation module is used for pre-calculating the depth coefficient set and the input feature map to obtain a pre-calculation result; and the systolic array is used for performing convolution processing on the pre-calculation result to obtain a convolution processing result.

A noise estimation method, an image processing method and device, and a storage medium. In the noise estimation method, a mapping derivative result is obtained according to the mapping curve; an original estimation result is obtained, and the original estimation result is the noise estimation result of the original image; and a noise estimation result of the image to be estimated is obtained according to the mapping derivative result and the original estimation result. Performing noise estimation on the image to be estimated obtained after nonlinear mapping can effectively save hardware resources, and the noise estimation result is obtained according to the mapping derivative result related to the mapping curve of the nonlinear mapping and the original estimation result, so the noise estimation result is related to the nonlinear mapping, and the noise estimation result has higher accuracy, which can effectively improve the effect of subsequent noise reduction processing, and only needs to be derived for the mapping curve of the nonlinear mapping, so the calculation amount is small and the calculation speed is fast.

The invention provides an autonomous mode switching control method and system for an air-ground bimodal robot, and particularly relates to the technical field of robot control, and the scheme comprises the steps: constructing a second-order nonlinear motion response model of a control system of the air-ground bimodal robot; the running state of the air-ground bimodal robot on the target path is obtained in real time, and the current running mode of the air-ground bimodal robot and the output value of the second-order nonlinear motion response model are determined based on the running state; identifying the second-order nonlinear motion response model by adopting an iterative learning algorithm to obtain an estimated value; and on the basis of the output values and the estimated values at the adjacent moments, autonomously switching or keeping the motion modes of the air-ground bimodal robot on the target path. According to the scheme, only one controller is needed to meet control requirements under two different motion models, hardware resources can be greatly saved, the method does not depend on a high-precision model, and operation mode switching can be automatically completed on the basis of maximum energy utilization.

The utility model discloses a kind of RS485 charging control systems, including 485 controller, 485 controller includes power supply end+12V, ground terminal GND, signal end A and signal end B, the power supply end+12V of 485 controller is connected with the power supply end+12V of lithium battery motor through network cable, the ground terminal GND of 485 controller is connected with the ground terminal GND of lithium battery motor through network cable, the signal end A of 485 controller is connected with the signal end A of lithium battery motor through network cable, the signal end B of 485 controller is connected with the signal end B of lithium battery motor through network cable.This one-to-many charging mode, single wire (network cable) can complete communication+power supply / charging mode, and multiple curtain motors are connected to master control device through a network cable and communicate the power of multiple curtain motors through network cable, and the master control carries RS485 communication protocol to monitor the power of curtain motor through network cable, when the power of certain curtain motor is less than charging threshold value, communication control power shortage curtain motor starts charging, and hardware resources are saved.

The invention discloses a high-precision current detection system for a composite multi-parameter sensor chip, and the system comprises a housing, the housing is provided with a connector and a diverter, the interior of the housing is provided with a PCBA board, and the interior of the PCBA board is provided with a current detection module. The current detection module comprises a power supply circuit, a signal isolation circuit, an MCU, a data memory and a temperature monitoring sensor. The ADC sampling end of the MUC is connected with the diverter, the temperature control input end of the MUC is connected with the temperature monitoring sensor, and the temperature monitoring sensor is used for monitoring and detecting the temperature of the diverter; a communication port of the MUC is connected with a data storage device, and current calibration parameters at different temperatures are stored in the data storage device; the power supply input end of the MCU is connected with the power supply circuit through the signal isolation circuit; the power supply circuit is connected with the connector; and a sliding filtering algorithm and a temperature compensation algorithm are arranged in the MCU. The current detection of the composite multi-parameter sensor chip can be met, and the method has the advantage of high precision.