Hardware realization method and system for artificial neural network algorithm

An artificial neural network and neural network technology, applied in the hardware implementation method of artificial neural network algorithm and its system field, can solve the problems of expensive hardware resource occupation and excessive size, and achieve the effect of low cost and saving hardware resources

Inactive Publication Date: 2009-09-09
UNIV OF SHANGHAI FOR SCI & TECH
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AI Technical Summary

Problems solved by technology

[0008] The object of the present invention is to provide a kind of hardware realization method and system thereof of artificial neural network algorithm, overcome the expensive o

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  • Hardware realization method and system for artificial neural network algorithm
  • Hardware realization method and system for artificial neural network algorithm

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Embodiment Construction

[0023] In order to make the technical means, creative features, goals and effects achieved by the present invention easy to understand, the present invention will be further described below in conjunction with specific illustrations.

[0024] Such as figure 1 , figure 2 As shown, an artificial neural network algorithm system includes a top-level module xor_s, and the top-level module xor_s is composed of several neuron modules NY3_s. The neuron module NY3_s is composed of a multiplier Multiplier_s and an accumulator Adder_s. Under the control of the clock synchronization signal, the input from the upper layer neuron enters the neuron serially and multiplies its weight, and the multiplication result is accumulated in the accumulator Adder_s.

[0025] The artificial neural network algorithm system uses a 3-2-1 network, and the top module xor_s includes 3 input neurons, 2 hidden layer neurons, and 1 output layer neuron.

[0026] see figure 1 , the whole neural network can be ...

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Abstract

The invention provides a hardware realization method and a system for an artificial neural network algorithm, which overcome the defects of high cost and overlarge occupation of hardware resources of the prior hardware realization technology. The system comprises a top layer module, the top layer module consists of a plurality of neuron modules, pulse input ends of the neuron modules input given weight products, output ends of the neuron modules fit the given weight products into a Sigmoid function of a neutral network through a normal distribution random generator and a nonlinear converter, and then the Sigmoid function is converted into pulse to be output through a pulse converter. Compared with the prior realization technology, the hardware realization method and the system for the neural network algorithm avoid the embarrassment that a serial mode in the prior software realization is used to finish parallel computation, overcome the disadvantages of software realization, save a large amount of hardware resources due to the algorithm optimization, have lower cost due to the realization on an FPGA platform, utilize an optimized algorithm to avoid the difficulty that the Sigmoid function is difficult to realize by a hardware, and also save the hardware resources by using an accumulation mode.

Description

technical field [0001] The invention relates to an artificial neural network algorithm, in particular to a hardware implementation method and system of the artificial neural network algorithm through FPGA hardware. Background technique [0002] Artificial neural network is a kind of imitating human intuitive thinking, and it is a nonlinear dynamic system, which is characterized by distributed storage of information and parallel collaborative processing. Although the structure of a single neuron is extremely simple and its functions are limited, the behaviors that can be realized by a network system composed of a large number of neurons are extremely colorful. The study of artificial neural network is to effectively use this characteristic of the human brain, which belongs to an emerging edge and interdisciplinary science. The study of neural network will definitely have a profound impact on computer science and intelligence science, and improve the intelligence of computers....

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Application Information

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IPC IPC(8): G06N3/06
Inventor 马立新李长乐张学佳
Owner UNIV OF SHANGHAI FOR SCI & TECH
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