Signal Processing Method, Apparatus, Electronic Device, and Storage Medium

Abstract

Embodiments of the present application disclose a signal processing method, apparatus, electronic device, and storage medium, relating to the field of electronic technologies. Among them, the method includes: obtaining a pulse signal output according to an input signal; extracting a plurality of target post-cursor signals from the pulse signal based on a preset rule; obtaining the value of each target post-cursor signal among the plurality of target post-cursor signals; obtaining a comprehensive judgment value of a multi-bit post-cursor signal based on the plurality of target post-cursor signals and the value of each target post-cursor signal; adjusting a linear continuous-time equalizer based on the comprehensive judgment value of the multi-bit post-cursor signal, and processing the input signal through the adjusted linear continuous-time equalizer. The present application can improve the phenomenon that the CTLE system is in an under-equalized state, with a low eye height and unsatisfactory performance after completing the adaptive process.

Description

Technical Field

[0001] The present application relates to the field of electronic technologies, and more specifically, to a signal processing method, apparatus, electronic device, and storage medium. Background Art

[0002] In serial communication technologies, a Continuous Time Linear Equalizer (CTLE) is usually used to equalize signals, which is mainly applied to situations with small insertion loss. When in use, the CTLE equalization is located at the front end of the receiving end, which can further compensate for signal attenuation, reduce Inter Symbol Interference (ISI), and improve the signal waveform.

[0003] Generally speaking, the CTLE obtains a suitable control quantity through an adaptive algorithm, and then adjusts the CTLE itself appropriately through this control quantity, so as to equalize the signal through the adjusted CTLE.

[0004] However, the adaptive algorithms in related technologies are difficult to ensure that the signal has a good gain after being processed by the CTLE, and there are usually problems such as small gain and poor gain effect. Summary of the Invention

[0005] In view of the above problems, the present application provides a signal processing method, apparatus, electronic device, and storage medium to solve or partially solve the above problems.

[0006] In a first aspect, an embodiment of the present application provides a signal processing method, which includes: obtaining a pulse signal output according to an input signal; extracting a plurality of target postcursor signals from the pulse signal based on a preset rule; obtaining the value of each target postcursor signal in the plurality of target postcursor signals; obtaining a comprehensive judgment value of the multi-bit postcursor signal based on the plurality of target postcursor signals and the value of each target postcursor signal; adjusting a linear continuous time equalizer based on the comprehensive judgment value of the multi-bit postcursor signal, and processing the input signal through the adjusted linear continuous time equalizer.

[0007] Second aspect, an embodiment of the present application provides a signal processing device, which includes: a pulse signal acquisition module, a target postcursor signal extraction module, a numerical value acquisition module for postcursor signals, a comprehensive judgment value determination module for multi-bit postcursor signals, and a signal processing module, where: the pulse signal acquisition module is configured to acquire a pulse signal output according to an input signal; the target postcursor signal extraction module is configured to extract a plurality of target postcursor signals from the pulse signal based on a preset rule; the numerical value acquisition module for postcursor signals is configured to acquire the numerical value of each target postcursor signal among the plurality of target postcursor signals; the comprehensive judgment value determination module for multi-bit postcursor signals is configured to obtain a comprehensive judgment value of the multi-bit postcursor signal based on the plurality of target postcursor signals and the numerical value of each target postcursor signal; the signal processing module is configured to adjust a linear continuous-time equalizer based on the comprehensive judgment value of the multi-bit postcursor signal, and process the input signal through the adjusted linear continuous-time equalizer.

[0008] Third aspect, an embodiment of the present application provides an electronic device, which includes: one or more processors, a memory, and one or more application programs, where one or more application programs are stored in the memory and are configured to be executed by one or more processors, and one or more application programs are configured to execute the signal processing method in the first aspect above.

[0009] Fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which program code is stored, and the program code can be called by a processor to execute the signal processing method in the first aspect above.

[0010] The signal processing method, device, electronic device, and storage medium provided by the embodiments of the present application obtain a pulse signal output according to an input signal; extract a plurality of target postcursor signals from the pulse signal based on a preset rule; acquire the numerical value of each target postcursor signal among the plurality of target postcursor signals; obtain a comprehensive judgment value of the multi-bit postcursor signal based on the plurality of target postcursor signals and the numerical value of each target postcursor signal; adjust a linear continuous-time equalizer based on the comprehensive judgment value of the multi-bit postcursor signal, and process the input signal through the adjusted linear continuous-time equalizer, so that the linear continuous-time equalizer can be adjusted more comprehensively by combining a plurality of postcursor signals, effectively improving the gain effect when the linear continuous-time equalizer processes signals. Description of the Drawings

[0011] To more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those skilled in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0012] Figure 1 Shows the original adaptive algorithm pulse signal and its sampling point performance diagram provided according to an embodiment of the present application.

[0013] Figure 2 Shows the schematic structural diagram of the CTLE adaptive system provided according to an embodiment of the present application.

[0014] Figure 3 Shows 16 CTLE gain characteristic curves provided according to an embodiment of the present application.

[0015] Figure 4 Shows the flowchart of the signal processing method provided according to an embodiment of the present application.

[0016] Figure 5 Shows the pulse signal obtained by the new adaptive algorithm and its sampling point performance diagram provided according to an embodiment of the present application.

[0017] Figure 6 Shows the adaptive algorithm simulation eye diagram when the post-cursor signal is only h(1.5) provided according to an embodiment of the present application.

[0018] Figure 7 Shows the adaptive algorithm simulation eye diagram when the post-cursor signal is from h(1.5) to h(5.5) provided according to an embodiment of the present application.

[0019] Figure 8 Shows the flowchart of the signal processing method provided according to another embodiment of the present application.

[0020] Figure 9 Shows according to the present application Figure 8 The flowchart of the method of providing an embodiment of S208 in the signal processing method shown.

[0021] Figure 10 Shows the system CTLE gain index value change diagram provided by an embodiment of the present application.

[0022] Figure 11 Shows the flowchart of the signal processing method provided according to still another embodiment of the present application.

[0023] Figure 12 Shows the functional module diagram of the signal processing device provided by an embodiment of the present application.

[0024] Figure 13 The block diagram of the electronic device provided by the embodiment of the present application is shown.

[0025] Figure 14 The storage medium for storing or carrying the program code for implementing the signal processing method according to the embodiment of the present application is shown. Detailed implementation manners

[0026] In order to enable those skilled in the art to better understand the solution of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present application.

[0027] Currently, CTLE (Continuous Time Linear Equalizer) parameters are important parameters for improving the signal quality at the receiving end in a Peripheral Component Interconnect Express (PCIe) link. As the signal transmission speed has become faster and faster, it will cause obvious Inter-Symbol Interference (ISI) and reflections. Therefore, it is necessary to equalize the high-speed link signal to regain a usable signal.

[0028] Generally speaking, CTLE is controlled by a gain coefficient, and a suitable control quantity is obtained through an adaptive algorithm. In the existing algorithm, the CTLE adaptive process controls the CTLE gain according to edge and data information. The CTLE adaptation uses the Least Mean Square (LMS) algorithm for judgment. The LMS algorithm adopts the criterion: minimizing the mean square error between the expected output and the actual value of the equalizer. The ideal signal is d(k), and the filter output is y(k), so that the square expected value of the difference between the two (i.e., the offset error) e(k) is minimized. The error sequence expression is:

[0029] e(k) = d(k) - y(k);

[0030] Among them, e(k) is the k-th sampling error received. According to the relationship between the change of the adaptive feedback equalization coefficient vector and the vector estimation direction, the formula of LMS can be deduced as:

[0031]

[0032] The LMS algorithm replaces the original expected value d(k) with x(k). After iterative convergence, the weighted vector is not the theoretical optimal value, but randomly fluctuates around the optimal weighted vector, resulting in errors. Δ is a positive constant, representing the adaptive convergence coefficient or convergence step size.

[0033] In an actual circuit, the polarity signal of the error signal e(k) is usually used as the feedback quantity, which is the Sign-Sign LMS (SS-LMS) algorithm. The signal amplitude is ignored to simplify the circuit. The specific formula is expressed as:

[0034]

[0035] In the traditional LMS algorithm, e(k) is implemented by judging the sign of the cursor after the 1.5UI position. The cursor after the 1.5UI position is h(1.5), which is the signal edge. CTLE error is denoted as error, that is, e(k), and can be defined as:

[0036] error = h(1.5);

[0037] The adaptive algorithm determines whether the signal gain should be increased or decreased according to the sign of error. When the value of h(1.5) is less than 0, the gain needs to be increased. When the value of h(1.5) is greater than 0, the gain needs to be decreased, so that error converges near zero and reaches a stable state.

[0038] As an example, the pulse signal of the original adaptive algorithm and its sampling points are shown as Figure 1 shown. At this time, the value of h(1.5) is greater than 0, and the adaptive will select a CTLE curve with a smaller gain.

[0039] Please refer to Figure 2 , the CTLE algorithm structure diagram is shown in Figure 2. Among them, in Figure 2 , Signal is the input signal, which is judged after passing through CTLE. Q is the data signal after judgment, that is, d(k), and X is the edge signal.

[0040] In the digital logic of the adaptive algorithm module, the determination of h(1.5) is realized through truth judgment. The sign of the determination signal is judged whether it conforms to the established code pattern to increase or decrease the CTLE system gain. The judgment result generates a control quantity after first-order filtering, thereby adjusting CTLE.

[0041] However, in the traditional LMS algorithm, e(k) is only implemented by judging the sign of the cursor after the 1.5UI position, which leads to incomplete judgment, and further leads to the problems of poor CTLE gain effect and unsatisfactory eye height performance.

[0042] The inventor found that if multiple cursor signals after h(1.5) (such as h(1.5), h(2.5), h(3.5), etc.) can be combined to judge e(k), the result of e(k) can be judged more comprehensively and accurately.

[0043] However, the inventors also found in actual research that there are still certain problems in the selection of the number of post-cursors and algorithms. If the number of post-cursors is too large, the system complexity of the CTLE will increase. If the number of post-cursors is too small, the CTLE will not achieve a good gain effect.

[0044] Therefore, in view of the above problems, the inventors proposed the signal processing method, device, electronic device, and storage medium in the embodiments of the present application, which can comprehensively consider the eye height performance, system stability, and algorithm implementation complexity in the selection of the number of post-cursors and algorithms, so as to select an appropriate number of post-cursors and algorithms. Furthermore, it is ensured that the CTLE has a good gain effect when processing signals.

[0045] Please refer to Figure 2 , Figure 2 , which shows a schematic diagram of an application environment of the signal processing method provided in the embodiments of the present application. This application environment is a CTLE adaptive system. As an example, the working principle of this CTLE adaptive system is as follows:

[0046] Table 1 shows the CTLE error detection truth table. Q[n] is the current signal, Q[n + 1] is the next-bit signal, and its influence on the current signal is reflected as the first pre-cursor h(-0.5). X[n] is the current edge signal, and Q[k] is the comprehensive logical judgment value of the multi-bit post-cursor signal. When error is defined as h(1.5), Q[k] is judged only according to the previous-bit signal Q[n - 1], and the influence of Q[n - 1] on the current signal is reflected as the first post-cursor h(1.5).

[0047] Table 1

[0048]

[0049] Among them, when the algorithm theory is applied to the actual hardware logic, the error detection expression of the adaptive algorithm module is:

[0050]

[0051] Among them, n represents the nth data, and N is the buffer size. UP_QX[n] and DN_QX[n] are adaptive logical judgment values. UP_QX[n] is the under-compensation state of the system. When the code pattern conforms to the logical combination listed in the table, the system is under-compensated and the CTLE gain needs to be increased, and UP_QX[n] is incremented by 1. On the contrary, DN_QX[n] is the over-compensation state of the system, and the CTLE gain needs to be decreased. Diff is the integral difference between UP_QX[n] and DN_QX[n] after N data, which is the system compensation signal and is filtered and fed back to compensate the CTLE.

[0052] Such as Figure 3As shown, the CTLE curves are sorted in descending order of gain according to the index value. The higher the index value, the higher the gain. The value fed back and compensated by Diff acts on the index value. For example, in the initial state of the system, the curve with a CTLE index value of 6 is selected. At this time, the gain is small. During the adaptive process, there is a set of data as shown in Table 2, which conforms to the pattern required by UP_QX[n], and UP_QX[n] is 1. Suppose that during this process, no data conforms to the pattern required by DN_QX[n], and DN_QX[n] is 0. At this time, the difference Diff between UP_QX[n] and DN_QX[n] is 1, and after filtering, it is fed back to the index value. If the filtered feedback signal is 1, the CTLE index value is incremented by 1, and the seventh curve is selected, and the gain increases.

[0053] Table 2

[0054] Q[k] Q[n] X[n] Q[n + 1] 0 0 0 1

[0055] Please refer to Figure 4 , Figure 4 which shows a signal processing method provided by an embodiment of the present application. This method can be applied to a CTLE adaptive system as shown in Figure 2 . The signal processing method may include:

[0056] S101, obtaining a pulse signal output according to an input signal.

[0057] Wherein, the input signal can be a high level or a low level.

[0058] As an example, taking Figure 1 and Figure 2 as an example, in Figure 2 , signal is the input signal. When the input signal is input to the CTLE, a pulse signal as shown in Figure 1 can be obtained. Among them, multiple sampling points can be configured on the pulse signal, and there can be a signal edge between every two adjacent sampling points, that is, the post-cursor signal.

[0059] S102, extracting a plurality of target post-cursor signals from the pulse signal based on a preset rule.

[0060] In some embodiments, available post-cursor signals can be selected as target post-cursor signals starting from a specified post-cursor signal in the pulse signal. As an example, since the adaptive algorithm usually judges the symbol of the post-cursor at the 1.5UI position, that is, h(1.5) in Figure 1 , h(1.5) can be used as the specified post-cursor signal, and an appropriate number of post-cursor signals can be selected from h(1.5) as the target post-cursor signals.

[0061] Specifically, the post cursor signals can be incremented one by one after h(1.5) to obtain various combinations of post cursor signals. Specifically, for each increment of a post cursor signal, a combination of post cursor signals can be obtained. For example, h(1.5), h(1.5) to h(2.5), h(1.5) to h(3.5), h(1.5) to h(4.5), etc. Then, the CTLE is adjusted by detecting based on each combination of post cursor signals as the judgment basis, that is, defining error as h(1.5), defining error as h(1.5)-h(2.5), defining error as h(1.5) to h(3.5), etc. Then, the gain results of the CTLE corresponding to each combination of post cursor signals are detected to obtain multiple gain results. Optionally, the gain results can include eye height performance, system stability, and algorithm implementation complexity. Then, the optimal gain result is selected from the multiple gain results, and each post cursor signal in the combination of post cursor signals corresponding to the optimal gain result is determined as the target post cursor signal. Specifically, the combination of post cursor signals can be adjusted according to the specific simulation performance and performance of different systems, so that the optimal gain result should meet the following conditions: the system can reach a stable state; the system can achieve optimal equalization after stabilization, and the eye height performance is the best; the system complexity and resource occupancy rate are lower than a certain level, etc. As an example, for example, the gain results corresponding to h(1.5) to h(5.5) in multiple combinations of post cursor signals meet the conditions that the system can reach a stable state; the system can achieve optimal equalization after stabilization, and the eye height performance is the best; the system complexity and resource occupancy rate are lower than a certain level, then h(1.5), h(2.5), h(3.5), h(4.5), and h(5.5) can be determined as the target post cursor signals. At this time, the expression of error is:

[0062] error = h(1.5)+h(2.5)+h(3.5)+h(4.5)+h(5.5)

[0063] S103. Obtain the values of each target post cursor signal among the multiple target post cursor signals.

[0064] Continuing with the above example, when the target post cursor signals are h(1.5), h(2.5), h(3.5), h(4.5), and h(5.5), the values of each post cursor signal among h(1.5), h(2.5), h(3.5), h(4.5), and h(5.5) can be obtained from Figure 1 That is, the values corresponding to the ordinates of the target post cursor signals. Figure 1 in

[0065] S104. Based on the multiple target post cursor signals and the values of each target post cursor signal, obtain a comprehensive judgment value of the multi-bit post cursor signal.

[0066] In some embodiments, a mapping relationship between the values of multiple target post-cursor signals and the comprehensive judgment value Q[k] of the multi-bit post-cursor signal can be established in advance to obtain a comprehensive judgment value mapping relationship table. Then, based on the multiple target post-cursor signals and the value of each target post-cursor signal, the comprehensive judgment value Q[k] of the corresponding multi-bit post-cursor signal can be found from the comprehensive judgment value mapping relationship table. Optionally, in the comprehensive judgment value mapping relationship table, the value of Q[k] can be an AND operation, that is, when the values of all multiple target post-cursor signals are greater than 0, the value of Q[k] is 1, and when there is a target post-cursor signal with a value not greater than 0 among the multiple target post-cursor signals, the value of Q[k] is 0.

[0067] In practical applications, as an example, 8 schemes can be provided, from only considering h(1.5) to considering h(1.5) to h(7.5), and the mode can be selected by changing the external register parameters.

[0068] That is to say, there are a total of 8 modes for the comprehensive judgment value Q[k] of the multi-bit post-cursor signal. According to the existing algorithm, it can be judged only based on the first post-cursor h(1.5), or based on the values of multiple post-cursors. The specific scheme is determined by the actual simulation performance of the CTLE system.

[0069] When determining the mode of the comprehensive judgment value Q[k] of the multi-bit post-cursor signal, it can be determined according to the Q[k] logical truth table shown in Table 3. Among them, Q[n-a] reflects the influence of the first a signals on the current signal, that is, the post-cursor (a + 0.5). For example, the influence of Q[n-1] on the current signal is reflected as h(1.5), and the influence of Q[n-5] on the current signal is reflected as h(5.5). As an example, the specific influence is: when h(5.5) > 0, Q[n-5] is 1; when h(5.5) < 0, Q[n-5] is 0. In different modes, different post-cursor combinations are selected. For example, when the mode (Mode) is 6, the influence of Q[n-1] to Q[n-6] is considered, that is, h(1.5) to h(6.5). At this time:

[0070] error = h(1.5) + h(2.5) + h(3.5) + h(4.5) + h(5.5) + h(6.5)

[0071] Among them, the value of Q[k] is an AND operation, which is the AND value of all the data in the table: Q[k] = 1 means that each Q value is 1; Q[k] = 0 means that each Q value is 0. For example, when Mode is 3, the value of Q[k] is 1 only when Q[n-1], Q[n-2], and Q[n-3] are all 1.

[0072] Table 3

[0073]

[0074] S105, adjust the linear continuous-time equalizer based on the comprehensive judgment value of the multi-bit post-cursor signal, and process the input signal through the adjusted linear continuous-time equalizer.

[0075] In some embodiments, the comprehensive judgment value Q[k] of the multi-bit post-cursor signal obtained in S104 can be substituted into the CTLE error detection truth table shown in Table 1, combined with the current input signal (hereinafter referred to as the current signal) Q[n], the signal Q[n + 1] of the next bit after the input signal, and the edge signal X[n] to obtain the corresponding code pattern, and then substitute the code pattern into the expression to obtain the error Diff of the adaptive algorithm module, then determine the index value based on Diff, and then use the index value to select the target CTLE gain characteristic curve corresponding to the index value from the multiple CTLE gain characteristic curves in Figure 3 Finally, adjust the CTLE through the target CTLE gain characteristic curve to process the input signal through the adjusted linear continuous-time equalizer. Among them, a more specific implementation method for adjusting the linear continuous-time equalizer based on the comprehensive judgment value of the multi-bit post-cursor signal can refer to the working principle of the aforementioned CTLE adaptive system, so it will not be elaborated here.

[0076] It can be understood that the value of the current input signal Q[n] and the value of the signal Q[n + 1] of the next bit after the input signal can be known during input. The edge signal X[n] is composed of multiple signal edges (post-cursor signals), that is, the edge signal X[n] can be obtained based on multiple post-cursor signals.

[0077] In practical applications, when the input signals are the same, when the target post-cursor signals are h(1.5) to h(5.5), that is, error = h(1.5) + h(2.5) + h(3.5) + h(4.5) + h(5.5), the eye height after system CTLE equalization is the best, and the system performance is more ideal than the original scheme. Specifically, the pulse signal and its sampling points obtained by the new adaptive algorithm based on the signal processing method of this embodiment are shown as Figure 5 shown. In addition, when the target post-cursor signal is only h(1.5), the eye diagram obtained after its CTLE processes the signal is shown as Figure 6 shown; when the target post-cursor signals are h(1.5) to h(5.5), the eye diagram obtained after its CTLE processes the signal is shown as Figure 7 shown. According to the two eye diagrams of the simulation results, it can be seen that the eye height obtained when the target post-cursor signals are h(1.5) to h(5.5) is 16.67% higher than the eye height obtained when the target post-cursor signal is h(1.5), and the system performance is significantly improved.

[0078] It can be seen that in this embodiment, a pulse signal output according to an input signal is obtained; a plurality of target postcursor signals are extracted from the pulse signal based on a preset rule; the value of each target postcursor signal in the plurality of target postcursor signals is obtained; based on the plurality of target postcursor signals and the value of each target postcursor signal, a comprehensive judgment value of the multi-bit postcursor signal is obtained; the linear continuous-time equalizer is adjusted based on the comprehensive judgment value of the multi-bit postcursor signal, and the input signal is processed by the adjusted linear continuous-time equalizer, so that the linear continuous-time equalizer can be adjusted more comprehensively by combining a plurality of postcursor signals. Compared with the related art where e(k) only realizes by judging the symbol of the postcursor at the 1.5UI position, the gain effect of the linear continuous-time equalizer during signal processing is effectively improved.

[0079] Please refer to Figure 8 , Figure 8 which shows a signal processing method provided by another embodiment of the present application. The method may include:

[0080] S201, obtaining a pulse signal output according to an input signal.

[0081] Among them, the specific implementation manner of S201 can refer to S101, so it will not be elaborated here.

[0082] S202, obtaining a plurality of postcursor signals in the pulse signal.

[0083] In some embodiments, as Figure 1 shown, the postcursor signal h(1.5) can be used as the first postcursor signal. Starting from the first postcursor signal, a specified number of postcursor signals after the first postcursor signal are obtained, and then the first postcursor signal and the specified number of postcursor signals obtained after the first postcursor signal are used as the plurality of postcursor signals. As an example, for example, if the specified number is 7, then the plurality of postcursor signals can be determined as h(1.5), h(2.5), h(3.5)…h(7.5). Among them, the specified number can be statistically obtained according to the postcursor signal data corresponding to the optimal historical gain result. For example, after multiple gains, it is found that when the number of postcursor signals is 7, the optimal gain effect of the CTLE appears the most times, then the specified number can be determined as 7.

[0084] In other embodiments, a plurality of postcursor signals can be obtained according to the fluctuation situation of the postcursor signals in the pulse signal. As an example, taking Figure 1 as an example, according to Figure 1It can be known that when the position of the post cursor in the pulse signal is farther from the zero point, the corresponding fluctuation of the post cursor signal is smaller. When the corresponding fluctuation of the post cursor signal is small to a certain extent, the compensation effect is not obvious. At this time, increasing the number of judgment cursors will: increase the system complexity and additionally occupy registers. Therefore, when obtaining multiple post cursor signals, starting from the post cursor signal h(1.5), it can be detected whether the corresponding fluctuation amplitude of the next post cursor signal after h(1.5) does not exceed the specified fluctuation amplitude. If it exceeds, the post cursor signal is continuously added to the multiple post cursor signals, and the next post cursor signal is continuously detected. If it does not exceed, the acquisition of the next post cursor signal is stopped, and all the post cursor signals before this post cursor signal are determined as the multiple post cursor signals. As an example, for instance, if the corresponding fluctuation amplitude of the post cursor signal h(6.5) does not exceed the specified fluctuation amplitude, then h(1.5), h(2.5), h(3.5), h(4.5), h(5.5) before h(6.5) can be determined as the multiple post cursor signals. Thus, it is possible to avoid the increase in system complexity and additional occupation of registers due to too many post cursor signals.

[0085] S203, Combine multiple post cursor signals to obtain multiple post cursor combinations.

[0086] Continuing with the above example, a post cursor combination can be established by adding one post cursor signal in sequence based on h(1.5). For example, if multiple post cursor signals include h(1.5), h(2.5), h(3.5), h(4.5), h(5.5), then multiple post cursor combinations can include: h(1.5), h(1.5) to h(2.5), h(1.5) to h(3.5), h(1.5) to h(4.5), h(1.5) to h(5.5).

[0087] S204, Obtain the gain parameter corresponding to each post cursor combination in the multiple post cursor combinations to obtain multiple gain parameters.

[0088] In some embodiments, each post cursor combination in the multiple post cursor combinations can be separately simulated in the CTLE system. The algorithm in the CTLE system can refer to the algorithms used in S101 to S105, and then the simulation result corresponding to each post cursor combination, that is, the gain parameter, can be obtained. Optionally, the gain parameter can include one or more combinations of the eye height, system complexity, system stability, and resource occupancy rate corresponding to the linear continuous-time equalizer.

[0089] S205, Obtain the weight relationship among the eye height, system complexity, system stability, and resource occupancy rate.

[0090] Among them, the weight relationships among the eye height, system complexity, system stability, and resource occupancy rate can be preset and stored in the storage device. Optionally, the storage device can be configured in the CTLE system. When the weight relationships among the eye height, system complexity, system stability, and resource occupancy rate are needed, they can be directly called from the storage device.

[0091] S206. Determine the comprehensive value of the gain parameter according to the eye height, system complexity, system stability, resource occupancy rate, and weight relationship.

[0092] As an example, for instance, the eye height is A, the system complexity is B, the system stability is C, the resource occupancy rate is D, and in the weight relationship, the weight corresponding to the eye height is a1, the weight corresponding to the system complexity is a2, the weight corresponding to the system stability is a3, and the weight corresponding to the resource occupancy rate is a4. Then the comprehensive value of the gain parameter can be W = (a1·A + a2·B + a3·C + a4·D). Among them, the values of a1, a2, a3, and a4 can be greater than or equal to -1 and less than or equal to +1.

[0093] S207. Determine the gain parameter with the largest comprehensive value among the multiple gain parameters as the gain parameter that meets the preset conditions.

[0094] As an example, for instance, the comprehensive values of the gain parameters include W1, W2, W3, W4, and W5. Among them, the comprehensive value of W5 is the largest, then the gain parameter corresponding to W5 can be determined as the gain parameter that meets the preset conditions.

[0095] In some embodiments, the gain parameters among the multiple gain parameters whose comprehensive values exceed the comprehensive value threshold can also be determined as the gain parameters that meet the preset conditions.

[0096] S208. Determine the post-cursor combination corresponding to the gain parameter that meets the preset conditions among the multiple post-cursor combinations as the target post-cursor combination, and determine each post-cursor signal in the target post-cursor combination as the target post-cursor signal.

[0097] Continuing the above example, for instance, the post-cursor combination corresponding to W5 is from h(1.5) to h(5.5), then determine from h(1.5) to h(5.5) as the target post-cursor combination. Further, h(1.5), h(2.5), h(3.5), h(4.5), and h(5.5) can all be determined as the target post-cursor signals.

[0098] In some embodiments, as Figure 9 shown, S208 may include:

[0099] S2081. Determine the combination corresponding to the gain parameter that meets the preset conditions among the multiple post-cursor combinations as the initial post-cursor combination, and obtain the number of the initial post-cursor combinations.

[0100] As an example, for instance, the combinations corresponding to the gain parameters that meet the preset conditions in multiple post-cursor combinations include W3 and W5. That is, if W3 and W5 are the same, then the post-cursor combination corresponding to W3 from h(1.5) to h(3.5) and the post-cursor combination corresponding to W5 from h(1.5) to h(5.5) can be determined as the initial post-cursor combinations. Thus, the number of initial post-cursor combinations can be determined to be 2.

[0101] S2082, if the number of initial post-cursor combinations is multiple, then obtain the number of post-cursor signals included in each initial post-cursor combination among the multiple initial post-cursor combinations.

[0102] Continuing with the above example, since the number of initial post-cursor combinations is 2 which is greater than 1, obtain the number of post-cursor signals in the post-cursor combination from h(1.5) to h(3.5) and the number of post-cursor signals in the post-cursor combination from h(1.5) to h(5.5). It can be obtained that the number of post-cursor signals in the post-cursor combination from h(1.5) to h(3.5) is 3, and the number of post-cursor signals in the post-cursor combination from h(1.5) to h(5.5) is 5.

[0103] S2083, determine the initial post-cursor combination with the least number of post-cursor signals among the multiple initial post-cursor combinations as the target post-cursor combination.

[0104] Continuing with the above example, since the number of post-cursor signals in the post-cursor combination from h(1.5) to h(3.5) is the least, the initial post-cursor combination from h(1.5) to h(3.5) can be determined as the target post-cursor combination.

[0105] In practical applications, taking Figure 1 the impulse response of the system shown as an example, according to Figure 1 it can be known that the farther away from the zero point after h(7.5) of the system, the smaller the post-cursor value, and the compensation effect is not obvious. Moreover, increasing the number of judgment cursors will: 1) increase the system complexity and occupy additional registers; 2) increase the convergence time. Therefore, the post-cursors after h(7.5) are not considered for the time being. Thus, it is necessary to select the number of post-cursors according to the actual performance of the system. For example, when two schemes with different numbers of post-cursors are stable and their CTLE gains are the same, the scheme with fewer cursors is preferably selected.

[0106] According to the performance of the existing circuit and system, one of the implementable ways is as follows: a logical combination for judgment based on the post-cursor values from h(1.5) to h(5.5). When this solution is applied to the example system, two different scenarios are compared: using the values after h(7.5) and only using the values of h(7.5) and before it. After the system converges stably, there is no difference in the CTLE gain. And after h(8.5), the system cannot converge stably correctly. Therefore, for the example system, the post-cursors after h(7.5) are not considered. If the convergence effects of the two scenarios of h(5.5) and h(7.5) are relatively close, and the CTLE can be stabilized between index values 10 and 11, the h(5.5) solution with a simpler structure is preferred.

[0107] S209. Obtain the value of each target post-cursor signal among multiple target post-cursor signals.

[0108] S210. Based on the multiple target post-cursor signals and the value of each target post-cursor signal, obtain a comprehensive judgment value of the multi-bit post-cursor signal.

[0109] S211. Adjust the linear continuous-time equalizer based on the comprehensive judgment value of the multi-bit post-cursor signal, and process the input signal through the adjusted linear continuous-time equalizer.

[0110] Among them, the specific implementation manners of S209 to S211 can refer to S103 to S105, so they will not be elaborated here.

[0111] As Figure 10 shown, after the traditional CTLE adapts and stabilizes, if the CTLE gain is too small, the system is in an under-equalized state; if it is too large, the system is in an over-equalized state. When the signal processing method of this embodiment processes the signal, an improved algorithm is used to improve the system performance to obtain the optimal equalization and the best system eye height performance. The change of the CTLE gain index value of the example system is as Figure 10 shown. After stabilization, the CTLE gain jumps between two index values to achieve dynamic balance. The original algorithm only considers h(1.5), and after stabilization, the CTLE index value jumps between 8 and 9. The system is in an under-equalized state, with a small gain and a low eye height, showing an unsatisfactory performance. After being processed by the signal processing method of this embodiment, the CTLE index value after stabilization by the new algorithm jumps between 10 and 11. The system is slightly over-equalized, the gain increases, and the eye diagram is correspondingly improved.

[0112] In this embodiment, by obtaining multiple post-cursor signals in a pulse signal, combining the multiple post-cursor signals to obtain multiple post-cursor combinations, obtaining the gain parameter corresponding to each post-cursor combination among the multiple post-cursor combinations to obtain multiple gain parameters, obtaining the weight relationship among eye height, system complexity, system stability, and resource occupancy rate, determining the comprehensive value of the gain parameter according to the eye height, system complexity, system stability, resource occupancy rate, and the weight relationship, determining the gain parameter with the largest comprehensive value among the multiple gain parameters as the gain parameter meeting the preset conditions, determining the post-cursor combination corresponding to the gain parameter meeting the preset conditions among the multiple post-cursor combinations as the target post-cursor combination, and determining each post-cursor signal in the target post-cursor combination as the target post-cursor signal, it can be ensured that the CTLE gain can meet the requirements of multiple gain parameters through the target post-cursor signal, and the gain effect is further improved.

[0113] Please refer to Figure 11 , Figure 11 which shows a signal processing method provided by another embodiment of the present application. The method may include:

[0114] S301, obtain a pulse signal output according to an input signal.

[0115] S302, extract multiple target post-cursor signals from the pulse signal based on a preset rule.

[0116] S303, obtain the value of each target post-cursor signal among the multiple target post-cursor signals.

[0117] S304, based on the multiple target post-cursor signals and the value of each target post-cursor signal, obtain a comprehensive judgment value of the multi-bit post-cursor signal.

[0118] Among them, the specific implementation manners of S301 to S304 can refer to S101 to S104, so they will not be elaborated here.

[0119] In some embodiments, the specific implementation manner of S304 can be: if there is a target post-cursor signal with a value less than 0 among the multiple target post-cursor signals, determine the comprehensive judgment value of the multi-bit post-cursor signal to be 0; if the value of each target post-cursor signal among the multiple target post-cursor signals is greater than 0, determine the comprehensive judgment value of the multi-bit post-cursor signal to be 1.

[0120] S305, obtain the edge signal corresponding to the input signal and the target signal of the next bit of the input signal.

[0121] Among them, the edge signal can be obtained according to the pulse response of the input signal Q[n]. As an example, Figure 1Taking the pulse signal shown as an example, when the actual voltage of the edge signal X[n] is greater than the reference voltage, that is, when the superposition value of multiple signal edges (such as signal edges 1.5, 2.5, 3.5...) is greater than the reference voltage, it can be determined that the edge signal X[n] is 1. When the actual voltage of the edge signal X[n] is less than the reference voltage, it can be determined that the edge signal X[n] is 0. And the target signal Q[n+1] of the next bit of the input signal is usually opposite to Q[n]. For example, when Q[n] is 1, Q[n+1] is 0; when Q[n] is 0, Q[n+1] is 1. Therefore, the target signal Q[n+1] can be determined according to the input signal Q[n].

[0122] S306, adjusting the linear continuous-time equalizer based on the comprehensive judgment value of the input signal, the target signal, the edge signal, and the multi-bit post-cursor signal.

[0123] In some embodiments, according to the value of the comprehensive judgment value Q[k] of the input signal Q[n], the target signal Q[n+1], the edge signal X[n], and the multi-bit post-cursor signal, the corresponding code pattern can be found from Table 1, and then through the corresponding code pattern and formula to obtain Diff, and then determine the index value based on Diff. Among them, after obtaining the error Diff, filtering is required. Here, a common first-order filter is used. The result after filtering is the control quantity, which is fed back to the CTLE index to adjust the CTLE gain. Specifically, the index value can be used to Figure 3 select the target CTLE gain characteristic curve corresponding to the index value from multiple CTLE gain characteristic curves in, and finally adjust the CTLE through the target CTLE gain characteristic curve to process the input signal through the adjusted linear continuous-time equalizer, so as to combine multiple post-cursor signals to achieve an improvement in the gain effect.

[0124] Optionally, different index values can be pre-corresponded to different Diffs to generate an index value mapping table. When the error Diff is determined, the corresponding index value can be determined according to Diff and the index value mapping table.

[0125] Please refer to Figure 12 , which shows the signal processing device provided by the embodiment of the present application. The signal processing device 400 includes: a pulse signal acquisition module 410, a target post-cursor signal extraction module 420, a numerical value acquisition module 430 for post-cursor signals, a comprehensive judgment value determination module 440 for multi-bit post-cursor signals, and a signal processing module 450. Among them:

[0126] The pulse signal acquisition module 410 is used to acquire the pulse signal output according to the input signal.

[0127] The target post-cursor signal extraction module 420 is configured to extract a plurality of target post-cursor signals from the pulse signal based on a preset rule.

[0128] The value acquisition module 430 of the post-cursor signal is configured to acquire the value of each target post-cursor signal among the plurality of target post-cursor signals.

[0129] The comprehensive judgment value determination module 440 of the multi-bit post-cursor signal is configured to obtain a comprehensive judgment value of the multi-bit post-cursor signal based on the plurality of target post-cursor signals and the value of each target post-cursor signal.

[0130] The signal processing module 450 is configured to adjust the linear continuous-time equalizer based on the comprehensive judgment value of the multi-bit post-cursor signal, and process the input signal through the adjusted linear continuous-time equalizer.

[0131] Optionally, the target post-cursor signal extraction module 420 includes:

[0132] The post-cursor signal acquisition sub-module is configured to acquire a plurality of post-cursor signals in the pulse signal;

[0133] The post-cursor combination acquisition sub-module is configured to combine the plurality of post-cursor signals to obtain a plurality of post-cursor combinations.

[0134] The gain parameter acquisition sub-module is configured to acquire the gain parameter corresponding to each post-cursor combination among the plurality of post-cursor combinations to obtain a plurality of gain parameters.

[0135] The target post-cursor signal determination sub-module is configured to determine the post-cursor combination corresponding to the gain parameter that meets the preset condition among the plurality of post-cursor combinations as the target post-cursor combination, and determine each post-cursor signal in the target post-cursor combination as a target post-cursor signal.

[0136] Optionally, the target post-cursor signal determination sub-module includes:

[0137] The number determination unit of the initial post-cursor combination is configured to determine the combination corresponding to the gain parameter that meets the preset condition among the plurality of post-cursor combinations as the initial post-cursor combination, and acquire the number of the initial post-cursor combinations.

[0138] The number determination unit of the post-cursor signal is configured to, if the number of the initial post-cursor combinations is multiple, acquire the number of post-cursor signals included in each initial post-cursor combination among the multiple initial post-cursor combinations.

[0139] The target post-cursor combination determination unit is configured to determine the initial post-cursor combination with the least number of post-cursor signals among the plurality of initial post-cursor combinations as the target post-cursor combination.

[0140] Optionally, the gain parameter includes: the eye height corresponding to the linear continuous-time equalizer, system complexity, system stability, and resource occupancy rate.

[0141] Optionally, the signal processing device 400 further includes:

[0142] A weight relationship acquisition module, configured to acquire the weight relationship among the eye height, the system complexity, the system stability, and the resource occupancy rate.

[0143] A comprehensive value determination module for the gain parameter, configured to determine the comprehensive value of the gain parameter according to the eye height, the system complexity, the system stability, the resource occupancy rate, and the weight relationship.

[0144] A gain parameter determination module, configured to determine the gain parameter with the largest comprehensive value among the multiple gain parameters as the gain parameter that meets the preset conditions.

[0145] Optionally, the comprehensive judgment value determination module 440 for the multi-bit post-cursor signal includes:

[0146] A first comprehensive judgment value determination sub-module, configured to determine that the comprehensive judgment value of the multi-bit post-cursor signal is 0 if there is a target post-cursor signal with a value less than 0 among the multiple target post-cursor signals.

[0147] A second comprehensive judgment value determination sub-module, configured to determine that the comprehensive judgment value of the multi-bit post-cursor signal is 1 if the value of each target post-cursor signal among the multiple target post-cursor signals is greater than 0.

[0148] Optionally, the signal processing module 450 includes:

[0149] An edge signal and target signal acquisition sub-module, configured to acquire the edge signal corresponding to the input signal and the target signal of the next bit of the input signal.

[0150] An equalizer adjustment sub-module, configured to adjust the linear continuous-time equalizer based on the input signal, the target signal, the edge signal, and the comprehensive judgment value of the multi-bit post-cursor signal.

[0151] Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the above-described devices and modules can refer to the corresponding processes in the foregoing method embodiments, and will not be elaborated herein.

[0152] In several embodiments provided in the present application, the coupling, direct coupling, or communication connection between the modules shown or discussed with each other may be through some interfaces. The indirect coupling or communication connection between the devices or modules may be in electrical, mechanical, or other forms.

[0153] In addition, in each embodiment of the present application, each functional module can be integrated into one processing module, or each module can exist physically alone, or two or more modules can be integrated into one module. The above integrated module can be implemented in the form of hardware or in the form of a software functional module.

[0154] Please refer to Figure 13 , which shows a structural block diagram of an electronic device provided by an embodiment of the present application. The electronic device 500 can be the electronic device 500 capable of running a program in the foregoing embodiments. The electronic device 500 in the present application can include one or more of the following components: a processor 510, a memory 520, and one or more programs, where one or more programs can be stored in the memory 520 and configured to be executed by one or more processors 510, and one or more programs are configured to execute the methods described in the foregoing method embodiments.

[0155] The processor 510 can include one or more processing cores. The processor 510 connects various parts within the entire electronic device 500 using various interfaces and lines, and by running or executing instructions, programs, code sets, or instruction sets stored in the memory 520, and by calling data stored in the memory 520, executes various functions of the electronic device 500 and processes data. Among them, the processor 510 can be connected to the CTLE system and output a control amount to the CTLE system to adjust the CTLE system.

[0156] The memory 520 can include a random access memory (RAM), and can also include a read-only memory (ROM). The memory 520 can be used to store instructions, programs, code, code sets, or instruction sets. The memory 520 can include a program storage area and a data storage area. Among them, the program storage area can store instructions for implementing an operating system, instructions for implementing at least one function, instructions for implementing the following various method embodiments, etc. The data storage area can also store data created during the use of the terminal.

[0157] Please refer to Figure 14 , which shows a structural block diagram of a computer-readable storage medium provided by an embodiment of the present application. Program code 610 is stored in the computer-readable medium 600, and the program code 610 can be called by a processor to execute the methods described in the foregoing method embodiments.

[0158] The computer-readable storage medium 600 can be an electronic memory such as a flash memory, EEPROM (Electrically Erasable Programmable Read-Only Memory), EPROM, a hard disk, or a ROM. Optionally, the computer-readable storage medium includes a non-transitory computer-readable storage medium. The computer-readable storage medium has a storage space for program code that executes any method step in the above methods. These program codes can be read from or written into one or more computer program products. The program codes can be compressed in an appropriate form, for example.

[0159] In summary, for the signal processing method, apparatus, electronic device, and storage medium provided in the embodiments of the present application, by obtaining a pulse signal output according to an input signal; extracting a plurality of target post-cursor signals from the pulse signal based on a preset rule; obtaining the value of each target post-cursor signal among the plurality of target post-cursor signals; based on the plurality of target post-cursor signals and the value of each target post-cursor signal, obtaining a comprehensive judgment value of the multi-bit post-cursor signal; adjusting a linear continuous-time equalizer based on the comprehensive judgment value of the multi-bit post-cursor signal, and processing the input signal through the adjusted linear continuous-time equalizer, it is possible to more comprehensively adjust the linear continuous-time equalizer by combining a plurality of post-cursor signals. Compared with the related art where e(k) is only achieved by judging the symbol of the post-cursor at the 1.5UI position, the gain effect of the linear continuous-time equalizer during signal processing is effectively improved. In addition, by considering gain parameters such as the complexity, stability, and resource occupancy rate of the subsequent system, appropriate post-cursor signals are selected, thereby further improving the gain effect.

[0160] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A signal processing method, characterized in that, comprising: obtaining a pulse signal output according to an input signal; extracting a plurality of target post-cursor signals from the pulse signal based on a preset rule; obtaining the value of each target post-cursor signal among the plurality of target post-cursor signals; obtaining a comprehensive judgment value of a multi-bit post-cursor signal based on the plurality of target post-cursor signals and the value of each target post-cursor signal; adjusting a linear continuous-time equalizer based on the comprehensive judgment value of the multi-bit post-cursor signal, and processing the input signal through the adjusted linear continuous-time equalizer; wherein, the extracting a plurality of target post-cursor signals from the pulse signal based on a preset rule includes: obtaining a plurality of post-cursor signals in the pulse signal; combining the plurality of post-cursor signals to obtain a plurality of post-cursor combinations; obtaining gain parameters corresponding to each post-cursor combination among the plurality of post-cursor combinations to obtain a plurality of gain parameters; determining the post-cursor combination corresponding to the gain parameter that meets the preset condition among the plurality of post-cursor combinations as the target post-cursor combination, and determining each post-cursor signal in the target post-cursor combination as the target post-cursor signal; wherein, the obtaining a comprehensive judgment value of a multi-bit post-cursor signal based on the plurality of target post-cursor signals and the value of each target post-cursor signal includes: if there is a target post-cursor signal with a value less than 0 among the plurality of target post-cursor signals, determining the comprehensive judgment value of the multi-bit post-cursor signal as 0; if the value of each target post-cursor signal among the plurality of target post-cursor signals is greater than 0, determining the comprehensive judgment value of the multi-bit post-cursor signal as 1; wherein, the adjusting a linear continuous-time equalizer based on the comprehensive judgment value of the multi-bit post-cursor signal includes: determining a detection error based on the comprehensive judgment value of the multi-bit post-cursor signal, the current input signal, the next-bit signal of the current input signal, and an edge signal, and adjusting the linear continuous-time equalizer based on the detection error.

2. The method according to claim 1, characterized in that, the determining the post-cursor combination corresponding to the gain parameter that meets the preset condition among the plurality of post-cursor combinations as the target post-cursor combination includes: determining the combination corresponding to the gain parameter that meets the preset condition among the plurality of post-cursor combinations as the initial post-cursor combination, and obtaining the number of the initial post-cursor combinations; if the number of the initial post-cursor combinations is multiple, obtaining the number of post-cursor signals included in each initial post-cursor combination among the multiple initial post-cursor combinations; determining the initial post-cursor combination with the least number of post-cursor signals included among the multiple initial post-cursor combinations as the target post-cursor combination.

3. The method according to claim 1, characterized in that, the gain parameter includes: the eye height, system complexity, system stability, and resource occupancy rate corresponding to the linear continuous-time equalizer.

4. The method according to claim 3, characterized in that, Before determining the post-cursor combination corresponding to the gain parameter that meets the preset condition in the combination of the multiple post-cursors and determining each post-cursor signal in the target post-cursor combination as a target post-cursor signal, it further includes: Obtain the weight relationship among the eye height, the system complexity, the system stability, and the resource occupancy rate; Determine the comprehensive value of the gain parameter according to the eye height, the system complexity, the system stability, the resource occupancy rate, and the weight relationship; Determine the gain parameter with the largest comprehensive value among the multiple gain parameters as the gain parameter that meets the preset condition.

5. The method according to any one of claims 1 to 4, wherein, Adjusting the linear continuous-time equalizer based on the comprehensive judgment value of the multi-bit post-cursor signal includes: Obtain the edge signal corresponding to the input signal and the target signal of the next bit of the input signal; Adjust the linear continuous-time equalizer based on the input signal, the target signal, the edge signal, and the comprehensive judgment value of the multi-bit post-cursor signal.

6. A signal processing device, wherein, it includes: A pulse signal acquisition module for acquiring a pulse signal output according to an input signal; A target post-cursor signal extraction module for extracting a plurality of target post-cursor signals from the pulse signal based on a preset rule; A numerical value acquisition module for the post-cursor signal for acquiring the numerical value of each target post-cursor signal in the plurality of target post-cursor signals; A comprehensive judgment value determination module for the multi-bit post-cursor signal for obtaining a comprehensive judgment value of the multi-bit post-cursor signal based on the plurality of target post-cursor signals and the numerical value of each target post-cursor signal; A signal processing module for adjusting a linear continuous-time equalizer based on the comprehensive judgment value of the multi-bit post-cursor signal and processing the input signal through the adjusted linear continuous-time equalizer; wherein, the extracting a plurality of target post-cursor signals from the pulse signal based on a preset rule includes: Obtain a plurality of post-cursor signals in the pulse signal; Combine the plurality of post-cursor signals to obtain a plurality of post-cursor combinations; Obtain the gain parameter corresponding to each post-cursor combination in the plurality of post-cursor combinations to obtain a plurality of gain parameters; Determine the post-cursor combination corresponding to the gain parameter that meets the preset condition in the plurality of post-cursor combinations as the target post-cursor combination, and determine each post-cursor signal in the target post-cursor combination as a target post-cursor signal; wherein, the obtaining a comprehensive judgment value of the multi-bit post-cursor signal based on the plurality of target post-cursor signals and the numerical value of each target post-cursor signal includes: If the numerical value of a target post-cursor signal in the plurality of target post-cursor signals is less than 0, determine that the comprehensive judgment value of the multi-bit post-cursor signal is 0; If the numerical value of each target post-cursor signal in the plurality of target post-cursor signals is greater than 0, determine that the comprehensive judgment value of the multi-bit post-cursor signal is 1; wherein, the adjusting the linear continuous-time equalizer based on the comprehensive judgment value of the multi-bit post-cursor signal includes: Determine a detection error based on a comprehensive judgment value of the multi-bit post-cursor signal, a current input signal, a next-bit signal of the current input signal, and an edge signal, and adjust a continuous-time equalizer based on the detection error.

7. An electronic device, characterized in that it includes: a memory; one or more processors, coupled to the memory; one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, and the one or more programs are configured to execute the method according to any one of claims 1 to 5.

8. A computer-readable storage medium, characterized in that program code is stored in the computer-readable storage medium, and the program code can be called by a processor to execute the method according to any one of claims 1 to 5.

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