DC-DC converter low-voltage large load starting linear current limiting circuit

Abstract

This invention discloses a low-voltage, high-load start-up linear current limiting circuit for a DC-DC converter, comprising: a first current mirror circuit and one end of a resistor R3 are grounded together; the other end of resistor R3 is connected to a second current mirror circuit and a second current source; the second current mirror circuit, the differential pair circuit, the second current source, the source of MOSFET M5, and one end of the first current source are all externally connected to an input voltage VDD; the other end of the first current source is connected to the first current mirror circuit; the gate and drain of MOSFET M5 are connected to the differential pair circuit; the first current mirror circuit is connected to the differential pair circuit, and the differential pair circuit is connected to the second differential pair circuit; the differential pair circuit is externally connected to an undervoltage threshold V. UVLO This invention compares the input voltage with an undervoltage threshold to generate a current value that changes linearly with the input voltage, thereby changing the current-limiting voltage and linearly adjusting the current-limiting value. This avoids the problem of the input voltage being pulled down during a high-current start-up with a low-voltage input, triggering undervoltage lockout and causing start-up failure or repeated start-ups, and can maximize the start-up speed.

Description

Technical Field

[0001] This invention belongs to the field of DC-DC power supplies and relates to a linear current limiting circuit for low-voltage, high-load startup of a DC-DC converter. Background Technology

[0002] In DC-DC circuit applications, regardless of whether it's a Buck, Boost, or Bulk-Boost architecture, DC-DC converters face the challenge of starting up when the input voltage is low. Due to the undervoltage lockout threshold, the system starts up when the input voltage is slightly above the threshold. At this point, a sudden increase in load can momentarily pull down the input voltage. If the load is large, the input voltage may drop below the lower limit of the undervoltage lockout threshold, causing the load path to shut down and restart repeatedly, resulting in difficulties starting up under heavy loads or multiple restarts. Therefore, it is crucial to implement linear current limiting control of the load to prevent difficulties starting up under heavy loads or multiple restarts. Summary of the Invention

[0003] The purpose of this invention is to solve the problems in the prior art and provide a linear current limiting circuit for low-voltage, high-load startup of a DC-DC converter, which can solve the problems of difficult startup or repeated startup under low input voltage and high load conditions.

[0004] To achieve the above objectives, the present invention employs the following technical solution:

[0005] A low-voltage, high-load start-up linear current limiting circuit for a DC-DC converter includes: a first current mirror circuit, a differential pair circuit, a second current mirror circuit, a resistor R3, a first current source, a second current source, and a MOSFET M5;

[0006] The first current mirror circuit and one end of resistor R3 are grounded together; the other end of resistor R3 is connected to the second current mirror circuit and the second current source. The second current mirror circuit, the differential pair circuit, the second current source, the source of MOSFET M5, and one end of the first current source are all connected to an external input voltage VDD; the other end of the first current source is connected to the first current mirror circuit; the gate and drain of MOSFET M5 are connected to the differential pair circuit; the first current mirror circuit is connected to the differential pair circuit, and the differential pair circuit is connected to the second differential pair circuit; the differential pair circuit is externally connected to an undervoltage threshold V. UVLO .

[0007] A further improvement of the present invention is that:

[0008] The first current mirror circuit includes MOSFET M1 and MOSFET M2; the first current source is connected to the gate and drain of MOSFET M1, the gate of MOSFET M1 is connected to the gate of MOSFET M2, the source of MOSFET M2, the source of MOSFET M1 and one end of resistor R3 are grounded together; the drain of MOSFET M2 is connected to the differential pair circuit.

[0009] The differential pair circuit includes MOSFETs M3 and M4; the gate of MOSFET M3 is connected to the undervoltage threshold VUVLO, and the source of MOSFET M3 and the source of MOSFET M4 are connected to the drain of MOSFET M2; the drain of MOSFET M3 is connected to the gate and drain of MOSFET M5; the gate of MOSFET M4 is connected to the input voltage VDD; and the drain of MOSFET M4 is connected to the second current mirror circuit.

[0010] The second current mirror circuit includes MOSFETs M6 and M7; the gates of MOSFETs M6 and M7 are connected, and the gates and drains of MOSFETs M6 are connected to the drain of MOSFET M4; the sources of MOSFETs M6 and M7 are connected to the input voltage VDD; the drain of MOSFET M7 is connected to the other end of resistor R3.

[0011] MOSFETs M1, M2, M3, and M4 are all NMOS transistors; MOSFETs M5, M6, and M7 are all PMOS transistors.

[0012] The sum of the currents flowing through MOSFETs M5 and M6 is equal to the current flowing through MOSFET M2.

[0013] The current flowing through MOSFET M7 mirrors the current of MOSFET M6 at a certain ratio, which is set manually.

[0014] The current flowing through resistor R3 is the current I supplied by the second current source. REF The sum of the current flowing through MOSFET M7.

[0015] Compared with the prior art, the present invention has the following beneficial effects:

[0016] This invention, by setting up a differential pair circuit, a first current mirror circuit, and a second current mirror circuit, can linearize the current limiting value during high-load startup, preventing the input voltage from being pulled down by excessive load at startup and causing it to fall below the undervoltage lockout threshold, thus preventing the circuit from abnormally shutting down and restarting. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 Current-mode DC-DC overall architecture

[0019] Figure 2 This is a standard traffic limiting practice;

[0020] Figure 3 This is a linear current limiting circuit diagram of the present invention.

[0021] Wherein, 1-first current source, 2-second current source. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0023] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0024] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0025] In the description of the embodiments of the present invention, it should be noted that if terms such as "upper," "lower," "horizontal," or "inner" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of the invention is in use, they are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention. Furthermore, terms such as "first" and "second" are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0026] Furthermore, the use of the term "horizontal" does not imply that the component must be absolutely horizontal, but rather that it can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal than "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0027] In the description of the embodiments of the present invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in the present invention according to the specific circumstances.

[0028] The present invention will now be described in further detail with reference to the accompanying drawings:

[0029] See Figure 1 In a DC-DC architecture, to prevent circuit malfunction due to excessively low power supply voltage, the undervoltage lockout (UVLO) module determines whether the input voltage has reached the voltage value required for normal circuit operation. Let the upper and lower limits of the undervoltage threshold be V. H and V L V H >V L If the input voltage is higher than V H If the undervoltage lockout module UVLO outputs a high logic level signal, it controls all circuits except UVLO to operate; if the input voltage is lower than V... L If the output is low, it will control other circuit modules to not work.

[0030] See Figure 2 In DC-DC circuit design, the industry standard for current limiting circuits is to use a single reference current I. REF The reference voltage V formed across resistor R1 REF With sampling current I SENSE The voltage value V generated by resistor R2 SENSE For comparison, when the voltage value V generated by the sampling current... SENSE Greater than the reference voltage V REF When the circuit detects an overcurrent, it outputs an overcurrent signal to control the power transistor to turn off and stop charging. However, this has a drawback: consider the input voltage approaching the upper limit of the undervoltage threshold V. H When the undervoltage lockout outputs a high enable signal, all circuits operate normally. During DC-DC startup with a large load current, the load current is significant at the moment the upper power transistor turns on, which will pull down the input voltage. If the input voltage drops to the lower limit of the undervoltage threshold V at this time... L The following issues arise when high-load components fail to start or start frequently.

[0031] See Figure 3This invention discloses a low-voltage, high-load start-up linear current limiting circuit for a DC-DC converter, comprising: a first current mirror circuit, a differential pair circuit, a second current mirror circuit, a resistor R3, a first current source 1, a second current source 2, and a MOSFET M5;

[0032] The first current mirror circuit and one end of resistor R3 are grounded together; the other end of resistor R3 is connected to the second current mirror circuit and the second current source 2. The second current mirror circuit, the differential pair circuit, the second current source 2, the source of MOSFET M5, and one end of the first current source 1 are all externally connected to the input voltage VDD; the other end of the first current source 1 is connected to the first current mirror circuit; the gate and drain of MOSFET M5 are connected to the differential pair circuit; the first current mirror circuit is connected to the differential pair circuit, and the differential pair circuit is connected to the second differential pair circuit; the differential pair circuit is externally connected to the undervoltage threshold V. UVLO .

[0033] The first current mirror circuit includes MOSFET M1 and MOSFET M2; the first current source 1 is connected to the gate and drain of MOSFET M1, the gate of MOSFET M1 is connected to the gate of MOSFET M2, and the source of MOSFET M2, the source of MOSFET M1, and one end of resistor R3 are all grounded; the drain of MOSFET M2 is connected to a differential pair circuit.

[0034] The differential pair circuit includes MOSFETs M3 and M4; the gate of MOSFET M3 is connected to an external undervoltage threshold V. UVLO The source of MOSFET M3 and the source of MOSFET M4 are connected to the drain of MOSFET M2; the drain of MOSFET M3 is connected to the gate and drain of MOSFET M5; the gate of MOSFET M4 is connected to the input voltage VDD; and the drain of MOSFET M4 is connected to the second current mirror circuit.

[0035] The second current mirror circuit includes MOSFETs M6 and M7; the gates of MOSFETs M6 and M7 are connected, and the gate and drain of MOSFET M6 are connected to the drain of MOSFET M4; the sources of MOSFETs M6 and M7 are connected to the input voltage Vdd; the drain of MOSFET M7 is connected to the other end of resistor R3.

[0036] MOS transistors M1, M2, M3, and M4 are all PMOS transistors; MOS transistors M5, M6, and M7 are all NMOS transistors.

[0037] The sum of the currents flowing through MOSFETs M5 and M6 is equal to the current flowing through MOSFET M2.

[0038] The current flowing through MOSFET M7 mirrors the current of MOSFET M6 by a certain ratio, which is set manually.

[0039] The current flowing through resistor R3 is the current I supplied by the second current source 2. REF The sum of the current flowing through MOSFET M7.

[0040] The first current source 1 provides a constant current I to the MOSFET M1. B .

[0041] The current ratio of MOSFETs M1 and M2 is related to the dimensions of MOSFETs M1 and M2. Let the current flowing through MOSFET M1 be I1 and the current flowing through MOSFET M2 be I2, then:

[0042]

[0043] Wherein, the width-to-length ratio of MOSFET M1 is the size ratio of MOSFET M1; the width-to-length ratio of MOSFET M2 is the size ratio of MOSFET M2.

[0044] Working principle of the linear current limiting circuit for low-voltage, high-load start-up of a DC-DC converter:

[0045] When the input voltage VDD approaches the undervoltage threshold V UVLO The upper limit V H At that time, the maximum load current is determined by the current limiting voltage V. LIMIT It is determined that the load current will not pull the input voltage VDD down to the undervoltage threshold V during startup. UVLO The lower limit V L The current limiting value has a linear relationship with the input voltage VDD. The closer the input voltage VDD is to VDD, the greater the relationship between the current limiting value and the input voltage VDD. H The higher the current limiting value, the closer the input voltage VDD is to V. L The lower the current limit value, the better. This effectively avoids the problem of undervoltage lockout during low-voltage, high-load startup where the input voltage is momentarily pulled down by the load. Furthermore, since the current limit value and input voltage have a linear relationship within the undervoltage lockout range, it maximizes startup speed. The current limit value is the maximum load current.

[0046] Compare the input voltage VDD with the undervoltage threshold V UVLO For comparison, when the input voltage VDD is much greater than the undervoltage threshold V UVLO At that time, the current flowing through MOSFET M6 is much greater than the current flowing through MOSFET M5. MOSFET M7 mirrors the current of MOSFET M6 to a certain extent, and the current of MOSFET M7 is similar to the current I of the second current source 2. REF A current-limiting voltage V is generated by the common current flowing through resistor R3. LIMIT At this time, the current limiting voltage V LIMITThe current limiting value is also relatively high, which does not affect the startup state when the input voltage is high. When the input voltage VDD is close to the undervoltage threshold V... UVLO When the voltages are relatively close, MOSFETs M5 and M6 share the current in a certain ratio. At this time, the current mirrored from MOSFET M7 is relatively small, and the closer the input voltage VDD is to the undervoltage threshold V... UVLO The smaller the current mirrored by MOSFET M7, the lower the current limiting voltage V. LIMIT The smaller the value, the more linear current limiting functionality is achieved during low-voltage, high-current startup. It's important to note that when the input voltage VDD approaches the upper limit V... H At that time, the current limiting voltage V LIMIT The corresponding current limit value cannot pull the input voltage VDD down to the undervoltage lockout lower limit V during startup. L the following.

[0047] The above are merely preferred embodiments of the present invention and are not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A DC-DC converter low voltage heavy load start-up linear current limiting circuit, characterized by, The application relates to a current mirror circuit, which comprises a first current mirror circuit, a differential pair circuit, a second current mirror circuit, a resistor R3, a first current source (1), a second current source (2) and a MOS transistor M5. The first current mirror circuit comprises a MOS transistor M1 and a MOS transistor M2; the first current source (1) is connected with the gate and the drain of the MOS transistor M1, the gate of the MOS transistor M1 is connected with the gate of the MOS transistor M2, the source of the MOS transistor M2, the source of the MOS transistor M1 and one end of the resistor R3 are grounded, and the drain of the MOS transistor M2 is connected with the differential pair circuit. The first current mirror circuit and one end of the resistor R3 are commonly grounded; the other end of the resistor R3 is connected with a second current mirror circuit and a second current source (2), the second current mirror circuit, the differential pair circuit, the second current source (2), the source of a MOS transistor M5 and one end of a first current source (1) are commonly connected with an input voltage VDD; the other end of the first current source (1) is connected with the first current mirror circuit; the gate and the drain of the MOS transistor M5 are connected with the differential pair circuit; the first current mirror circuit is connected with the differential pair circuit, and the differential pair circuit is connected with a second differential pair circuit; the differential pair circuit is externally connected with an under-voltage threshold ; The differential pair circuit comprises a MOS transistor M3 and a MOS transistor M4; the gate of the MOS transistor M3 is externally connected with an under-voltage threshold VUVLO, the source of the MOS transistor M3 and the source of the MOS transistor M4 are connected with the drain of the MOS transistor M2, the drain of the MOS transistor M3 is connected with the gate and the drain of the MOS transistor M5, the gate of the MOS transistor M4 is connected with an input voltage VDD, and the drain of the MOS transistor M4 is connected with the second current mirror circuit. The second current mirror circuit comprises a MOS transistor M6 and a MOS transistor M7; the gate of the MOS transistor M6 and the gate of the MOS transistor M7 are connected, the gate and the drain of the MOS transistor M6 are connected with the drain of the MOS transistor M4, the source of the MOS transistor M6 and the source of the MOS transistor M7 are connected with the input voltage VDD, and the drain of the MOS transistor M7 is connected with the other end of the resistor R3. The MOS transistor M1, the MOS transistor M2, the MOS transistor M3 and the MOS transistor M4 are all NMOS transistors, and the MOS transistor M5, the MOS transistor M6 and the MOS transistor M7 are all PMOS transistors. The current flowing through resistor R3 is the current supplied by the second current source (2). The sum of the current flowing through MOSFET M7; The first current source 1 provides a constant current to the MOS transistor M1 .

2. The DC-DC converter low voltage heavy load start-up linear current limit circuit of claim 1, wherein, The sum of the currents flowing through the MOS transistor M5 and the MOS transistor M6 is equal to the current flowing through the MOS transistor M2.

3. The DC-DC converter low voltage heavy load start-up linear current limit circuit of claim 1, wherein, The current flowing through the MOS transistor M7 mirrors the current of the MOS transistor M6 in a certain proportion, and the proportion is artificially set.

4. The DC-DC converter low voltage heavy load start-up linear current limit circuit of claim 3, wherein, ​ 5. The DC-DC converter low voltage heavy load start-up linear current limit circuit of claim 4, wherein, The current flowing through resistor R3 is the current supplied by the second current source (2). The sum of the current flowing through MOSFET M7.

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