A method for manufacturing a silicon SPAD detector with low afterpulse

Abstract

The present invention belongs to the technical field of photoelectric detector chips, and specifically relates to a method for manufacturing a silicon SPAD detector with low after-pulse; the method comprises: providing a clean P-type epitaxial silicon wafer, growing a silicon oxide dielectric layer; preparing a cut-off ring; preparing a guard ring; injecting P-type impurities and N-type impurities to form an avalanche region; preparing N + contact area; forming an upper electrode on the silicon oxide dielectric layer; bonding a glass carrier sheet to the front of a P-type epitaxial silicon wafer; etching part of the P-type substrate by mechanical grinding and self-stop etching; removing the transition zone in the epitaxial layer by wet etching; preparing P + Contact area; in P + A lower electrode is formed below the contact area; the glass carrier sheet on the front side is untied; the invention removes redundant substrate and transition area, has the characteristics of low after-pulse and high practicality.

Description

Technical Field

[0001] The invention belongs to the technical field of photoelectric detector chips, and in particular relates to a method for manufacturing a silicon SPAD detector with low after-pulse. Background Art

[0002] Silicon SPAD (Single Photon Avalanche Diode) is a special photodiode that works in Geiger mode and has a power of about 10 6 The internal gain of the order of magnitude can realize single-photon detection. Post-pulse is an important performance indicator of silicon SPAD. Post-pulse refers to the noise pulse generated by the delay after the signal pulse, which will reduce the signal-to-noise ratio of SPAD and needs to be suppressed. The post-pulse can come from the delayed release of carriers trapped by defects inside the SPAD, or from the slow movement of photoelectrons generated in the non-depletion region. Since silicon epitaxial wafers of the same price have fewer defects than silicon single crystals, it is more cost-effective to use silicon epitaxial wafers to manufacture SPADs. The patent "A Method for Manufacturing a Single-Photon Si-APD Detector" with application number 201910957824.0 discloses a method for manufacturing SPAD using epitaxial wafers. However, in the process of epitaxial growth of the silicon epitaxial wafer used in the method for manufacturing SPAD in the patent, the dopant of the substrate will diffuse into the epitaxial layer, forming a transition zone on the side of the epitaxial layer close to the substrate. Moreover, the high-temperature process in the process of making SPAD will further widen the transition zone, and the final device structure such as Figure 1 As shown. The dopant concentration gradient in the transition region changes slowly, and the electric field in the transition region is very low or not depleted when the SPAD is working, such as Figure 2 As shown in Figure 2, the photoelectrons generated in the transition region will not be recombined in situ, but will move to the absorption region at a slower speed, and then drift to the avalanche region at a high speed, resulting in an increase in post-pulses. Summary of the invention

[0003] In view of the shortcomings of the prior art, the present invention proposes a method for manufacturing a silicon SPAD detector with low afterpulse, the method comprising:

[0004] S1: providing a clean P-type epitaxial silicon wafer; the P-type epitaxial silicon wafer includes a P-type substrate and an epitaxial layer; growing a silicon oxide dielectric layer on the P-type epitaxial silicon wafer;

[0005] S2: forming a cut-off ring pattern by photolithography and etching the dielectric layer, and injecting boron element into the cut-off ring pattern to form a cut-off ring;

[0006] S3: forming a guard ring pattern by photolithography and etching the dielectric layer, and injecting phosphorus into the guard ring pattern to form a guard ring;

[0007] S4: P-type impurity injection into the avalanche region: The avalanche region pattern is formed by photolithography and etching of the dielectric layer, and boron is injected into the avalanche region. The boron is then diffused into the silicon wafer through a high temperature process.

[0008] S5: N-type impurity injection into the avalanche region: phosphorus is injected into the avalanche region, and then the phosphorus is diffused into the silicon wafer through a high temperature process, thereby complementing the boron element in doping;

[0009] S6: Photolithography and etching of the dielectric layer to form N + The contact area pattern is formed by implanting phosphorus elements into N + contact area;

[0010] S7: depositing metal aluminum on the silicon oxide dielectric layer, and forming an upper electrode by photolithography and etching;

[0011] S8: Using a temporary bonding adhesive, the glass carrier sheet is bonded to the front side of the P-type epitaxial silicon wafer to provide mechanical support in the subsequent thinning process;

[0012] S9: etching part of the P-type substrate by mechanical grinding and self-stopping etching, and the thickness of the remaining P-type substrate after mechanical grinding is 50 μm to 80 μm;

[0013] S10: removing the transition region in the epitaxial layer by a wet etching method;

[0014] S11: Boron is injected into the back of the P-type epitaxial silicon wafer to form P + The contact area is then exposed to the sun and the boron element is activated by laser annealing;

[0015] S12: In P + Metal aluminum is deposited under the contact area, and a lower electrode is formed by photolithography and etching;

[0016] S13: Using a laser debonding method, debonding the front glass carrier sheet.

[0017] Preferably, the P-type substrate resistivity of the P-type epitaxial silicon wafer is 0.01-0.05Ωcm, and the epitaxial layer resistivity of the P-type epitaxial silicon wafer is 250-300Ωcm.

[0018] Preferably, the bulk concentration of the cutoff ring is in the range of 1E18 cm -3 ~1E20cm -3 .

[0019] Preferably, the bulk concentration of the guard ring is in the range of 5E15 cm -3 ~5E17cm -3 .

[0020] Preferably, the P-type impurity implantation dose in the avalanche region is 4E12-1E13cm -2 The diffusion temperature of P-type impurities in the avalanche zone is 1100-1200°C, and the diffusion time is 2-10 hours.

[0021] Preferably, the N-type impurity implantation dose in the avalanche region is 2E12-8E12cm -2 The diffusion temperature of N-type impurities in the avalanche zone is 1100-1200°C, and the diffusion time is 1-20 hours.

[0022] Preferably, N + The bulk concentration range in the contact zone is 1E18 cm -3 ~1E20cm -3 .

[0023] Preferably, the self-stop etching method is to use a self-stop etching solution to etch the P-type substrate, and the components of the self-stop etching solution include nitric acid, hydrofluoric acid and glacial acetic acid.

[0024] Preferably, the etching thickness when removing the transition region in the epitaxial layer by a wet etching method is greater than 3 μm.

[0025] Preferably, P + The bulk concentration range in the contact zone is 1E18 cm -3 ~1E20cm -3 .

[0026] The beneficial effects of the present invention are as follows: the present invention adopts a temporary bonding carrier sheet to provide mechanical support. In order to avoid introducing defects when removing the substrate, a combination of mechanical grinding and corrosion is adopted to remove the excess substrate and the transition zone in the epitaxial layer. After removing the transition zone, the dopant concentration gradient between the P+ contact area and the absorption area changes greatly. The photoelectrons generated in the P+ contact area will be recombined in situ by the high-concentration holes, and the photoelectrons generated in the absorption area will drift to the avalanche area at high speed, so that the SPAD has the characteristics of low after-pulse and high practicality. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 is a cross-sectional view of an existing silicon SPAD structure;

[0028] Figure 2 is an existing silicon SPAD impurity concentration distribution diagram;

[0029] Figure 3 The flowchart of the manufacturing method of the silicon SPAD detector with low after-pulse in the present invention;

[0030] Figure 4 This is the impurity concentration distribution diagram of the silicon SPAD in the present invention;

[0031] Figure 5 is a cross-sectional view of the silicon SPAD structure in the present invention;

[0032] Figure 6 This is a measured picture of the post-pulse of the silicon SPAD in the present invention. DETAILED DESCRIPTION

[0033] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0034] The present invention proposes a method for manufacturing a silicon SPAD detector with low afterpulse, such as Figure 3 As shown, the method includes the following contents:

[0035] S1: providing a clean P-type epitaxial silicon wafer; the P-type epitaxial silicon wafer includes a P-type substrate and an epitaxial layer; and growing a silicon oxide dielectric layer on the P-type epitaxial silicon wafer.

[0036] S2: forming a cut-off ring pattern by photolithography and etching the dielectric layer, and injecting a large dose of boron into the cut-off ring pattern to form a cut-off ring.

[0037] S3: forming a guard ring pattern by photolithography and etching the dielectric layer, and injecting a proper amount of phosphorus into the guard ring pattern to form a guard ring.

[0038] S4: P-type impurity injection into the avalanche zone: The avalanche zone pattern is formed by photolithography and etching of the dielectric layer, and an appropriate amount of boron element is injected into the avalanche zone. The boron element is then diffused into the silicon wafer through a high-temperature process.

[0039] S5: N-type impurity injection into the avalanche zone: Inject an appropriate amount of phosphorus into the avalanche zone, and then diffuse the phosphorus into the interior of the silicon wafer through a high-temperature process, thereby complementing the boron element to form an avalanche zone.

[0040] S6: Photolithography and etching of the dielectric layer to form N + The contact area pattern is formed by implanting a large dose of phosphorus + Contact area.

[0041] S7: depositing metal aluminum on the silicon oxide dielectric layer, and forming an upper electrode by photolithography and etching;

[0042] S8: Use temporary bonding glue to bond the glass carrier sheet to the front of the P-type epitaxial silicon wafer to provide mechanical support in the subsequent thinning process. Since the epitaxial layer is very thin (usually less than 50μm), directly removing the substrate will cause the epitaxial layer to curl or crack, so a temporary bonding carrier sheet is required to provide mechanical support.

[0043] S9: Corrode part of the P-type substrate by mechanical grinding and self-stop etching. The thickness of the remaining P-type substrate after mechanical grinding is 50 μm to 80 μm.

[0044] The self-stop etching method is to use a self-stop etching liquid to corrode the P-type substrate. The components of the self-stop etching liquid include nitric acid, hydrofluoric acid and glacial acetic acid. The difference in the etching rate of the self-stop etching liquid on silicon materials with different doping concentrations can be used to automatically stop after the substrate is corroded. In order to avoid introducing defects when removing the substrate, it is necessary to use a combination of mechanical grinding and etching. Mechanical grinding has a fast speed but will damage the silicon wafer, so it can be used to quickly remove most of the substrate; the etching speed is slow but the damage to the silicon wafer is small, so it can be used to remove the remaining substrate after mechanical grinding.

[0045] S10: removing the transition region in the epitaxial layer by a wet etching method.

[0046] The transition zone is a transition area formed on the side of the epitaxial layer close to the substrate when the dopant of the substrate diffuses into the epitaxial layer during the epitaxial growth of the silicon epitaxial wafer. Figure 4 As shown, since the transition zone is removed, the dopant concentration gradient between the P+ contact zone and the absorption zone changes greatly. The photoelectrons generated in the P+ contact zone will be recombined in situ by the high-concentration holes, and the photoelectrons generated in the absorption zone will drift to the avalanche zone at high speed. Therefore, the silicon SPAD detector of the present invention has a low after-pulse.

[0047] S11: Boron is injected into the back of the P-type epitaxial silicon wafer to form P + The contact area is exposed and the boron element is activated by laser annealing.

[0048] S12: In P + Metal aluminum is deposited under the contact area, and a lower electrode is formed by photolithography and etching.

[0049] S13: Using a laser debonding method, the glass carrier sheet on the front side of the P-type epitaxial silicon wafer is debonded to obtain a manufactured silicon SPAD detector.

[0050] Preferably, in an embodiment of the present invention, the resistivity of the P-type substrate is 0.01-0.05Ωcm, and the resistivity of the epitaxial layer is 250-300Ωcm.

[0051] Preferably, in an embodiment of the present invention, the bulk concentration range of the cut-off ring is 1E18 cm -3 ~1E20cm -3 .

[0052] Preferably, in the embodiment of the present invention, the body concentration of the guard ring is in the range of 5E15cm -3 ~5E17cm -3 .

[0053] Preferably, in the embodiment of the present invention, the P-type impurity implantation dose in the avalanche region is 4E12-1E13cm -2The diffusion temperature of P-type impurities in the avalanche zone is 1100-1200°C, and the diffusion time is 2-10 hours.

[0054] Preferably, in the embodiment of the present invention, the N-type impurity implantation dose in the avalanche region is 2E12-8E12cm -2 The diffusion temperature of N-type impurities in the avalanche zone is 1100-1200°C, and the diffusion time is 1-20 hours.

[0055] Preferably, in an embodiment of the present invention, N + The bulk concentration range in the contact zone is 1E18 cm -3 ~1E20cm -3 .

[0056] Preferably, in an embodiment of the present invention, the etching thickness when removing the transition region in the epitaxial layer by a wet etching method is greater than 3 μm.

[0057] Preferably, in an embodiment of the present invention, P + The bulk concentration range in the contact zone is 1E18 cm -3 ~1E20cm -3 .

[0058] like Figure 5 As shown, the structure of the silicon SPAD detector of the present invention includes: + Contact area, absorption area, avalanche area, N + Contact area, guard ring, cut-off ring, dielectric layer, upper electrode and lower electrode; P + The contact area is set below the absorption area; the lower electrode is set at P + Below the contact area, the cut-off rings are set at both ends of the upper part of the absorption area, the avalanche area is set in the middle of the upper part of the absorption area, and the protection rings are set on both sides of the avalanche area. + The contact area is set above the avalanche area, and the dielectric layer is set on the N + Above the contact area.

[0059] The present invention is evaluated as follows: Figure 6 As shown in the figure, the after-pulse probability is the statistical result of all after-pulses in the entire dead time; it can be seen from the figure that the after-pulse of the SPAD of the present invention is lower than the after-pulse of the SPAD without removing the transition zone, and the improvement effect is obvious.

[0060] The above embodiments further illustrate the purpose, technical solutions and advantages of the present invention in detail. It should be understood that the above embodiments are only preferred implementation modes of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made to the present invention within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for preparing a silicon SPAD detector with low afterpulse, characterized in that: The following steps are involved: S1: providing a clean P-type epitaxial silicon wafer; the P-type epitaxial silicon wafer includes a P-type substrate and an epitaxial layer; growing a silicon oxide dielectric layer on the P-type epitaxial silicon wafer; S2: forming a cut-off ring pattern by photolithography and etching the dielectric layer, and injecting boron element into the cut-off ring pattern to form a cut-off ring; S3: forming a guard ring pattern by photolithography and etching the dielectric layer, and injecting phosphorus into the guard ring pattern to form a guard ring; S4: P-type impurity injection into the avalanche region: The avalanche region pattern is formed by photolithography and etching of the dielectric layer, and boron is injected into the avalanche region. The boron is then diffused into the silicon wafer through a high temperature process. S5: N-type impurity injection into the avalanche region: phosphorus is injected into the avalanche region, and then the phosphorus is diffused into the silicon wafer through a high temperature process, thereby complementing the boron element in doping; S6: Photolithography and etching of the dielectric layer to form N + The contact area pattern is formed by implanting phosphorus elements into N + contact area; S7: depositing metal aluminum on the silicon oxide dielectric layer, and forming an upper electrode by photolithography and etching; S8: Using a temporary bonding adhesive, the glass carrier sheet is bonded to the front side of the P-type epitaxial silicon wafer to provide mechanical support in the subsequent thinning process; S9: etching part of the P-type substrate by mechanical grinding and self-stopping etching, and the thickness of the remaining P-type substrate after mechanical grinding is 50 μm to 80 μm; S10: removing the transition region in the epitaxial layer by a wet etching method; S11: Boron is injected into the back of the P-type epitaxial silicon wafer to form P + The contact area is then exposed to the sun and the boron element is activated by laser annealing; S12: In P + Metal aluminum is deposited under the contact area, and a lower electrode is formed by photolithography and etching; S13: Using a laser debonding method, debonding the front glass carrier sheet.

2. The method for preparing a silicon SPAD detector with low afterpulse according to claim 1, characterized in that: The P-type substrate resistivity of the P-type epitaxial silicon wafer is 0.01-0.05Ωcm, and the epitaxial layer resistivity of the P-type epitaxial silicon wafer is 250-300Ωcm.

3. The method for preparing a silicon SPAD detector with low afterpulse according to claim 1, characterized in that: The bulk concentration range of the cutoff ring is 1E18 cm -3 ~1E20cm -3 .

4. The method for preparing a silicon SPAD detector with low afterpulse according to claim 1, characterized in that: The bulk concentration of the guard ring ranges from 5E15 cm -3 ~5E17cm -3 .

5. The method for preparing a silicon SPAD detector with low afterpulse according to claim 1, characterized in that: The P-type impurity implantation dose in the avalanche region is 4E12~1E13 cm -2 The diffusion temperature of P-type impurities in the avalanche zone is 1100-1200°C, and the diffusion time is 2-10 hours.

6. The method for preparing a silicon SPAD detector with low afterpulse according to claim 1, characterized in that: The N-type impurity implantation dose in the avalanche region is 2E12~8E12 cm -2 The diffusion temperature of N-type impurities in the avalanche zone is 1100-1200°C, and the diffusion time is 1-20 hours.

7. The method for preparing a silicon SPAD detector with low afterpulse according to claim 1, characterized in that: N + The bulk concentration range in the contact zone is 1E18 cm -3 ~1E20cm -3 .

8. The method for preparing a silicon SPAD detector with low afterpulse according to claim 1, characterized in that: The self-stop etching method is to use a self-stop etching liquid to corrode the P-type substrate. The components of the self-stop etching liquid include nitric acid, hydrofluoric acid and glacial acetic acid.

9. The method for preparing a silicon SPAD detector with low afterpulse according to claim 1, characterized in that: When the transition region in the epitaxial layer is removed by a wet etching method, the etching thickness is greater than 3 μm.

10. The method for preparing a silicon SPAD detector with low afterpulse according to claim 1, characterized in that: P + The bulk concentration range in the contact zone is 1E18 cm -3 ~1E20cm -3 .

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