A KID chip with a hierarchical arrangement of capacitors and inductors and its manufacturing method

Abstract

The present invention proposes a KID chip with a layered arrangement of capacitors and inductors and a preparation method thereof. The chip comprises a superconducting resonator with a lumped structure arranged in a matrix, wherein each lumped structure comprises a high-resistance silicon substrate, a capacitor layer, a conductive via, an insulating layer, and an inductor layer. The capacitor layer comprises a microwave feed line and an interdigital capacitor; the inductor layer comprises a microwave signal lead and a meandering inductor; the insulating layer is provided with a conductive via connecting the interdigital capacitor and the meandering inductor. The interdigital capacitor and the meandering inductor are connected in parallel to form a superconducting resonator having the characteristics of an LC oscillation circuit. The interdigital capacitor and the meandering inductor are arranged in layers. At the same time, the insulating layer is provided with a conductive via connecting the microwave feed line on the capacitor layer and the microwave signal lead on the inductor layer, thereby realizing multiplexed and rapid readout of the KID signal.

Description

Technical Field

[0001] The present invention relates to the technical field of superconducting detectors, and in particular to a KID chip with capacitors and inductors arranged in layers and a preparation method thereof. Background Art

[0002] The superconducting Kinetic Inductance Detector (KID) array is a new type of high-sensitivity detector that can be used to detect targets such as terahertz and infrared astronomy. At present, the KID technology used in astronomical research has a single-layer structure, that is, a lumped structure arranged in a matrix, including interdigital capacitors and meandering inductors, and the microwave feed lines are arranged on the same layer. When external incident photons irradiate the meandering inductor, the Cooper electron pairs in the inductor in the superconducting state are destroyed, generating quasiparticles, thereby increasing the inductance value, further causing the oscillation frequency of the LC oscillation circuit formed by the interdigital capacitors and the meandering inductor to shift in frequency. By measuring the frequency shift of the oscillation frequency, the energy and number of the incident photons can be obtained.

[0003] However, the meandering inductor in the KID detector occupies a small area, while the interdigital capacitors and microwave feed lines that do not participate in the photoelectric effect occupy a larger area, which leads to a larger size of the single lumped structure and ultimately a low pixel point of the KID detector.

[0004] like Figure 1 As shown, the existing KID chip has a single-layer structure.

[0005] Advantages: simple structure, easy processing

[0006] Disadvantages: 1) For the same technical indicators, the lumped structure of this design occupies a large area, currently about 120um square;

[0007] 2) The photosensitive part is a meandering inductor 300, so the proportion of the photosensitive area is low, and the photosensitive area accounts for less than 30% of the total structure area, resulting in low quantum efficiency;

[0008] 3) Since the meandering inductor 300, interdigital capacitor 200, and microwave feed line 100 are deposited simultaneously, their thickness is the same. However, due to the different design requirements for capacitance, inductance, and resistance, the same thickness limits the miniaturization of line width and length, making it difficult to reduce the overall size (inductance per unit length is proportional to h / w, and capacitance per unit length is proportional to w / h, where h is the film thickness and w is the line width);

[0009] 4) To increase the efficiency of incident light capture by the inductor, a microlens matrix is currently added to the KID chip to focus the incident light onto the inductor. However, since each inductor has a different shape, the processing cost would be too high if each microlens were specially designed. If all microlenses were identical, the light focusing effect would be unsatisfactory. Summary of the Invention

[0010] The object of the present invention is to solve at least one of the technical drawbacks.

[0011] Therefore, the purpose of the present invention is to provide a KID chip with capacitors and inductors arranged in layers and a method for manufacturing the same, so as to solve the problems mentioned in the background art and overcome the deficiencies in the prior art.

[0012] In order to achieve the above-mentioned object, an embodiment of the present invention provides a KID chip with a layered arrangement of capacitors and inductors, comprising: a plurality of superconducting resonators arranged in a matrix and lumped structure;

[0013] Wherein, each of the lumped structures comprises a high-resistance silicon substrate, a capacitor layer, a conductive via, an insulating layer and an inductor layer;

[0014] The capacitance layer includes: a microwave feed line and an interdigital capacitor;

[0015] The inductor layer includes: microwave signal lead wires and meandering inductors;

[0016] The insulating layer is provided with conductive vias connecting the interdigital capacitors and the meandering inductors.

[0017] The interdigital capacitors and the meandering inductors are connected in parallel to form a superconducting resonator with LC oscillation circuit characteristics, and the interdigital capacitors and meandering inductors are arranged in layers;

[0018] The insulating layer is provided with a conductive through hole connecting the microwave feed line on the capacitor layer and the microwave signal lead on the inductor layer, thereby realizing the connection between the capacitor layer and the inductor layer, and connecting the microwave feed line on the capacitor layer to the microwave signal lead line on the inductor layer to realize multiplexed and fast readout of the KID signal.

[0019] Preferably, any of the above solutions includes the superconducting coating comprising aluminum, niobium nitride, and yttrium barium copper oxide.

[0020] Preferably, any of the above schemes is that the interdigitated capacitors of the capacitor layer include: microstrip lines, the thickness of the microstrip lines constituting the capacitors is in the range of 20 to 200 nm, the width is in the range of 0.2 to 2 um, the microstrip line spacing is in the range of 50 to 500 nm, and the ratio of the microstrip line thickness to the width is less than or equal to 0.5.

[0021] Preferably, any of the above schemes comprises a meandering inductor of the inductor layer comprising a microstrip line, the microstrip line constituting the inductor layer comprising a reflective layer, an inductor and an anti-reflection layer, the thickness of the inductor layer ranges from 20 to 200 nm, the width ranges from 0.2 to 2 um, the microstrip line spacing ranges from 50 to 500 nm, and the ratio of the microstrip line thickness to the width is less than or equal to 0.5.

[0022] Preferably, any of the above solutions has a resistance of 5000 to 20000 ohm-cm.

[0023] Preferably, any of the above solutions is that the insulating layer is made of SU8 and has a thickness ranging from 0.1 to 100 μm;

[0024] The conductive through hole has a diameter range of 0.01 to 10 μm, a through hole chemical plating layer thickness of 1 to 10 nm, and an electroplating layer thickness of 100 to 10,000 nm;

[0025] The natural frequency range of the superconducting resonator is 0.01 to 16 GHz, and the difference between adjacent natural frequencies is greater than or equal to 1 MHz. The present invention also proposes a method for preparing a KID chip with layered capacitor and inductor arrangements, comprising the following steps:

[0026] Step S1, applying photoresist on the cleaned surface of the high-resistance silicon substrate;

[0027] Step S2, performing patterned exposure on the photoresist, after cleaning, depositing a superconducting coating by physical vapor deposition, and after cleaning with acetone, the remaining microstrip lines form a capacitor layer and a microwave feed line;

[0028] Step S3, leveling a layer of photoresist SU8 on the capacitor layer, and heating and curing;

[0029] Step S4, performing patterned exposure on the photoresist SU8, and after cleaning, forming through holes connecting the capacitor and the inductor, and through holes connecting the microwave feed line to the microwave signal lead line;

[0030] Step S5, after the photoresist SU8 is hardened at high temperature, a conductive layer is chemically plated;

[0031] Step S6, depositing a conductive coating;

[0032] Step S7, chemical mechanical polishing to remove the conductive coating on the photoresist SU8;

[0033] Step S8, surface-spinning photoresist;

[0034] Step S9, patterning the photoresist and exposing it. After cleaning, magnetron sputtering or pulsed laser deposition is used to deposit a reflective layer, a superconducting coating as an inductor, and an anti-reflection layer in sequence. After cleaning with acetone, the remaining microstrip line forms a patterned inductor layer and microwave signal lead-out line.

[0035] Preferably, in any of the above schemes, in step (2), the physical vapor deposition method includes electron beam evaporation, magnetron sputtering, pulsed laser deposition, and atomic layer deposition;

[0036] In the step (3), the curing temperature of SU8 is 95° C. and the curing time is 1 to 20 minutes;

[0037] Preferably, in any of the above schemes, in step (6), the method of depositing the conductive coating includes chemical plating and magnetron sputtering.

[0038] Preferably, in step (9), the reflective layer is a metal element, the thickness of the reflective layer is 1 to 10 nm, the anti-reflection layer is a transparent coating, the thickness of the anti-reflection layer is d = nλ / 4, where n is the refractive index of the anti-reflection layer, and λ is the center wavelength of the detection band.

[0039] Additional aspects and advantages of the present invention will be set forth in part in the description which follows and, in part, will be obvious from the description which follows, or may be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments with reference to the accompanying drawings, in which:

[0041] Figure 1 This is a single-layer structure diagram of an existing KID chip;

[0042] Figure 2 A structural diagram of a KID chip with capacitors and inductors arranged in layers according to an embodiment of the present invention;

[0043] Figure 3 is a structural diagram of a capacitor layer according to an embodiment of the present invention;

[0044] Figure 4 is a structural diagram of an inductor layer according to an embodiment of the present invention;

[0045] Figure 5 The figure is a flow chart of a method for preparing a KID chip with capacitors and inductors arranged in layers according to an embodiment of the present invention.

[0046] Reference numerals:

[0047] 100. Microwave feed line, 200. Interdigital capacitor, 300. Meandering inductor;

[0048] 1. High-resistance silicon substrate, 2. Capacitor layer, 3. Conductive via, 4. Insulation layer, 5. Anti-reflection layer, 6. Inductor layer, 7. Reflection layer;

[0049] 8. Conductive vias connecting microwave feed lines to microwave signal lead lines, 9. Interdigital capacitors, 10. Conductive vias connecting interdigital capacitors to meandering inductors, 11. Microwave feed lines;

[0050] 12. Conductive vias connecting microwave feed lines to microwave signal lead lines, 13. Microwave signal lead lines, 14. Conductive vias connecting interdigital capacitors to meandering inductors, 15. Meandering inductors;

[0051] W. Width of microwave feed line; WX. Spacing between interdigital capacitor and microwave feed line; CW. Width of interdigital capacitor microstrip line;

[0052] CX. Distance between interdigitated capacitor microstrip lines; LW. Width of meandering inductor microstrip lines; LX. Spacing between meandering inductor microstrip lines. DETAILED DESCRIPTION

[0053] The following describes embodiments of the present invention in detail. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to explain the present invention, but are not to be construed as limiting the present invention.

[0054] The present invention proposes a KID chip with a layered arrangement of capacitors and inductors and a method for preparing the same, which can increase the number of pixels in the KID detector and the clarity of KID imaging. Specifically, by depositing the interdigital capacitors and microwave feed lines in the lower layer and the photosensitive meandering resistors and signal lead lines in the top layer, the proportion of the effective photosensitive area is increased, thereby improving the imaging effect of the KID detector.

[0055] like Figure 2 As shown, the KID chip with layered capacitor and inductor arrangement according to the embodiment of the present invention includes: a plurality of superconducting resonators of a lumped structure arranged in a matrix.

[0056] Specifically, each lumped structure includes a high-resistance silicon substrate 1 , a capacitor layer 2 , a conductive via 3 , an insulating layer 4 and an inductor layer 6 .

[0057] The capacitor layer 2 includes a microwave feed line 100 and an interdigital capacitor 200 .

[0058] The inductor layer 6 includes a microwave signal lead line 13 and a meandering inductor 15 .

[0059] The insulating layer 4 is provided with conductive vias connecting the interdigital capacitors and the meandering inductors.

[0060] The interdigital capacitors 300 and the meandering inductors 200 are connected in parallel to form a superconducting resonator with LC oscillation circuit characteristics. The interdigital capacitors 300 and the meandering inductors 200 are arranged in layers.

[0061] In an embodiment of the present invention, the interdigitated capacitor 200 includes microstrip lines, the thickness of the microstrip lines constituting the capacitor ranges from 20 to 200 nm, the width ranges from 0.2 to 2 μm, the microstrip line spacing ranges from 50 to 500 nm, and the ratio of the microstrip line thickness to the width is less than or equal to 0.5.

[0062] The meandering inductor 300 includes a microstrip line. The microstrip line constituting the inductor layer includes a reflective layer 7, an inductor layer 6, and an anti-reflection layer 5. The thickness of the inductor layer 6 ranges from 20 to 200 nm, the width ranges from 0.2 to 2 μm, the microstrip line spacing ranges from 50 to 500 nm, and the ratio of the microstrip line thickness to width is less than or equal to 0.5.

[0063] like Figure 3 and Figure 4 As shown, the lumped structure includes a high-resistance silicon substrate 1, a capacitor layer 2, a conductive via 3, an insulating layer 4, and an inductor layer 6 composed of an anti-reflection layer 5, an inductor, and a reflective layer 7. The microwave feed line is arranged in the capacitor layer, and the microwave signal lead line is arranged in the inductor layer 6. The insulating layer 4 is provided with a conductive via connecting the microwave feed line on the capacitor layer 2 and the microwave signal lead line on the inductor layer 3 to achieve the connection between the capacitor layer 2 and the inductor layer 6. The microwave feed line on the capacitor layer 2 is connected to the microwave signal lead line on the inductor layer 6 to achieve multiplexed and fast readout of the KID signal.

[0064] The natural frequencies of the superconducting resonators in each lumped structure are different and increase in sequence. The microwave signals generated by them are coupled to the microwave feeder and output without interfering with each other. This structure enables the lumped structure to have a larger photosensitive area and a smaller size.

[0065] In the embodiment of the present invention, the reflective layer 7 is a metal element with a thickness of 1 to 10 nm. The anti-reflection layer is a transparent coating with a thickness of d=nλ / 4, where n is the refractive index of the anti-reflection layer and λ is the center wavelength of the detection band.

[0066] In the embodiment of the present invention, the resistance of the high-resistance silicon substrate 1 is 5000-20000 ohm-cm.

[0067] The insulating layer 4 is made of SU8 and has a thickness ranging from 0.1 to 100 μm;

[0068] The diameter of the conductive through hole 3 ranges from 0.01 to 10 μm, the thickness of the chemical plating layer of the through hole is 1 to 10 nm, and the thickness of the electroplating layer is 100 to 10000 nm;

[0069] The natural frequency range of the superconducting resonator is 0.01 to 16 GHz, and the difference between adjacent natural frequencies is greater than or equal to 1 MHz.

[0070] like Figure 5As shown, the method for preparing a KID chip with capacitors and inductors arranged in layers according to an embodiment of the present invention includes the following steps:

[0071] Step S1, applying photoresist on the cleaned surface of the high-resistance silicon substrate by spinning.

[0072] Among them, the thickness of the photoresist is 1 to 2 um.

[0073] Step S2, patterning and exposing the photoresist, cleaning it, and then depositing a superconducting coating by physical vapor deposition. After cleaning it with acetone, the remaining microstrip lines form a capacitor layer and a microwave feed line.

[0074] Among them, physical vapor deposition methods include electron beam evaporation, magnetron sputtering, pulsed laser deposition, and atomic layer deposition.

[0075] Step S3: A layer of photoresist SU8 is leveled on the capacitor layer and then heated to cure.

[0076] In this step, the curing temperature of SU8 is 95° C. and the curing time is 1 to 20 minutes.

[0077] Step S4, performing patterned exposure on the SU8 photoresist, and after cleaning, forming through holes connecting the capacitor and the inductor, and through holes connecting the microwave feed line to the microwave signal lead line.

[0078] In this step, ultraviolet light with a wavelength of 365 nm is used for exposure. The diameter of the conductive through hole ranges from 0.01 to 10 μm, the thickness of the chemical plating layer of the through hole is from 1 to 10 nm, and the thickness of the electroplating layer is from 100 to 10,000 nm.

[0079] Step S5: After the photoresist SU8 is hardened at high temperature, a conductive layer is chemically plated.

[0080] In this step, the electroless plating of the conductive layer includes electroless nickel plating.

[0081] Step S6: depositing a conductive coating.

[0082] In this step, methods for depositing the conductive coating include chemical plating and magnetron sputtering.

[0083] Step S7: chemical mechanical polishing to remove the conductive coating on the photoresist SU8.

[0084] Step S8, surface-spinning photoresist.

[0085] Step S9, patterning the photoresist and exposing it. After cleaning, magnetron sputtering or pulsed laser deposition is used to deposit a reflective layer, a superconducting coating as an inductor, and an anti-reflection layer in sequence. After cleaning with acetone, the remaining microstrip line forms a patterned inductor layer and microwave signal lead-out line.

[0086] In an embodiment of the present invention, the superconducting coating comprises aluminum, niobium nitride, and yttrium barium copper oxide.

[0087] In this step, the reflective layer is a metal element, such as Ti, and the thickness of the reflective layer is 1 to 10 nm. The anti-reflection layer is a transparent coating, such as Si3N4, SiO2, Al2O3, and the thickness of the anti-reflection layer is d = nλ / 4, where n is the refractive index of the anti-reflection layer and λ is the center wavelength of the detection band.

[0088] It should be noted that the values and value ranges of the various parameters in the embodiments of the present invention are for illustrative purposes only and are not intended to limit the present invention. The value selection of each parameter can be adjusted according to actual needs.

[0089] Compared with the prior art, the KID chip with layered capacitor and inductor arrangement and the preparation method thereof of the present invention have the following advantages:

[0090] 1) Small size of a single lumped structure: Due to the three-dimensional design of layered capacitor and inductor arrangements, the area occupied by a single layer is significantly reduced. Furthermore, due to the layered design, the thickness of the microstrip lines in each layer can be different. Therefore, the thickness and width of the capacitors, inductors, and microwave feed lines can be designed as needed.

[0091] 2) High photosensitivity: Since the top layer of each lumped structure consists only of inductors, the effective photosensitivity area is greatly increased, accounting for more than 90% of the lumped structure area, thereby greatly improving the ratio of inductors to capture photons.

[0092] 3) Using an anti-reflection layer above the inductor and a reflective layer below the inductor can better capture the incident light information by the inductor, more effectively destroy the Cooper electron pairs, generate quasiparticles, and make the KID detector more sensitive.

[0093] 4) Eliminating the microlens array: Since the photosensitivity of the lumped structure is improved, the microlens array can be eliminated, thereby simplifying the structure.

[0094] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0095] Those skilled in the art will readily understand that the present invention encompasses any combination of the components described in the Summary and Detailed Description of the Invention and the accompanying drawings. Due to space limitations and for the sake of clarity, not all of the various solutions resulting from these combinations are described. Any modifications, equivalent substitutions, and improvements within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

[0096] Although the embodiments of the present invention have been shown and described above, it should be understood that the above embodiments are illustrative and are not to be construed as limiting the present invention. Those skilled in the art may make changes, modifications, substitutions, and variations to the above embodiments without departing from the principles and intent of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A KID chip with capacitors and inductors arranged in layers, characterized in that: include: Multiple superconducting resonators arranged in a matrix lumped structure, Wherein, each of the lumped structures comprises a high-resistance silicon substrate, a capacitor layer, a conductive via, an insulating layer and an inductor layer; The capacitance layer includes: a microwave feed line and an interdigital capacitor; The inductor layer includes: microwave signal lead wires and meandering inductors; The insulating layer is provided with conductive through holes connecting the interdigital capacitors and the meandering inductors, the interdigital capacitors and the meandering inductors are connected in parallel to form a superconducting resonator with LC oscillation circuit characteristics, and the interdigital capacitors and the meandering inductors are arranged in layers; The insulating layer is provided with a conductive through hole connecting the microwave feed line on the capacitor layer and the microwave signal lead on the inductor layer, thereby realizing the connection between the capacitor layer and the inductor layer, and connecting the microwave feed line on the capacitor layer to the microwave signal lead line on the inductor layer to realize multiplexed and fast readout of the KID signal.

2. The KID chip with layered capacitor and inductor arrangement according to claim 1, wherein: The capacitor layer and the inductor layer are superconducting coatings, and the superconducting coatings include aluminum, niobium nitride, and yttrium barium copper oxide.

3. The KID chip with layered capacitor and inductor arrangement according to claim 1, wherein: The interdigital capacitors of the capacitor layer include microstrip lines, the thickness of the microstrip lines constituting the capacitors ranges from 20 to 200 nm, the width ranges from 0.2 to 2 μm, the microstrip line spacing ranges from 50 to 500 nm, and the ratio of the microstrip line thickness to width is less than or equal to 0.

5.

4. The KID chip with layered capacitor and inductor arrangement according to claim 1, wherein: The meandering inductor of the inductor layer includes a microstrip line, and the microstrip line constituting the inductor layer includes a reflective layer, an inductor and an anti-reflection layer. The thickness of the inductor layer ranges from 20 to 200 nm, the width ranges from 0.2 to 2 μm, the microstrip line spacing ranges from 50 to 500 nm, and the ratio of the microstrip line thickness to the width is less than or equal to 0.

5.

5. The KID chip with layered capacitor and inductor arrangement according to claim 1, wherein: The resistance of the high-resistance silicon substrate is 5000 to 20000 ohm-cm.

6. The KID chip with layered capacitor and inductor arrangement according to claim 1, wherein: The insulating layer is made of SU8 and has a thickness ranging from 0.1 to 100 μm; The conductive through hole has a diameter range of 0.01 to 10 μm, a thickness of the chemically plated film layer of the through hole of 1 to 10 nm, and a thickness of the electroplated film layer of 100 to 10,000 nm; The natural frequency range of the superconducting resonator is 0.01 to 16 GHz, and the difference between adjacent natural frequencies is greater than or equal to 1 MHz.

7. A method for preparing a KID chip with layered capacitor and inductor arrangement according to any one of claims 1 to 6, characterized in that: The steps include: Step S1, applying a photoresist on the cleaned surface of a high-resistance silicon substrate; Step S2, performing patterned exposure on the photoresist, after cleaning, depositing a superconducting coating by physical vapor deposition, and after cleaning with acetone, the remaining microstrip lines form a capacitor layer and a microwave feed line; Step S3, leveling a layer of photoresist SU8 on the capacitor layer, and heating and curing; Step S4, performing patterned exposure on the photoresist SU8, and after cleaning, forming through holes connecting the capacitor and the inductor, and through holes connecting the microwave feed line to the microwave signal lead line; Step S5, after the photoresist SU8 is hardened at high temperature, a conductive layer is chemically plated; Step S6, depositing a conductive coating; Step S7, chemical mechanical polishing to remove the conductive coating on the photoresist SU8; Step S8, surface-spinning photoresist; Step S9, patterning the photoresist and exposing it. After cleaning, magnetron sputtering or pulsed laser deposition is used to deposit a reflective layer, a superconducting coating as an inductor, and an anti-reflection layer in sequence. After cleaning with acetone, the remaining microstrip line forms a patterned inductor layer and microwave signal lead-out line.

8. The method for preparing a KID chip with layered capacitor and inductor arrangement according to claim 7, wherein: In the step (2), the physical vapor deposition method includes electron beam evaporation, magnetron sputtering, pulsed laser deposition, and atomic layer deposition; In the step (3), the curing temperature of SU8 is 95° C., and the curing time is 1 to 20 minutes.

9. The method for preparing a KID chip with layered capacitor and inductor arrangement according to claim 7, wherein: In the step (6), the method of depositing the conductive coating includes chemical plating and magnetron sputtering.

10. The method for preparing a KID chip with layered capacitor and inductor arrangement according to claim 7, wherein: In step (9), the reflective layer is a metal element with a thickness of 1 to 10 nm, the antireflection layer is a transparent coating, and the thickness of the antireflection layer is d=nλ / 4, where n is the refractive index of the antireflection layer and λ is the center wavelength of the detection band.

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