A method for repairing embedded device and ROM program

Abstract

The present invention discloses an embedded device and a method for repairing a ROM program. The method comprises the following steps: after an address comparison circuit captures that the address of any breakpoint interrupt register is the same as that of a PC register, a control circuit is triggered to send an interrupt to a CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed; after receiving the interrupt, the CPU updates and writes the address of the breakpoint interrupt program into the PC register to start executing the breakpoint interrupt program; the breakpoint interrupt program is executed by the CPU by searching the address in the breakpoint interrupt register that triggers the control circuit from a repaired program address list as the current repaired program address, allocating a first number of breakpoint interrupt registers from a breakpoint interrupt register group to a first program group to which the current repaired program address belongs, and allocating breakpoint interrupt registers to a plurality of second program groups respectively; and the address of the repair program is written into the PC register so that the repair program is executed by the CPU.

Description

Technical Field

[0001] The present invention relates to the field of ROM program repair, and in particular to an embedded device and a ROM program repair method. Background Art

[0002] Read-only memory (ROM) is an essential component of embedded systems, storing the programs and data necessary for system operation. Once the ROM is written and completed, it cannot be rewritten; it can only be read. Because the programs (or code) in the ROM may contain errors, it is sometimes necessary to repair the ROM code already stored on the chip to avoid re-making a new ROM.

[0003] A conventional solution involves writing the addresses of all programs to be repaired into a comparator and then monitoring the address on the address bus. When the address on the address bus matches the comparator address, the CPU interrupts and uses the repair program to repair the program. However, this solution requires a large number of comparators when there are many programs to be repaired, making the system very complex. Summary of the Invention

[0004] Based on the above situation, the main purpose of the present invention is to provide an embedded device and a ROM program repair method, so that more repaired programs can be repaired with fewer interrupt circuits.

[0005] To achieve the above object, the technical solution adopted by the present invention is as follows:

[0006] A method for repairing a ROM program is applied to a system including a ROM, a CPU, an interrupt circuit and a storage medium, wherein the CPU includes a PC register, the interrupt circuit includes a breakpoint interrupt register group, an address comparison circuit and a control circuit, the breakpoint interrupt register group includes multiple breakpoint interrupt registers, and the storage medium stores a breakpoint interrupt program. The repair method includes the following steps: after the address comparison circuit captures that the address of the repaired program stored in any breakpoint interrupt register is the same as the address of the PC register, the control circuit is triggered to send an interrupt to the CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed; after receiving the interrupt, the CPU updates the address of the breakpoint interrupt program to the PC register to start executing the breakpoint interrupt program; the breakpoint interrupt program is executed by the CPU as follows: the address in the breakpoint interrupt register that triggered the control circuit is used as the current repaired program address, the first program group to which the current repaired program address belongs is searched from the repaired program address list, and the first program group to which the current repaired program address belongs is searched from the breakpoint interrupt register address list, and the first program group to which the current repaired program address belongs is searched from the breakpoint register address list A first number of breakpoint interrupt registers are allocated to the first program group to which the current repaired program address belongs in the breakpoint interrupt register group so as to respectively write a number of repaired program addresses in the first program group, and a breakpoint interrupt register is allocated to each of the plurality of second program groups so as to respectively write the first repaired program address of the corresponding second program group; wherein the first program group and the plurality of second program groups are stored in the ROM, and the plurality of second program groups are configured to jump from the first program group to a corresponding second program group when different conditions are met during the execution of the first program group; the repaired program address list including the repaired program addresses in the first program group and the plurality of second program groups, and the repair programs corresponding to the repaired programs in the first program group and the plurality of second program groups are all stored in the storage medium; the first number is greater than the number of breakpoint interrupt registers allocated to each second program group; the address of the repair program for repairing the repaired program pointed to by the current repaired program address is written into the PC register so that the repair program is executed by the CPU.

[0007] Preferably, the ROM also stores an initialization program, and the storage medium also stores a repair flag. After the system is running, the initialization program is executed by the CPU as follows: reading the repair flag from the storage medium, determining whether the repair flag is a repair; if so, reading the first repaired program address from the storage medium, and writing the first repaired program address into any breakpoint interrupt register; if not, continuing to execute the program in the ROM.

[0008] Preferably, the first program group includes a repaired random program, and among the first number of breakpoint interrupt registers, at least one is used to write the address of the repaired random program, and at least another is used to write the address of the next repaired program in the first program group that is configured to be executed after the current repaired program.

[0009] Preferably, the first number of breakpoint interrupt registers includes a breakpoint interrupt register that triggers the control circuit.

[0010] Preferably, the first program group is a program for realizing a first function, and each second program group is a program for realizing a corresponding second function.

[0011] Preferably, the ROM, CPU, stack and interrupt circuit are integrated in a SOC chip, and the storage medium is located outside the SOC chip.

[0012] The present invention also provides an embedded device, comprising a ROM, a CPU, an interrupt circuit and a storage medium, wherein the CPU comprises a PC register, the interrupt circuit comprises a breakpoint interrupt register group, an address comparison circuit and a control circuit, the breakpoint interrupt register group comprises a plurality of breakpoint interrupt registers, the storage medium stores a breakpoint interrupt program, in the interrupt circuit, after the address comparison circuit captures that the address of the repaired program stored in any breakpoint interrupt register is the same as the address of the PC register, it triggers the control circuit to send an interrupt to the CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed; after receiving the interrupt, the CPU updates the address of the breakpoint interrupt program to the PC register to start executing the breakpoint interrupt program; in the CPU, the breakpoint interrupt program is executed by the CPU as follows: the address in the breakpoint interrupt register that triggered the control circuit is used as the current repaired program address, the first program group to which the current repaired program address belongs is searched from the repaired program address list, and the first program group to which the current repaired program address belongs is searched from the breakpoint register address list, and the first program group to which the current repaired program address belongs is searched from the breakpoint register address list A first number of breakpoint interrupt registers are allocated to the first program group to which the current repaired program address belongs in the breakpoint interrupt register group so as to respectively write a number of repaired program addresses in the first program group, and a breakpoint interrupt register is allocated to each of the plurality of second program groups so as to respectively write the first repaired program address of the corresponding second program group; wherein the first program group and the plurality of second program groups are stored in the ROM, and the plurality of second program groups are configured to jump from the first program group to a corresponding second program group when different conditions are met during the execution of the first program group; the repaired program address list including the repaired program addresses in the first program group and the plurality of second program groups, and the repair programs corresponding to the repaired programs in the first program group and the plurality of second program groups are all stored in the storage medium; the first number is greater than the number of breakpoint interrupt registers allocated to each second program group; the address of the repair program for repairing the repaired program pointed to by the current repaired program address is written into the PC register so that the repair program is executed by the CPU.

[0013] Preferably, the ROM also stores an initialization program, and the storage medium also stores a repair flag. After the system is running, the initialization program is executed by the CPU as follows: reading the repair flag from the storage medium, determining whether the repair flag is a repair; if so, reading the first repaired program address from the storage medium, and writing the first repaired program address into any breakpoint interrupt register; if not, continuing to execute the program in the ROM.

[0014] Preferably, the first program group includes a repaired random program, and among the first number of breakpoint interrupt registers, at least one is used to write the address of the repaired random program, and at least another is used to write the address of the next repaired program in the first program group that is configured to be executed after the current repaired program.

[0015] Preferably, the first number of breakpoint interrupt registers includes a breakpoint interrupt register that triggers the control circuit.

[0016] Preferably, the first program group is a program for realizing a first function, and each second program group is a program for realizing a corresponding second function.

[0017] Preferably, the ROM, CPU, stack and interrupt circuit are integrated in a SOC chip, and the storage medium is located outside the SOC chip.

[0018] Beneficial effects

[0019] In this solution, by grouping the repaired programs, a larger number of breakpoint interrupt registers are allocated to the first program group currently being executed to meet the needs of repairing the next repaired program and the repaired random program in the first program group. At the same time, corresponding breakpoint interrupt registers are allocated to the addresses of the first repaired program of multiple second groups of programs that may be executed at any time to meet the needs of repairing the multiple second groups of programs. Therefore, a smaller number of breakpoint interrupt registers can be used to implement the repair of multiple groups of program groups that need to be repaired (including the first program group and multiple second program groups).

[0020] Other beneficial effects of the present invention will be explained through the introduction of specific technical features and technical solutions in the specific implementation methods. Those skilled in the art should be able to understand the beneficial technical effects brought about by the introduction of these technical features and technical solutions. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings.

[0022] Figure 1 A system diagram of an embedded device according to a preferred embodiment of the present invention;

[0023] Figure 2 A schematic diagram of a program in a ROM and a storage medium and a breakpoint interrupt register group according to a preferred embodiment of the present invention;

[0024] Figure 3 A flowchart of a method for replacing and repairing ROM functions according to a preferred embodiment of the present invention;

[0025] Figure 4A schematic diagram of a first program group in a ROM according to a preferred embodiment of the present invention;

[0026] Figure 5 This is a schematic diagram of a program in a storage medium according to a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0027] The present invention is described below based on the following embodiments, but the present invention is not limited to these embodiments. In the following detailed description of the present invention, some specific details are described in detail. In order to avoid obscuring the essence of the present invention, well-known methods, processes, procedures, and components are not described in detail.

[0028] Furthermore, persons of ordinary skill in the art will appreciate that the figures provided herein are for illustration purposes only and are not necessarily drawn to scale.

[0029] Unless the context clearly requires otherwise, throughout the specification and claims, the words "include," "comprising," and similar words should be construed in an inclusive sense rather than an exclusive or exhaustive sense; that is, in the sense of "including but not limited to."

[0030] In the description of the present invention, it should be understood that the terms "first", "second", etc. are used for descriptive purposes only and should not be understood to indicate or imply relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0031] like Figure 1 As shown, Figure 1 The present invention relates to an embedded device, which includes a SOC chip and a storage medium (such as FLASH). The SOC chip includes a ROM, a CPU, an interrupt circuit and a RAM. The CPU includes a PC (Program Counter) register, the interrupt circuit includes a breakpoint interrupt register (Breakpoint Interrupt Register) group, an address comparison circuit and a control circuit, the breakpoint interrupt register group includes multiple breakpoint interrupt registers, and the RAM provides a storage location for temporary related data generated during the operation of the CPU. For example, the stack used by the CPU operation can be set in the RAM.

[0032] The ROM stores programs for the CPU to execute in order to implement various operations (including various calculations and operations on the contents stored in various registers). Due to various reasons (such as errors in the design and verification stages, etc.), there is a part of the program (or code) stored in the ROM that needs to be repaired, which can be called the repaired program. The repaired program can have multiple repair types. One type is the insertion repair type, which is to insert a repair program before the repaired program so that the CPU executes the repaired program after executing the repair program. Another type is the program replacement repair type, which is to replace the repaired program with a repair program so that when the repaired program is about to be run, the CPU no longer executes the repaired program and instead executes the repair program. Depending on whether the repaired program needs to use the passed parameters generated by the previous machine instructions of the repaired program, it can be divided into parameter-passing instruction block replacement (the repaired program includes multiple machine instructions and needs to use the passed parameters generated by the previous machine instructions) and non-parameter-passing instruction block replacement (the repaired program includes multiple machine instructions and does not need to use the passed parameters generated by the previous machine instructions).

[0033] In order to repair the repaired program, the storage medium stores a breakpoint interrupt program and a repair program for repairing each repaired program. The address of the repaired program is written into the breakpoint interrupt register. When the address comparison circuit captures that the address in the PC register is the same as the address of any breakpoint interrupt register in the breakpoint interrupt register group, the control circuit is triggered to send an interrupt to the CPU to prevent the repaired program pointed to by the address in the PC register (that is, the address in the breakpoint interrupt register that triggered the control circuit) from being directly executed (the interrupt is a special interrupt with the highest interrupt priority, which can interrupt the operation being executed by the CPU); after receiving the interrupt, the CPU updates the address of the breakpoint interrupt program written into the PC register to start executing the breakpoint interrupt program; the breakpoint interrupt program is executed by the CPU as follows: searching the address in the breakpoint interrupt register that triggered the control circuit from the repaired program address list as the current repaired program address, and searching the address in the breakpoint interrupt register group for the current repaired program A first program group to which the restored program address belongs is allocated a first number of breakpoint interrupt registers for writing the addresses of several repaired programs in the first program group, and a plurality of second program groups are respectively allocated breakpoint interrupt registers for writing the addresses of the first repaired programs in the corresponding second program groups. The first program group and the plurality of second program groups are stored in a ROM, and the plurality of second program groups are configured to jump from the first program group to a corresponding second program group when different conditions are met during the execution of the first program group. A list of repaired program addresses including the addresses of the repaired programs in the first program group and the plurality of second program groups, as well as repair programs for repairing the repaired programs in the first program group and the plurality of second program groups are stored in a storage medium. The first number is greater than the number of breakpoint interrupt registers allocated to each second program group. The address of the repair program for repairing the repaired program pointed to by the current repaired program address is written into the PC register so that the repair program is executed by the CPU. In this way, the repaired programs in the plurality of program groups can be repaired using a smaller number of breakpoint interrupt registers. Once a second program group is subsequently executed, the corresponding repair program can be entered for repair.

[0034] In some embodiments, first program group 1 is a program that implements a first function (e.g., performing operations on input data obtained by an embedded device to obtain operation results), second program group 2 is a program that implements a second function (e.g., outputting the operation results to a display screen), and second program group 3 is a program that implements another second function (e.g., outputting the operation results to a speaker in audio form). First program group 1, second program group 2, and second program group 3 may exist in the form of functions.

[0035] like Figure 2As shown, the ROM stores a first program group 1 and multiple second program groups (respectively, program group 2 and program group 3). The second program group 2 and the second program group 3 are configured to, during the execution of the first program group 1, when different conditions are met, jump from the first program group 1 to the corresponding second program group. That is, during the execution of the first program group 1, the program group to be executed is relatively random. For example, during the execution of the first program group 1, if condition 2 is met, the execution jumps from the first program group 1 to the second program group 2. During the execution of the first program group 1, if condition 3 is met, the execution jumps from the first program group 1 to the second program group 3. However, since the repaired programs in the first program group and multiple second program groups need to be repaired, that is, the repaired programs are repaired by the repair programs in the storage medium (the repair programs in the storage medium can be stored in the storage medium before the embedded device leaves the factory, or can be updated to the storage medium through online upgrade after the embedded device leaves the factory), in this solution, the CPU does not directly execute the repaired program, but executes the repair program first. After the repair program is executed, whether the repaired program will continue to be executed depends on the specific repair type of the repaired program.

[0036] Each program group includes several repaired programs. For example, the first program group includes repaired programs RD10, RD11, RD12, and RD13, wherein the repaired programs RD10, RD11, and RD13 are configured to be executed sequentially, and the repaired program RD12 may be executed at any time during the execution of the first program group 1, that is, the execution order of the repaired program RD12 is relatively random, and it can be called the repaired random program RD12; similarly, the second program group 2 may include repaired programs RD20 to RD23, wherein the repaired programs RD20, RD21, and RD23 are configured to be executed sequentially. Configured to be executed sequentially, the repaired program RD22 may be executed at any time during the execution of the second program group 2, that is, the execution order of the repaired program RD22 is relatively random, and it can be called the repaired random program RD22; similarly, the second program group 3 has repaired programs RD30 to RD33, among which the repaired programs RD30, RD31 and RD33 are configured to be executed sequentially, and the repaired program R32 may be executed at any time during the execution of the second program group 3, that is, the execution order of the repaired program R32 is relatively random, and it can be called the repaired random program RD32. Correspondingly, the storage medium also stores repair programs RT10 to RT13 of the first repair program group 1 for respectively repairing the repaired programs RD10 to RD13 in the first program group, stores repair programs RT20 to RT23 of the second repair program group 2 for repairing the repaired programs RD20 to RD23 in the second program group 2, and stores repair programs RT30 to RT33 of the second repair program group 3 for repairing the repaired programs RD30 to RD33 in the second program group 3. In addition, the storage medium also stores a list of addresses of all repaired programs, which includes the addresses of the repaired programs RD10 to RD13, RD20 to RD23, and RD30 to RD33, as well as the address of the first repaired program (for example, which may be the address of the repaired program RD10).

[0037] like Figure 3 FIG. 1 is a method for repairing a ROM program of the above-mentioned embedded device, comprising the following steps.

[0038] S100, the initialization program is executed by the CPU as follows: reading the repair flag from the storage medium, determining whether the repair flag is repair, if so, reading the first repaired program address from the storage medium, and writing the first repaired program address into any breakpoint interrupt register; if not, continuing to execute the program in the ROM.

[0039] An initialization program can be stored in the ROM to determine whether a method for repairing the ROM program needs to be executed. In addition, a repair flag is stored in the storage medium (if the repair method needs to be executed, the repair flag is set to repair (for example, 1), and the address (starting address) of the first repaired program is written into the storage medium. If the ROM program repair does not need to be executed, the repair flag is set to not repair (for example, 0)). In this embodiment, the repaired program RD10 of the first program group 1 is used as the first repaired program for explanation. After the embedded device is turned on and running, the CPU executes the initialization program to implement the following operations: the CPU reads the repair flag from the storage medium. If the repair flag is repair, the address of the first repaired program (i.e., RD10) is read from the storage medium, and the address of the repaired program RD10 is written into any breakpoint interrupt register in the breakpoint interrupt register group (for example, breakpoint interrupt register 2); if the repair flag is not repair, the program in the ROM continues to be executed.

[0040] S110, after the address comparison circuit captures that the address of the repaired program stored in any breakpoint interrupt register is the same as the address of the PC register, the control circuit is triggered to send an interrupt to the CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed; after receiving the interrupt, the CPU updates the address of the breakpoint interrupt program written into the PC register to start executing the breakpoint interrupt program.

[0041] When each machine instruction in the ROM is executed, the PC register is updated and the address of the next machine instruction is written into it. After each machine instruction in the ROM is executed and before the next machine instruction begins to be executed, the address comparison circuit will start the current round of address comparison. For example, each update of the address of the PC register will trigger the address comparison circuit to perform a round of comparison. When the machine instruction F10 begins to be executed, the address (starting address) of the repaired program RD10 is written into the PC register. When the machine instruction F10 is completed, the address comparison circuit starts the current round of comparison. Since the address in the PC register is the address of the repaired program RD10 at this time, the address in the breakpoint interrupt register 2 is also the address of the repaired program RD10. Therefore, after the address comparison circuit captures the address in the breakpoint interrupt register 2 in this round and finds that it is the same as the address in the PC register, it triggers the control circuit to send an interrupt to the CPU to prevent the repaired program RD10 pointed to by the current address in the PC register from being directly executed. After receiving the interrupt, the CPU's interrupt handling hardware writes the address of the repaired program RD10 in the PC register to the RETI register (inside the CPU) and updates the PC register with the address (starting address) of the breakpoint interrupt program to begin executing the breakpoint interrupt program. Typically, after receiving the above interrupt, the CPU needs to push the current interrupt context data onto the stack for context preservation. This interrupt context data includes the address of the repaired program RD10 in the RETI register.

[0042] S120, the breakpoint interrupt program is executed by the CPU as follows: the address in the breakpoint interrupt register that triggered the control circuit is used as the current repaired program address, a first number of breakpoint interrupt registers are allocated from the breakpoint interrupt register group to the first program group to which the current repaired program address belongs, so as to respectively write several repaired program addresses in the first program group, and a breakpoint interrupt register is allocated to each of the plurality of second program groups so as to write the address of the first repaired program in the corresponding second program group; wherein, the first program group and the plurality of second program groups are stored in the ROM, and the plurality of second program groups are configured to, when different conditions are met during the execution of the first program group, jump from the execution of the first program group to the execution of a corresponding second program group; a repaired program address list including the repaired program addresses in the first program group and the plurality of second program groups, and repair programs corresponding to the repaired programs in the first program group and the plurality of second program groups are all stored in the storage medium; the first number is greater than the number of breakpoint interrupt registers allocated to each second program group.

[0043] The breakpoint interrupt program is executed by the CPU as follows: the address in the breakpoint interrupt register (breakpoint interrupt register 2 in this embodiment) that triggers the control circuit (i.e., the starting address of the repaired program RD10) is used as the current repaired program address, and the first program group 1 to which the current repaired program address belongs is searched from the repaired program address list, and two breakpoint interrupt registers are allocated to the first program group 1 to which the current repaired program address belongs in the breakpoint interrupt register group: breakpoint interrupt register 1 and breakpoint interrupt register 2, so as to write the two repaired program addresses in the first program group respectively, wherein the breakpoint interrupt register 1 is written to the address of the repaired program RD12 (which belongs to the repaired random program). The address of the first repaired program RD20 of the second program group 2 (the CPU will switch to executing the second program group 2 when the condition 2 is met during the execution of the first program group 1) is written into the breakpoint interrupt register 3, and the address of the first repaired program RD30 of the second program group 3 (the CPU will switch to executing the second program group 3 when the condition 3 is met during the execution of the first program group 1) is written into the breakpoint interrupt register 4. In this embodiment, the number of breakpoint interrupt registers allocated to the first program group 1 is greater than the number of breakpoint interrupt registers allocated to each second program group.

[0044] S130, the address of the repair program that repairs the repaired program pointed to by the current repaired program address is written into the PC register so that the repair program is executed by the CPU. In this embodiment, the address of the repair program RT10 that repairs the repaired program RD10 is written into the PC register so that the repair program RT10 is executed by the CPU.

[0045] In this embodiment, by grouping the repaired programs, a larger number of breakpoint interrupt registers are allocated to the first program group 1 currently being executed to meet the needs of repairing the next repaired program in the first program group 1 and the repaired random program RD12. At the same time, corresponding breakpoint interrupt registers are allocated to the addresses of the first repaired program of multiple second groups of programs that may be executed at any time to meet the needs of repairing the multiple second groups of programs. Therefore, a smaller number of breakpoint interrupt registers can be used to implement the repair of multiple groups of program groups that need to be repaired (including the first program group and multiple second program groups).

[0046] When the repair type of the repaired program is insert repair, after executing step S130, the PC register is written with the address of the next machine instruction of the repaired program, thereby starting to execute the next machine instruction, and the CPU starts to execute the normal program in the ROM again. Taking the repaired program RD10 as an example, after step S130, the PC register is written with the address of the repaired program RD10, thereby starting to execute the repaired program RD10. Specifically, the repair program RT10 of the repaired program RD10 can be included in the breakpoint interrupt program. In this way, the breakpoint interrupt program is executed by the CPU as follows: in addition to allocating respective breakpoint interrupt registers to the program group and updating the address of the repaired program in the breakpoint interrupt register group, it also executes the relevant operations of the repair program RT10; after the relevant operations of the repair program RT10 are executed, the exit interrupt operation is executed, the interrupt context is pushed out of the stack, and the address of the repaired program RD10 is popped and saved to the RETI register, and then the address of the repaired program RD10 in the RETI register is written into the PC register. At this point, the PC register is written to the address of the repaired program RD10, and the CPU will continue to execute the normal program in the ROM.

[0047] When the repaired program is a program block and its repair type is a block replacement repair without parameter passing, after executing step S130, the PC register is written with the address of the next machine instruction of the repaired program block. Figure 4As shown, the repaired program block is RD10 as an example for explanation. The repaired program block RD10 includes a plurality of consecutive repaired machine instructions RD100 to RD105. After step S130, the PC register is written with the address of the next machine instruction N10, thereby starting to execute the next machine instruction N10, that is, starting to execute the normal program in the ROM again. Specifically, the repair program RT10 of the repaired program block RD10 can be included in the breakpoint interrupt program. In step S110, when the control circuit is triggered to send an interrupt to the CPU, the address of the PC register is the address of the repaired program RD10 (that is, the address of the repaired machine instruction RD100). After the CPU receives the interrupt, the address of the RETI register in the interrupt context data pushed into the stack is also the address of the repaired machine instruction RD100. Thus, in step S120, the breakpoint interrupt program is executed by the CPU as follows: in addition to allocating respective breakpoint interrupt registers for the first program group 1 and the plurality of second program groups and updating the address of the repaired program in the breakpoint interrupt register group, the CPU also performs the relevant operations of the repair program RT10; after the relevant operations of the repair program RT10 are completed, a pop operation is then performed to pop the interrupt context data to the relevant registers, wherein the address of the repaired machine instruction RD100 is popped and saved to the RETI register; then the address in the RETI register is modified to the address of the next machine instruction N10 to form new interrupt context data, which is different from the RETI register address in the original interrupt context data; then a push operation is performed to push the new interrupt context data onto the stack; then an exit interrupt operation is performed, the new interrupt context is popped to the relevant registers, wherein the address of the next machine instruction N10 is popped and saved to the RETI register; then the address of the next machine instruction N10 in the RETI register is written to the PC register. At this point, the PC register is written with the address of the next machine instruction N10, so the repaired program block RD10 is skipped and not executed, and the CPU will continue to execute the normal program in the ROM.

[0048] When the type of the repaired program is a parameter-passing instruction block replacement repair type, after executing step S130, the PC register is written with the address of the next machine instruction of the repaired program. Figure 2 and 5 As shown in the figure, the repaired program is RD10 as an example. Figure 5As shown, the repaired program RD10 includes multiple machine instructions configured to be executed sequentially: a pop machine instruction RD101, an operation on passed parameters RD102, and a return operation RD103. The operation on passed parameters RD102 can be composed of one or more machine instructions, such as machine instructions for calculating the passed parameters to obtain a result and outputting the result. The first two machine instructions of the repaired program RD10 are a parameter generation machine instruction 1 and a push machine instruction 1. The parameter generation machine instruction 1, the push machine instruction 1, and the repaired program RD10 are configured to be executed sequentially. Correspondingly, the replacement function RT10 includes the pop machine instruction RT101, the operation on passed parameters RT102, and the return operation RT103, configured to be executed sequentially. In step S110, the CPU executes the parameter generation machine instruction 1, generating the passed parameters temporarily stored in parameter registers (e.g., one or more of registers R0 to R15). The repaired program RD10 needs to use these passed parameters. At this point, the address of the next machine instruction, namely the push machine instruction 1, is written into the PC register. After the parameter generation machine instruction 1 is executed, the push machine instruction 1 is executed. At this time, the address of the next machine instruction is written to the PC register, that is, the starting address of the replaced function RD10, that is, the address of the pop machine instruction RD101. The above-mentioned push machine instruction 1 is executed by the CPU as follows: the address in the PC register (the starting address of the repaired program RD10 at this time) is saved to the RETS register, and the call context data is saved to the stack, wherein the call context data includes the passed parameters in the parameter register and the address of the RETS register (the starting address of the repaired program RD10 at this time). In step S120, the breakpoint interrupt program is executed by the CPU as follows: in addition to allocating respective breakpoint interrupt registers for the first program group 1 and multiple second program groups (updating the addresses of the breakpoint interrupt registers), the operation of modifying the RETI register address is also performed, as follows:

[0049] The pop machine instruction BP1 is executed by the CPU to pop the interrupt context in the stack, so that the interrupt context is written to the relevant registers, wherein the address of the repaired program RD10 is popped and saved to the RETI register; then, the address of the replacement function is written into the RETI register BP2 and executed by the CPU to modify the address of the repaired program RD10 in the RETI register to the address of the repair program RT10, at this time forming a new interrupt context; then the push machine instruction BP3 is executed to perform a push operation and push the new interrupt context into the stack. As mentioned above, the new interrupt context contains the address of the repair program RT10 in the RETI register; finally, the pop machine instruction BP4 is executed to perform an interrupt return operation, and the new interrupt context will be popped and saved to the relevant registers, wherein the address of the repair program RT10 contained in the new interrupt context in the stack will be popped and saved to the RETI register; then the PC register is written with the address of the repair program RT10 in the RETI register, so that the repair program RT10 starts to be executed after exiting the interrupt. In this way, after the interrupt returns, the address in the RETI register can be updated to the address of the repair program RT10 instead of the address of the repaired program RD10.

[0050] Thereafter, in step S130, the CPU executes the repair program RT10, and the following operations are generated: the pop machine instruction RT101 is executed to pop the call context data in the stack and save it to the relevant registers, wherein the passed parameters in the call context data are popped and saved in the parameter register, and the address of the repaired program RD10 is popped and saved to the RETS register; then, the operation RT102 on the passed parameters is executed by the CPU to perform relevant operations on the passed parameters in the parameter register, such as performing operations on the passed parameters to obtain the operation results (such as multiplying the passed parameters by 10 to replace the operation of multiplying the passed parameters by 5 in the repaired program RD10), and then outputting the operation results (printing the operation results on the screen of the embedded device), or, for example, pushing the operation results into the stack for continued use by subsequent programs executed in the ROM (such as being called by other functions, etc.). At this point, the functional replacement and repair of the repaired program RD10 is completed; finally, the address of the repaired program RD10 in the RETS register is taken out by the CPU, and the address of the repaired program RD10 is increased by the address step (for example, each time a machine instruction is executed, the address in the PC register is increased by 1 (that is, the address of the PC register is increased by 1), that is, the address step is 1) to obtain the address of the next machine instruction N10 of the repaired program RD10 in the ROM, and the address of the next machine instruction N10 is written into the PC register. It can be seen that the address in the PC register points to the address of the normal program in the ROM again, and the CPU will continue to run the program in the ROM normally.

[0051] The present invention also provides an embedded device, comprising a system of ROM, CPU, interrupt circuit and storage medium, wherein the CPU comprises a PC register, the interrupt circuit comprises a breakpoint interrupt register group, an address comparison circuit and a control circuit, the breakpoint interrupt register group comprises a plurality of breakpoint interrupt registers, the storage medium stores a breakpoint interrupt program, in the interrupt circuit, after the address comparison circuit captures that the address of the repaired program stored in any breakpoint interrupt register is the same as the address of the PC register, it triggers the control circuit to send an interrupt to the CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed; after receiving the interrupt, the CPU updates the address of the breakpoint interrupt program to the PC register to start executing the breakpoint interrupt program; in the CPU, the breakpoint interrupt program is executed by the CPU as follows: the address in the breakpoint interrupt register that triggered the control circuit is used as the current repaired program address, the first program group to which the current repaired program address belongs is searched from the repaired program address list, and the first program group to which the current repaired program address belongs is searched from the repaired program address list, and the first program group to which the current repaired program address belongs is searched from the repaired program address list. A first number of breakpoint interrupt registers are allocated in the breakpoint interrupt register group to the first program group to which the current repaired program address belongs, so as to respectively write several repaired program addresses in the first program group, and a breakpoint interrupt register is allocated to each of the plurality of second program groups, so as to respectively write the first repaired program address of the corresponding second program group; wherein, the first program group and the plurality of second program groups are stored in the ROM, and the plurality of second program groups are configured to jump from the first program group to the corresponding second program group when different conditions are met during the execution of the first program group; the repaired program address list including the repaired program addresses in the first program group and the plurality of second program groups, and the repair programs corresponding to the repaired programs in the first program group and the plurality of second program groups are all stored in the storage medium; the first number is greater than the number of breakpoint interrupt registers allocated to each second program group; the address of the repair program for repairing the repaired program pointed to by the current repaired program address is written into the PC register, so that the repair program is executed by the CPU.

[0052] It should be noted that the use of step numbers (letters or numbers) to refer to certain specific method steps in the present invention is solely for the purpose of descriptive convenience and brevity, and is in no way intended to limit the order of these method steps. Those skilled in the art will appreciate that the order of the relevant method steps is determined by the technology itself and should not be unduly limited by the presence of step numbers. Those skilled in the art can determine various permissible and reasonable step orders based on the technology itself.

[0053] Those skilled in the art will appreciate that, provided there is no conflict, the above preferred solutions can be freely combined and superimposed.

[0054] It should be understood that the above-mentioned embodiments are merely illustrative and non-restrictive. Without departing from the basic principles of the present invention, various obvious or equivalent modifications or substitutions that can be made by those skilled in the art to the above-mentioned details will be included in the scope of the claims of the present invention.

Claims

1. A method for repairing a ROM program, applied to a system including a ROM, a CPU, an interrupt circuit, and a storage medium, wherein: The CPU includes a PC register, wherein the interrupt circuit includes a breakpoint interrupt register group, an address comparison circuit, and a control circuit, the breakpoint interrupt register group includes a plurality of breakpoint interrupt registers, the storage medium stores a breakpoint interrupt program, and the repair method includes the following steps: When the address comparison circuit detects that the address of the repaired program stored in any breakpoint interrupt register is identical to the address of the PC register, the control circuit is triggered to send an interrupt to the CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed; after receiving the interrupt, the CPU updates the address of the breakpoint interrupt program to the PC register to start executing the breakpoint interrupt program; The CPU executes the breakpoint interrupt program to use the address in the breakpoint interrupt register that triggered the control circuit as the current repaired program address, search the repaired program address list for the first program group to which the current repaired program address belongs, and allocate a first number of breakpoint interrupt registers from the breakpoint interrupt register group to the first program group to which the current repaired program address belongs, so as to write a plurality of repaired program addresses in the first program group, respectively. The CPU also allocates a breakpoint interrupt register to each of the plurality of second program groups, so as to write a first repaired program address in the corresponding second program group. The first program group and the plurality of second program groups are stored in the ROM, and the plurality of second program groups are configured to jump from the first program group to a corresponding second program group when different conditions are met during the execution of the first program group. The repaired program address list and the repair programs corresponding to the repaired programs in the first program group and the plurality of second program groups are all stored in the storage medium. The repaired program address list includes the repaired program addresses in the first program group and the plurality of second program groups. The first number is greater than the number of breakpoint interrupt registers allocated to each second program group. The address of a repair program for repairing the repaired program pointed to by the current repaired program address is written into the PC register, so that the repair program is executed by the CPU.

2. The repair method according to claim 1, characterized in that: The ROM also stores an initialization program, and the storage medium also stores a repair flag. After the system is running, the initialization program is executed by the CPU as follows: reading the repair flag from the storage medium, determining whether the repair flag indicates repair, If yes, read the first address of the repaired program from the storage medium, and write the first address of the repaired program into any breakpoint interrupt register; If not, continue executing the program in ROM.

3. The repair method according to claim 1, characterized in that: The first program group includes a repaired random program, Among the first number of breakpoint interrupt registers, at least one is used to write the address of the repaired random program, and at least another is used to write the address of the next repaired program in the first program group configured to be executed after the current repaired program.

4. The repair method according to claim 3, characterized in that: The first number of breakpoint interrupt registers includes the breakpoint interrupt register that triggers the control circuit.

5. The repair method according to any one of claims 1 to 4, characterized in that: The first program group is a program that implements a first function, and each second program group is a program that implements a corresponding second function.

6. The repair method according to any one of claims 1 to 4, characterized in that: The ROM, CPU, stack and interrupt circuit are integrated in the SOC chip, and the storage medium is located outside the SOC chip.

7. An embedded device comprising a ROM, a CPU, an interrupt circuit and a storage medium, wherein: The CPU includes a PC register, wherein the interrupt circuit includes a breakpoint interrupt register group, an address comparison circuit and a control circuit, the breakpoint interrupt register group includes a plurality of breakpoint interrupt registers, and the storage medium stores a breakpoint interrupt program. In the interrupt circuit, when the address comparison circuit detects that the address of the repaired program stored in any breakpoint interrupt register is the same as the address of the PC register, the control circuit is triggered to send an interrupt to the CPU to prevent the repaired program pointed to by the current address in the PC register from being directly executed; after receiving the interrupt, the CPU updates the address of the breakpoint interrupt program to the PC register to start executing the breakpoint interrupt program; In the CPU, the breakpoint interrupt program is executed by the CPU as follows: using the address in the breakpoint interrupt register that triggered the control circuit as the current repaired program address, searching the first program group to which the current repaired program address belongs from the repaired program address list, and allocating a first number of breakpoint interrupt registers from the breakpoint interrupt register group to the first program group to which the current repaired program address belongs so as to write a plurality of repaired program addresses in the first program group respectively, and allocating breakpoint interrupt registers to each of the plurality of second program groups so as to write the first repaired program address of the corresponding second program group; wherein, the first program group and the plurality of second program groups are stored in the ROM, and the plurality of The second program group is configured to jump from the first program group to a corresponding second program group when different conditions are met during the execution of the first program group; the list of repaired program addresses and the repair programs corresponding to the repaired programs in the first program group and multiple second program groups are all stored in the storage medium, wherein the list of repaired program addresses includes the addresses of the repaired programs in the first program group and multiple second program groups; the first number is greater than the number of breakpoint interrupt registers allocated to each second program group; the address of the repair program that repairs the repaired program pointed to by the current repaired program address is written into the PC register, so that the repair program is executed by the CPU.

8. The embedded device according to claim 7, characterized in that: The ROM also stores an initialization program, and the storage medium also stores a repair flag. After the embedded device is running, the initialization program is executed by the CPU as follows: reading the repair flag from the storage medium, determining whether the repair flag indicates repair, If yes, read the first address of the repaired program from the storage medium, and write the first address of the repaired program into any breakpoint interrupt register; If not, continue executing the program in ROM.

9. The embedded device according to claim 7, wherein: The first program group includes a repaired random program, Among the first number of breakpoint interrupt registers, at least one is used to write the address of the repaired random program, and at least another is used to write the address of the next repaired program in the first program group configured to be executed after the current repaired program.

10. The embedded device according to claim 9, characterized in that: The first number of breakpoint interrupt registers includes the breakpoint interrupt register that triggers the control circuit.

11. The embedded device according to any one of claims 7 to 10, characterized in that: The first program group is a program that implements a first function, and each second program group is a program that implements a corresponding second function.

12. The embedded device according to any one of claims 7 to 10, characterized in that: The ROM, CPU, stack and interrupt circuit are integrated in the SOC chip, and the storage medium is located outside the SOC chip.

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