An ultra-small area on-chip intelligent temperature sensor based on MOS transistors and its design method

Abstract

The present invention discloses an ultra-small area on-chip intelligent temperature sensor based on MOS transistors and a design method. By replacing the CWT reference source with a constant temperature with a CTAT reference source that is negatively correlated with temperature changes, quantifying the PTAT induced voltage that is positively correlated with temperature changes, and then analyzing the Taylor series of the output data temperature function, the MOS transistor parameters of the CTAT branch are configured to reduce the nonlinearity introduced by the CTAT reference source. The temperature sensor structure in the present invention accesses temperature sensing modules at different positions through switch control to read temperature information at different positions, and by multiplexing the quantization module that occupies the main area, the requirement of ultra-small area can be met. The present invention can be applied as a temperature monitoring module in fields such as on-chip systems and the Internet of Things.

Description

Technical Field

[0001] The present invention relates to the field of CMOS temperature sensors, and particularly to an ultra-small area on-chip intelligent temperature sensor based on MOS transistors and a design method thereof. Background Art

[0002] With the development of Moore's Law and the continuous shrinking of process dimensions, the performance of microprocessors has been further improved. At the same time, the density of MOS transistors on the chip and the number of core modules have also increased significantly. This means that the problem of heat dissipation will inevitably occur. Therefore, a large number of on-chip intelligent temperature sensors are required for chip temperature detection and temperature management to ensure that the chip does not malfunction or even be damaged due to excessive temperature. CMOS temperature sensors have the advantages of high integration, low cost, low power consumption, and good compatibility with standard digital processes. Therefore, at present, CMOS temperature sensors are widely used in systems on chip (SoCs), the Internet of Things (IoT), and frequency compensation of oscillators that need to output a constant frequency with temperature changes, etc. The latest research report by Transparency Market Research shows that the global market volume of CMOS temperature sensors in 2027 will be approximately 688 million, and its market value will reach 523 million US dollars, with broad market development prospects.

[0003] Common temperature sensors can be roughly divided into three categories according to the sensing principle: (1) CMOS temperature sensors based on resistors, which have good output linearity. However, the process deviation of the resistor itself is very large. Although part of the process deviation can be offset by the differential method, the output error caused by the process deviation cannot be ignored. Moreover, the temperature coefficient of the resistor itself is a fixed process parameter that cannot be adjusted and is small, which brings pressure to the design of the subsequent quantization circuit; (2) CMOS temperature sensors based on BJTs. Such temperature sensors also have good output linearity and relatively higher accuracy. However, when obtaining an output voltage ΔV with a higher temperature coefficient BE , a large proportion of the number of BJT transistors in two branches is required or different currents with a large proportion are applied to the two branches (ΔV BEThe temperature coefficient is proportional to the number of BJT transistors in the two branches and the ratio of the bias currents. The former means that a large area needs to be consumed, which is not conducive to its integration with the MOS process whose process size is gradually shrinking. The latter means that a large power consumption is required. (3) CMOS temperature sensors based on MOS transistors. Such temperature sensors have the advantage of ultra-low power consumption. For example, an article published in JSSC in 2019 proposed an intelligent temperature sensor based on MOS transistors with a power consumption of only 763 pW. In addition, it is easier to integrate with the increasingly shrinking MOS process. Although most temperature sensors based on MOS transistors have the characteristic of relatively long conversion time (mostly greater than 1 ms, while the temperature sensor at the back end of the SAR ADC only needs a few microseconds to read the temperature once), the on-chip temperature detection itself does not have too high requirements for the detection frequency because the rise of the on-chip temperature is mainly due to the thermal energy loss during device operation, and the temperature will not rise suddenly.

[0004] Regardless of which of the above methods is used to sense temperature, the analog electrical signal (voltage or current) output by the sensing circuit is in the millivolt range. Affected by factors such as process deviation of on-chip components, power supply voltage dependence, and packaging pressure, it is a great challenge to accurately quantify small analog signals. In addition, temperature sensors have different index requirements for different application scenarios. For example, for temperature monitoring on the CPU, a smaller area is preferred; for IoT devices, an ultra-low power consumption temperature sensor is needed; and for frequency compensation on MEMS / XO, more stringent requirements are imposed on the accuracy of the temperature sensor.

[0005] Traditional CMOS-based temperature sensors obtain temperature information by using the ratio of the PTAT frequency to the CWAT frequency implemented on the chip or an external clock. This method will introduce two problems: (1) It is impossible to implement the CWAT frequency at the chip temperature; (2) If an external clock is used as a constant reference, process variations will have a significant impact on the output results. Summary of the Invention

[0006] Aiming at the deficiencies of the prior art, the present invention provides an ultra-small area on-chip intelligent temperature sensor based on MOS transistors and a design method. It uses a CTAT reference source to replace the CWT reference source, reducing the design difficulty and improving the dynamic range of data output; and by analyzing the Taylor expansion formula of the functional relationship between the output data and temperature, the device parameters of the PTAT branch and the CTAT branch are configured based on this to achieve good output linearity.

[0007] The object of the present invention is achieved by the following technical solutions:

[0008] An ultra-small area on-chip intelligent temperature sensor based on MOS transistors, comprising an analog circuit module and a digital circuit module,

[0009] The analog circuit module is composed of a CTAT branch and a PTAT branch. The CTAT branch and the PTAT branch have the same structure, and are both composed of four MOS tubes, a voltage-to-current converter, and a current-controlled oscillator. The first MOS tube M 1 And the second MOS tube M 2 The 2T structure is the core of the temperature sensing front end and generates output voltage; the third MOS tube M 3 And the fourth MOS tube M 4 The voltage modulator is formed to provide the power supply voltage for the 2T structure; the first MOS tube M 1 , the second MOS tube M 2 , the third MOS tube M 3 And the fourth MOS tube M 4 The circuit of the temperature sensing front end of the 4T structure is formed together; the output voltage of the temperature sensing front end is connected to the voltage-to-current converter composed of the amplifier, PMOS and resistor through the negative input terminal of the amplifier, so that the output voltage generated by the 4T structure is copied to the resistor; the current of the branch is passed through the PMOS into the current controlled oscillator composed of three delay units; then the temperature sensing front end of the 4T structure is used as the temperature sensing module of the sensor, which is located locally or remotely at the same time, and the local or remote temperature sensing module is controlled by a switch and connected to the negative input terminal of the amplifier behind for subsequent quantization work, so as to realize local or remote temperature sensing;

[0010] The digital circuit module uses the output frequency of the CTAT branch to quantize the output frequency of the PTAT branch to obtain corresponding temperature information; the output frequency of the CTAT branch and the output frequency of the PTAT branch are simultaneously and respectively passed into the first counter and the second counter. When the first counter counts N bits, where N is 7 to 9, the second counter is stopped through the logic control module, and the data in the second counter is transmitted to the parallel-to-serial data converter, and then the logic control module sends a reset signal to the first counter and the second counter at the same time to start the next round of quantization; at this time, the parallel-to-serial data converter that receives the data in the second counter first stores the data, and then uses the output frequency of the CTAT branch of the next round of counting to convert the data into serial data and send them out in sequence.

[0011] A design method for the ultra-small area on-chip intelligent temperature sensor based on MOS tube, the method comprises the following steps:

[0012] (1) The current formulas of two NMOS tubes in the subthreshold region and connected in series are combined to achieve the PTAT output voltage and the CTAT output voltage by configuring the length and width of the two NMOS tubes;

[0013] (2) Convert the PTAT output voltage and CTAT output voltage obtained in step (1) into a PTAT current and a CTAT current respectively through a voltage-to-current converter;

[0014] (3) Pass the PTAT current and CTAT current obtained in step (2) into current-controlled oscillators with the same structure but different parameter configurations respectively to obtain corresponding CTAT output frequencies and PTAT output frequencies;

[0015] (4) Pass the CTAT output frequency and PTAT output frequency obtained in step (3) into counter 1 and counter 2 respectively for counting. Counter 1 has N bits, where N is 7 to 9; when counter 1 is full, stop counter 2, and then read the value of counter 2 to obtain the output data;

[0016] (5) Model the temperature function of the output data in step (4), perform Taylor expansion, and analyze the coefficients of the high-order terms to configure the circuit parameters.

[0017] Further, in step (1), the expressions for the PTAT output voltage and CTAT output voltage are:

[0018]

[0019] where, V PTAT,CTAT is the sum of the PTAT output voltage and CTAT output voltage, m 1 , m 2 are the subthreshold swing coefficients of the first MOS transistor M 1 , the second MOS transistor M 2 respectively, μ 1 , μ 2 are the carrier mobilities of the first MOS transistor M 1 , the second MOS transistor M 2 respectively, γ 1 ′ is a linearization system coefficient independent of temperature, C ox1 , C ox2 are the gate oxide capacitances of the first MOS transistor M 1 , the second MOS transistor M 2 respectively, W 1 , W 2 are the widths of the first MOS transistor M 1 , the second MOS transistor M 2 respectively, L 1 , L 2 are the lengths of the first MOS transistor M 1 , the second MOS transistor M 2 respectively, V T is the thermal voltage.

[0020] Further, the voltage-to-current converter is a circuit structure of a negative feedback loop composed of an amplifier, a PMOS, and a resistor; taking the PTAT branch as an example, the expression for its output PTAT current is:

[0021]

[0022] where V Rp is the voltage applied across the resistor, g m is the transconductance of the PMOS, A u is the open-loop gain of the amplifier, R p is the value of the resistor, V PTAT is the PTAT output voltage, and I PTAT is the PTAT current.

[0023] Further, in the step (3), the oscillation period T CCO of the current-controlled oscillator is expressed as:

[0024]

[0025] where V thp1 is the threshold voltage of the PMOS; t rise and t fall are the rise response time and fall response time of the delay unit respectively, N cell is the number of delay units, C is the capacitance, V DD is the power supply voltage, and I CCO is the current charging the capacitance C.

[0026] Further, in the step (5), the expression of the temperature function f(T) is:

[0027]

[0028] Perform Taylor expansion on the above function at T = 0:

[0029]

[0030] where a is the product of the PTAT frequency temperature coefficient and 2 N , N represents the number of bits of the CTAT end counter, b is the product of the PTAT frequency constant term and 2 N , c is the CTAT frequency temperature coefficient, d is the CTAT frequency constant term, and T is the temperature quantity; from the Taylor expansion formula, it can be obtained that when d >> c, the output data has a linear relationship with the temperature.

[0031] The beneficial effects of the present invention are as follows: Remote temperature detection is achieved in the form of switch control and reuse quantization circuit. Since only the temperature sensing modules with extremely small areas are distributed to different temperature points, applications with high requirements for small areas such as on-chip temperature detection can be realized. Since the output end of the sensing module is connected to the input end of the amplifier of the second-stage V-to-I Converter and the current flowing into the input end of the amplifier is almost zero, the influence of the parasitic resistance caused by long-distance wiring on the accuracy is very small. An easier-to-implement CTAT reference source is used to replace the more difficult-to-implement CWT reference source, and the dynamic range of data output is improved. Due to the nonlinearity of the output introduced by the CTAT reference source, the device parameters of the PTAT branch and the CTAT branch can be configured based on the Taylor expansion formula of the functional relationship between the output data and the temperature, so as to achieve good output linearity. The CTAT sensing front end and the PTAT sensing front end are used as an overall sensing module and placed locally or remotely at the same time, greatly reducing the temperature sensing output error caused by process deviation, switch leakage current, and wire parasitic resistance. Description of the Drawings

[0032] Figure 1 It is the structural diagram of the temperature sensor of the present invention;

[0033] Figure 2 It is the schematic diagram of the circuit structure of the temperature sensor of the present invention;

[0034] Figure 3 It is the internal structural diagram of the oscillator in the present invention;

[0035] Figure 4 It is the Monte Carlo simulation diagram of the output of the sensing front end in the present invention;

[0036] Figure 5 It is the timing diagram of a single Cell of the oscillator in the present invention;

[0037] Figure 6 It is the Monte Carlo simulation diagram of the frequency output of the oscillator in the present invention;

[0038] Figure 7 It is the resolution diagram of the temperature sensor of the present invention;

[0039] Figure 8 It is the temperature error diagram of the temperature sensor of the present invention after two-point correction;

[0040] Figure 9 It is the power supply sensitivity diagram of the temperature sensor of the present invention;

[0041] Figure 10 It is the power consumption pie chart of the temperature sensor of the present invention;

[0042] Figure 11This is the temperature error graph of the influence of leakage current on the output at the 0°C state with the largest temperature error in the remote temperature sensing of the temperature sensor of the present invention. Detailed implementation mode

[0043] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0044] The present invention provides an ultra-small area on-chip intelligent temperature sensor based on MOS transistors, including an analog circuit module and a digital circuit module.

[0045] The analog circuit module is composed of a CTAT branch and a PTAT branch. The CTAT branch and the PTAT branch have the same structure and are both composed of four MOS transistors, a voltage-to-current converter, and a current-controlled oscillator. The first MOS transistor M 1 and the second MOS transistor M 2 form a 2T structure, which is the core of the temperature sensing front end and generates an output voltage; the third MOS transistor M 3 and the fourth MOS transistor M 4 form a voltage modulator to provide a power supply voltage for the 2T structure; the first MOS transistor M 1 , the second MOS transistor M 2 , the third MOS transistor M 3 and the fourth MOS transistor M 4 together form the circuit of the temperature sensing front end with a 4T structure; the output voltage of the temperature sensing front end is connected to the negative input terminal of an amplifier through a voltage-to-current converter composed of an amplifier, a PMOS, and a resistor, so as to copy the output voltage generated by the 4T structure to the resistor; the current of the branch passes through the PMOS and into a current-controlled oscillator composed of three delay units; then the temperature sensing front end with a 4T structure is used as the temperature sensing module of the sensor, which is located locally or remotely, and the local or remote temperature sensing module is controlled by a switch and connected to the negative input terminal of the subsequent amplifier for subsequent quantization work, so as to realize local or remote temperature sensing.

[0046] The digital circuit module uses the output frequency of the CTAT branch to quantize the output frequency of the PTAT branch to obtain corresponding temperature information; the output frequency of the CTAT branch and the output frequency of the PTAT branch are simultaneously and respectively passed into the first counter and the second counter. When the first counter counts N bits, where N is 7 to 9, the second counter is stopped through the logic control module, and the data in the second counter is transmitted to the parallel-to-serial data converter, and then the logic control module sends a reset signal to the first counter and the second counter at the same time to start the next round of quantization; at this time, the parallel-to-serial data converter that receives the data in the second counter first stores the data, and then uses the output frequency of the CTAT branch of the next round of counting to convert the data into serial data and send them out in sequence.

[0047] The present invention also provides a design method for the ultra-small area on-chip intelligent temperature sensor based on the MOS tube, comprising the following steps:

[0048] Step 1: Place an NMOS (N-Metal-Oxide-Semiconductor) tube with its gate and source shorted in the off state on top of a diode-connected NMOS tube as a voltage modulator to power a temperature sensing module with the same structure. Since the two NMOS tubes of the temperature sensing unit in the temperature sensing module are connected in series, such as Figure 2 As shown, the current formulas of the two NMOS tubes are combined, and the PTAT (Proportional To Absolute Temperature) and CTAT (Complementary To AbsoluteTemperature) output voltages are realized by configuring the length and width of the two NMOS tubes, and the following equations are obtained:

[0049]

[0050] Among them, I 1 , μ 1 , C ox1 , W 1 , L 1 , ΔV th1 , γ 1 and m 1 They are the first MOS tube M located at the top 1 Drain current, carrier mobility, gate oxide capacitance, width, length, threshold voltage deviation, linear system coefficient and subthreshold swing coefficient; I 2 , μ 2 , C ox2 , W 2 , L 2 , ΔV th2 and m2 are respectively the drain current, carrier mobility, gate oxide capacitance, width, length, threshold voltage deviation, and subthreshold swing coefficient of the second MOS transistor M located at the bottom. 2 , V is the sum of the PTAT output voltage and the CTAT output voltage. PTAT,CTAT is the PTAT output voltage, and V PTAT is the CTAT output voltage; V CTAT is the thermal voltage; the temperature characteristic of the carrier μ is T = kT / q. The subthreshold swing coefficient m = (1 + C / C d where C ox is the depletion layer capacitance); γ d ' is a linearization system coefficient independent of temperature. The effects of the carrier μ and the gate oxide capacitance C 1 on the output voltage cancel each other out; the output induced voltage is linearly related to V ox ln(W T L 1 / W 2 / W 2 L 1 ). By adjusting the values of the lengths and widths of the two NMOS transistors, the positive / negative and magnitude of ln(W 1 L 2 / W 2 L 1 ) can be controlled, thereby obtaining the corresponding PTAT and CTAT output voltages. For example: when W 1 L 2 > W 2 L 1 , the temperature coefficient of V T ln(W 1 L 2 / W 2 L 1 ) is positive, obtaining the corresponding PTAT output voltage; conversely, the CTAT output voltage can be obtained.

[0051] Step 2: Refer to Figure 2 . The voltage-to-current converter V-to-I Converter is a negative feedback structure. Taking the PTAT branch as an example, the following expression can be obtained:

[0052]

[0053] In the formula, V Rp is the voltage applied to the resistor, g m is the transconductance of the PMOS, A u is the open-loop gain of the amplifier, and R pis the value of the resistance. The resistors at the PTAT terminal and the CTAT terminal both use resistors rpploywo with negative temperature coefficients to increase the temperature coefficient at the PTAT terminal and reduce the temperature coefficient at the CTAT terminal. Taking the PTAT branch as an example, the output PTAT current I PTAT The expression is:

[0054]

[0055] Step 3: Since the output current data is proportional to the ratio of the PTAT frequency to the CTAT frequency, when supplying the same current, the output frequency of the current-controlled oscillator CCO (Current Controlled Oscillator) at the CTAT terminal should be much smaller than the output frequency of the CCO at the PTAT terminal, so as to achieve a large dynamic output range. The currents obtained in Step 2 are respectively passed into CCOs with the same structure but different parameter configurations to obtain the corresponding CTAT and PTAT output frequencies.

[0056] As Figure 3 shown, the current generated in Step 2 is mirrored through a current mirror to charge a capacitor. The time when the voltage on the capacitor C turns off the PMOS (P-Metal-Oxide-Semiconductor) multiplied by the number of cells of the oscillator is the oscillation period T of the CCO CCO , referring to Figure 5 the timing diagram of the CCO, there is the following expression:

[0057]

[0058] Among them, V thp1 is the threshold voltage of the PMOS transistor MP 1 ; t rise and t fall are the rising response time and the falling response time of each delay unit respectively, N cell is the number of delay units, C is the capacitor, V DD is the power supply voltage, and I CCO is the current for charging the capacitor C. As Figure 3 shown, by increasing the resistance at the output terminal, the rising response time t rise can be reduced; by adding two switches, namely the second switch transistor MN2 and the second current mirror MOS transistor MP2, the falling response time t fall can be reduced.

[0059] Step 4: Input the PTAT frequency and CTAT frequency obtained in Step 3 into two counters for counting respectively. Among them, the CTAT frequency is input as a reference source into a preset programmable counter with a fixed number of bits (7-9 bits). After the counter at the CTAT end is full, stop the counter at the PTAT end, and then read the value of the counter at the PTAT end, which is the digital output. The output data can be written according to the function expression f(T) of temperature as follows:

[0060]

[0061] In the formula, a is the product of the PTAT frequency temperature coefficient and 2 N where N represents the number of bits of the counter at the CTAT end, b is the product of the PTAT frequency constant term and 2 N c is the CTAT frequency temperature coefficient, d is the CTAT frequency constant term, and T is the temperature quantity.

[0062] Step 5: Model the temperature function of the output data, perform Taylor expansion, and analyze the coefficients of the high-order terms to configure the circuit parameters and reduce the nonlinear problem introduced by the CTAT reference source. Perform Taylor expansion on the above function at T = 0:

[0063]

[0064] From the Taylor expansion formula, when d >> c, the output data shows a linear relationship with temperature. From the MATLAB simulation results, when d > 2000c, the linear fitting error can be controlled within -0.4 - 0.6. Although introducing this method will reduce the influence of the CTAT reference source on the output dynamic range, there is still at least a 12% improvement in this case.

[0065] Step 6: Distribute the temperature sensing module to different positions where the temperature needs to be detected, and use switches to control the access of the sensing modules at different positions, so as to realize remote temperature sensing to meet the design requirements of ultra-small area.

[0066] Process documents provided by TSMC show that: Under the TSMC 65nm process, the parasitic resistance of the eighth-layer metal wire with a width of 2μm and a length of 100μm is only about 250 milliohms. And according to the simulation results, since the current flowing into the amplifier is less than 10pA, the temperature error introduced by the parasitic resistance of the eighth-layer metal wire with a width of 2μm and a length of 1500μm is less than 0.0001°C. Therefore, the influence of the parasitic resistance generated by the metal connection line on the output data can be ignored. When the MOS transistor switch is in the OFF state, the leakage current of the PMOS is about 6 times that of the NMOS (at 27°C, the OFF-state leakage current of the PMOS is 1.08pA, and the OFF-state leakage current of the NMOS transistor is 0.178pA). Because the value of the front-end induced output voltage does not exceed 250mV at most, only the NMOS switch can be used to reduce the influence of the leakage current on the output data accuracy. In addition, since the output temperature data is in the form of the ratio of the PTAT induced output to the CTAT induced output, and in the present invention, the CTAT and PTAT induction modules are both placed at the remote end or the local end for temperature induction, the temperature induction errors introduced by the parasitic resistance of the metal connection line, process deviation, and switch leakage current can be greatly reduced.

[0067] Embodiment 1

[0068] In this embodiment, in order to illustrate the practical engineering value of the present method and meet industrial requirements, a MOS transistor-based temperature sensor was designed according to the solution of the present invention, and the performance of the temperature sensor was verified by simulation using the EDA tool Cadence. Cadence is an EDA simulation verification software with a very high market share in the field of integrated circuit design. The following table shows the simulation performance of the designed temperature sensor:

[0069]

[0070] Figure 1 is the structural diagram of the temperature sensor of the present invention. There are two symmetric branches in total. By different parameter configurations, the PTAT frequency output and the CTAT frequency output are obtained respectively. The output frequencies of the two branches are respectively sent to two counters. Among them, the counter at the CTAT end is a programmable-bit counter; when the counter at the CTAT end counts up, a "stop" signal is generated to stop the counter at the PTAT end. At this time, the data of the counter at the PTAT end is read, which is the data output of this temperature sensor.

[0071] Figure 2 is the schematic diagram of the temperature sensor circuit structure. As Figure 2As shown, the circuit is divided into two parts: an analog circuit module and a digital circuit module. (1) Analog circuit module: The analog circuit module consists of a CTAT branch and a PTAT branch. The circuit structures of the two are the same, only the parameter configurations are different. Therefore, only the specific circuit structure of the CTAT branch is drawn, and the PTAT terminal is presented in a modular form. Figure 2 In it, the gate and source of the first MOS transistor M 1 are short-circuited and connected to the gate and drain of the second MOS transistor M 2 . The 2T structure formed by the two is the core of the front-end temperature sensing. The source (or gate) of the first MOS transistor M 1 and the drain (or gate) of the second MOS transistor M 2 The voltage is the CTAT output voltage generated by the front-end temperature sensing circuit. The gate and source of the third MOS transistor M 3 are short-circuited and connected to the gate and drain of the fourth MOS transistor M 4 . The voltage modulator formed by the two provides the power supply voltage for the 2T structure, that is, the source of the third MOS transistor M 3 is connected to the drain of the first MOS transistor M 1 to improve the power supply sensitivity of the circuit. The two together form the temperature sensing front-end circuit of the 4T structure of this application. The core of the voltage-to-current converter is a negative feedback structure composed of an amplifier, a PMOS, and a resistor R p , that is, the output terminal of the amplifier is connected to the gate of the PMOS, the drain of the PMOS is connected to the resistor R p , and the voltage on the resistor R p is fed back and input to the positive input terminal of the amplifier, thus forming a negative feedback loop. The CTAT output voltage of the temperature sensing front-end is connected to the negative input terminal of the amplifier through the negative feedback structure composed of the amplifier, the PMOS, and the resistor R p , so as to copy the CTAT output voltage generated by the 4T structure to the resistor R p , that is, the voltage V Rp is equal to the CTAT output voltage generated by the temperature sensing front-end of the 4T structure. At this time, the drain current I CTAT of the PMOS transistor is equal to the value of V Rp / R p , that is, equal to the CTAT output voltage generated by the 4T structure divided by the value of the resistor R p . I CTAT then passes through the PMOS current mirror and into the current-controlled oscillator composed of three delay units. It is known that the output frequency CLK1 of the current-controlled oscillator has a positive linear relationship with the input current I CTAT , and I C□□TIt also has the same temperature characteristics as the CTAT output voltage of the temperature sensing front end with a 4T structure. Therefore, the output frequency CLK1 is the CTAT frequency. Similarly, the output frequency CLK2 of the second branch can be obtained as the PTAT frequency. In addition, as Figure 2 shown, this paper also proposes a local-remote temperature sensing structure, which takes the CTAT and PTAT temperature sensing front ends of the 4T structure as an overall temperature sensing module, located either locally or remotely, and controls one of the local or remote temperature sensing modules through a switch to access the negative input terminal of the subsequent amplifier for subsequent quantization work, thereby realizing local or remote temperature sensing.

[0072] (2) Digital circuit module: It is mainly responsible for quantifying the output frequency CLK2 of the PTAT branch using the output frequency CLK1 of the CTAT branch to obtain the corresponding temperature information. The output frequency CLK1 of the CTAT branch and the output frequency CLK2 of the PTAT branch are simultaneously and separately input into counter 1 and counter 2. When counter 1 counts up to N bits (as Figure 2 shown, N belongs to 7-9), at this time, the counter 2 is stopped through the logic control module, and the data in counter 2 is transmitted to the parallel-to-serial data converter. Immediately afterwards, the logic control module sends a reset signal to both counter 1 and counter 2 to start the next round of quantization. The parallel-to-serial data converter that receives the data in counter 2 first stores the data, and then converts the data into serial data and sends it out in sequence using the output frequency CLK1 of the CTAT branch in the second round of counting (S_DATA is the output serial data; S_CLK is the clock for transmitting the output data, and its frequency is equal to CLK1).

[0073] Figure 3 is the internal structure diagram of the current controlled oscillator. The detailed connection relationship of the circuit is as follows: The gate of the fourth PMOS transistor MP 4 is connected to the gate of the PMOS in the voltage-to-current converter to jointly form a PMOS current mirror circuit. The drain of the fourth PMOS transistor MP 4 is connected to the capacitor C, the drain of the fourth NMOS switch transistor MN 4 and the input terminal of the inverter composed of the first PMOS transistor MP 1 and the first NMOS transistor MN 1 , that is, connected to the gates of the first PMOS transistor MP 1 and the first NMOS transistor MN 1 . The output terminal of the inverter, that is, the drains of the first PMOS transistor MP 1 and the first NMOS transistor MN 1 are connected to the gate of the third PMOS switch transistor MP 3 . The third PMOS switch transistor MP3 The source of 2 is connected to the drain of the second PMOS switch transistor MP 2 , and its drain is connected to the drain of the second NMOS switch transistor MN 3 and the drain of the third NMOS transistor MN 4 whose drain and source are short - circuited and serves as a large resistor, and they form the output terminal of the delay unit. The input terminal of the delay unit is connected to the gates of the fourth NMOS switch transistor MN 2 , the second PMOS switch transistor MP 2 and the second NMOS switch transistor MN 1 . The sources of the NMOS transistors MN 2 , MN 3 , MN 4 and the other end of the capacitor C are all connected to the ground. The sources of the PMOS transistors MP 1 , MP 2 , MP 3 and MP 4 are all connected to the power supply. As shown in Figure 3 , the fourth current - mirror PMOS transistor MP 4 and the PMOS in the above - mentioned voltage - to - current converter together form a current mirror, which copies the drain current of the PMOS in the voltage - to - current converter as the current I CCO on the capacitor to charge the capacitor C. When the input signal IN changes from high level to low level, the fourth NMOS switch transistor MN 4 and the second NMOS switch transistor MN 2 turn off, and the second PMOS switch transistor MP 2 turns on. At this time, the current I CCO starts to charge the integration capacitor C until the voltage V c on the capacitor reaches the voltage (V DD -V thp ), then the first PMOS transistor MP 1 is turned off. At this time, the inverter composed of the first PMOS transistor MP 1 and the first NMOS transistor MN 1 outputs a change from high to low, and the third PMOS switch transistor MP 3 turns on, and the output signal OUT changes from low level to high level; when the input signal IN changes from low level to high level, the fourth NMOS switch transistor MN 4 and the second NMOS switch transistor MN 2 turn on, the second PMOS switch transistor MP 2 turns off, and the output signal OUT immediately changes from high level to low level; the third NMOS transistor MN 3 operates in the cut - off region and serves as a large - value load resistor to reduce the rising time of the circuit output signal.

[0074] The traditional inverter chain-based oscillator controls the parasitic resistance and capacitance of the MOS tube by voltage or current, thereby achieving voltage-controlled or current-controlled output frequency. The disadvantage of the traditional solution is that the parasitic capacitance of the MOS tube does not change linearly with the node voltage, but changes very drastically, similar to exponentially, with C DB Taking the relationship between drain potential and body potential as an example, C DB =C DB0 / (1+V DB / Ψ 0 ) 0.5 , and the relationship between parasitic capacitance and voltage change of MOS tubes working in different areas is also very different, so it can be seen that traditional oscillators have great power supply sensitivity. The current controlled oscillator proposed in the present invention controls the output of different frequencies by controlling the size of MOM (metal-oxide-metal) capacitance that is independent of the power supply, and because the other components of the MOS tubes are exactly the same configuration, the frequency output (V DD -V thp ) can be greatly reduced by reducing the output data, thereby alleviating the power supply sensitivity problem of the above-mentioned traditional oscillator.

[0075] Figure 4 This is the Monte Carlo simulation diagram of the output of the PTAT sensing front end and the CTAT sensing front end. According to the simulation results, the first-order average temperature coefficients of the PTAT voltage sensing output and the CTAT voltage sensing output are 438.3μV / ℃ and -215μV / ℃ respectively, and their second-order average temperature sensing coefficients are -432nV / (℃) respectively. 2 and -187nV / (℃) 2 .

[0076] Figure 5 is the timing diagram of the current controlled oscillator, from Figure 5 It can be observed that the current control delay time of a single delay link is C(V DD -V thp ) / I+t rise +t fall .

[0077] Figure 6 This is the Monte Carlo simulation diagram of the oscillator frequency output under the condition of 400nA bias current. Figure 6 It can be seen that the oscillator structure of the present invention has a standard deviation of only 42.6228 KHz at a center frequency of 2.84027 MHz.

[0078] Figure 7It is the resolution graph output after 48 times of noise simulation under the conditions of 27 °C and the CTAT - end counter set to 7 bits.

[0079] Figure 8 It is the temperature error graph of the temperature sensor of the present invention after two - point calibration. As can be seen from Figure 8 it, within the temperature range of 0 °C to 100 °C, two - point calibration is carried out at 20 °C and 70 °C respectively, and the temperature error can be limited to - 0.75 / +1.3 °C.

[0080] Figure 9 It is the power - supply sensitivity graph of the temperature sensor of the present invention. As can be seen from Figure 9 it, within the power - supply voltage change range of 0.8V to 1.1V, the power - supply sensitivity of the temperature sensor is 6.4 °C / V.

[0081] Figure 10 It is the power - consumption pie graph of the temperature sensor of the present invention. Under the conditions of 27 °C and a power - supply voltage of 1.0V, the power consumption of the temperature sensor is about 3.7 μW.

[0082] Figure 11 It is the temperature - error graph of the influence of leakage current on the output of the temperature sensor of the present invention in the state of 0 °C where the temperature - sensing temperature error at the remote end is the largest. Among them, the one with an asterisk is the temperature - sensing error when only the PTAT - sensing module is placed at the remote end, and the one without an asterisk is the temperature - sensing error when both the PTAT and CTAT modules are placed at the remote end for temperature sensing. As can be known from Figure 11 it, the scheme of the present invention that places the temperature - sensing module as a whole at the remote end for temperature sensing can greatly reduce the error introduced by leakage current; and in the state of 0 °C where the temperature - sensing temperature error at the remote end is the largest, when 9 to 121 CTAT and PTAT sensing fronts are placed at the remote end simultaneously, the generated temperature - error range is - 0.35 °C to 0.275 °C.

Claims

1. An ultra-small on-chip intelligent temperature sensor based on MOS tube, It is characterized in that Including analog circuit modules and digital circuit modules, The analog circuit module is composed of a CTAT branch and a PTAT branch. The CTAT branch and the PTAT branch have the same structure, and both are composed of four MOS transistors, a voltage-to-current converter, and a current-controlled oscillator. The first MOS transistor M 1 and the second MOS transistor M 2 form a 2T structure, which is the core of the temperature sensing front end and generates an output voltage. The third MOS transistor M 3 and the fourth MOS transistor M 4 form a voltage modulator to provide a power supply voltage for the 2T structure. The first MOS transistor M 1 , the second MOS transistor M 2 , the third MOS transistor M 3 and the fourth MOS transistor M 4 together form the circuit of the temperature sensing front end with a 4T structure; The output voltage of the temperature sensing front end is connected to a voltage-to-current converter composed of an amplifier, a PMOS and a resistor through the negative input terminal of the amplifier, so that the output voltage generated by the 4T structure is copied to the resistor; the current of the branch is passed through the PMOS into a current-controlled oscillator composed of three delay units; then the temperature sensing front end of the 4T structure is used as the temperature sensing module of the sensor, which is located locally or remotely at the same time, and the local or remote temperature sensing module is controlled by a switch and connected to the negative input terminal of the amplifier behind for subsequent quantization work, so as to realize local or remote temperature sensing; The digital circuit module uses the output frequency of the CTAT branch to quantize the output frequency of the PTAT branch to obtain corresponding temperature information; The output frequency of the CTAT branch and the output frequency of the PTAT branch are simultaneously and respectively passed into the first counter and the second counter. When the first counter counts N bits, where N is 7 to 9, the second counter is stopped through the logic control module, and the data in the second counter is transmitted to the parallel-to-serial data converter. Then the logic control module sends a reset signal to the first counter and the second counter at the same time to start the next round of quantization. At this time, the parallel-to-serial data converter that receives the data in the second counter first stores the data, and then converts the data into serial data using the output frequency of the CTAT branch of the next round of counting and sends them out in sequence.

2. A design method for an ultra-small area on-chip intelligent temperature sensor based on a MOS tube as claimed in claim 1, It is characterized in that The method comprises the following steps: (1) The current formulas of two NMOS tubes in the subthreshold region and connected in series are combined to achieve the PTAT output voltage and the CTAT output voltage by configuring the length and width of the two NMOS tubes; (2) converting the PTAT output voltage and the CTAT output voltage obtained in step (1) into a PTAT current and a CTAT current respectively through a voltage-to-current converter; (3) respectively passing the PTAT current and the CTAT current obtained in step (2) into current controlled oscillators having the same structure but different parameter configurations to obtain corresponding CTAT output frequencies and PTAT output frequencies; (4) The CTAT output frequency and the PTAT output frequency obtained in step (3) are respectively passed to counter 1 and counter 2 for counting, wherein counter 1 has N bits, where N is 7 to 9; when counter 1 is full, counter 2 is stopped, and then the value of counter 2 is read to obtain output data; (5) Model the temperature function of the output data in step (4), perform Taylor expansion, and analyze the coefficients of high-order terms to configure circuit parameters.

3. The design method according to claim 2, It is characterized in that In the step (1), the expressions of the PTAT output voltage and the CTAT output voltage are: Among them, V PTAT,CTAT is the sum of the PTAT output voltage and the CTAT output voltage, m 1 and m 2 are the subthreshold swing coefficients of the first MOS transistor M 1 and the second MOS transistor M 2 respectively, μ 1 and μ 2 are the carrier mobilities of the first MOS transistor M 1 and the second MOS transistor M 2 respectively, γ 1 ′ is a linearization system coefficient independent of temperature, C ox1 and C ox2 are the gate oxide capacitances of the first MOS transistor M 1 and the second MOS transistor M 2 respectively, W 1 and W 2 are the widths of the first MOS transistor M 1 and the second MOS transistor M 2 respectively, L 1 and L 2 are the lengths of the first MOS transistor M 1 and the second MOS transistor M 2 respectively, V T is the thermal voltage.

4. The design method according to claim 3, It is characterized in that In the step (2), the voltage-to-current converter is a circuit structure of a negative feedback loop composed of an amplifier, a PMOS, and a resistor; taking the PTAT branch as an example, the expression of its output PTAT current is: Among them, V Rp is the voltage applied across the resistor, g m is the transconductance of the PMOS, A u is the open-loop gain of the amplifier, R p is the value of the resistor, V PTAT is the PTAT output voltage, I PTAT is the PTAT current.

5. According to the design method described in claim 4, characterized in that In the step (3), the oscillation period T of the current controlled oscillator CCO is expressed as: Among them, V thp1 is the threshold voltage of the PMOS; t rise and t fall are the rising response time and the falling response time of the delay unit respectively, N cell is the number of delay units, C is the capacitance, V DD is the power supply voltage, and I CCO is the current for charging the capacitor C.

6. According to the design method described in claim 5, characterized in that in the step (5), the expression of the temperature function f(T) is: Perform a Taylor expansion of the above function at T = 0: where a is the product of the PTAT frequency temperature coefficient and 2 N , N represents the number of bits of the CTAT terminal counter, b is the product of the PTAT frequency constant term and 2 N , c is the CTAT frequency temperature coefficient, d is the CTAT frequency constant term, and T is the temperature quantity; it can be obtained from the Taylor expansion that when d >> c, the output data has a linear relationship with the temperature.

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