Display panel, display device and image display method

Abstract

The embodiments of the present application disclose a display panel and a display device. The display area of ​​the display panel includes a plurality of sub-pixels arranged in an array, the sub-pixels are used to perform image display, the sub-pixels include a driving circuit, a sensing circuit and a light-emitting element, the driving circuit is connected to the power supply end and the light-emitting element, the driving circuit is used to receive a data signal, and the driving circuit converts the driving voltage provided by the power supply end into a driving current according to the data signal and transmits it to the light-emitting element to drive the light-emitting element to emit light to perform image display. The sensing circuit is used to sense the size of the driving current in the idle period between two adjacent frames of image display period, and determine the compensation signal for each data signal according to the size of the driving current to compensate for the data signal, thereby ensuring a better image display effect. The embodiments of the present application also disclose an image display method performed by the aforementioned display panel.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel, a display device and an image display method. Background Art

[0002] Organic Light-Emitting Diode (OLED), as a current-type light-emitting device, has been increasingly used in high-performance display devices. Due to its many advantages such as self-luminescence, ultra-lightness, flexibility, bright colors, wide viewing angle, and high contrast, OLED is becoming more and more a mainstream display device.

[0003] The display devices all include pixels that emit light to display images, and each of the pixels may include a driving transistor that generates a driving current and a light-emitting diode OLED that emits light based on the driving current. The characteristics of the driving transistor (e.g., threshold voltage, mobility, etc.) may change according to process deviations in the manufacturing process of the display device, degradation of pixels in the driving process of the display device, etc. In order to compensate for the characteristic changes of the driving transistor, a compensation transistor for compensating for the characteristics of the driving transistor may be added inside the pixel, or the data signal applied to the pixel may be compensated outside the pixel. However, at present, the compensation effect and accuracy of the display device cannot reach the best, resulting in poor image display effect after compensation. Summary of the invention

[0004] In view of the aforementioned technical problems, the present application provides a display panel, a display device and an image display method with better image display effect.

[0005] In the first aspect, the embodiment of the present application discloses a display panel, wherein the display panel includes a plurality of sub-pixels arranged in an array in a display area, and the sub-pixels are used to perform image display. The sub-pixels include a driving circuit, a sensing circuit, and a light-emitting element, wherein the driving circuit is connected to a power supply terminal and the light-emitting element, and the driving circuit is used to receive a data signal, and the driving circuit converts the driving voltage provided by the power supply terminal into a driving current according to the data signal and transmits it to the light-emitting element to drive the light-emitting element to emit light to perform image display, wherein the sensing circuit is used to sense the magnitude of the driving current in an idle period between two adjacent frames of image display periods, and determine a compensation signal for each of the data signals according to the magnitude of the driving current, and the compensation signal is used to compensate for the data signal.

[0006] In one embodiment of the present application, the compensation signal is loaded into the sub-pixel before the data signal is input into the sub-pixel; or, the compensation signal and the data signal are loaded into the sub-pixel together during a frame image display period.

[0007] In one embodiment of the present application, the sensing circuit is used to construct a compensation data table, the data compensation data table includes multiple data signals and the compensation signals corresponding to the data signals, and the compensation data table also includes a change trend of the data signal, wherein the change trend includes the size change between the data signal loaded during a frame image display period before loading the data signal and the data signal.

[0008] In one embodiment of the present application, determining a compensation signal for each of the data signals includes:

[0009] A reference data signal loaded to the sub-pixel corresponding to any v+1 frame image period, wherein the reference data signal corresponds to the data signal, and if the data voltage corresponding to the data signal in the v-th frame image period is greater than the data voltage corresponding to the reference data signal, the sensing circuit is used to sense a first calculation driving current transmitted to the light-emitting element corresponding to the reference data signal in the v+1-th frame image display segment;

[0010] Corresponding to the reference data signal loaded to the sub-pixel in any w+1-th frame image period, if the data voltage corresponding to the data signal in the w-th frame image period is less than the data voltage corresponding to the reference data signal, the sensing circuit is used to sense the second calculation driving current transmitted to the light-emitting element by the reference data signal corresponding to the w+1-th frame image display segment;

[0011] A current difference between the first calculation driving current and the second calculation driving current is determined, and a compensation signal corresponding to the reference data signal is determined according to the current difference.

[0012] In one embodiment of the present application, the sensing circuit senses the first calculation driving current corresponding to the reference data signal during an idle period between the v+1th frame image display segment and the v+2th frame image display segment; and the sensing circuit senses the second calculation driving current under the reference data signal during an idle period between the w+1th frame image display segment and the w+2th frame image display segment.

[0013] In one embodiment of the present application, the data signal loaded to the sub-pixel during the h-frame image display period is obtained before the h+1-frame image display period, and the compensation signal is determined from the compensation data table based on the change trend of the data signal loaded to the sub-pixel during the h-frame image display period to the data signal loaded to the sub-pixel during the h+1-frame image display period and the data signal.

[0014] In one embodiment of the present application, the sub-pixel also includes a compensation circuit, which obtains a data signal loaded to the sub-pixel during the h+1th frame image display period before the h+1th frame image display period, and determines the compensation signal from the compensation data table according to a change trend of the data signal loaded to the sub-pixel during the h+1th frame image display period to the data signal loaded to the sub-pixel during the h+1th frame image display period and the data signal, and loads the compensation signal to the sub-pixel through the compensation circuit during an idle period between the h+1th frame image display period and the hth frame image display period.

[0015] In one embodiment of the present application, the compensation circuit includes a compensation scan line, a first compensation switch tube, a second compensation switch tube, and a compensation capacitor. The compensation control end of the first compensation switch tube is connected to the compensation scan line, the first compensation conductive end of the first compensation switch tube is connected to the data line, the second compensation conductive end of the first compensation switch tube is connected to the compensation driving end of the second compensation switch tube, the second compensation driving end of the second compensation switch tube is connected to the light-emitting element, the first compensation driving end of the second compensation switch tube is connected to the power supply end, and the compensation capacitor is connected between the compensation driving end of the second compensation switch tube and the power supply end. The compensation scan line is used to load a compensation scan signal from the compensation scan line during an idle period between the h-th frame image display period and the h+1-th frame image display period, so as to control the compensation signal to be transmitted from the data line through the first compensation switch tube, the second compensation switch tube, and the compensation capacitor and loaded to the light-emitting element.

[0016] In a second aspect, an embodiment of the present application further provides a display device, comprising a frame and the aforementioned display panel, wherein the display panel is fixed in the frame.

[0017] In a third aspect, an embodiment of the present application further provides an image display method of the aforementioned display panel, comprising:

[0018] For any sub-pixel, in an idle period before the h-th frame image display period, determine the magnitude of the data signal during the h-th frame image display period and the data signal during the h+1-th frame image display period;

[0019] A compensation signal corresponding to the data signal in the h+1th frame image display period is obtained from the compensation data table, and the compensation signal is coordinated with the data signal to compensate the sub-pixel.

[0020] Among them, the data compensation data table includes multiple data signals and compensation signals corresponding to the data signals, and the compensation data table also includes a change trend of the data signal, wherein the change trend includes the size change between the data signal loaded during a frame image display period before loading the data signal and the data signal.

[0021] In one embodiment of the present application, obtaining the compensation current in the compensation data table includes:

[0022] Corresponding to the reference data signal loaded to the sub-pixel in any v+1 frame image period, if the data voltage corresponding to the data signal in the v frame image period is greater than the data voltage corresponding to the reference data signal, the sensing circuit is used to sense the first calculation driving current transmitted to the light-emitting element in the v+1 frame image display segment in correspondence with the reference data signal. Corresponding to the reference data signal loaded to the sub-pixel in any w+1 frame image period, if the data voltage corresponding to the data signal in the w frame image period is less than the data voltage corresponding to the reference data signal, the sensing circuit is used to sense the second calculation driving current transmitted to the light-emitting element in the w+1 frame image display segment in correspondence with the reference data signal. Determine the current difference between the first calculation driving current and the second calculation driving current, and determine the compensation signal corresponding to the reference data signal according to the current difference.

[0023] Compared with the prior art, the driving current is detected at a preset time through a sensing circuit, so as to accurately obtain the compensation signal corresponding to the different data signals in each sub-pixel. By compensating the data signal, the afterimage problem of the driving current not being able to be accurately loaded to the light-emitting element due to the hysteresis effect of the driving switch tube in the driving circuit is improved, thereby ensuring the accuracy of image display and effectively improving the image display effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0025] Figure 1 A schematic diagram of the structure of a display device provided in one embodiment of the present application;

[0026] Figure 2 For a comparative example in this application Figure 1 A schematic diagram of the planar layout structure of the display panel shown;

[0027] Figure 3 for Figure 2 Schematic diagram of equivalent circuit of sub-pixel in the display panel shown;

[0028] Figure 4 For Figure 3 A schematic diagram showing the change of the driving current of the driving switch tube in the sub-pixel shown;

[0029] Figure 5 for Figure 4 A schematic diagram of a specific circuit structure of a sub-pixel shown;

[0030] Figure 6 In the first embodiment of this application, Figure 1 A schematic diagram of the planar layout structure of the display panel shown;

[0031] Figure 7 For Figure 6 Schematic diagram of equivalent circuit of sub-pixel in the display panel shown;

[0032] Figure 8 For Figure 7 A schematic diagram showing the change of the driving current in the driving switch tube in the sub-pixel shown;

[0033] Fig. 9 for Figure 7 Sub-pixel operation timing diagram shown;

[0034] Fig.10 for Figure 7 The flowchart of the sub-pixel image display method shown;

[0035] Fig.11 This is a schematic diagram of compensation data in an embodiment of the present application.

[0036] Description of reference numerals:

[0037] Display device-100, display panel-10, 20, frame-30, display area-10a, non-display area-10b, data lines-D1~Dn, scan lines-G1~Gm, first direction-X, second direction-Y, timing control circuit-500, data driving circuit-400, scan driving circuit-300, power management circuit-600, driving current Ids, sub-pixels-P, Pa, Pb, i-th scan line-Gi, j-th data line-Dj, j-th detection signal line-Tj, driving circuit-15, storage capacitor-C1, control switch tube-M2, first control terminal-M20, first conductive terminal-M21, second conductive terminal-M23, driving switch tube-M1, second control terminal-M12, third conductive terminal-M13, fourth conductive terminal-M14, power terminal-VDD, ground terminal-GND, Driving node-N1, light-emitting element-OLED, compensation scanning lines-Gc1~Gcm, detection signal lines-T1~Lm*n, images-F1, F2, sensing circuit-16, detection switch tube-M3, detection control terminal-M30, fifth conductive terminal-M35, sixth conductive terminal-M36, detection resistor-R, operation unit-J, processing unit-MC, first detection node-NC1, second detection node-NC2, compensation circuit-17, first compensation switch tube-M4, compensation control terminal-M40, first compensation conductive terminal-M41, second compensation conductive terminal-M42, second compensation switch tube-M5, compensation driving terminal-M50, first compensation driving terminal-M51, second compensation driving terminal-M52, compensation capacitor-C2, gate-source voltage-Vgs, idle period-Tb, steps-1001~1002. DETAILED DESCRIPTION

[0038] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thoroughly and comprehensively understood.

[0039] The following descriptions of the embodiments are with reference to the attached diagrams to illustrate specific embodiments that the present application can be used to implement. The serial numbers for the components herein, such as "first", "second", etc., are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" and "coupling" mentioned in the present application, unless otherwise specified, include direct and indirect connections (couplings). The directional terms mentioned in the present application, such as "upper", "lower", "front", "back", "left", "right", "inside", "outside", "side", etc., are only with reference to the directions of the attached drawings. Therefore, the directional terms used are for better and clearer explanation and understanding of the present application, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present application.

[0040] In the description of the present application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection; it can be directly connected, or indirectly connected through an intermediate medium, or it can be internal communication between two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances. It should be noted that the terms "first", "second", etc. in the specification, claims, and drawings of the present application are used to distinguish different objects, rather than to describe a specific order.

[0041] In addition, the terms "include", "may include", "contain", or "may include" used in the present application indicate the existence of the corresponding functions, operations, elements, etc. disclosed, and do not limit one or more other functions, operations, elements, etc. In addition, the terms "include" or "contain" indicate the existence of the corresponding features, numbers, steps, operations, elements, components, or combinations thereof disclosed in the specification, and do not exclude the existence or addition of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, and are intended to cover non-exclusive inclusions. In addition, when describing the embodiments of the present application, "may" is used to indicate "one or more embodiments of the present application". And, the term "exemplary" is intended to refer to an example or illustration.

[0042] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0043] See also Figure 1 , Figure 1 This is a schematic diagram of the structure of a display device provided in this embodiment.

[0044] like Figure 1 As shown, the display device 100 includes a display panel 10 and a frame 30. The display panel 10 is fixed to the frame 30, and the frame 30 provides fixing and support for the display panel 10. In other embodiments of the present application, when the display device 100 is a portable electronic device, such as a mobile phone, a tablet computer, etc., the display device 100 does not need to be provided with a supporting frame.

[0045] See also Figure 2 , Figure 2 For a comparative example in this application Figure 1 The schematic diagram of the planar layout structure of the display panel is shown.

[0046] like Figure 2 As shown, the display area 10 a of the display panel 10 includes a plurality of m*n sub-pixels P arranged in a matrix, n data lines D1 -Dn, and m scanning lines G1 -Gm, where m and n are natural numbers greater than 1.

[0047] The m scan lines G1-Gm extend along a first direction X and are mutually insulated and arranged in parallel along a second direction Y. The n data lines D1-Dn extend along a second direction Y and are mutually insulated and arranged in parallel along the first direction X. The first direction X and the second direction Y are perpendicular to each other.

[0048] The functional circuit and signal routing for driving the sub-pixels P to display images may be arranged in the non-display area 10b of the display panel 10. The display device 100 further includes a power management circuit 600, a timing control circuit 500, a data driving circuit 400, and a scan driving circuit 300 arranged in the display panel 10 for driving the sub-pixels P to display images. The scan driving circuit 300 may be arranged in the non-display area 10b of the display panel 10, and the timing control circuit 500 and the data driving circuit 400 may be arranged on a circuit board and electrically connected to the display area 10a through the signal routing for signal transmission.

[0049] Among them, the timing control circuit 500 is electrically connected to the data driving circuit 400 and the scan driving circuit 300, and is used to control the working timing of the data driving circuit 400 and the scan driving circuit 300, that is, to output corresponding timing control signals to the data driving circuit 400 and the scan driving circuit 300, so as to control when the scan driving circuit 300 outputs the corresponding scan signal and control when the data driving circuit 400 outputs the corresponding data signal Data.

[0050] The data driving circuit 400 is electrically connected to the n data lines D1 ˜Dn, and is used to transmit the data signals Data to be displayed to the plurality of sub-pixels P in the form of data voltages through the n data lines D1 ˜Dn.

[0051] The scan driving circuit 300 is electrically connected to the m scan lines G1-Gm, and is used to output scan signals to the sub-pixels P through the m scan lines G1-Gm to control when the sub-pixels P receive the data signals Data. The scan driving circuit 300 outputs scan signals from the m scan lines G1-Gm in sequence according to the scan period.

[0052] The power management circuit 600 uses the enable signal EN to convert the power signal provided by the power terminal Vin into a data driving voltage AVDD to drive the data driving circuit 400. At the same time, it can also generate multiple driving voltages to provide to the scan driving circuit 300 and each sub-pixel P in the display area 10a of the display panel 10.

[0053] See also Figure 3 , Figure 3 for Figure 2 The equivalent circuit diagram of the sub-pixel in the display panel is shown in FIG. Figure 3 As shown, the sub-pixel P includes a driving circuit 15 and a light-emitting element OLED.

[0054] The light emitting element OLED is a light emitting diode, including an anode (not labeled) and a cathode (not labeled), the anode of the light emitting element OLED is connected to the driving circuit 15, and the cathode is connected to the ground terminal GND. In this embodiment, the light emitting element OLED is an organic electroluminescence display (OLED) device.

[0055] The driving circuit 15 is connected to the i-th scanning line Gi, the j-th data line Dj and the light-emitting element OLED. The driving circuit 15 is used to receive a scanning signal from the i-th scanning line Gi, and receive and store a data signal Data from the j-th data line Dj under the control of the scanning signal. The power supply terminal VDD is used to provide a corresponding driving current Ids. The driving circuit 15 transmits the driving current Ids provided by the power supply terminal VDD to the light-emitting element OLED according to the data signal Data to drive the light-emitting element OLED to emit light, wherein the data signal Data is used to control the magnitude of the driving current Ids output to the light-emitting element OLED.

[0056] Specifically, Figure 3 As shown, the driving circuit 15 in the sub-pixel P includes a driving switch tube M1, a control switch tube M2 and a storage capacitor C1.

[0057] The control switch tube M2 includes a first control terminal M20, a first conductive terminal M21 and a second conductive terminal M23, wherein the first control terminal M20 is connected to the i-th scan line Gi, the first conductive terminal M21 is connected to the j-th data line Dj, and the second conductive terminal M23 is connected to the driving node N1. The voltage received by the first control terminal M20 is used to realize the control of turning on or off the control switch tube M2.

[0058] In this embodiment, the control switch tube M2 is a thin film transistor (TFT), wherein the gate of the transistor serves as the first control terminal M20, or the gate of the transistor is directly connected to the first control terminal M20, the source of the transistor serves as the first conductive terminal M21, or the source of the transistor is directly connected to the first conductive terminal M21, and the drain of the transistor serves as the second conductive terminal M22, or the drain of the transistor is directly connected to the second conductive terminal M22. Under the control of the scan signal output by the scan line Gi, the control switch tube M2 is in the on state, and receives the data signal from the data line Dj and transmits it to the driving node N1.

[0059] The driving switch tube M1 includes a second control terminal M12, a third conductive terminal M13 and a fourth conductive terminal M14, wherein the second control terminal M12 is connected to the driving node N1, the third conductive terminal M13 is connected to the power supply terminal VDD, and the fourth conductive terminal M14 is connected to the anode of the light-emitting element OLED. The voltage received by the second control terminal M12 is used to control the on or off state of the driving switch tube M1. In this embodiment, the driving switch tube M1 is controlled to be on or off according to the voltage of the driving node N1.

[0060] In this embodiment, the driving switch tube M1 is a thin film transistor TFT, the gate of the transistor is used as the second control terminal M12, or the gate of the transistor is directly connected to the second control terminal M12; the drain of the transistor is used as the third conductive terminal M13, or the drain of the transistor is directly connected to the third conductive terminal M13, the source of the transistor is used as the fourth conductive terminal M14, or the source of the transistor is directly connected to the fourth conductive terminal M14. Under the voltage control of the driving node N1, it is in the on state or the off state. Under the control of the driving node N1, the on driving switch tube M1 outputs the corresponding driving current Ids to the light-emitting element OLED according to the power supply voltage provided by the power supply terminal VDD. It can be understood that the driving current Ids is also the source-drain current flowing through the driving switch tube M1.

[0061] The storage capacitor C1 is connected between the driving node N1 and the power supply terminal VDD, and is used to store the data voltage corresponding to the data signal transmitted from the control switch tube M2 to the driving node N1, and maintain the data voltage to support controlling the conduction state of the driving switch tube M1 while controlling the size of the driving current Ids provided by the driving switch tube M1 to the light-emitting element OLED.

[0062] In this embodiment, the driving switch tube M1 and the control switch tube M2 are P-type thin film transistors. Of course, in other embodiments of the present application, the driving transistor M1 and the control transistor M2 may also be N-type TFTs.

[0063] like Figure 3 In the working process of the sub-pixel P shown, at the first moment when the i-th scan line Gi performs the scan period, the scan signal controls the switch tube M2 to be turned on, and the data voltage corresponding to the data signal Data is loaded to the driving node N1 through the data line Dj. When the voltage of the driving node N1 reaches the threshold voltage of the driving switch tube M1 through the energy storage of the storage capacitor C1, the driving switch tube M1 is controlled to be turned on. After a preset time, the output of the scan signal is stopped at the second moment, and the voltage of the storage capacitor C1 keeps the driving switch tube M1 turned on. The power supply voltage continuously provides the driving current Ids to the light-emitting element OLED through the driving switch tube M1. The driving current Ids flowing through the light-emitting element OLED is controlled by the driving switch tube M1, and the driving current Ids satisfies the following formula:

[0064]

[0065] Wherein, VDD is the power supply voltage provided by the power supply terminal VDD, W and L are respectively the width and length of the conductive channel of the driving switch tube M1, μ is the effective carrier mobility of the driving switch tube M1, Cox is the unit area capacitance of the gate oxide layer in the driving switch tube M1, Vdata is the data voltage corresponding to the input data signal (grayscale voltage, or the gate-source voltage Vgs loaded on the driving switch tube M1), and Vth is the threshold voltage of the driving switch tube M1.

[0066] Taking the driving switch tube M1 as a PMOS thin film transistor (TFT) as an example, the schematic diagram of its hysteresis characteristic curve is as follows Figure 4 As shown, Figure 4 For Figure 3 The schematic diagram of the change of the driving current Ids of the driving switch tube M1 in the sub-pixel shown in the figure shows that when the gate-source voltage Vgs of the driving transistor M1 changes in different directions, that is, when the gate-source voltage Vgs changes from large to small and from small to large, the corresponding change curves of the driving current Ids do not overlap, resulting in a hysteresis characteristic of the driving transistor M1.

[0067] After research, it was found that due to the inherent hysteresis characteristics of the driving transistor M1, when Figure 2 The display panel 10 shown shows Figure 5 For example, in any one frame (hth frame) of the image display period, the brightness (A) of the sub-pixel Pa is 0 nit, and the brightness of the sub-pixel Pb is 200 nit. After a certain display time, when the brightness of the image F2 displayed in the h+1th frame image display period is 100 nit, in the current frame, although the gate-source voltage V loaded to the driving switch tube M1 is GS Similarly, in the sub-pixel Pb with a larger brightness during the h-th frame image display period, the driving current Ids of the driving transistor M1 flows along Figure 4 As shown, the direction of the curve segment changes from node C→B′→A, and the gate-source voltage V GS The corresponding driving current Ids1; in the h-th frame image display period, the sub-pixel Pa with a smaller brightness, the driving current Ids of the driving switch tube M1 changes along the direction of the node A→B→C curve segment, and the gate-source voltage V GS The corresponding driving current Ids2 is shown in FIG. 1 . As can be seen, the driving current Ids2 is greater than the driving current Ids1 , and there is a voltage difference ΔIds=(Ids2-Ids1) between the two.

[0068] Since the brightness of the light emitted by the light emitting element OLED is proportional to the driving current Ids, the sub-pixel Pa and the sub-pixel Pb in the display area do not all correspond to a brightness of 100 nit. Figure 5 The image F2 shown is an image with alternating light and dark. For example, the brightness of the sub-pixel Pa is 100 nit, while the brightness of the sub-pixel Pb is only 90 nit. There is an afterimage of the image F1 in the image F2, resulting in a poor image display effect.

[0069] See also Figure 6 , as in the first embodiment of the present application Figure 1 The schematic diagram of the planar layout structure of the display panel is shown in FIG. Figure 6 The display panel 20 shown is Figure 2 The planar layout structure diagram of the display panel 10 is basically the same, the only difference is that the display panel 20 further includes a plurality of detection signal lines T1 to Tm*n connecting a plurality of sub-pixels P and m compensation scanning lines Gc1 to Gcm, and the other structures are basically the same.

[0070] Specifically, Figure 6 As shown, the display area 10a of the display panel 10 includes a plurality of m*n sub-pixels P arranged in a matrix, n data lines D1-Dn, n detection signal lines T1-Tn, m scanning lines G1-Gm, and m compensation scanning lines Gc1-Gcm, where m and n are natural numbers greater than 1.

[0071] The m scan lines G1-Gm extend along the first direction X and are mutually insulated and arranged in parallel along the second direction Y. Correspondingly, the compensation scan lines Gc1-Gcm also extend along the first direction X and are mutually insulated and arranged in parallel along the second direction Y. The m scan lines G1-Gm and the m compensation scan lines Gc1-Gcm are also insulated from each other.

[0072] The n data lines D1-Dn extend along the second direction Y and are mutually insulated and arranged in parallel along the first direction X, wherein the first direction X and the second direction Y are perpendicular to each other. Correspondingly, the n detection signal lines T1-Tm*n extend along the second direction Y and are mutually insulated and arranged in parallel along the first direction X, wherein the n data lines D1-Dn and the n detection signal lines T1-Tm*n are also insulated from each other. It should be noted that in the present embodiment, a corresponding detection signal line is set for each sub-pixel, and in other embodiments of the application, a detection signal line may also be set for a row, wherein the number of detection signal lines may be set according to actual needs and is not limited to this example.

[0073] Corresponding to the display panel 20, the power management circuit 600, the timing control circuit 500, the data driving circuit 400, and the scanning driving circuit 300 disposed in the display panel 10 are disposed at the same position and the working principle are the same as Figure 2 The corresponding functional modules in the display panel 10 are the same and will not be described in detail in this embodiment.

[0074] In this embodiment, m compensation scanning lines Gc1 to Gcm are used to output compensation scanning signals, and the compensation scanning signals are used to control the sub-pixel P to perform data compensation. Among them, the waveform of the compensation scanning signal is basically the same as the waveform of the scanning signal, but the output time of the compensation scanning signal is different from that of the scanning signal. The compensation scanning signal works in the idle period between the display periods of two adjacent frames of images, that is, in the period when the m scanning lines G1 to Gm do not output scanning signals, the m compensation scanning lines Gc1 to Gcm compensate the scanning line signals. In this embodiment, the compensation scanning signal is also a pulse signal, and its pulse duration is less than the duration of the pulse signal in the scanning signal. It can be understood that in this embodiment, the m compensation scanning lines Gc1 to Gcm are connected to the scanning drive circuit 300, and the scanning drive circuit 300 outputs multiple compensation scanning signals. Of course, in other embodiments of the application, the m compensation scanning lines Gc1 to Gcm can also be independent of other pulse signal output modules of the scanning drive circuit 300, and other pulse signal output modules output multiple compensation scanning signals. In this embodiment, the pulse of the compensation scanning signal is a low level.

[0075] The m*n detection signal lines T1~Tm*n are used to output detection signals, and the detection signals are used to control the sub-pixels to detect the driving current Ids. Among them, the waveform of the detection signal is opposite to the phase of the waveform of the scanning signal, but the output time of the detection signal is different from that of the scanning signal. The detection signal works in the idle period between the display periods of two adjacent frames of images, that is, in the period when the m scanning lines G1~Gm do not output the scanning signal, the m*n detection signal lines T1~Tm*n output the detection signal. In this embodiment, the m*n detection signal lines T1~Tm*n are also pulse signals, and their pulse duration is less than the duration of the pulse signal in the scanning signal. It can be understood that in this embodiment, the m*n detection signal lines T1~Tm*n are connected to the data driving circuit 400, and the data driving circuit 400 outputs multiple detection signals. Of course, in other embodiments of the application, the n detection signal lines T1~Tn can also be independent of other pulse signal output modules of the data driving circuit 400, and other pulse signal output modules output multiple compensation scanning signals. In this embodiment, the pulse of the detection signal is a high level.

[0076] It should also be noted that the detection signal is not output during every idle period of the display panel 10. It can be output at a predetermined time, that is, the detection signal is output only when the sub-pixel P needs to perform a driving current Ids detection, and the detection signal can also be performed separately for the sub-pixels P in a partial area of ​​the display area 10a, without the need to perform a driving current Ids detection on all sub-pixels in the display area 10a.

[0077] See also Figure 7 , which is as follows Figure 6 Schematic diagram of equivalent circuit of sub-pixel in the display panel shown.

[0078] like Figure 7 As shown, the sub-pixel P includes a driving circuit 15, a sensing circuit 16, a compensation circuit 17 and a light-emitting element OLED.

[0079] The light emitting element OLED is a light emitting diode, including an anode (not labeled) and a cathode (not labeled), wherein the anode of the light emitting element OLED is connected to the driving circuit 15, and the cathode is connected to the ground terminal GND. In this embodiment, the light emitting element OLED is an organic light emitting semiconductor (OLED) device.

[0080] The driving circuit 15 includes a driving switch tube M1, a control switch tube M2, and a storage capacitor C1. Figure 3 The circuit structure, connection relationship of electronic components and working principle of the driving circuit 15 are the same as those of the embodiment, and will not be described in detail.

[0081] The sensing circuit 16 includes a detection switch tube M3 , a detection resistor R, a calculation unit J and a processing unit MC.

[0082] The detection resistor R is used to detect the size of the driving current Ids output by the driving transistor M1 to the light-emitting element OLED. The detection resistor R is connected to the first detection node NC1 and the second detection node NC2, wherein the first detection node NC1 is connected to the fourth conductive terminal M14 of the driving switch tube M1, or the fourth conductive terminal M14 of the driving transistor M1 is used as the first detection node NC1; the second detection node NC2 is connected to the anode of the light-emitting element OLED, or the anode of the light-emitting element OLED is used as the second detection node NC2.

[0083] In this embodiment, the detection switch tube M3 is connected to both ends of the detection resistor R, or in other words, the detection switch tube M3 is connected to the first detection node NC1 and the second detection node NC2. The detection switch tube M3 is used to receive a detection signal and to control whether the detection resistor R is connected to the conductive circuit of the driving transistor M1 to output the driving current Ids to the light-emitting element OLED, or in other words, the detection signal controls when to detect the driving current Ids.

[0084] Specifically, in this embodiment, the detection switch tube M3 includes a detection control terminal M30, a fifth conductive terminal M35 and a sixth conductive terminal M36, the detection control terminal M30 is connected to the detection signal line Tj, the fifth conductive terminal M35 is connected to the first detection node NC1, and the sixth conductive terminal M36 is connected to the second detection node NC2.

[0085] In this embodiment, the detection switch tube M3 is a thin film transistor TFT, whose gate serves as the detection control terminal M30 or the detection control terminal M30 is directly connected to its gate, the source of the detection switch tube M3 serves as the fifth conductive terminal M35 or the fifth conductive terminal M35 is directly connected to the source of the detection switch tube M3, and the drain of the detection switch tube M3 serves as the sixth conductive terminal M36 or the sixth conductive terminal M36 is directly connected to the source of the detection switch tube M3.

[0086] For example, when the detection signal controls the detection switch tube M3 to be in the on state, the two ends of the detection resistor R are basically at the same potential, that is, the detection resistor R is short-circuited and bypassed. At this time, the detection resistor R is not connected to the conductive loop of the drive switch tube M1 to output the drive current Ids to the light-emitting element OLED, so the drive switch tube M1 can directly drive the light-emitting element OLED with current, thereby performing normal image display. When the detection switch tube M3 is in the off state, the detection resistor R is directly connected to the conductive loop of the drive switch tube M1 to output the drive current Ids to the light-emitting element OLED, and the corresponding drive current Ids is divided, thereby dividing the corresponding drive current I DS The magnitude of the detection voltage.

[0087] The operation unit J is connected to both ends of the detection resistor R, that is, the operation unit J is connected to the first detection node NC1 and the second detection node NC2, so as to accurately obtain the detection voltage from the detection capacitor R. Specifically, the operation unit J includes a first input terminal J1, a second input terminal J2 and an output terminal J3, the first input terminal J1 and the second input terminal J2 are respectively connected to the first detection node NC1 and the second detection node NC2, and the output terminal J3 is connected to the processing unit MC.

[0088] The first input terminal J1 is used to receive the voltage of the detection resistor R connected to the first detection node NC1, and the second input terminal J2 is used to receive the voltage of the detection capacitor R connected to the second detection node NC2. The subtraction unit J obtains the detection voltage corresponding to the driving current Ids obtained by the detection resistor R through the difference processing of the first input terminal J1 and the second input terminal J2, that is, the size of the detection voltage corresponding to the size of the driving current Ids, and outputs it to the processing unit MC from the output terminal J3.

[0089] In this embodiment, the subtraction unit J may be a logic array circuit, and the number of the subtraction units J may be set according to actual needs, for example, subtraction units may be respectively set corresponding to multiple areas of the display area 10a. The subtraction unit J may be set in the data driving circuit 400, or in the timing control circuit 500, or may be set independently of the data driving circuit 400 and the timing control circuit 500, and may be set according to actual needs, but is not limited thereto.

[0090] The processing unit MC is used to store the detection voltage and calculate the magnitude of the driving current Ids according to the resistance value of the detection resistor R and the detection voltage. According to formula (1), the magnitude of the current that needs to be compensated due to the hysteresis effect can be determined, thereby determining the magnitude of the voltage compensation signal of the data signal Vdata.

[0091] The compensation circuit 17 includes a compensation scanning line Gci, a first compensation switch tube M4, a second compensation switch tube M5 and a compensation capacitor C2.

[0092] The first compensation open tube M4 is used to receive the compensation scan signal and transmit the compensation signal to the second compensation switch tube M4. The first compensation open tube M4 includes a compensation control terminal M40, a first compensation conductive terminal M41 and a second compensation conductive terminal M42. The compensation control terminal M40 is connected to the compensation scan line Gci, the first compensation conductive terminal M41 is connected to the data line Dj, and the second compensation conductive terminal M42 is connected to the compensation drive node N2. The compensation control terminal M40 receives the compensation scan signal from the compensation scan line Gci, and the compensation scan signal is used to control the first compensation switch M4 to turn on, thereby transmitting the compensation signal to the second compensation switch tube M4.

[0093] In this embodiment, the first compensation open tube M4 is a thin film transistor TFT, the gate of the first compensation open tube M4 serves as the compensation control terminal M40, or the compensation control terminal M40 is directly connected to the gate of the first compensation open tube M4, the source of the first compensation open tube M4 serves as the first compensation conductive terminal M41, or the first compensation conductive terminal M41 is directly connected to the source of the first compensation open tube M4, and the drain of the first compensation open tube M4 serves as the second compensation conductive terminal M42, or the second compensation conductive terminal M42 is directly connected to the drain of the first compensation open tube M4.

[0094] The second compensation switch tube M5 is used to receive the compensation signal from the first compensation switch tube M4, and output the corresponding compensation driving current Ic to the light-emitting element OLED according to the compensation signal. The second compensation switch tube M5 includes a compensation driving terminal M50, a first compensation driving terminal M51, and a second compensation driving terminal M52. The compensation driving terminal M50 is connected to the compensation driving node N2, the first compensation driving terminal M51 is connected to the first detection node NC1, that is, connected to the fourth conductive terminal M14 of the driving switch tube M1, and the first compensation driving terminal M51 is connected to the power supply terminal VDD.

[0095] The second compensation switch tube M5 is in an on or off state under the drive of the voltage of the compensation driving node N2. When the second compensation switch tube M5 is in the on state, it outputs a corresponding compensation driving current Ic to the light emitting element OLED according to the compensation signal.

[0096] In this embodiment, the second compensation open tube M5 is a thin film transistor TFT, the gate of the second compensation open tube M5 serves as the compensation driving end M50, or the compensation driving end M50 is directly connected to the gate of the second compensation open tube M5, the source of the second compensation open tube M5 serves as the first compensation driving end M51, or the first compensation driving end M51 is directly connected to the source of the second compensation open tube M5, and the drain of the second compensation open tube M5 serves as the second compensation driving end M52, or the first compensation driving end M51 is directly connected to the drain of the second compensation open tube M5.

[0097] The compensation capacitor C2 is connected between the compensation driving node N2 and the power supply terminal VDD, or in other words, the compensation capacitor C2 is connected between the compensation driving terminal M50 and the second compensation driving terminal M52 of the second compensation switch tube M5. The compensation capacitor C2 is used to receive a voltage corresponding to the compensation signal transmitted from the first compensation switch tube M4 to the compensation driving node N2, and maintain the voltage to support the conduction state of the compensation switch tube M4 and control the magnitude of the compensation driving current Ic provided by the first compensation switch tube M4 to the light-emitting element OLED.

[0098] When the compensation circuit 17 is working, the first compensation switch tube M4 is turned on by outputting a scan signal through the compensation scan line Gci. If, in the sub-pixel, the grayscale voltage corresponding to the data signal of the current frame (hth frame) is greater than the grayscale voltage corresponding to the data signal of the next frame (h+1th frame), the compensation capacitor C2 is not charged, the second compensation switch tube M5 is turned off, and only the driving switch tube M1 provides current for the light-emitting element OLED. If the grayscale voltage corresponding to the data signal of the current frame (hth frame) is less than the grayscale voltage corresponding to the data signal of the next frame (h+1th frame), the compensation capacitor C2 is charged, the second compensation switch tube M5 is turned on, and the second compensation switch tube M5 provides the compensation current Ic for the light-emitting element OLED, that is, the driving current Ids is directly compensated for the light-emitting element OLED through the data line Dj.

[0099] In other embodiments of the present application, the compensation circuit 17 may be omitted, and the compensation signal may be loaded into the sub-pixel through the data line together with the data signal within a frame image display period.

[0100] During the blanking period Tb (blanking) between the current frame (hth frame) and the next frame (h+1th frame), the data signal (grayscale voltage) corresponding to the driving current is compensated. Since the first compensation switch tube M4 and the second compensation switch tube M5 are not always in working state, that is, they are in intermittent working state, and the driving switch tube M1 and the control switch tube M2 are always in working aging state, after a long period of aging, such as Figure 8 As shown, it is Figure 7 The schematic diagram of the driving current change in the driving switch tube M1 in the sub-pixel shown in the figure shows that the corresponding curve of the gate-source voltage Vgs and the driving current Ids will drift after aging, but the trend of the curve will not change, that is, the compensation signal can also remain unchanged. In this way, the corresponding compensation signal will not change over time, which can better solve the influence of hysteresis and thus match the best performance. Independent compensation is performed for the different aging degrees and hysteresis characteristics of the driving switch tube M1 in different sub-pixels, which can effectively reduce the residual image caused by hysteresis, and the data can be accurately compensated over time to ensure the accuracy of image display.

[0101] Please also read Figure 9-10 , Fig. 9 for Figure 7 The sub-pixel working timing diagram shown is Fig.10 for Figure 7 The flowchart of the sub-pixel image display method is shown in FIG. Fig.10 As shown, the sub-pixels in the display panel 20 perform the image display method including the following steps:

[0102] Step 1001, in the idle period Tb before the h+1th frame image display period, determine the magnitude of the data signal of the hth frame image display period and the data signal of the h+1th frame image display period, and obtain a determination result.

[0103] Step 1002, according to the judgment result and the data signal of the h+1th frame image display period, obtain the compensation signal corresponding to the data signal of the h+1th frame image display period from the compensation data table, and load the compensation signal with the data signal to the sub-pixel to perform image display.

[0104] It can be understood that in step 1002, the compensation signal in combination with the data signal to compensate the sub-pixel unit can specifically include loading the compensation signal to the light-emitting element OLED through the compensation circuit 17 during the idle period Tb before the h+1 frame image display period, and then providing the driving current Ids to the light-emitting element OLED through the driving circuit 15 in combination with the data signal during the h+1 frame image display period, thereby achieving compensation for the data signal. Alternatively, the compensation signal is directly compensated and added to the data signal during the h+1 frame image display period, so that during the h+1 frame image display period, the compensated data signal provides the driving current Ids to the light-emitting element OLED through the driving circuit 15, thereby achieving compensation for the data signal.

[0105] In this embodiment, the display device 100 including the display panel 20 may perform the following steps before displaying an image: Fig.11 The construction of the compensation data table shown, Fig.11 For the purpose of representing the compensation data in an embodiment of the present application, the construction of the compensation data table includes:

[0106] In the idle period Tb between the vth image display segment and the v+1th image display segment, the magnitudes of the first data signal and the second data signal loaded to the sub-pixel in the v+1th image display segment are determined.

[0107] When the data voltage corresponding to the first data signal is greater than the data voltage corresponding to the second data signal, the first calculation driving current Ids corresponding to the second data signal in the v+1 frame image display segment is detected during the idle period Tb between the v+1 frame image display segment and the v+2 frame image display segment.

[0108] In the idle period Tb between the w-th image display segment and the w+1-th image display segment, the magnitude of the third data signal and the fourth data signal loaded to the sub-pixel in the w+1-th image display segment are determined, wherein v and w are different natural numbers.

[0109] When the data voltage corresponding to the third data signal is less than the data voltage corresponding to the fourth data signal, the second calculation driving current Ids corresponding to the fourth data signal in the w+1 frame image display segment is detected during the idle period Tb between the v+1 frame image display segment and the v+2 frame image display segment.

[0110] It should be noted that the data voltage of the fourth data signal and the second data signal are the same reference data signal, and the corresponding data voltages are the same. The data voltage is the gate-source voltage Vgs of the switch tube M1 driven by the data signal loaded to the sub-pixel through the data line.

[0111] The current difference ΔIds between the first calculation driving current Ids1 and the second calculation driving current Ids2 is determined, and a corresponding compensation signal is determined according to the current difference ΔIds. It can be understood that the current difference ΔIds is the current difference caused by the hysteresis effect of the driving switch tube M1.

[0112] According to the relationship between the data signal Data and the driving current Ids in formula (1), formula (2) is obtained, so that the source-drain voltage Vgs corresponding to the second data signal and the fourth data signal should be calculated and determined to compensate the signal Vdata2.

[0113]

[0114] It can be seen that by providing the corresponding compensation signal Vdata2 in response to different data signals, the driving current difference ΔIds caused by the hysteresis effect of the driving switch tube M1 can be compensated by changing the data signal Vdata.

[0115] For any sub-pixel, the above steps may be performed for each data voltage in the grayscale brightness range of 0-255 to obtain a corresponding compensation signal Vdatac, thereby forming a compensation data table corresponding to the figure.

[0116] In one embodiment of the present application, the compensation data table can be updated during the idle period Tb or the predetermined time during the image display process of the display device 100, that is, the sensing circuit 16 does not perform the detection of the driving current Ids in each idle period during the image display process of the display device, but can perform the driving current Ids detection during the idle period of image display of the display device, such as the lock screen period, or the predetermined time period, for example, the driving current Ids detection is performed every 3 months or other time period, so as to update the compensation data table to prevent the change of the compensation data due to the aging drift of the driving transistor M1 and the control transistor M2, thereby ensuring that the compensation for the change of the driving current Ids caused by the hysteresis characteristics of the driving transistor M1 is more accurate.

[0117] In this embodiment, the data signal is compensated to improve the afterimage problem that the driving current Ids cannot be accurately loaded to the light emitting element OLED due to the hysteresis effect of the driving switch tube M1, thereby ensuring the accuracy of image display.

[0118] It should be understood that the application of the present invention is not limited to the above examples. For ordinary technicians in this field, improvements or changes can be made based on the above description. All these improvements and changes should fall within the scope of protection of the claims attached to the present invention.

Claims

1. A display panel, wherein a display area of ​​the display panel comprises a plurality of sub-pixels arranged in an array, wherein the sub-pixels are used to perform image display, wherein: The sub-pixel includes a driving circuit, a sensing circuit and a light-emitting element, wherein the driving circuit is connected to a power supply terminal and the light-emitting element, and the driving circuit is used to receive a data signal. The driving circuit converts a driving voltage provided by the power supply terminal into a driving current according to the data signal and transmits the driving current to the light-emitting element to drive the light-emitting element to emit light to perform image display, wherein the sensing circuit is used to sense the magnitude of the driving current in an idle period between two adjacent frames of image display period, and determine a compensation signal for each of the data signals according to the magnitude of the driving current, and the compensation signal is used to compensate for the data signal, wherein the compensation signal is stored in a compensation data table corresponding to the data signal, and determining the compensation signal corresponding to the data signal includes: a reference data signal corresponding to any v+1 frame image period loaded into the sub-pixel Number, wherein the reference data signal corresponds to the data signal, and if the data voltage corresponding to the data signal in the vth frame image period is greater than the data voltage corresponding to the reference data signal, the sensing circuit is used to sense a first calculation driving current transmitted to the light-emitting element in the v+1th frame image display segment corresponding to the reference data signal; corresponding to the reference data signal loaded to the sub-pixel in any w+1th frame image period, if the data voltage corresponding to the data signal in the wth frame image period is less than the data voltage corresponding to the reference data signal, the sensing circuit is used to sense a second calculation driving current transmitted to the light-emitting element in the w+1th frame image display segment corresponding to the reference data signal; determine the current difference between the first calculation driving current and the second calculation driving current, and determine a compensation signal corresponding to the reference data signal according to the current difference.

2. The display panel according to claim 1, characterized in that: The compensation signal is loaded to the sub-pixel before the data signal is input to the sub-pixel; or, the compensation signal is loaded to the sub-pixel together with the data signal during a frame image display period.

3. The display panel according to claim 2, characterized in that: The sensing circuit is used to construct the compensation data table, which includes multiple data signals and the compensation signals corresponding to the data signals, and the compensation data table also includes a change trend of the data signal, wherein the change trend includes the size change between the data signal loaded during a frame image display period before loading the data signal and the data signal.

4. The display panel according to claim 3, characterized in that: The sensing circuit senses the first calculation driving current corresponding to the reference data signal in an idle period between the v+1th frame image display segment and the v+2th frame image display segment; The second calculation driving current under the reference data signal is sensed by the sensing circuit during an idle period between the w+1th frame image display segment and the w+2th frame image display segment.

5. The display panel according to claim 3, characterized in that: The data signal loaded to the sub-pixel during the h-th image display period is acquired before the h+1-th image display period, and the compensation signal is determined from the compensation data table according to the change trend of the data signal loaded to the sub-pixel during the h-th image display period to the data signal loaded to the sub-pixel during the h+1-th image display period and the data signal.

6. The display panel according to claim 3, characterized in that: The sub-pixel also includes a compensation circuit, which obtains a data signal loaded to the sub-pixel during the h-th image display period before the h+1-th image display period, determines the compensation signal from the compensation data table according to a change trend of the data signal loaded to the sub-pixel during the h+1-th image display period to the data signal loaded to the sub-pixel during the h-th image display period and the data signal, and loads the compensation signal to the sub-pixel through the compensation circuit during an idle period between the h+1-th image display period and the h-th image display period.

7. The display panel according to claim 6, characterized in that: The compensation circuit includes a compensation scanning line, a first compensation switch tube, a second compensation switch tube and a compensation capacitor. The compensation control end of the first compensation switch tube is connected to the compensation scan line, the first compensation conductive end of the first compensation switch tube is connected to the data line, the second compensation conductive end of the first compensation switch tube is connected to the compensation driving end of the second compensation switch tube, the second compensation driving end of the second compensation switch tube is connected to the light-emitting element, the first compensation driving end of the second compensation switch tube is connected to the power supply end, and the compensation capacitor is connected between the compensation driving end of the second compensation switch tube and the power supply end; The compensation scan line is used to load a compensation scan signal from the compensation scan line during an idle period between the h-th frame image display period and the h+1-th frame image display period, so as to control the compensation signal to be transmitted from the data line through the first compensation switch tube, the second compensation switch tube and the compensation capacitor and loaded to the light-emitting element.

8. A display device, characterized in that: The display device comprises a frame and a display panel as claimed in any one of claims 1 to 7, wherein the display panel is fixed in the frame.

9. An image display method of a display panel according to any one of claims 1 to 7, characterized in that: include: For any sub-pixel, in an idle period before the h-th frame image display period, determine the magnitude of the data signal during the h-th frame image display period and the data signal during the h+1-th frame image display period; Acquire a compensation signal corresponding to the data signal of the h+1th frame image display period from the compensation data table, wherein the compensation signal is coordinated with the data signal to compensate the sub-pixel to perform image display; Among them, the compensation data table includes multiple data signals and compensation signals corresponding to the data signals, and the compensation data table also includes a change trend of the data signal, wherein the change trend includes the size change of the data signal loaded during a frame image display period before loading the data signal and the data signal.

Images