A solar cell, a manufacturing method and a photovoltaic module

Abstract

The present invention relates to a solar cell, a manufacturing method and a photovoltaic module, in which a silicon substrate has a first surface and a second surface, the first surface and the second surface are arranged opposite to each other; a first transmission layer is arranged on at least one of the first surface and the second surface, the first transmission layer includes a polycrystalline silicon layer; the polycrystalline silicon layer of the first transmission layer has an amorphous silicon region of the first transmission layer; the amorphous silicon region of the first transmission layer is located at least part of the surface of the polycrystalline silicon layer of the first transmission layer away from the silicon substrate; a carrier collection layer is arranged on the first transmission layer, and at least part of the carrier collection layer is in contact with the amorphous silicon region of the first transmission layer. Since the amorphous silicon region can achieve more reasonable energy band matching and reduce contact resistance, the solar cell can effectively convert sunlight into electrical energy, thereby improving the photoelectric conversion efficiency of the solar cell.

Description

Technical Field

[0001] The present invention relates to the field of solar photovoltaic technology, and in particular to a solar cell, a manufacturing method and a photovoltaic module. Background Art

[0002] Solar cells are devices that directly convert light energy into electrical energy. In a solar cell, a photogenerated carrier transport layer and a photogenerated carrier collection layer need to be made on the silicon substrate of the cell to guide the carriers out to generate electrical energy. At present, the contact resistance will increase after the photogenerated carrier collection layer forms contact with the polysilicon in the photogenerated carrier transport layer. Therefore, the solar cells in the prior art still have the defect of large contact resistance, which affects the efficiency of the solar cell. Summary of the invention

[0003] In view of this, the present invention proposes a solar cell, a manufacturing method and a photovoltaic module, aiming to partially or completely solve the technical problem that the existing solar cells have large contact resistance, which affects the efficiency of the solar cells.

[0004] To achieve the above object, the technical solution of the present invention is achieved as follows:

[0005] In a first aspect, an embodiment of the present invention provides a solar cell, which includes a silicon substrate, a first transmission layer, and a carrier collection layer; the silicon substrate has a first surface and a second surface, and the first surface is arranged opposite to the second surface; the first transmission layer is provided on at least one of the first surface and the second surface, and the first transmission layer includes a polycrystalline silicon layer; the polycrystalline silicon layer of the first transmission layer has an amorphous silicon region of the first transmission layer; the amorphous silicon region of the first transmission layer is located at least a portion of the surface of the polycrystalline silicon layer of the first transmission layer away from the silicon substrate; the carrier collection layer is arranged on the first transmission layer, and at least a portion of the carrier collection layer is in contact with the amorphous silicon region of the first transmission layer.

[0006] Optionally, the solar cell further includes a second transmission layer; the first surface of the silicon substrate is provided with the first transmission layer and the second transmission layer, respectively, and the first transmission layer and the second transmission layer are arranged at an interval.

[0007] Optionally, the solar cell further includes a second transmission layer; the first surface of the silicon substrate is provided with the first transmission layer, and the second surface of the silicon substrate is provided with the second transmission layer.

[0008] Optionally, in the thickness direction of the solar cell, the thickness of the amorphous silicon region accounts for 3% to 30% of the thickness of the polycrystalline silicon layer.

[0009] Optionally, in the thickness direction of the solar cell, the thickness of the amorphous silicon region ranges from 2 nm to 30 nm.

[0010] Optionally, perpendicular to the thickness direction of the solar cell, in a unit area where the carrier collection layer is in direct contact with the first transport layer, the area of ​​the amorphous silicon region accounts for 10% to 90% of the area of ​​the polycrystalline silicon layer.

[0011] Optionally, a surface of the polysilicon layer of the first transmission layer facing away from the silicon substrate is provided with an etched region, and the etched region is provided with the amorphous silicon region.

[0012] Optionally, the amorphous silicon region has a first doping element and / or a second doping element, the polycrystalline silicon layer has the first doping element, and the doping concentration of the amorphous silicon region is greater than the doping concentration of the polycrystalline silicon layer.

[0013] Optionally, the doping concentration of the amorphous silicon region is in the range of 3×10 19 Number of atoms / cm 3 Up to 7×10 19 Number of atoms / cm 3 .

[0014] Optionally, the amorphous silicon region is provided with particles.

[0015] Optionally, the carrier collection layer also includes a transparent conductive layer, which is connected to at least a portion of the surface of the polycrystalline silicon layer facing away from the silicon substrate, at least a portion of the surface of the amorphous silicon region facing away from the silicon substrate, and at least a portion of the surface of the second transport layer facing away from the silicon substrate.

[0016] Optionally, the end portion of the first transmission layer and the end portion opposite to the second transmission layer are stacked to form a stacked portion; the end portion of the first transmission layer is located between the end portion opposite to the second transmission layer and the first surface; the carrier collection layer also includes a transparent conductive layer, the transparent conductive layer is at least connected to a portion of the surface of the first transmission layer facing away from the silicon substrate, and at least connected to a portion of the surface of the second transmission layer facing away from the silicon substrate, the transparent conductive layer has a second opening, and the second opening is used to disconnect the electrical connection between the first transmission layer and the second transmission layer.

[0017] Optionally, an isolation region is provided between the first transmission layer and the second transmission layer; the carrier collection layer further comprises a transparent conductive layer, the transparent conductive layer being connected to at least a portion of the surface of the first transmission layer facing away from the silicon substrate, and being connected to at least a portion of the surface of the second transmission layer facing away from the silicon substrate, the transparent conductive layer having a third opening, and the third opening being used to disconnect the electrical connection between the first transmission layer and the second transmission layer.

[0018] Optionally, the second transmission layer includes a polycrystalline silicon layer; the polycrystalline silicon layer of the second transmission layer has an amorphous silicon region of the second transmission layer; the amorphous silicon region of the second transmission layer is located at least part of the surface of the polycrystalline silicon layer of the second transmission layer away from the silicon substrate; the carrier collection layer is arranged on the second transmission layer, and at least part of the carrier collection layer is in contact with the amorphous silicon region of the second transmission layer.

[0019] Optionally, the end portion of the first transmission layer and the end portion opposite to the second transmission layer are stacked to form a stacked portion; the end portion of the first transmission layer is located between the end portion opposite to the second transmission layer and the first surface; the second transmission layer includes a stack of an intrinsic amorphous silicon region and a doped amorphous silicon region; and the doped amorphous silicon region covering the end portion of the first transmission layer has a hole structure.

[0020] Optionally, the doped amorphous silicon region having the hole structure has a width of 0.1 um to 20 um in an extension direction of the first surface of the silicon substrate.

[0021] Optionally, in a top view of the solar cell, the hole structure has a shape of at least one of a circle, an ellipse, and an irregular shape.

[0022] Optionally, the carrier collection layer is disposed on the first transport layer, and the carrier collection layer is in contact with the entire amorphous silicon region of the first transport layer.

[0023] Optionally, when the carrier collection layer is a stacked combination of a transparent conductive layer and a metal electrode layer, the transparent conductive layer is closer to the silicon substrate, and in the thickness direction of the solar cell, the projection of the transparent conductive layer on the surface of the silicon substrate covers all the amorphous silicon regions of the first transmission layer, and the projection of the metal electrode layer on the surface of the silicon substrate covers at least part of the amorphous silicon region of the first transmission layer; or, when the carrier collection layer is a metal electrode layer, in the thickness direction of the solar cell, the projection of the metal electrode layer on the surface of the silicon substrate covers all the amorphous silicon regions of the first transmission layer.

[0024] In a second aspect, an embodiment of the present invention provides a method for manufacturing a solar cell, the method comprising the following steps: providing a silicon substrate; the silicon substrate having a first surface and a second surface, the first surface being arranged opposite to the second surface; forming a first transmission layer on at least one of the first surface and the second surface, the first transmission layer comprising a polycrystalline silicon layer; forming an amorphous silicon region of the first transmission layer on at least a portion of the surface of the polycrystalline silicon layer of the first transmission layer away from the silicon substrate; forming a carrier collection layer on the first transmission layer, at least a portion of the carrier collection layer being in contact with the amorphous silicon region of the first transmission layer.

[0025] In a third aspect, an embodiment of the present invention provides a photovoltaic assembly, comprising a cover plate, a back plate, and a solar cell disposed between the cover plate and the back plate; the solar cell comprises the solar cell as described above.

[0026] In the solar cell of the present invention, at least part of the carrier collection layer is arranged on the amorphous silicon region and contacts the amorphous silicon region. Since the work function difference between the amorphous silicon region and the carrier collection layer is smaller than the work function difference between the polycrystalline silicon layer and the carrier collection layer, that is, the contact barrier between the amorphous silicon region and the carrier collection layer is smaller than the contact barrier between the polycrystalline silicon layer and the carrier collection layer, the contact resistance between the amorphous silicon region and the carrier collection layer is smaller than the contact resistance between the polycrystalline silicon layer and the carrier collection layer, the amorphous silicon region can achieve more reasonable energy band matching, reduce contact resistance, and enable the solar cell to effectively convert sunlight into electrical energy, thereby improving the photoelectric conversion efficiency of the solar cell.

[0027] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for describing the embodiments are briefly introduced below.

[0029] Figures 1 to 12 A schematic diagram showing the steps of preparing a solar cell in an embodiment of the present invention is shown;

[0030] Fig.13 A schematic diagram of an electrochemical capacitance voltage test of a solar cell in an embodiment of the present invention;

[0031] Fig.14 A transmission electron microscope test image 1 of a solar cell according to an embodiment of the present invention;

[0032] Fig.15 A second transmission electron microscope test image of a solar cell according to an embodiment of the present invention;

[0033] Fig.16 It is a schematic structural diagram of a plane where particles of a solar cell are buried in an etched area in an embodiment of the present invention;

[0034] Fig.17 A schematic diagram of the structure of a solar cell particle in an embodiment of the present invention Figure 1 ;

[0035] Fig.18 A schematic diagram of the structure of a solar cell particle in an embodiment of the present invention Figure 2 ;

[0036] Fig.19 Schematic diagram of the structure of a solar cell in an embodiment of the present invention.

[0037] Description of reference numerals:

[0038] 10-silicon substrate; 11-first surface; 12-second surface; 13-first region; 14-second region;

[0039] 20-first transmission layer; 21-first passivation layer; 22-polysilicon layer; 24-particles; 25-mask; 26-amorphous silicon region; 27-etching region;

[0040] 30 - second transmission layer; 31 - second passivation layer; 32 - second doping layer; 33 - area where the hole structure is located;

[0041] 40-transparent conductive layer;

[0042] 50- laminated part;

[0043] 61 - first electrode; 62 - second electrode; 70 - third passivation layer; 80 - anti-reflection layer;

[0044] 91 - first opening; 92 - second opening. DETAILED DESCRIPTION

[0045] The exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can also be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided in order to enable a more thorough understanding of the present invention and to enable the scope of the present invention to be fully communicated to those skilled in the art.

[0046] Reference Figures 1 to 12As shown, it shows a schematic diagram of the preparation steps of a solar cell provided by an embodiment of the present invention. The embodiment of the present invention discloses a solar cell, the solar cell comprising a silicon substrate 10, a first transmission layer 20, and a carrier collection layer; the silicon substrate 10 has a first surface 11 and a second surface 12, and the first surface 11 is arranged opposite to the second surface 12; at least one surface of the first surface 11 and the second surface 12 is provided with a first transmission layer 20, and the first transmission layer 20 comprises a polycrystalline silicon layer 22; the polycrystalline silicon layer 22 of the first transmission layer 20 has an amorphous silicon region 26 of the first transmission layer 20; the amorphous silicon region 26 of the first transmission layer 20 is located at least a portion of the surface of the polycrystalline silicon layer 22 of the first transmission layer 20 away from the silicon substrate 10; the carrier collection layer is arranged on the first transmission layer 20, and at least a portion of the carrier collection layer is in contact with the amorphous silicon region 26 of the first transmission layer 20.

[0047] Specifically, in the solar cell, one of the first surface 11 and the second surface 12 is the front side of the silicon substrate 10 , and the other of the first surface 11 and the second surface 12 is the back side of the silicon substrate 10 .

[0048] Providing the first transmission layer 20 on at least one of the first surface 11 and the second surface 12 refers to the following three situations: the first situation is that the first transmission layer 20 is provided on the first surface 11; the second situation is that the first transmission layer 20 is provided on the second surface 12; the third situation is that the first transmission layer 20 is provided on the first surface 11 and the second surface 12.

[0049] In the embodiment of the present application, at least part of the carrier collection layer is disposed on the amorphous silicon region 26 and is in contact with the amorphous silicon region 26. Since the work function difference between the amorphous silicon region 26 and the carrier collection layer is smaller than the work function difference between the polycrystalline silicon layer 22 and the carrier collection layer, that is, the contact barrier between the amorphous silicon region 26 and the carrier collection layer is smaller than the contact barrier between the polycrystalline silicon layer 22 and the carrier collection layer, the contact resistance between the amorphous silicon region 26 and the carrier collection layer is smaller than the contact resistance between the polycrystalline silicon layer 22 and the carrier collection layer, and the amorphous silicon region 26 can achieve more reasonable energy band matching, reduce contact resistance, and enable the solar cell to effectively convert sunlight into electrical energy, thereby improving the photoelectric conversion efficiency of the solar cell.

[0050] Optionally, after the laser acts on the polycrystalline silicon layer 22, at least a portion of the surface of the polycrystalline silicon layer 22 facing away from the silicon substrate 10 is converted into amorphous silicon to form the amorphous silicon region 26, so as to achieve the purpose of increasing the photoelectric conversion efficiency of the solar cell through the amorphous silicon region 26.

[0051] Optionally, the carrier collection layer can be specifically configured according to usage requirements. For example, the carrier collection layer includes: a transparent conductive layer 40 and a metal electrode layer, at least one layer or a stacked combination thereof.

[0052] Optionally, the metal electrode layer can be specifically configured according to usage requirements. For example, the metal electrode layer includes: at least one layer or a stacked combination of a conductive paste layer, a metal layer, and a metal alloy layer.

[0053] Optionally, the metal layer may also be specifically configured according to usage requirements. For example, the metal layer includes: a single-layer structure formed by a single metal, or a multi-layer structure of the same metal material, or a multi-layer structure of different metal materials.

[0054] Optionally, the solar cell further includes a second transmission layer 30 ; the first surface 11 of the silicon substrate 10 is provided with a first transmission layer 20 and a second transmission layer 30 , respectively, and the first transmission layer 20 and the second transmission layer 30 are arranged at intervals.

[0055] In the above structure of the embodiment of the present application, the solar cell is a back contact cell (BC cell), that is, the electrode is arranged on the back side, and there is no electrode on the front side. The material of the second transmission layer 30 in the solar cell is specifically set according to the use requirements. For example, the second transmission layer 30 includes an intrinsic amorphous silicon region and a doped amorphous silicon region, or the second transmission layer 30 includes a polycrystalline silicon layer and a passivation layer, etc.

[0056] The first surface 11 of the silicon substrate 10 is provided with a first transmission layer 20 and a second transmission layer 30, respectively, and the first transmission layer 20 and the second transmission layer 30 are arranged at intervals; the intervals are arranged as follows: one is that in the plane extension direction of the silicon substrate 10, that is, in the first direction A, the first transmission layer 20 and the second transmission layer 30 are alternately arranged at intervals on the plane of the silicon substrate 10, and the two are in contact or non-contact in the plane extension direction of the silicon substrate 10. The other is that in the plane extension direction of the silicon substrate 10, that is, in the first direction A, the first transmission layer 20 and the second transmission layer 30 are alternately arranged at intervals on the plane of the silicon substrate 10, and the two partially overlap in the thickness direction of the silicon substrate 10 (second direction B). The first transmission layer 20 and the second transmission layer 30 are of different types, one of the first transmission layer 20 and the second transmission layer 30 is an electron transmission layer, and the other of the first transmission layer 20 and the second transmission layer 30 is a hole transmission layer.

[0057] Optionally, the solar cell further includes a second transmission layer 30 ; the first surface 11 of the silicon substrate 10 is provided with the first transmission layer 20 , and the second surface 12 of the silicon substrate 10 is provided with the second transmission layer 30 .

[0058] In the above structure of the embodiment of the present application, the solar cell is a double-sided solar cell, that is, electrodes are arranged on both the front and back sides. The material of the second transmission layer 30 in the solar cell is also set according to the specific use requirements, and the embodiment of the present application does not limit this.

[0059] Optionally, in the thickness direction of the solar cell, the thickness of the amorphous silicon region 26 accounts for 3% to 30% of the thickness of the polycrystalline silicon layer 22 .

[0060] Reference Fig.12 As shown, the thickness direction of the solar cell is the second direction B. When the thickness of the amorphous silicon region 26 accounts for 3% to 30% of the thickness of the polysilicon layer 22 , the amorphous silicon region 26 can achieve more reasonable energy band matching and reduce contact resistance.

[0061] In actual applications, the percentage of the thickness of the amorphous silicon region 26 to the thickness of the polycrystalline silicon layer 22 is set according to specific usage requirements. For example, the thickness of the amorphous silicon region 26 accounts for at least one of 3%, 5%, 7%, 9%, 10%, 11%, 13%, 18%, 20%, 22%, 24%, 26%, 28%, and 30% of the thickness of the polycrystalline silicon layer 22.

[0062] Optionally, in the thickness direction of the solar cell, the thickness range of the amorphous silicon region 26 is 2nm to 30nm. Preferably, the thickness range of the amorphous silicon region 26 is 4nm to 15um. Further preferably, the thickness range of the amorphous silicon region 26 is 5nm to 10um. It is understood that in the thickness direction of the solar cell, the thickness range of the amorphous silicon region 26 is set according to the use requirements, and the thickness of the amorphous silicon region 26 is related to the energy of the laser. For example, the thickness of the amorphous silicon region 26 is 2nm, 3nm, 4nm, 5nm, 7nm, 9nm, 10nm, 13nm, 15nm, 18nm, 20nm, 22nm, 24nm, 26nm, 28nm, 30nm.

[0063] Optionally, perpendicular to the thickness direction of the solar cell, in a unit area with only the first transmission layer 20 and no other transmission layers, the area of ​​the amorphous silicon region 26 accounts for 10% to 90% of the area of ​​the polysilicon layer 22. Preferably, the area of ​​the amorphous silicon region 26 accounts for 50% to 90% of the area of ​​the polysilicon layer 22. Further preferably, the area of ​​the amorphous silicon region 26 accounts for 70% to 90% of the area of ​​the polysilicon layer 22. In the embodiment of the present application, when the area of ​​the amorphous silicon region 26 accounts for the above range of the area of ​​the polysilicon layer 22, the amorphous silicon region 26 can effectively reduce the contact resistance, so that the solar cell can effectively convert sunlight into electrical energy and improve the photoelectric conversion efficiency of the solar cell. Among them, the unit area is a test area, and the test is performed using a test instrument such as a TEM. For example, the unit area can be an area with a length of 1um and a width of 1um, an area with a length of 500nm and a width of 500nm, or an area with a length of 100nm and a width of 100nm. The size of the unit area (test area) here is not specifically limited and can be implemented according to actual needs.

[0064] In actual applications, the percentage of the area of ​​the amorphous silicon region 26 to the area of ​​the polycrystalline silicon layer 22 is set according to specific usage requirements. For example, the area of ​​the amorphous silicon region 26 accounts for at least one of 10%, 15%, 20%, 25%, 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, 75%, 80%, 85%, and 90% of the area of ​​the polycrystalline silicon layer 22.

[0065] Optionally, on the first transport layer 20, in the region where the carrier collection layer is used to collect carriers generated in the first transport layer 20, the surface of the polycrystalline silicon layer 22 of the first transport layer 20 facing away from the silicon substrate 10 is provided with an etched region 27, and the etched region 27 is provided with an amorphous silicon region 26. The etched region 27 is a region formed when the polycrystalline silicon layer 22 is laser ablated, and the etched region 27 is provided with an amorphous silicon region 26. That is, the surface of the polycrystalline silicon layer 22 of the first transport layer 20 facing away from the silicon substrate 10 is provided with an etched region 27, and the etched region 27 is provided with an amorphous silicon region 26, wherein the etched region 27 is arranged in a region perpendicular to the thickness direction of the solar cell and in direct contact with the carrier collection layer.

[0066] Optionally, perpendicular to the thickness direction of the solar cell, the area of ​​the amorphous silicon region 26 accounts for 15% to 95% of the area of ​​the etched region 27. Preferably, the area of ​​the amorphous silicon region 26 accounts for 50% to 95% of the area of ​​the etched region 27. Further preferably, the area of ​​the amorphous silicon region 26 accounts for 85% to 95% of the area of ​​the etched region 27. In the embodiment of the present application, when the area of ​​the amorphous silicon region 26 accounts for the above range of the area of ​​the etched region 27, the amorphous silicon region 26 can effectively reduce the contact resistance and improve the photoelectric conversion efficiency of the solar cell.

[0067] In actual applications, the percentage of the area of ​​the amorphous silicon region 26 to the area of ​​the etching region 27 is set according to specific usage requirements. For example, the area of ​​the amorphous silicon region 26 accounts for at least one of 15%, 20%, 25%, 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, 75%, 80%, 85%, 90%, and 95% of the area of ​​the etching region 27.

[0068] Optionally, perpendicular to the thickness direction of the solar cell, the area of ​​the etched region 27 accounts for 90% or less of the area of ​​the polysilicon layer 22. The plane where the etched region 27 is located is used to connect with the transparent conductive layer 40. When the area of ​​the etched region 27 accounts for the above range of the area of ​​the polysilicon layer 22, the contact area requirement of the first transmission layer 20 and the transparent conductive layer 40 is met.

[0069] Optionally, the plane where the etched region 27 is located is lower than or flush with the plane of the polysilicon layer 22 away from the silicon substrate 10. In this case, the etched region 27 can increase the back reflection of the front transmitted light, thereby improving the light absorption efficiency of the solar cell.

[0070] In the case where the polysilicon layer 22 is provided with an etched region 27, the plane where the etched region 27 is located is lower than the plane where the polysilicon layer 22 is away from the silicon substrate 10, which can reduce the parasitic absorption of the polysilicon layer 22 and improve the light absorption efficiency. The plane where the etched region 27 is located is flush with the plane where the first transmission layer 20 is away from the silicon substrate 10. Although it is flush, the etched region 27 is provided with an amorphous silicon region 26, which can achieve more reasonable energy band matching, reduce contact resistance, and improve the photoelectric conversion efficiency of the solar cell. Therefore, the solar cell of the embodiment of the present application has the advantage of high light absorption efficiency.

[0071] Optional, see Fig.19 As shown, there is a height difference D between the plane where the etched region 27 is located and the plane where the polysilicon layer 22 is away from the silicon substrate 10, and 0 nm≤D≤100 nm.

[0072] In practical applications, the height difference D between the plane where the etching area 27 is located and the plane where the polysilicon layer 22 is away from the silicon substrate 10 can be selected according to usage requirements. For example, D is 0nm, 1nm, 5nm, 10nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, or 100nm.

[0073] Optionally, the amorphous silicon region 26 has the first doping element and / or the second doping element, and / or the polysilicon layer 22 has the first doping element, and the doping concentration of the doping element in the amorphous silicon region 26 is greater than the doping concentration of the doping element in the polysilicon layer 22. Fig.13 , which shows that the doping concentration of the amorphous silicon region 26 of the first transmission layer 20 is greater than the doping concentration of the polysilicon layer 22, that is, the doping concentration of the amorphous silicon region 26 formed on the first transmission layer 20 after the polysilicon layer 22 is treated by laser is greater than the doping concentration of the polysilicon layer 22 on the first transmission layer 20 that is not treated by laser. For example, when the depth is 15nm, the doping concentration of the amorphous silicon region 26 is 6.5×10 19 Number of atoms / cm 3 Greater than the doping concentration of the polysilicon layer 22 by 4×10 19 Number of atoms / cm 3 For another example, when the depth is 30 nm, the doping concentration of the amorphous silicon region 26 is 5.5×10 19 Number of atoms / cm 3 Greater than the doping concentration of the polysilicon layer 22 by 4×10 19 Number of atoms / cm 3 .

[0074] In the embodiment of the present application, the doping concentration of the amorphous silicon region 26 is greater than the doping concentration of the polysilicon layer 22 , and the doping concentration on the surface of the first transmission layer 20 can be increased to reduce the contact resistance.

[0075] One of the first doping element and the second doping element includes at least one of nitrogen, phosphorus, arsenic, antimony, etc., and the other of the first doping element and the second doping element includes at least one of boron, aluminum, gallium, indium, etc. When the first doping element includes at least one of nitrogen, phosphorus, arsenic, antimony, etc., the polysilicon layer 22 is an N-type doped layer. In some solar cells, such as cells having aluminum oxide and / or silicon nitride as passivation layers, after the laser acts on the second transmission layer 30 to form a carrier collection layer contact opening, the second doping element will remain, so that the amorphous silicon region 26 has the second doping element.

[0076] Optionally, the doping concentration of the amorphous silicon region 26 is in the range of 3×10 19 Number of atoms / cm 3 Up to 7×10 19 Number of atoms / cm 3 .

[0077] In practical applications, the doping concentration of the amorphous silicon region 26 is set according to the specific use requirements. For example, the doping concentration of the amorphous silicon region 26 is 3×10 19 Number of atoms / cm 3 , 3.2×10 19 Number of atoms / cm 3 , 3.4×10 19 Number of atoms / cm 3 , 3.6×10 19 Number of atoms / cm 3 , 3.8×10 19 Number of atoms / cm 3 , 4×10 19 Number of atoms / cm 3 4.2×10 19 Number of atoms / cm 3 , 4.4×10 19 Number of atoms / cm 3 , 4.6×10 19 Number of atoms / cm 3 , 4.8×10 19 Number of atoms / cm 3 , 5×10 19 Number of atoms / cm 3 , 5.2×10 19 Number of atoms / cm 3 , 5.4×10 19 Number of atoms / cm 3, 5.6×10 19 Number of atoms / cm 3 , 5.8×10 19 Number of atoms / cm 3 , 6×10 19 Number of atoms / cm 3 , 6.2×10 19 Number of atoms / cm 3 , 6.4×10 19 Number of atoms / cm 3 , 6.6×10 19 Number of atoms / cm 3 , 6.8×10 19 Number of atoms / cm 3 ,7×10 19 Number of atoms / cm 3 .

[0078] Optionally, the amorphous silicon region 26 is provided with particles 24. In the embodiment of the present application, the provision of the particles 24 can increase the back reflection of the front transmitted light, thereby improving the light absorption efficiency of the solar cell.

[0079] The particles 24 are formed by laser processing.

[0080] Optionally, in a top view of the solar cell, the maximum length of the particle 24 is less than 50 nm; preferably, the maximum length of the particle 24 is less than 20 nm; further preferably, the maximum length of the particle 24 is less than 15 nm; further preferably, the maximum length of the particle 24 is in the range of 5 nm to 10 nm. When the size of the particle 24 is within the above range, the particle 24 can increase the back reflection of the front transmitted light, thereby improving the light absorption efficiency.

[0081] Further, the maximum length of the particles 24 is less than 50 nm, and the light refraction effect is good. Further, the maximum length of the particles 24 is less than 20 nm, and the light refractive index effect is good, and the contact resistance effect is better than that of the particles 24 with a maximum length less than 50 nm. Further, the maximum length of the particles 24 is in the range of 5 nm to 10 nm, and the light refractive index effect and the contact resistance effect are optimal.

[0082] Furthermore, in the top view of the solar cell, the embodiment of the present application does not specifically limit the maximum length value of the particle 24. For example, the maximum length of the particle 24 is 5nm, 5.5nm, 6nm, 6.5nm, 7nm, 8nm, 9nm, 10nm, 11nm, 12nm, 13nm, 14nm, 15nm, 16nm, 17nm, 18nm, 19nm, 20nm, 25nm, 30nm, 35nm, 40nm, 45nm, 50nm, etc.

[0083] Optionally, the amorphous silicon region 26 has a plurality of particles 24; perpendicular to the thickness direction of the solar cell, the area coverage of the particles 24 on the amorphous silicon region 26 is in a range of 0.01% to 60%. When the area coverage of the particles 24 on the amorphous silicon region 26 is within the above range, the particles 24 can increase the back reflection of the front transmitted light, thereby improving the light absorption efficiency of the solar cell.

[0084] Optionally, the particulate matter 24 includes silicon; or, the particulate matter 24 includes silicon and a second doping element, wherein the type of the second doping element included in the particulate matter 24 is different from the type of the first doping element in the polysilicon layer 22 .

[0085] In the embodiment of the present application, a particle 24 is formed after laser etching, and the particle 24 includes silicon. Alternatively, the particle 24 includes silicon and a second doping element, and the second doping element is at least one of the five group elements. The five group elements include at least one of nitrogen, phosphorus, arsenic, antimony, etc. At this time, the first doping element in the polysilicon layer 22 is at least one of the three group elements, and the three group elements include at least one of boron, aluminum, gallium, indium, etc. For example, the doping element included in the particle 24 is boron, and the doping element in the polysilicon layer 22 where the particle 24 is located is phosphorus.

[0086] Optionally, the particles 24 include molten silicon particles. The particles 24 are formed after laser ablation of the second doping layer 32 of the second transmission layer 30, and the particles 24 include molten silicon particles, the silicon particles include silicon element; or the silicon particles include silicon element and a second doping element.

[0087] Optionally, in a top view of the solar cell, the particles 24 are in at least one of a circular shape, an elliptical shape, and an irregular shape.

[0088] Further references Fig.17 , which shows a schematic diagram of the structure of the particles 24 in a circular shape. Fig.18 , which shows a schematic structural diagram of the particle 24 being elliptical.

[0089] Optionally, the particles 24 are buried in the amorphous silicon region 26; and / or, the particles 24 are buried in the polycrystalline silicon layer 22; and / or, part of the particles 24 are buried in the amorphous silicon region 26 and the remaining part is buried in the polycrystalline silicon layer 22; the depth range of the particles 24 buried in the amorphous silicon region 26 away from the plane where the surface of the silicon substrate 10 is located is 0nm to 200nm.

[0090] In the embodiment of the present application, the depth of the particles 24 buried in the amorphous silicon region 26 away from the plane where the surface of the silicon substrate 10 is located is set according to usage requirements. For example, the depth of the particles 24 buried is 0nm, 5nm, 10nm, 40nm, 50nm, 80nm, 100nm, 135nm, 150nm, 160nm, 180nm, and 200nm.

[0091] Optionally, in the thickness direction of the solar cell, 10% to 100% of the particles 24 are buried in the plane of the amorphous silicon region 26 away from the surface of the silicon substrate 10 .

[0092] In the present application, further reference is made to Fig.16 As shown, from top to bottom, in the first figure, 10% of the particles 24 are buried in the amorphous silicon area 26 away from the surface of the silicon substrate 10, and the plane is located; in the second figure, 25% of the particles 24 are buried in the amorphous silicon area 26 away from the surface of the silicon substrate 10, and the plane is located; in the third figure, 50% of the particles 24 are buried in the amorphous silicon area 26 away from the surface of the silicon substrate 10, and the plane is located; in the fourth figure, 75% of the particles 24 are buried in the amorphous silicon area 26 away from the surface of the silicon substrate 10, and the fifth figure shows that 100% of the particles 24 are buried in the amorphous silicon area 26 away from the surface of the silicon substrate 10, and the sixth figure shows that all of the particles 24 are buried in the amorphous silicon area 26 away from the surface of the silicon substrate 10. When 10% to 100% of the particles 24 are buried in the amorphous silicon region 26 away from the plane where the surface of the silicon substrate 10 is located, the particles 24 are buried in the amorphous silicon region 26; or, the particles 24 are buried in the polycrystalline silicon layer 22; or, part of the particles 24 are buried in the amorphous silicon region 26, and the remaining part is buried in the polycrystalline silicon layer 22.

[0093] Optionally, the carrier collection layer also includes a transparent conductive layer 40, which is connected to at least a portion of the surface of the polycrystalline silicon layer 22 facing away from the silicon substrate 10, at least a portion of the surface of the amorphous silicon region 26 facing away from the silicon substrate 10, and at least a portion of the surface of the second transmission layer 30 facing away from the silicon substrate 10.

[0094] Among them, the transparent conductive layer 40 can fully cover and connect the surface of the polysilicon layer 22 away from the silicon substrate 10, that is, the amorphous silicon region 26 in the polysilicon layer 22 is also covered and connected by the transparent conductive layer 40; in addition, the transparent conductive layer 40 can also fully cover and connect the surface of the second transmission layer 30 away from the silicon substrate 10.

[0095] Among them, the transparent conductive layer 40 can also cover and connect a portion of the surface of the polysilicon layer 22 away from the silicon substrate 10, and at the same time, it can also cover and connect a portion of the surface of the amorphous silicon region 26 away from the silicon substrate 10; in addition, the transparent conductive layer 40 can also cover and connect a portion of the surface of the second transmission layer 30 away from the silicon substrate 10.

[0096] The transparent conductive layer 40 (TCO, Transparent Conductive Oxide) has good transparency and conductivity. The transparent conductive layer 40 directly faces the sunlight. The main function of the transparent conductive layer 40 is to allow sunlight to pass through and enter the interior of the battery, while providing a good photogenerated carrier collection layer.

[0097] In the embodiment of the present application, the transparent conductive layer 40 is connected to the portion of the surface of the amorphous silicon region 26 that is away from the silicon substrate 10. Since the work function difference between the amorphous silicon region 26 and the transparent conductive layer 40 is smaller than the work function difference between the polycrystalline silicon layer 22 and the transparent conductive layer 40, that is, the contact barrier between the amorphous silicon region 26 and the transparent conductive layer 40 is smaller than the contact barrier between the polycrystalline silicon layer 22 and the transparent conductive layer 40, the contact resistance between the transparent conductive layer 40 and the amorphous silicon region 26 is smaller than the contact resistance between the transparent conductive layer 40 and the polycrystalline silicon layer 22, which can reduce the contact resistance and effectively improve the photoelectric conversion efficiency of the solar cell.

[0098] Moreover, when the transparent conductive layer 40 is deposited by magnetron sputtering, the amorphous silicon region 26 can enhance the ability of the first transmission layer 20 to resist damage from magnetron sputtering bombardment, avoid damage to the polysilicon layer 22 by magnetron sputtering, and avoid magnetron sputtering bombardment damage affecting the photoelectric conversion efficiency of the solar cell.

[0099] Optionally, an end portion of the first transmission layer 20 and an end portion opposite to the second transmission layer 30 are stacked to form a stacked portion 50; the end portion of the first transmission layer 20 is located between the end portion opposite to the second transmission layer 30 and the first surface 11; the carrier collection layer also includes a transparent conductive layer 40, the transparent conductive layer 40 is at least connected to a portion of the surface of the first transmission layer 20 facing away from the silicon substrate 10, and is at least connected to a portion of the surface of the second transmission layer 30 facing away from the silicon substrate 10, and the transparent conductive layer 40 has a second opening 92, and the second opening 92 is used to disconnect the electrical connection between the first transmission layer 20 and the second transmission layer 30.

[0100] The second opening 92 prevents the N region and the P region from being connected. The second opening 92 can be used for insulating the N region and the P region, and has the advantages of good insulation reliability and insulation effect.

[0101] Optionally, there is an isolation region between the first transmission layer 20 and the second transmission layer 30, the carrier collection layer further includes a transparent conductive layer 40, the transparent conductive layer 40 is at least connected to the portion of the surface of the first transmission layer 20 away from the silicon substrate 10, and at least connected to the portion of the surface of the second transmission layer 30 away from the silicon substrate 10, and the transparent conductive layer 40 has a third opening, and the third opening is used to disconnect the electrical connection between the first transmission layer 20 and the second transmission layer 30. In the above structure of the present application, the third opening also insulates the N region and the P region, which has the advantages of good insulation reliability and insulation effect.

[0102] Optionally, the second transmission layer 30 includes a polycrystalline silicon layer; the polycrystalline silicon layer of the second transmission layer 30 has an amorphous silicon region of the second transmission layer 30; the amorphous silicon region of the second transmission layer 30 is located at least partially on the surface of the polycrystalline silicon layer of the second transmission layer 30 away from the silicon substrate 10; the carrier collection layer is arranged on the second transmission layer 30, and at least part of the carrier collection layer is in contact with the amorphous silicon region of the second transmission layer 30.

[0103] In the embodiment of the present application, the amorphous silicon region of the first transmission layer 20 and the amorphous silicon region of the second transmission layer 30 are in contact with the carrier collection layer respectively. Since the work function difference between the amorphous silicon region 26 and the carrier collection layer is smaller than the work function difference between the polycrystalline silicon layer 22 and the carrier collection layer, that is, the contact barrier between the amorphous silicon region 26 and the carrier collection layer is smaller than the contact barrier between the polycrystalline silicon layer 22 and the carrier collection layer, the contact resistance between the amorphous silicon region 26 and the carrier collection layer is smaller than the contact resistance between the polycrystalline silicon layer 22 and the carrier collection layer. The amorphous silicon region 26 can achieve more reasonable energy band matching and reduce contact resistance, so that the solar cell can effectively convert sunlight into electrical energy and improve the photoelectric conversion efficiency of the solar cell.

[0104] Optionally, the end portion of the first transmission layer 20 is stacked with the end portion opposite to the second transmission layer 30 to form a stacked portion 50; the end portion of the first transmission layer 20 is located between the end portion opposite to the second transmission layer 30 and the first surface 11; the second transmission layer 30 includes a stack of an intrinsic amorphous silicon region and a doped amorphous silicon region; and the doped amorphous silicon region covering the end portion of the first transmission layer 20 has a hole structure.

[0105] In the embodiment of the present application, after the laser acts on the polysilicon layer 22, the doped amorphous silicon region within the heat affected zone of the laser will be affected by the heat to produce holes, and a hole structure of varying sizes will be generated inside the doped amorphous silicon region. The hole structure makes its structure loose, thereby enhancing the insulation between the polysilicon layer 22 and the doped amorphous silicon region, thereby reducing leakage.

[0106] Optionally, the width of the doped amorphous silicon region having the hole structure in the extension direction of the first surface 11 of the silicon substrate 10 is 0.1 um to 20 um (refer to Fig. 9 , which shows a schematic diagram of the region 33 where the hole structure is located in the doped amorphous silicon region). When the width in the embodiment of the present application is within the above range, the electron flow between the first transmission layer 20 and the doped amorphous silicon region can be effectively reduced, thereby reducing leakage.

[0107] It can be understood that the range of the doped amorphous silicon region with a hole structure is set according to usage requirements. For example, the width is 0.1um, 0.3um, 0.5um, 0.7um, 0.9um, 1um, 2um, 3um, 5um, 7um, 9um, 10um, 12um, 14um, 15um, 17um, 18um, and 20um.

[0108] Optionally, in a top view of the solar cell, the hole structure has a shape of at least one of a circle, an ellipse, and an irregular pattern. When the hole structure has a shape of at least one of a circle, an ellipse, and an irregular pattern, the hole structure can enhance insulation and reduce leakage.

[0109] Optionally, a carrier collection layer is disposed on the first transmission layer 20, and the carrier collection layer contacts all amorphous silicon regions 26 of the first transmission layer 20. Carriers in all amorphous silicon regions 26 can be directly guided out longitudinally through the carrier collection layer, which reduces the lateral transmission path of carriers on the carrier collection layer, reduces the transmission resistance, and improves the current transmission efficiency.

[0110] Optionally, when the carrier collection layer is a stacked combination of a transparent conductive layer 40 and a metal electrode layer, the transparent conductive layer 40 is closer to the silicon substrate 10, and in the thickness direction of the solar cell, the projection of the transparent conductive layer 40 on the surface of the silicon substrate 10 covers the entire amorphous silicon region 26 of the first transmission layer 20, and the projection of the metal electrode layer on the surface of the silicon substrate 10 covers at least part of the amorphous silicon region 26 of the first transmission layer 20; or, when the carrier collection layer is a metal electrode layer, in the thickness direction of the solar cell, the projection of the metal electrode layer on the surface of the silicon substrate 10 covers the entire amorphous silicon region 26 of the first transmission layer 20.

[0111] Optionally, when the carrier collection layer is a stacked combination of a transparent conductive layer 40 and a metal electrode layer, the transparent conductive layer 40 is closer to the silicon substrate 10; in the thickness direction of the solar cell, the projection of the metal electrode layer on the surface of the silicon substrate 10 at least covers part of the amorphous silicon region 26 of the first transmission layer 20; or, in the thickness direction of the solar cell, the projection of the metal electrode layer on the surface of the silicon substrate 10 covers all of the amorphous silicon region 26 of the first transmission layer 20. Or, in the thickness direction of the solar cell, the projection of the transparent conductive layer 40 on the surface of the silicon substrate 10 covers at least part of the amorphous silicon region 26 of the first transmission layer 20; or, in the thickness direction of the solar cell, the projection of the transparent conductive layer 40 on the surface of the silicon substrate 10 covers all of the amorphous silicon region 26 of the first transmission layer 20.

[0112] In the embodiment of the present application, when the projection of the metal electrode layer on the surface of the silicon substrate 10 covers at least a portion of the amorphous silicon region 26 of the first transmission layer 20, the carriers in the amorphous silicon region can directly pass vertically through the transparent conductive layer 40 and then be exported through the metal electrode layer, thereby reducing the lateral transmission path of the carriers on the transparent conductive layer 40, reducing the transmission resistance, and improving the current transmission efficiency.

[0113] Furthermore, when the projection of the metal electrode layer on the surface of the silicon substrate 10 covers the entire amorphous silicon region 26 of the first transmission layer 20, the metal electrode layer completely covers the amorphous silicon region, which can further reduce the transmission path of carriers in the amorphous silicon region.

[0114] Optionally, the metal electrode layer includes: at least one layer or a stacked combination of: a conductive paste layer, a metal layer, and a metal alloy layer. The metal layer can also be specifically configured according to the use requirements, for example, the metal layer includes: a single-layer structure formed by a single metal, or a multi-layer structure of the same metal material, or a multi-layer structure of different metal materials.

[0115] Optional, see Figures 1 to 7 As shown, the solar cell further includes a first electrode 61 and a second electrode 62, the transparent conductive layer 40 is located at the first transmission layer 20 and is provided with the first electrode 61 on the surface facing away from the silicon substrate 10, and the transparent conductive layer 40 is located at the second transmission layer 30 and is provided with the second electrode 62 on the surface facing away from the silicon substrate 10. The first electrode 61 and the transparent conductive layer 40 together form a carrier collection layer of the first transmission layer 20. The second electrode 62 and the transparent conductive layer 40 together form a carrier collection layer of the second transmission layer 30. At this time, the carriers in the amorphous silicon region on the first transmission layer 20 can directly pass through the transparent conductive layer 40 vertically and then be led out through the first electrode 61, which reduces the lateral transmission path of the carriers on the transparent conductive layer 40, reduces the transmission resistance, and improves the current transmission efficiency.

[0116] Furthermore, when an amorphous silicon region is provided on the second transmission layer 30, the carriers in the amorphous silicon region on the first transmission layer 20 can directly pass vertically through the transparent conductive layer 40 and then be exported through the second electrode 62, thereby reducing the lateral transmission path of the carriers on the transparent conductive layer 40, reducing the transmission resistance, and improving the current transmission efficiency.

[0117] Further, see Fig. 9 and Fig.12 As shown, the first electrode 61 and the second electrode 62 are both arranged parallel to the extension direction of the laminated portion 50 , and are spaced apart in the first direction A.

[0118] Optional, see Figures 1 to 12 As shown, the solar cell further includes an anti-reflection layer 80 and a third passivation layer 70 , and the anti-reflection layer 80 and the third passivation layer 70 are sequentially stacked and arranged on the second surface 12 of the solar cell.

[0119] In the solar cell of the embodiment of the present application, the first transmission layer 20 includes a stacked polycrystalline silicon layer 22 and an amorphous silicon region 26; the polycrystalline silicon layer 22 is provided on the first surface 11 of the silicon substrate 10; the amorphous silicon region 26 is located at least part of the surface of the polycrystalline silicon layer 22 away from the silicon substrate 10, and the amorphous silicon region 26 is formed by laser; the laser causes the polycrystalline silicon layer 22 to form the amorphous silicon region 26 on at least part of the surface away from the silicon substrate 10. Since the work function difference between the amorphous silicon region 26 and the carrier collection layer is smaller than the work function difference between the polycrystalline silicon layer and the carrier collection layer, that is, the contact barrier between the amorphous silicon region and the carrier collection layer is smaller than the contact barrier between the polycrystalline silicon layer and the carrier collection layer, the contact resistance between the amorphous silicon region 26 and the carrier collection layer is smaller than the contact resistance between the polycrystalline silicon layer 22 and the carrier collection layer, and the amorphous silicon region 26 can achieve more reasonable energy band matching, reduce contact resistance, and enable the solar cell to effectively convert sunlight into electrical energy, thereby improving the photoelectric conversion efficiency of the solar cell.

[0120] Furthermore, in solar cells, the advantages of crystalline silicon amorphous silicon heterojunction contact are good passivation performance and high open circuit voltage, which are suitable as the emitter of solar cells, i.e., the P region. The advantages of tunneling silicon oxide passivation contact are lower contact resistance, which are suitable as the back field of solar cells, i.e., the N region. Therefore, hybrid solar cells using crystalline silicon amorphous silicon heterojunction contact and tunneling silicon oxide passivation contact have higher potential in terms of photoelectric conversion efficiency. Among them, the P region can be understood as an amorphous layer containing boron, and the N region can be understood as a polycrystalline layer containing phosphorus; when the P region adopts a crystalline silicon amorphous silicon heterojunction contact, a transparent conductive layer 40 is generally deposited on the surface of the P region and the N region away from the silicon substrate 10 (the transparent conductive layer 40 is, for example, an indium tin oxide material layer, and the transparent conductive layer 40 is a photogenerated carrier collection layer), and the transparent conductive layer 40 is in contact with the amorphous silicon region 26 of the N region. From multiple aspects, the contact resistance of the N region can be reduced. One of them is that the doping concentration of the doping element in the amorphous silicon region of the N region is greater than the doping concentration of the doping element in the polycrystalline silicon layer of the N region. Because the doping concentration is increased, the transparent conductive layer 40 can be made The contact resistance with the N region is reduced. Secondly, there is an amorphous silicon region in the polycrystalline silicon layer of the N region, because the energy band matching between the transparent conductive layer and the amorphous is more reasonable than the energy band matching between the transparent conductive layer and the polycrystalline (specifically, since the work function difference between the amorphous silicon region and the transparent conductive layer is less than the work function difference between the polycrystalline silicon layer and the transparent conductive layer, that is, the contact barrier between the amorphous silicon region and the transparent conductive layer is less than the contact barrier between the polycrystalline silicon layer and the transparent conductive layer, the energy band matching between the transparent conductive layer and the amorphous is more reasonable than the energy band matching between the transparent conductive layer and the polycrystalline); and, the transparent conductive layer 40 is prevented from damaging the polycrystalline silicon layer 22 on the N region by using a magnetron sputtering deposition method. Therefore, the solar cell has the advantage of high photoelectric conversion efficiency.

[0121] The present invention also provides a method for manufacturing a solar cell, the method comprising the following steps, and referring to Figures 1 to 12 As shown:

[0122] S01. Provide a silicon substrate 10. The silicon substrate 10 has a first surface 11 and a second surface 12. The first surface 11 and the second surface 12 are arranged opposite to each other.

[0123] In this step, the provided silicon substrate 10 needs to be polished and cleaned to remove the cutting damage layer on the first surface 11 and the second surface 12 of the silicon substrate 10, and the polishing morphology of the first surface 11 and the second surface 12 is regulated by controlling the polishing and cleaning temperature, time and solution concentration.

[0124] S02 , forming a first transmission layer 20 on at least one of the first surface 11 and the second surface 12 , wherein the first transmission layer 20 includes a polysilicon layer 22 .

[0125] In this step, a first transmission layer 20 and a second transmission layer 30 are arranged on the first surface 11, and an end portion of the first transmission layer 20 and an end portion opposite to the second transmission layer 30 are stacked to form a stacking portion 50; the end portion of the first transmission layer 20 is located between the end portion opposite to the second transmission layer 30 and the first surface 11, and the polysilicon layer 22 is connected to the end portion opposite to the second transmission layer 30.

[0126] S03, forming an amorphous silicon region of the first transmission layer on at least a portion of the surface of the polysilicon layer of the first transmission layer away from the silicon substrate.

[0127] In this step, laser processing is used to selectively remove part of the second transmission layer 30 on the polysilicon layer 22 to form a first opening 91. The laser processes the polysilicon at the first opening 91 to convert the surface polysilicon into amorphous silicon to form an amorphous silicon region 26. The laser used in the laser processing is a picosecond laser.

[0128] S04. Form a carrier collection layer on the first transport layer, wherein at least a portion of the carrier collection layer is in contact with the amorphous silicon region of the first transport layer.

[0129] Furthermore, in this embodiment, the carrier collection layer is a transparent conductive layer 40 .

[0130] The solar cell manufactured by the solar cell manufacturing method has a work function difference between the amorphous silicon region 26 and the carrier collection layer that is smaller than the work function difference between the polycrystalline silicon layer 22 and the carrier collection layer, that is, the contact barrier between the amorphous silicon region 26 and the carrier collection layer is smaller than the contact barrier between the polycrystalline silicon layer 22 and the carrier collection layer, so that the contact resistance between the amorphous silicon region 26 and the carrier collection layer is smaller than the contact resistance between the polycrystalline silicon layer 22 and the carrier collection layer. The amorphous silicon region 26 can achieve more reasonable energy band matching and reduce contact resistance, so that the solar cell can effectively convert sunlight into electrical energy, thereby improving the photoelectric conversion efficiency of the solar cell.

[0131] The invention also provides a photovoltaic module, which includes a cover plate, a back plate, and a solar cell arranged between the cover plate and the back plate; the solar cell includes the solar cell as described above.

[0132] The embodiments of the present application do not specifically limit whether the photovoltaic module includes other structures. For example, the photovoltaic module may also include: a first packaging film disposed between the cover plate and the solar cell, and a second packaging film disposed between the back plate and the solar cell.

[0133] In the photovoltaic module, the first transmission layer 20 of the solar cell includes a stacked polysilicon layer 22 and an amorphous silicon region 26; the polysilicon layer 22 is disposed on the first surface 11 of the silicon substrate 10; the amorphous silicon region 26 is located at least part of the surface of the polysilicon layer 22 away from the silicon substrate 10, and the amorphous silicon region 26 is formed by laser; the laser forms the amorphous silicon region 26 on at least part of the surface of the polysilicon layer 22 away from the silicon substrate 10. Since the contact resistance between the amorphous silicon region 26 and the transparent conductive layer 40 is less than the contact resistance between the polysilicon layer 22 and the transparent conductive layer 40, the amorphous silicon region 26 can achieve more reasonable energy band matching, reduce the contact resistance, so that the solar cell can effectively convert sunlight into electrical energy, and improve the photoelectric conversion efficiency of the solar cell.

[0134] The present invention is further described in detail below with reference to specific embodiments.

[0135] Embodiment 1

[0136] The preparation process of solar cells, refer to Figures 1 to 12 As shown, the preparation process includes the following steps:

[0137] 101, such as Figure 1 As shown, the silicon substrate 10 is polished and cleaned.

[0138] In this step, the silicon substrate 10 is placed in a polishing and cleaning machine such as a tank-type polishing and cleaning machine for polishing and cleaning to remove the cutting damage layer on the first surface 11 and the second surface 12 of the silicon substrate 10, and the polishing morphology of the first surface 11 and the second surface 12 is regulated by controlling the polishing and cleaning temperature, time and solution concentration.

[0139] 102, such as Figure 2 As shown, a first transmission layer 20 is formed on the first surface 11 and the second surface 12 of the silicon substrate 10 respectively.

[0140] In this step, the first transmission layer 20 is a stacked first passivation layer 21 and a polysilicon layer 22 , the first passivation layer 21 is connected to the first surface 11 and the polysilicon layer 22 , or the first passivation layer 21 is connected to the second surface 12 and the polysilicon layer 22 .

[0141] Specifically, a low pressure chemical vapor deposition (LPCVD) process can be used to sequentially deposit a first passivation layer 21 and a polysilicon layer 22 on the first surface 11, and sequentially deposit a first passivation layer 21 and a polysilicon layer 22 on the second surface 12. The silicon substrate 10 is an N-type silicon substrate, and the first passivation layer 21 includes a silicon oxide layer, and the thickness of the silicon oxide layer is in the range of 1.4 nm. The polysilicon layer 22 is an intrinsic semiconductor material layer, and the thickness of the polysilicon layer 22 is in the range of 150 nm.

[0142] In this step, the LPCVD device can deposit the first transmission layer 20 on the first surface 11 and the second surface 12, respectively, and the first transmission layer 20 on the first surface 11 and the first transmission layer 20 on the second surface 12 are symmetrically arranged. The LPCVD device can also deposit the first transmission layer 20 only on the first surface 11.

[0143] 103, such as Figure 3 As shown, the polysilicon layer 22 located on the first surface 11 is doped.

[0144] In this step, the polysilicon layer 22 on the first surface 11 is doped with phosphorus by high-temperature diffusion, so that the polysilicon layer 22 on the first surface 11 forms a first doped portion corresponding to the first region 13, and forms a second doped portion corresponding to the second region 14. Then, a wet etching process is used to remove the phosphorus silicon glass layer formed after the phosphorus diffusion by hydrogen fluoride solution (HF solution). In this step, the change of the polysilicon layer 22 on the second surface 12 can be ignored. The polysilicon layer 22 located on the first surface 11 is doped to form an N region.

[0145] 104, such as Figure 4 As shown, a mask is formed on the surface of the polysilicon layer 22 facing away from the silicon substrate 10 .

[0146] In this step, a first silicon nitride material layer is deposited on the surface of the polysilicon layer 22 on the first surface 11 away from the silicon substrate 10 as a mask 25. The first silicon nitride material layer is formed by a plasma chemical vapor deposition process, and the thickness of the first silicon nitride material layer is 60nm.

[0147] 105, such as Figure 5 As shown, the mask on the second region 14 in the first surface 11 is removed.

[0148] In this step, laser processing is used to selectively remove the first silicon nitride material layer on the second region 14 of the first surface 11. The laser used in the laser processing is a 532nm picosecond laser.

[0149] 106, such as Figure 6 As shown, the second area 14 in the first surface 11 and the second surface 12 are respectively subjected to texturing treatment.

[0150] In this step, under the action of the first silicon nitride material layer, the surface where the second region 14 is located in the first surface 11 of the silicon substrate 10 and the second surface 12 are subjected to a texturing treatment, and a velvet surface is formed on the surface where the second region 14 is located in the first surface 11 and the second surface 12, so as to improve the solar cell's absorption efficiency of sunlight. Then, the first silicon nitride material layer is removed using a hydrofluoric acid solution.

[0151] 107, such as Figure 7 As shown, a second transmission layer 30 is formed on the first surface 11 of the silicon substrate 10 .

[0152] In this step, a second transmission layer 30 is formed on the first surface 11 of the silicon substrate 10. The second transmission layer 30 includes a second passivation layer 31 and a second doping layer 32 which are stacked. The second passivation layer 31 is connected between the first surface 11 and the second doping layer 32.

[0153] Specifically, a chemical vapor deposition (CVD) device may be used to sequentially deposit the second passivation layer 31 and the second doping layer 32. The second passivation layer 31 includes an intrinsic amorphous silicon region, the second doping layer 32 includes a P-type amorphous silicon region, and the thickness of the second doping layer 32 is 15 nm.

[0154] 108, such as Figure 8 As shown, a third passivation layer 70 and an anti-reflection layer 80 are formed on the second surface 12 of the silicon substrate 10 .

[0155] In this step, a third passivation layer 70 may be deposited on the second surface 12 of the silicon substrate 10 by using a CVD device. The third passivation layer 70 is an intrinsic amorphous silicon material layer, and the thickness of the third passivation layer 70 is in the range of 5 nm. An anti-reflection layer 80 is deposited on the surface of the third passivation layer 70 away from the silicon substrate 10. The anti-reflection layer 80 is a second silicon nitride material layer, and the thickness of the second silicon nitride material layer is 70 nm.

[0156] 109, such as Fig. 9 As shown, the second passivation layer 31 and the second doping layer 32 in the first region 13 of the silicon substrate 10 are removed by using a laser.

[0157] In this step, laser processing is used to selectively remove most or all of the second doping layer 32 and the second passivation layer 31 in the first area 13 in the first surface 11 of the silicon substrate 10 to form a first opening 91. The laser processes the polysilicon layer 22 of the first opening 91 to convert the surface polysilicon into amorphous silicon to form an amorphous silicon area 26. The thickness of the amorphous silicon area 26 accounts for 3% to 30% of the thickness of the polysilicon layer 22. The laser used in the laser processing is a 532nm picosecond laser.

[0158] In this step, when the second doping layer 32 and the second passivation layer 31 in the first region 13 of the first surface 11 of the silicon substrate 10 are selectively removed by laser processing, particles 24 will remain on the amorphous silicon region 26, and the particles 24 can increase the back reflection of the front transmitted light.

[0159] 110, such as Fig.10 As shown, a transparent conductive layer 40 is deposited on the side of the silicon substrate 10 where the first surface 11 is provided.

[0160] In this step, a transparent conductive layer 40 is entirely deposited on the side of the silicon substrate 10 provided with the first surface 11 by magnetron sputtering, and the thickness of the transparent conductive layer 40 is in a range of 20 nm to 100 nm.

[0161] Reference Fig.14 and Fig.15 , which shows a test image of a finished solar cell product. In the test image, it can be seen that the surface of the polysilicon layer 22 has an amorphous silicon region 26 .

[0162] 111, such as Fig.11 As shown, at least a portion of the transparent conductive layer 40 is removed to form a second opening 92 .

[0163] In this step, a portion of the transparent conductive layer 40 between the P region and the N region is removed to form a second opening 92, and the second opening 92 completely insulates the P region and the N region. The method of removing a portion of the transparent conductive layer 40 between the P region and the N region includes at least one of laser ablation, photolithography, and printing corrosive slurry.

[0164] 112, such as Fig.12 As shown, a first electrode 61 is prepared on the transparent conductive layer 40 corresponding to the N region, and a second electrode 62 is prepared on the transparent conductive layer 40 corresponding to the P region by screen printing.

[0165] The first electrode 61 and the second electrode 62 are both metal electrodes. For example, the materials of the first electrode 61 and the second electrode 62 both include silver.

[0166] In this step, low-temperature silver paste is printed on the surface of the N region and the surface of the P region by screen printing, and then cured at 200° C. for 30 minutes to form the first electrode 61 and the second electrode 62 .

[0167] Embodiment 2

[0168] The difference from the first embodiment is that the energy of the laser is different, and the rest of the parts are the same as those of the first embodiment.

[0169] Comparative Example

[0170] The difference from the first embodiment is that there is no amorphous silicon region 26 on the polysilicon layer 22 , and the rest of the parts are the same as those of the first embodiment.

[0171] The 1000 solar cells formed in Example 1 and the 1000 solar cells formed in the comparative example were subjected to performance tests under the same test conditions. The test results are shown in Table 1 below.

[0172] Table 1

[0173]

[0174] In Table 1, the data of Example 1 are the results of arithmetic averaging the test results of 1000 solar cells corresponding to Example 1, and the data of the comparative example are the results of arithmetic averaging the test results of 1000 solar cells corresponding to the comparative example. sc Characterizes the short-circuit current density of solar cells, V oc FF represents the fill factor of the solar cell, and Eff represents the photoelectric conversion efficiency of the solar cell. It can be concluded from Table 1 that the photoelectric conversion efficiency of Example 1 is higher than that of the comparative example. The main reason is that in Example 1, the laser processes at least part of the surface of the polysilicon layer 22 away from the silicon substrate 10 to form an amorphous silicon region 26. The amorphous silicon region 26 can reduce the contact resistance between the transparent conductive layer 40 and the polysilicon layer 22, thereby improving FF, and avoid damage to the polysilicon layer 22 when the transparent conductive layer 40 is deposited by magnetron sputtering, thereby improving V oc , which is beneficial to improve the conversion efficiency of solar cells.

[0175] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0176] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. For the embodiments of the device, electronic device, computer-readable storage medium and computer program products containing instructions, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiments.

[0177] The above are only preferred embodiments of the present invention and are not intended to limit the protection scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention are included in the protection scope of the present invention.

Claims

1. A solar cell, characterized in that: The solar cell comprises a silicon substrate, a first transmission layer, and a carrier collection layer; the silicon substrate has a first surface and a second surface, and the first surface is arranged opposite to the second surface; The first transmission layer is provided on at least one of the first surface and the second surface, and the first transmission layer includes a polysilicon layer; The polysilicon layer of the first transmission layer has an amorphous silicon region of the first transmission layer; the amorphous silicon region of the first transmission layer is located at least partially on the surface of the polysilicon layer of the first transmission layer away from the silicon substrate; The carrier collection layer is disposed on the first transport layer, and at least a portion of the carrier collection layer is in contact with the amorphous silicon region of the first transport layer.

2. The solar cell according to claim 1, characterized in that The solar cell further comprises a second transmission layer; The first surface of the silicon substrate is provided with the first transmission layer and the second transmission layer, respectively, and the first transmission layer and the second transmission layer are arranged at an interval.

3. The solar cell according to claim 1, characterized in that The solar cell further includes a second transmission layer; the first surface of the silicon substrate is provided with the first transmission layer, and the second surface of the silicon substrate is provided with the second transmission layer.

4. The solar cell according to claim 1, characterized in that In a thickness direction of the solar cell, the thickness of the amorphous silicon region accounts for 3% to 30% of the thickness of the polycrystalline silicon layer.

5. The solar cell according to claim 1, characterized in that: In the thickness direction of the solar cell, the thickness of the amorphous silicon region ranges from 2 nm to 30 nm.

6. The solar cell according to claim 1, characterized in that Vertically to the thickness direction of the solar cell, within a unit area where the carrier collection layer is in direct contact with the first transport layer, the area of ​​the amorphous silicon region accounts for 10% to 90% of the area of ​​the polycrystalline silicon layer.

7. The solar cell according to claim 1, characterized in that An etched region is provided on a surface of the polysilicon layer of the first transmission layer facing away from the silicon substrate, and the etched region is provided with the amorphous silicon region.

8. The solar cell according to claim 1, characterized in that The amorphous silicon region has a first doping element and / or a second doping element, the polycrystalline silicon layer has a first doping element, and the doping concentration of the amorphous silicon region is greater than the doping concentration of the polycrystalline silicon layer.

9. The solar cell according to claim 8, characterized in that The doping concentration of the amorphous silicon region is in the range of 3×10 19 Number of atoms / cm 3 Up to 7×10 19 Number of atoms / cm 3 .

10. The solar cell according to claim 1, characterized in that: The amorphous silicon region is provided with particles.

11. The solar cell according to claim 2, characterized in that: The carrier collection layer also includes a transparent conductive layer, which is connected to at least a portion of the surface of the polysilicon layer facing away from the silicon substrate, at least a portion of the surface of the amorphous silicon region facing away from the silicon substrate, and at least a portion of the surface of the second transmission layer facing away from the silicon substrate.

12. The solar cell according to claim 2, characterized in that: The end portion of the first transmission layer and the end portion opposite to the second transmission layer are stacked to form a stacked portion; the end portion of the first transmission layer is located between the end portion opposite to the second transmission layer and the first surface; The carrier collection layer also includes a transparent conductive layer, which is connected to at least a portion of the surface of the first transmission layer facing away from the silicon substrate, and at least connected to a portion of the surface of the second transmission layer facing away from the silicon substrate. The transparent conductive layer has a second opening, and the second opening is used to disconnect the electrical connection between the first transmission layer and the second transmission layer.

13. The solar cell according to claim 2, characterized in that: An isolation region is provided between the first transmission layer and the second transmission layer; The carrier collection layer also includes a transparent conductive layer, which is connected to at least a portion of the surface of the first transmission layer facing away from the silicon substrate, and at least connected to a portion of the surface of the second transmission layer facing away from the silicon substrate. The transparent conductive layer has a third opening, and the third opening is used to disconnect the electrical connection between the first transmission layer and the second transmission layer.

14. The solar cell according to claim 2 or 3, characterized in that: The second transmission layer includes a polysilicon layer; The polysilicon layer of the second transmission layer has an amorphous silicon region of the second transmission layer; the amorphous silicon region of the second transmission layer is located at least partially on the surface of the polysilicon layer of the second transmission layer away from the silicon substrate; The carrier collection layer is disposed on the second transport layer, and at least a portion of the carrier collection layer is in contact with the amorphous silicon region of the second transport layer.

15. The solar cell according to claim 2, characterized in that: The end portion of the first transmission layer and the end portion opposite to the second transmission layer are stacked to form a stacked portion; the end portion of the first transmission layer is located between the end portion opposite to the second transmission layer and the first surface; The second transmission layer includes a stack of an intrinsic amorphous silicon region and a doped amorphous silicon region; The doped amorphous silicon region covering the end portion of the first transmission layer has a hole structure therein.

16. The solar cell according to claim 15, characterized in that: The doped amorphous silicon region with the hole structure has a width of 0.1 um to 20 um in the extension direction of the first surface of the silicon substrate.

17. The solar cell according to claim 15, characterized in that In a top view of the solar cell, the hole structure has a shape of at least one of a circle, an ellipse, and an irregular shape.

18. The solar cell according to claim 1, characterized in that The carrier collection layer is disposed on the first transport layer, and the carrier collection layer is in contact with the entire amorphous silicon region of the first transport layer.

19. The solar cell according to claim 1, characterized in that When the carrier collection layer is a stacked combination of a transparent conductive layer and a metal electrode layer, the transparent conductive layer is closer to the silicon substrate, and in the thickness direction of the solar cell, the projection of the transparent conductive layer on the surface of the silicon substrate covers all the amorphous silicon areas of the first transmission layer, and the projection of the metal electrode layer on the surface of the silicon substrate covers at least part of the amorphous silicon areas of the first transmission layer; Alternatively, when the carrier collection layer is a metal electrode layer, in the thickness direction of the solar cell, the projection of the metal electrode layer on the surface of the silicon substrate covers the entire amorphous silicon region of the first transport layer.

20. A method for manufacturing a solar cell, characterized in that: Providing a silicon substrate; the silicon substrate having a first surface and a second surface, the first surface and the second surface being arranged opposite to each other; forming a first transmission layer on at least one of the first surface and the second surface, the first transmission layer comprising a polysilicon layer; Using a laser to process at least a portion of the surface of the polysilicon layer of the first transmission layer away from the silicon substrate to transform the surface into an amorphous silicon region of the first transmission layer; A carrier collection layer is formed on the first transport layer, and at least a portion of the carrier collection layer is in contact with the amorphous silicon region of the first transport layer.

21. A photovoltaic module, characterized in that: The photovoltaic assembly includes a cover plate, a back plate, and a solar cell disposed between the cover plate and the back plate; the solar cell includes the solar cell according to any one of claims 1 to 19.

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