A flip-chip silver mirror light-emitting diode chip and its preparation method

Abstract

The present invention provides a flip-chip silver mirror light-emitting diode chip and a preparation method thereof. The preparation method comprises S10, providing an epitaxial wafer; S20, preparing a Bragg reflector layer; S30, coating a first photoresist on the surface of the Bragg reflector layer, and then removing a portion of the first photoresist on the Bragg reflector layer; S40, etching a Bragg reflector through hole using an inductively coupled plasma etching process; and S50, removing residues in the Bragg reflector through hole using an inductively coupled plasma etching process. The specific steps of step S40 include: S401, performing main reaction etching to form the Bragg reflector through hole; the specific steps of step S50 include: S501, cleaning byproducts generated after the main reaction etching; S502, performing oxygen ion etching to remove the first photoresist layer with fluorine ions remaining after the main reaction etching process; S503, performing argon ion etching to remove fluorine ions remaining on the sidewalls of the Bragg reflector through hole; and S504, removing residues in the Bragg reflector through hole.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a flip-chip silver mirror light-emitting diode chip and a preparation method thereof. Background Art

[0002] Flip-chip silver mirror LED chips are widely used due to their advantages such as back-side light emission, strong heat dissipation, good solderability, high thrust, and strong reliability. To improve the luminous efficiency of flip-chip silver mirror LED chips, a Bragg reflector layer is usually added below the silver reflector to achieve a composite reflection effect, thereby increasing the luminous efficiency of the LED chip. After the addition of the Bragg reflector layer, several Bragg reflector layer through holes are provided in the Bragg reflector layer to form an electrical connection between the silver reflector and the current spreading layer located below the Bragg reflector layer.

[0003] In the prior art, the method for preparing through-holes in a Bragg reflector layer is to etch the Bragg reflector layer using an inductively coupled plasma etching process. The reactive ions are fluoride ions, which are very likely to remain on the surface of the Bragg reflector layer and on the sidewalls of the through-holes in the Bragg reflector layer. The fluoride ion residue in the through-holes of the Bragg reflector layer is particularly serious. When a silver reflector is subsequently covered on the surface of the Bragg reflector layer and the through-holes in the Bragg reflector layer, the residual fluoride ions react with the silver metal at the bottom of the silver reflector layer to form reactants, causing voids or bubbles in the silver metal layer, ultimately causing the flip-chip light-emitting diode chip to fail due to ESD breakdown at the voids or bubbles in the silver metal layer. Summary of the Invention

[0004] In response to the shortcomings of the prior art, the present invention aims to provide a method for preparing a flip-chip silver mirror light-emitting diode chip. This method aims to solve the technical problem in the prior art where residual fluoride ions react with the silver metal at the bottom of the silver reflective layer to form reactants, causing voids or bubbles in the silver metal layer, ultimately leading to ESD breakdown and failure of the flip-chip light-emitting diode chip at the voids or bubbles in the silver metal layer.

[0005] In order to achieve the above object, the present invention is implemented through the following technical solutions:

[0006] A method for preparing a flip-chip silver mirror light-emitting diode chip comprises the following steps:

[0007] S10, providing an epitaxial wafer;

[0008] S20, preparing a Bragg reflection layer on the epitaxial wafer;

[0009] S30, coating a first photoresist on the surface of the Bragg reflector layer, and then removing a portion of the first photoresist on the Bragg reflector layer by exposure and development processes;

[0010] S40, etching the exposed Bragg reflector layer using an inductively coupled plasma etching process to form a Bragg reflector through hole;

[0011] S50, etching the first photoresist and the fluorine ions in the through hole of the Bragg reflector layer using an inductively coupled plasma etching process to remove residues in the through hole of the Bragg reflector layer;

[0012] The specific steps of step S40 include:

[0013] S401, turning on the upper power of the machine body and introducing the main reaction gas, then turning on the lower power of the machine body to perform the main reaction etching to form a through hole in the Bragg reflector layer;

[0014] The specific steps of step S50 include:

[0015] S501, turning off the lower power of the machine body and introducing nitrogen gas to clean up byproducts generated by the main reaction etching;

[0016] S502, reducing the upper power of the machine body and turning on the lower power of the machine body, and then introducing oxygen to perform oxygen ion etching to remove the first photoresist layer having residual fluoride ions after the main reaction etching process;

[0017] S503, increasing the power on the upper body and reducing the power on the lower body, then introducing argon gas to perform argon ion etching to remove fluorine ions remaining on the sidewalls of the through-holes in the Bragg reflector layer;

[0018] S504 , turning off the lower power of the machine body and introducing nitrogen gas to clean up etching byproducts, so as to remove residues in the through hole of the Bragg reflector layer.

[0019] Furthermore, in the step S401, the upper power of the machine body is 800W to 1100W, the main reaction gas is CF4 or CHF3, and the lower power of the machine body is 100W to 500W.

[0020] Furthermore, in step S502, the upper power of the machine body is 400W to 600W, the lower power of the machine body is 100W to 200W, the flow rate of the oxygen is 50sccm to 200sccm, and the ratio of the etching time of the oxygen ion etching to the etching time of the main reaction etching is greater than 1:10.

[0021] Furthermore, in step S503, the upper power of the machine body is 1000W to 1100W, the lower power of the machine body is 50W to 100W, the flow rate of the argon gas is 10 sccm to 50 sccm, and the etching time of the argon ion etching is 60s to 100s.

[0022] Furthermore, the specific steps of step S10 include:

[0023] providing a substrate;

[0024] An N-type semiconductor layer, an active light-emitting layer and a P-type semiconductor layer are sequentially deposited on the substrate using an MOCVD process.

[0025] Furthermore, the specific steps of step S20 include:

[0026] Coating a second photoresist on the surface of the P-type semiconductor layer, and then removing a portion of the second photoresist by exposure and development processes to expose a portion of the P-type semiconductor layer;

[0027] Using an inductively coupled plasma etching process to remove the exposed P-type semiconductor layer and the active light-emitting layer below the exposed P-type semiconductor layer to form an N-type semiconductor layer conductive step, and then removing the second photoresist;

[0028] Depositing indium tin oxide on the surfaces of the conductive steps of the P-type semiconductor layer and the N-type semiconductor layer using a magnetron sputtering process;

[0029] Coating a third photoresist on the surface of the indium tin oxide, and then removing a portion of the third photoresist by exposure and development processes to expose a portion of the indium tin oxide;

[0030] etching away the exposed indium tin oxide using an indium tin oxide etching solution, and then removing the third photoresist to form a current spreading layer;

[0031] Depositing SiO2 as a first insulating layer on the conductive step surfaces of the P-type semiconductor layer and the N-type semiconductor layer using a PECVD process;

[0032] A plurality of stacked layers of TiO2 and SiO2 are evaporated on the surface of the first insulating layer by using an electron beam evaporation process to form a Bragg reflection layer.

[0033] Furthermore, after step S50, the method further includes:

[0034] preparing a metal reflective layer on the epitaxial wafer;

[0035] A connection metal layer and a metal pad layer are sequentially prepared on the metal reflective layer to form a flip-chip silver mirror light-emitting diode chip.

[0036] Furthermore, the specific steps of preparing the metal reflective layer on the epitaxial wafer include:

[0037] coating a fourth photoresist on the surface of the Bragg reflective layer and the through hole of the Bragg reflective layer, and then removing a portion of the fourth photoresist in the through hole of the Bragg reflective layer by exposure and development processes to expose the first insulating layer;

[0038] etching the exposed first insulating layer with a BOE etching solution to form a first insulating layer through hole, and then removing the fourth photoresist on the first insulating layer through hole;

[0039] coating a fifth photoresist on the Bragg reflective layer, the Bragg reflective layer through hole, the first insulating layer through hole, and the epitaxial wafer exposed by the first insulating layer through hole, and then removing a portion of the fifth photoresist by exposure and development processes;

[0040] The metal reflective layer is prepared by using an electron beam evaporation process, the metal on the fifth photoresist is removed by using a blue film stripping process, and then the fifth photoresist is removed.

[0041] Furthermore, the specific steps of sequentially preparing the connection metal layer and the metal pad layer on the metal reflective layer include:

[0042] Depositing Al2O3 on the metal reflective layer and the surface of the epitaxial wafer not covered by the metal reflective layer using an atomic layer deposition technique, and then depositing SiO2 on the surface of the Al2O3 using a plasma chemical vapor deposition process, so that the Al2O3 and the SiO2 form a second insulating layer;

[0043] Coating a sixth photoresist on the surface of the second insulating layer, and then removing a portion of the sixth photoresist by exposure and development processes to expose a portion of the second insulating layer;

[0044] removing the exposed second insulating layer by using an inductively coupled plasma etching process to form a second insulating layer through hole, and then removing the sixth photoresist;

[0045] coating a seventh photoresist on the second insulating layer and the surface of the through hole of the second insulating layer, and then removing a portion of the seventh photoresist by exposure and development processes;

[0046] Depositing a connecting metal layer using an electron beam evaporation process, removing the metal on the seventh photoresist using a blue film stripping process, and then removing the seventh photoresist;

[0047] Depositing SiO2 as a third insulating layer on the connection metal layer and the surface of the second insulating layer not covered by the connection metal layer by using a PECVD process;

[0048] coating an eighth photoresist on the third insulating layer, and then removing a portion of the eighth photoresist by exposure and development processes to expose a portion of the third insulating layer;

[0049] removing the exposed third insulating layer by using an inductively coupled plasma etching process to form a third insulating layer through hole, and then removing the eighth photoresist;

[0050] Coating a ninth photoresist on the third insulating layer and the surface of the through hole of the third insulating layer, and removing a portion of the ninth photoresist by exposure and development processes;

[0051] A metal pad layer is prepared by electron beam evaporation process, the metal on the ninth photoresist is removed by blue film stripping process, and then the ninth photoresist is removed to form a flip-chip silver mirror light-emitting diode chip.

[0052] The present invention also provides a flip-chip silver mirror light-emitting diode chip, which is manufactured by the above-mentioned method for preparing the flip-chip silver mirror light-emitting diode chip.

[0053] Compared with the prior art, the present invention has the following beneficial effects:

[0054] After the main reaction of preparing the through-hole in the Bragg reflector layer is completed, oxygen is first introduced to allow ionized oxygen ions to react with the residual photoresist surface to remove the photoresist layer with residual fluoride ions, thereby preventing the fluoride ions remaining in the photoresist from contaminating the stripping solution during the subsequent stripping process, causing the fluoride ions to pass through the stripping solution and remain on the surface of the Bragg reflector layer. Then, after the oxygen treatment is completed, argon is introduced to allow the ionized argon ions to bombard and remove the fluoride ions remaining on the sidewalls of the through-hole in the Bragg reflector layer. In this way, the problem of residual fluoride ions after the preparation of the through-hole in the Bragg reflector layer is solved, and the problem of residual fluoride ions reacting with silver metal at the bottom of the silver reflector layer after the silver reflector covers the surface of the Bragg reflector layer and the through-hole in the Bragg reflector layer to cause voids or bubbles in the silver metal layer is avoided, which ultimately causes the flip-chip light-emitting diode chip to fail due to ESD breakdown through the voids or bubbles in the silver metal layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] Figure 1 Flowchart of the method for preparing a flip-chip silver mirror light-emitting diode chip according to the first embodiment of the present invention;

[0056] Figure 2 Schematic diagram of the structure of the flip-chip silver mirror light-emitting diode chip in the second embodiment of the present invention;

[0057] Figure 3 This is a picture of the failure of the Ag film layer on the side wall of the Bragg reflector through hole of the light-emitting diode chip in the prior art.

[0058] Description of main component symbols:

[0059]

[0060]

[0061] The following specific embodiments will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0062] To facilitate understanding of the present invention, the present invention will be described more fully below with reference to the accompanying drawings. The drawings illustrate several embodiments of the present invention. However, the present invention may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present invention.

[0063] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be an intermediate element. When an element is referred to as being "connected to" another element, it may be directly connected to the other element or there may be an intermediate element. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only.

[0064] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this invention pertains. The terms used in this specification of the present invention are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0065] See also Figure 1 , which shows a method for preparing a flip-chip silver mirror light-emitting diode chip in a first embodiment of the present invention, comprising the following steps:

[0066] S10, providing an epitaxial wafer;

[0067] S20, preparing a Bragg reflection layer on the epitaxial wafer;

[0068] S30, coating a first photoresist on the surface of the Bragg reflector layer, and then removing a portion of the first photoresist on the Bragg reflector layer by exposure and development processes;

[0069] S40, etching the exposed Bragg reflector layer using an inductively coupled plasma etching process to form a Bragg reflector through hole;

[0070] S50, etching the first photoresist and the fluorine ions in the through hole of the Bragg reflector layer using an inductively coupled plasma etching process to remove residues in the through hole of the Bragg reflector layer;

[0071] The specific steps of step S40 include:

[0072] S401, turning on the upper power of the machine body and introducing the main reaction gas, then turning on the lower power of the machine body to perform the main reaction etching to form a through hole in the Bragg reflector layer;

[0073] The specific steps of step S50 include:

[0074] S501, turning off the lower power of the machine body and introducing nitrogen gas to clean up byproducts generated by the main reaction etching;

[0075] S502, reducing the upper power of the machine body and turning on the lower power of the machine body, and then introducing oxygen to perform oxygen ion etching to remove the first photoresist layer having residual fluoride ions after the main reaction etching process;

[0076] S503, increasing the power on the upper body and reducing the power on the lower body, then introducing argon gas to perform argon ion etching to remove fluorine ions remaining on the sidewalls of the through-holes in the Bragg reflector layer;

[0077] S504 , turning off the lower power of the machine body and introducing nitrogen gas to clean up etching byproducts, so as to remove residues in the through hole of the Bragg reflector layer.

[0078] As can be understood, the present invention first introduces oxygen after the main reaction of preparing the through-holes in the Bragg reflector layer is completed, allowing the ionized oxygen ions to react with the residual photoresist surface to remove the photoresist layer with residual fluoride ions, thereby preventing the fluoride ions remaining in the photoresist from contaminating the stripping solution during the subsequent stripping process, causing the fluoride ions to pass through the stripping solution and remain on the surface of the Bragg reflector layer. Then, after the oxygen treatment is completed, argon gas is introduced to allow the ionized argon ions to bombard and remove the fluoride ions remaining on the sidewalls of the through-holes in the Bragg reflector layer. This solves the problem of residual fluoride ions after the preparation of the through-holes in the Bragg reflector layer in the prior art, and avoids the problem that after the silver reflector covers the surface of the Bragg reflector layer and the through-holes in the Bragg reflector layer, the residual fluoride ions react with the silver metal at the bottom of the silver reflector layer to form reactants, causing voids or bubbles in the silver metal layer, and ultimately causing the flip-chip light-emitting diode chip to fail due to ESD breakdown through the voids or bubbles in the silver metal layer.

[0079] Specifically, in step S401, the upper power of the machine body is 800W to 1100W, the main reaction gas is CF4 or CHF3, and the lower power of the machine body is 100W to 500W. In this embodiment, CF4 is used as the main reaction gas, the upper power of the machine body is 800W, and the lower power of the machine body is 100W. The etching time of the main reaction etching is determined according to the thickness of the Bragg reflector layer through hole to be etched. The thicker the thickness, the longer the etching time.

[0080] Furthermore, the step S501 is mainly to clean up the byproducts produced by the etching in step S401. This step must be performed, otherwise it will affect the subsequent removal of fluorine ions in the first photoresist and fluorine ions on the sidewalls of the Bragg reflector through-hole.

[0081] Furthermore, in step S502, the upper power of the machine body is 400W to 600W, the lower power of the machine body is 100W to 200W, the flow rate of the oxygen is 50sccm to 200sccm, and the ratio of the etching time of the oxygen ion etching to the etching time of the main reaction etching is greater than 1:10. In this embodiment, in this step, the upper power of the machine body is 400W, the lower power of the machine body is 100W, the flow rate of oxygen is 50sccm, and the ratio of the etching time of the oxygen ion etching to the etching time of the main reaction etching is 1:10.

[0082] Furthermore, in step S503, the upper power of the machine body is 1000W~1100W, the lower power of the machine body is 50W~100W, the flow rate of the argon gas is 10sccm~50sccm, and the etching time of the argon ion etching is 60s~100s. In this embodiment, the upper power of the machine body is 1000W, the lower power of the machine body is 50W, the flow rate of the argon gas is 10sccm, and the etching time of the argon ion etching is 80s.

[0083] It should be noted that in step S503, the etching time of the argon ion etching is independent of the etching time of the main reaction etching. If the time is less than 60 seconds, there is a risk of incomplete removal of fluorine ions. If the time is greater than 100 seconds, the operating voltage of the formed flip-chip silver mirror LED chip will increase.

[0084] Furthermore, the specific steps of step S10 include:

[0085] providing a substrate;

[0086] The substrate can be GaN, Al2O3, or Si. In this embodiment, GaN is used as the substrate.

[0087] An N-type semiconductor layer, an active light-emitting layer and a P-type semiconductor layer are sequentially deposited on the substrate using an MOCVD process.

[0088] Furthermore, the specific steps of step S20 include:

[0089] Coating a second photoresist on the surface of the P-type semiconductor layer, and then removing a portion of the second photoresist by exposure and development processes to expose a portion of the P-type semiconductor layer;

[0090] Using an inductively coupled plasma etching process to remove the exposed P-type semiconductor layer and the active light-emitting layer below the exposed P-type semiconductor layer to form an N-type semiconductor layer conductive step, and then removing the second photoresist;

[0091] Depositing indium tin oxide on the surfaces of the conductive steps of the P-type semiconductor layer and the N-type semiconductor layer using a magnetron sputtering process;

[0092] Coating a third photoresist on the surface of the indium tin oxide, and then removing a portion of the third photoresist by exposure and development processes to expose a portion of the indium tin oxide;

[0093] etching away the exposed indium tin oxide using an indium tin oxide etching solution, and then removing the third photoresist to form a current spreading layer;

[0094] Depositing SiO2 as a first insulating layer on the conductive step surfaces of the P-type semiconductor layer and the N-type semiconductor layer using a PECVD process, wherein the thickness of the first insulating layer needs to be greater than 5000 Å;

[0095] Depositing a plurality of stacked layers of TiO2 and SiO2 on the surface of the first insulating layer by electron beam evaporation to form a Bragg reflection layer, wherein the plurality of stacked layers may be 2 to 10;

[0096] It should be noted that the thickness of the first insulating layer and the number of stacked layers of TiO2 and SiO2 have no direct impact on the effect of removing fluoride ions in the present invention and are not limited here.

[0097] Furthermore, after step S50, the method further includes:

[0098] preparing a metal reflective layer on the epitaxial wafer;

[0099] A connection metal layer and a metal pad layer are sequentially prepared on the metal reflective layer to form a flip-chip silver mirror light-emitting diode chip.

[0100] Specifically, the specific steps of preparing the metal reflective layer on the epitaxial wafer include:

[0101] coating a fourth photoresist on the surface of the Bragg reflective layer and the through hole of the Bragg reflective layer, and then removing a portion of the fourth photoresist in the through hole of the Bragg reflective layer by exposure and development processes to expose the first insulating layer;

[0102] etching the exposed first insulating layer with a BOE etching solution to form a first insulating layer through hole, and then removing the fourth photoresist on the first insulating layer through hole;

[0103] coating a fifth photoresist on the Bragg reflective layer, the Bragg reflective layer through hole, the first insulating layer through hole, and the epitaxial wafer exposed by the first insulating layer through hole, and then removing a portion of the fifth photoresist by exposure and development processes;

[0104] A metal reflective layer is prepared by an electron beam evaporation process, the metal on the fifth photoresist is removed by a blue film stripping process, and then the fifth photoresist is removed, wherein, in this embodiment, the metal reflective layer is formed by sequentially evaporating Ag / Ni / Ti / Ni / Ti / Ni / Ti / Ni / Ti metals;

[0105] Furthermore, the specific steps of sequentially preparing the connection metal layer and the metal pad layer on the metal reflective layer include:

[0106] Depositing Al2O3 on the metal reflective layer and the surface of the epitaxial wafer not covered by the metal reflective layer using an atomic layer deposition technique, and then depositing SiO2 on the surface of the Al2O3 using a plasma chemical vapor deposition process, so that the Al2O3 and the SiO2 form a second insulating layer;

[0107] Coating a sixth photoresist on the surface of the second insulating layer, and then removing a portion of the sixth photoresist by exposure and development processes to expose a portion of the second insulating layer;

[0108] removing the exposed second insulating layer by using an inductively coupled plasma etching process to form a second insulating layer through hole, and then removing the sixth photoresist;

[0109] coating a seventh photoresist on the second insulating layer and the surface of the through hole of the second insulating layer, and then removing a portion of the seventh photoresist by exposure and development processes;

[0110] Depositing a connecting metal layer using an electron beam evaporation process, removing the metal on the seventh photoresist using a blue film stripping process, and then removing the seventh photoresist;

[0111] Depositing SiO2 as a third insulating layer on the connection metal layer and the surface of the second insulating layer not covered by the connection metal layer by using a PECVD process;

[0112] coating an eighth photoresist on the third insulating layer, and then removing a portion of the eighth photoresist by exposure and development processes to expose a portion of the third insulating layer;

[0113] removing the exposed third insulating layer by using an inductively coupled plasma etching process to form a third insulating layer through hole, and then removing the eighth photoresist;

[0114] Coating a ninth photoresist on the third insulating layer and the surface of the through hole of the third insulating layer, and removing a portion of the ninth photoresist by exposure and development processes;

[0115] A metal pad layer is prepared by an electron beam evaporation process, the metal on the ninth photoresist is removed by a blue film stripping process, and then the ninth photoresist is removed to form a flip-chip silver mirror light-emitting diode chip, wherein the metal pad layer is made by sequentially evaporating Al / Ti / Al / Ti / Ni / Ti / Ni / Ti / Ni / AuSn metal.

[0116] This completes the preparation of the flip-chip silver mirror light-emitting diode chip.

[0117] The reverse leakage current yield rate of the flip-chip silver mirror light-emitting diode chip obtained by the above-mentioned preparation method is 94%, and the forward turn-on voltage yield rate is 93%.

[0118] The present invention also provides an embodiment of the other end point of the value range, and the values ​​are shown in the following table:

[0119]

[0120]

[0121] It can be seen from the above table that, compared with the prior art, the reverse leakage current yield and forward turn-on voltage yield of the chip prepared by the method for preparing the flip-chip silver mirror light-emitting diode chip provided by the present invention are improved by at least 7%.

[0122] In summary, the method for preparing a flip-chip silver mirror LED chip in the above-mentioned embodiment of the present invention first introduces oxygen gas after the main reaction of preparing the Bragg reflector layer through-hole is completed, allowing the ionized oxygen ions to react with the residual photoresist surface to remove the photoresist layer with residual fluoride ions, thereby preventing the fluoride ions remaining in the photoresist from contaminating the stripping solution during the subsequent stripping process, causing the fluoride ions to pass through the stripping solution and remain on the surface of the Bragg reflector layer. Then, after the oxygen treatment is completed, argon gas is introduced to allow the ionized argon ions to bombard and remove the fluoride ions remaining on the sidewalls of the Bragg reflector layer through-hole. This solves the problem of residual fluoride ions after the Bragg reflector layer through-hole is prepared. It also avoids the problem that, after the silver reflector covers the surface of the Bragg reflector layer and the Bragg reflector layer through-hole, the residual fluoride ions react with the silver metal at the bottom of the silver reflector layer to form reactants, causing voids or bubbles in the silver metal layer, and ultimately causing the flip-chip LED chip to fail due to ESD breakdown due to the voids or bubbles in the silver metal layer.

[0123] The second embodiment of the present invention further provides a flip-chip silver mirror light-emitting diode chip, which can be manufactured by the method for manufacturing the flip-chip silver mirror light-emitting diode chip in the first embodiment. Figure 2 The flip-chip silver mirror light-emitting diode chip shown.

[0124] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0125] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A method for preparing a flip-chip silver mirror light-emitting diode chip, characterized in that: The steps include: S10, providing an epitaxial wafer; S20, preparing a Bragg reflection layer on the epitaxial wafer; S30, coating a first photoresist on the surface of the Bragg reflector layer, and then removing a portion of the first photoresist on the Bragg reflector layer by exposure and development processes; S40, etching the exposed Bragg reflector layer using an inductively coupled plasma etching process to form a Bragg reflector through hole; S50, etching the first photoresist and the fluorine ions in the through hole of the Bragg reflector layer using an inductively coupled plasma etching process to remove residues in the through hole of the Bragg reflector layer; The specific steps of step S40 include: S401, turning on the upper power of the machine body and introducing the main reaction gas, then turning on the lower power of the machine body to perform the main reaction etching to form a through hole in the Bragg reflector layer; The specific steps of step S50 include: S501, turning off the lower power of the machine body and introducing nitrogen gas to clean up byproducts generated by the main reaction etching; S502, reducing the upper power of the machine body and turning on the lower power of the machine body, and then introducing oxygen to perform oxygen ion etching to remove the first photoresist layer having residual fluoride ions after the main reaction etching process; S503, increasing the power on the upper body and reducing the power on the lower body, then introducing argon gas to perform argon ion etching to remove fluorine ions remaining on the sidewalls of the through-holes in the Bragg reflector layer; S504 , turning off the lower power of the machine body and introducing nitrogen gas to clean up etching byproducts, so as to remove residues in the through hole of the Bragg reflector layer.

2. The method for preparing a flip-chip silver mirror light-emitting diode chip according to claim 1, wherein: In the step S401, the upper power of the machine body is 800W to 1100W, the main reaction gas is CF4 or CHF3, and the lower power of the machine body is 100W to 500W.

3. The method for preparing a flip-chip silver mirror light-emitting diode chip according to claim 1, wherein: In step S502, the upper power of the machine body is 400W-600W, the lower power of the machine body is 100W-200W, the flow rate of the oxygen is 50sccm-200sccm, and the ratio of the etching time of the oxygen ion etching to the etching time of the main reaction etching is greater than 1:

10.

4. The method for preparing a flip-chip silver mirror light-emitting diode chip according to claim 1, wherein: In the step S503 , the upper power of the machine body is 1000W to 1100W, the lower power of the machine body is 50W to 100W, the flow rate of the argon gas is 10 sccm to 50 sccm, and the etching time of the argon ion etching is 60s to 100s.

5. The method for preparing a flip-chip silver mirror light-emitting diode chip according to claim 1, wherein: The specific steps of step S10 include: providing a substrate; An N-type semiconductor layer, an active light-emitting layer and a P-type semiconductor layer are sequentially deposited on the substrate using an MOCVD process.

6. The method for preparing a flip-chip silver mirror light-emitting diode chip according to claim 5, wherein: The specific steps of step S20 include: Coating a second photoresist on the surface of the P-type semiconductor layer, and then removing a portion of the second photoresist by exposure and development processes to expose a portion of the P-type semiconductor layer; Using an inductively coupled plasma etching process to remove the exposed P-type semiconductor layer and the active light-emitting layer below the exposed P-type semiconductor layer to form an N-type semiconductor layer conductive step, and then removing the second photoresist; Depositing indium tin oxide on the surfaces of the conductive steps of the P-type semiconductor layer and the N-type semiconductor layer using a magnetron sputtering process; Coating a third photoresist on the surface of the indium tin oxide, and then removing a portion of the third photoresist by exposure and development processes to expose a portion of the indium tin oxide; etching away the exposed indium tin oxide using an indium tin oxide etching solution, and then removing the third photoresist to form a current spreading layer; Depositing SiO2 as a first insulating layer on the conductive step surfaces of the P-type semiconductor layer and the N-type semiconductor layer using a PECVD process; A plurality of stacked layers of TiO2 and SiO2 are evaporated on the surface of the first insulating layer by using an electron beam evaporation process to form a Bragg reflection layer.

7. The method for preparing a flip-chip silver mirror light-emitting diode chip according to claim 6, wherein: After step S50, the method further includes: preparing a metal reflective layer on the epitaxial wafer; A connection metal layer and a metal pad layer are sequentially prepared on the metal reflective layer to form a flip-chip silver mirror light-emitting diode chip.

8. The method for preparing a flip-chip silver mirror light-emitting diode chip according to claim 7, characterized in that: The specific steps of preparing the metal reflective layer on the epitaxial wafer include: coating a fourth photoresist on the surface of the Bragg reflective layer and the through hole of the Bragg reflective layer, and then removing a portion of the fourth photoresist in the through hole of the Bragg reflective layer by exposure and development processes to expose the first insulating layer; etching the exposed first insulating layer with a BOE etching solution to form a first insulating layer through hole, and then removing the fourth photoresist on the first insulating layer through hole; coating a fifth photoresist on the Bragg reflective layer, the Bragg reflective layer through hole, the first insulating layer through hole, and the epitaxial wafer exposed by the first insulating layer through hole, and then removing a portion of the fifth photoresist by exposure and development processes; The metal reflective layer is prepared by using an electron beam evaporation process, the metal on the fifth photoresist is removed by using a blue film stripping process, and then the fifth photoresist is removed.

9. The method for preparing a flip-chip silver mirror light-emitting diode chip according to claim 8, wherein: The specific steps of sequentially preparing the connection metal layer and the metal pad layer on the metal reflective layer include: Depositing Al2O3 on the metal reflective layer and the surface of the epitaxial wafer not covered by the metal reflective layer using an atomic layer deposition technique, and then depositing SiO2 on the surface of the Al2O3 using a plasma chemical vapor deposition process, so that the Al2O3 and the SiO2 form a second insulating layer; Coating a sixth photoresist on the surface of the second insulating layer, and then removing a portion of the sixth photoresist by exposure and development processes to expose a portion of the second insulating layer; removing the exposed second insulating layer by using an inductively coupled plasma etching process to form a second insulating layer through hole, and then removing the sixth photoresist; coating a seventh photoresist on the second insulating layer and the surface of the through hole of the second insulating layer, and then removing a portion of the seventh photoresist by exposure and development processes; Depositing a connecting metal layer using an electron beam evaporation process, removing the metal on the seventh photoresist using a blue film stripping process, and then removing the seventh photoresist; Depositing SiO2 as a third insulating layer on the connection metal layer and the surface of the second insulating layer not covered by the connection metal layer by using a PECVD process; coating an eighth photoresist on the third insulating layer, and then removing a portion of the eighth photoresist by exposure and development processes to expose a portion of the third insulating layer; removing the exposed third insulating layer by using an inductively coupled plasma etching process to form a third insulating layer through hole, and then removing the eighth photoresist; Coating a ninth photoresist on the third insulating layer and the surface of the through hole of the third insulating layer, and removing a portion of the ninth photoresist by exposure and development processes; A metal pad layer is prepared by electron beam evaporation process, the metal on the ninth photoresist is removed by blue film stripping process, and then the ninth photoresist is removed to form a flip-chip silver mirror light-emitting diode chip.

10. A flip-chip silver mirror light-emitting diode chip, characterized in that: The invention is made by the preparation method of the flip-chip silver mirror light-emitting diode chip according to any one of claims 1 to 9.

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