Processing method and related device for modular index data generation task

Abstract

The application discloses a processing method for a modulus exponent data generation task and related devices, wherein a classical computing unit constructs a quantum circuit for calculating a modulus exponent operation result of an input modulus and exponent in GF(2 k ) based on a preset irreducible polynomial, a base and a LUP decomposition method; and sends the exponent and the quantum circuit to a quantum computing unit; the quantum computing unit excites a quantum bit to an initial quantum state based on the exponent, drives the quantum bit to evolve from the initial quantum state based on the quantum circuit, obtains a measurement result of the quantum bit, and sends the measurement result to the classical computing unit; and the classical computing unit determines and outputs the modulus exponent operation result based on the measurement result; the quantum circuit is constructed by the irreducible polynomial, the base and the LUP decomposition method, and the exponent is taken as an input of the quantum circuit, so that the modulus exponent data in GF(2 k ) is efficiently generated, and classical encryption algorithms are accelerated to be cracked.

Description

Technical Field

[0001] The present invention belongs to the field of quantum computing technology, and in particular to a method for processing modular exponential data generation tasks and a related device. Background Art

[0002] A quantum computer is a physical device that follows the laws of quantum mechanics to perform high-speed mathematical and logical operations, and to store and process quantum information. When a device processes and calculates quantum information and runs quantum algorithms, it is considered a quantum computer. Quantum computers are a key technology under research because they can handle mathematical problems more efficiently than conventional computers. For example, they can reduce the time required to crack RSA keys from hundreds of years to just hours.

[0003] Finite field, also known as Galois Field (GF), is a very important concept in many disciplines such as abstract algebra and cryptography. Taking cryptography as an example, the discrete logarithm problem over finite fields is one of the two core difficult problems in the classical public key cryptography system. GF(2 k ) occupies a special position among many finite fields. How to efficiently generate GF(2 k ) in order to accelerate the cracking of classic encryption algorithms. Summary of the Invention

[0004] The purpose of this invention is to provide a method and a related device for processing modular exponential data generation tasks, aiming to efficiently generate GF(2 k ) in order to accelerate the cracking of classic encryption algorithms.

[0005] An embodiment of the present invention provides a method for processing a modular exponential data generation task, which is applied to a classical computing unit. The modular exponential data generation task is used to calculate a finite field GF(2 k ), the method comprising:

[0006] Based on the preset irreducible polynomial, the base number and the LUP decomposition method, a method for calculating GF(2 k ) is a quantum circuit that generates a modular exponential operation based on the input base and exponent;

[0007] sending the index and the quantum circuit to a quantum computing unit;

[0008] Receive the measurement result fed back by the quantum computing unit, and determine and output the modular exponential operation result based on the measurement result.

[0009] Optionally, the method for calculating GF(2 k) is a quantum circuit that generates the modular exponential operation result of the base and exponent input in , including:

[0010] Decomposing the modular exponential operation into modular multiplication operations of k polynomials;

[0011] Constructing a sub-quantum circuit corresponding to each polynomial in the modular multiplication operation based on a preset irreducible polynomial, the base number, and the LUP decomposition method to obtain k sub-quantum circuits;

[0012] The k sub-quantum circuits are cascaded to obtain the k ) is a quantum circuit that generates the result of modular exponential operations on the base and exponent input in .

[0013] Optionally, constructing a sub-quantum circuit corresponding to each polynomial in the modular multiplication operation based on a preset irreducible polynomial, the base, and the LUP decomposition method includes:

[0014] Determining a first square matrix based on a preset irreducible polynomial and the base;

[0015] Iteratively calculate the square of the first matrix until k-1 second matrices are obtained, where the second matrix is ​​2 of the first matrix. m power, where m is an integer in [1, k-1];

[0016] Perform LUP decomposition on the first square matrix and k-1 second square matrices to obtain k L-type, k U-type, and k P-type matrices respectively;

[0017] Constructing quantum circuits corresponding to the L-type and U-type matrices based on CNOT gates, and constructing quantum circuits corresponding to the P-type matrix based on SWAP gates;

[0018] Each of the P-type matrices and the quantum circuits corresponding to the U-type and L-type matrices corresponding to the P-type matrix are spliced ​​to obtain a sub-quantum circuit corresponding to each polynomial in the modular multiplication operation.

[0019] Optionally, determining the first square matrix based on a preset irreducible polynomial and the base includes:

[0020] Determine the degree corresponding to the highest term in the preset irreducible polynomial;

[0021] Determining a modular multiplication result of the base and each term of a lower degree than the highest term;

[0022] A first square matrix is ​​determined based on the modular multiplication result.

[0023] Another embodiment of the present invention provides a method for processing a modular exponential data generation task, which is applied to a quantum computing unit. The modular exponential data generation task is used to calculate a finite field GF(2 k ), the method comprising:

[0024] Receive the index and quantum circuit sent by the classical computing unit, the quantum circuit is used to calculate GF(2 k ), wherein the quantum circuit is constructed based on a preset irreducible polynomial, the base and the LUP decomposition method;

[0025] Exciting the quantum bit to an initial quantum state based on the index, and driving the quantum bit to evolve from the initial quantum state based on the quantum circuit to obtain a measurement result of the quantum bit;

[0026] The measurement result is sent to the classical computing unit, so that the classical computing unit determines the modular exponential operation result based on the measurement result.

[0027] Yet another embodiment of the present invention provides a quantum computing system, the quantum computing system comprising a classical computing unit and a quantum computing unit;

[0028] The classical computing unit is used to perform the following steps:

[0029] Based on the preset irreducible polynomial, the base number and the LUP decomposition method, a method for calculating GF(2 k ) is a quantum circuit that generates a modular exponential operation based on the input base and exponent;

[0030] sending the index and the quantum circuit to a quantum computing unit;

[0031] Receive the measurement result fed back by the quantum computing unit, and determine and output the modular exponential operation result based on the measurement result.

[0032] The quantum computing unit is used to perform the following steps:

[0033] Receive the index and quantum circuit sent by the classical computing unit, the quantum circuit is used to calculate GF(2 k ), wherein the quantum circuit is constructed based on a preset irreducible polynomial, the base and the LUP decomposition method;

[0034] Exciting the quantum bit to an initial quantum state based on the index, and driving the quantum bit to evolve from the initial quantum state based on the quantum circuit to obtain a measurement result of the quantum bit;

[0035] The measurement result is sent to the classical computing unit, so that the classical computing unit determines the modular exponential operation result based on the measurement result.

[0036] Another embodiment of the present invention provides a processing device for a modular exponential data generation task, applied to a classical computing unit, wherein the modular exponential data generation task is used to calculate a modular exponential operation result of a base and an exponent input in a finite field, the device comprising:

[0037] a processing unit for constructing a quantum circuit for calculating a modular exponential operation result of a base and an exponent input in the calculation based on a preset irreducible polynomial, the base and the LUP decomposition method;

[0038] a sending unit, configured to send the index and the quantum circuit to a quantum computing unit;

[0039] A receiving unit is used to receive the measurement result fed back by the quantum computing unit, and determine and output the modular exponential operation result based on the measurement result.

[0040] Another embodiment of the present invention provides another processing device for modular exponential data generation task, which is applied to a quantum computing unit. The modular exponential data generation task is used to calculate the finite field GF(2 k ), the device comprising:

[0041] A receiving unit is configured to receive the index and quantum circuit sent by the classical computing unit, wherein the quantum circuit is used to calculate GF(2 k ), wherein the quantum circuit is constructed based on a preset irreducible polynomial, the base and the LUP decomposition method;

[0042] a computing unit, configured to excite the qubit to an initial quantum state based on the index, and drive the qubit to evolve from the initial quantum state based on the quantum circuit, to obtain a measurement result of the qubit;

[0043] A sending unit is configured to send the measurement result to the classical computing unit, so that the classical computing unit determines the modular exponential operation result based on the measurement result.

[0044] Yet another embodiment of the present invention provides a storage medium storing a computer program, wherein the computer program is configured to execute any of the above methods when running.

[0045] Yet another embodiment of the present invention provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform any of the above methods.

[0046] Compared with the prior art, the present invention provides a method and a related device for processing modular exponential data generation tasks. The classical calculation unit is constructed based on a preset irreducible polynomial, a base number and a LUP decomposition method to calculate GF(2 k ) in the quantum circuit; and sending the exponent and the quantum circuit to a quantum computing unit;

[0047] The quantum computing unit excites the quantum bit to an initial quantum state based on the index, and drives the quantum bit to evolve from the initial quantum state based on the quantum circuit to obtain a measurement result of the quantum bit; and sends the measurement result to the classical computing unit;

[0048] The classical computing unit determines and outputs the modular exponential operation result based on the measurement result; a quantum circuit is constructed by using irreducible polynomials, bases and LUP decomposition method, and the exponent is used as the input of the quantum circuit to achieve efficient generation of GF(2 k ) in order to accelerate the cracking of classic encryption algorithms. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 A network block diagram of a processing system for modular exponential data generation tasks provided by an embodiment of the present invention;

[0050] Figure 2 A flowchart of a method for processing a modular exponential data generation task provided by an embodiment of the present invention;

[0051] Figure 3 A schematic diagram of the structure of a quantum circuit corresponding to an L-type matrix provided in an embodiment of the present invention;

[0052] Figure 4 A schematic diagram of the structure of a quantum circuit corresponding to a P-type matrix provided in an embodiment of the present invention;

[0053] Figure 5 A structural diagram of a sub-quantum circuit corresponding to one of the polynomials in a modular multiplication operation provided by an embodiment of the present invention;

[0054] Figure 6 The embodiment of the present invention provides a method for calculating the finite field GF(2 k ) is a quantum circuit that generates a modular exponential operation based on the input base and exponent;

[0055] Figure 7 A flowchart of another method for processing a modular exponential data generation task provided by an embodiment of the present invention;

[0056] Figure 8 A schematic structural diagram of a device for processing modular exponential data generation tasks provided by an embodiment of the present invention;

[0057] Figure 9 A schematic structural diagram of another apparatus for processing modular exponential data generation tasks provided by an embodiment of the present invention;

[0058] Figure 10 A schematic structural diagram of a computer device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0059] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and are not to be construed as limiting the present invention.

[0060] Figure 1 This is a network block diagram of a system for processing modular exponential data generation tasks, provided by an embodiment of the present invention. The system may include a network 110, a server 120, a wireless device 130, a client 140, storage 150, a classical computing unit 160, a quantum computing unit 170, and may also include additional memory, classical processors, quantum processors, and other devices (not shown).

[0061] The network 110 is a medium for providing communication links between various devices and computers connected together within the processing system for the modular exponential data generation task, including but not limited to the Internet, corporate intranets, local area networks, mobile communication networks and their combinations. The connection method can be wired, wireless communication links or fiber optic cables, etc.

[0062] Server 120, wireless device 130, and client 140 are conventional data processing systems that may contain data and applications or software tools that perform conventional computing processes. Client 140 may be a personal computer or a network computer, so the data may also be provided by server 120. Wireless device 130 may be a smartphone, tablet, laptop, smart wearable device, etc. Storage unit 150 may include database 151, which may be configured to store data such as qubit parameters, quantum logic gate parameters, quantum circuits, and quantum programs.

[0063] The classical computing unit 160 (quantum computing unit 170) may include a classical processor 161 (quantum processor 171) for processing classical data (quantum data) and a memory 162 (memory 172) for storing classical data (quantum data). The classical data (quantum data) may be a boot file, an operating system image, and an application 163 (application 173). The application 163 (application 173) may be used to implement a quantum algorithm compiled according to a processing method for modular exponential data generation tasks provided in an embodiment of the present invention.

[0064] Any data or information stored or generated in the classical computing unit 160 (quantum computing unit 170) can also be configured to be stored or generated in another classical (quantum) processing system in a similar manner, and similarly, any application program executed therein can also be configured to be executed in another classical (quantum) processing system in a similar manner.

[0065] It should be noted that a true quantum computer is a hybrid structure, which includes at least Figure 1 The system consists of two parts: the classical computing unit 160, which is responsible for performing classical calculations and control; and the quantum computing unit 170, which is responsible for running quantum programs and thus realizing quantum computing.

[0066] The classical computing unit 160 and quantum computing unit 170 can be integrated into a single device or distributed across two different devices. For example, a first device including the classical computing unit 160 runs a classical computer operating system, provides quantum application development tools and services, and also provides the storage and network services required for quantum applications. Users develop quantum programs using the quantum application development tools and services on the device, and send the quantum programs to a second device including the quantum computing unit 170 via the network services on the device. The second device runs a quantum computer operating system, which parses and compiles the code of the quantum program into instructions that can be recognized and executed by the quantum processor 170. The quantum processor 170 then implements the quantum algorithm corresponding to the quantum program based on the instructions.

[0067] The computing units of the classic processor 161 in the classic computing unit 160 are based on CMOS transistors on a silicon chip. These computing units are not constrained by time or coherence, meaning they are available at any time, regardless of the duration of their use. Furthermore, the number of these computing units in a silicon chip is plentiful. Currently, a classic processor 161 contains tens of thousands of computing units. This abundance of computing units and the fixed computational logic available for CMOS transistors, such as AND logic, are sufficient. When computing with CMOS transistors, a large number of CMOS transistors are combined with limited logical functions to achieve the desired computational effect.

[0068] The basic computing unit of the quantum processor 171 in the quantum computing unit 170 is the qubit. The input of the qubit is limited by coherence and coherence time, that is, the qubit is limited by the length of use and is not available at any time. Making full use of the qubit within the available use time of the qubit is a key problem in quantum computing. In addition, the number of qubits in a quantum computer is one of the representative indicators of the performance of the quantum computer. Each qubit realizes the computing function through the logical function configured on demand. Given that the number of qubits is limited, and the logical functions in the field of quantum computing are diverse, such as: Hadamard gate (H gate), Pauli-X gate (X gate), Pauli-Y gate (Y gate) Pauli-Z gate (Z gate), X gate, RY gate, RZ gate, CNOT gate, CR gate, iSWAP gate, Toffoli gate, etc. During quantum computing, it is necessary to use limited qubits in combination with a variety of logical functions to achieve the computing effect.

[0069] Based on these differences, the application of classical logic functions to the design of CMOS tubes and the application of quantum logic functions to the design of quantum bits are significantly and essentially different. The application of classical logic functions to the design of CMOS tubes does not require consideration of the individuality of the CMOS tubes. For example, the representation of CMOS tubes in silicon chips is the individual identification, position, and usable life of each CMOS tube. Therefore, the classical algorithms composed of classical logic functions only express the operational relationships of the algorithms, and do not express the algorithm's dependence on the individual CMOS tubes.

[0070] Quantum logic functions acting on qubits must consider their individuality, such as their position within the quantum chip, their position, their relationship to surrounding qubits, and the usable lifespan of each qubit. Therefore, quantum algorithms composed of quantum logic functions not only express the algorithm's operational relationships but also its dependence on individual qubits.

[0071] Exemplary:

[0072] Quantum Algorithm 1: H1, H2, CNOT(1,3), H3, CNOT(2,3);

[0073] Quantum Algorithm 2: H1, H2, CNOT(1,2), H3, CNOT(2,3);

[0074] Among them, 1 / 2 / 3 represent three sequentially connected quantum bits Q1, Q2, Q3 or mutually connected quantum bits Q1, Q2, Q3;

[0075] An example explanation of how quantum algorithms are affected by qubit coherence time is as follows:

[0076] Define the execution time of a single-qubit logic gate as t, and the execution time of a two-qubit logic gate acting on adjacent bits as 2t; then:

[0077] When Q1, Q2, and Q3 are interconnected, the calculation of quantum algorithm 1 takes 6t, which is divided into four time periods. The duration of each time period is t, 2t, t, and 2t respectively. The operations performed in each time period are: H1, H2; CNOT(1, 3); H3; CNOT(2, 3);

[0078] The calculation of quantum algorithm 1 takes 5t, which is divided into 3 time periods. The duration of each time period is t, 2t, and 2t respectively. The operations performed in each time period are: H1, H2, H3; CNOT(1, 2); CNOT(2, 3);

[0079] When Q1, Q2, and Q3 are connected in sequence, the equivalent quantum algorithm is: H1, H2; swap(1, 2), CNOT(2, 3), swap(1, 2); H3; CNOT(2, 3). The computation of this equivalent quantum algorithm takes 10t, divided into four time periods, each of which takes t, 6t, t, and 2t. The operations performed in each time period are: H1, H2; swap(1, 2), CNOT(2, 3), swap(1, 2); H3; CNOT(2, 3).

[0080] A quantum chip only includes quantum bits and channels for controlling the quantum bits. Quantum logic gates are implemented through analog signals. Different combinations of analog signals are applied to the quantum bits through the channels for controlling the quantum bits, thereby realizing quantum circuits with different functions and completing data processing. Therefore, the design of the quantum logic function acting on quantum bits (including the design of whether the quantum bits are used or not and the design of the efficiency of each quantum bit) is the key to improving the computing performance of quantum computers, and requires special design. This is also the uniqueness of quantum algorithms based on quantum logic functions, which is essentially and significantly different from classical algorithms based on classical logic functions. The above-mentioned design for quantum bits is a technical problem that ordinary computing devices do not need to consider or face. The present invention proposes a processing method and related device for modular exponential data generation tasks, which aims to efficiently generate GF(2 k ) in order to accelerate the cracking of the classic encryption algorithm.

[0081] See also Figure 2 , Figure 2 A flowchart of a method for processing a modular exponential data generation task provided by an embodiment of the present invention is applied to a classical computing unit. The modular exponential data generation task is used to calculate a finite field GF(2 k), the method comprising:

[0082] Step 201: Construct a method for calculating GF(2 k ) is a quantum circuit that generates a modular exponential operation based on the input base and exponent;

[0083] Among them, GF(2 k ) are polynomials with coefficients of 0 and 1. More precisely, they are the remainder class of polynomials, where the equivalence relation is characterized by dividing the polynomial modulo (modulo division is the remainder of polynomial division) by an irreducible polynomial of degree k. An irreducible polynomial is one that has no other polynomials as factors other than 1 and the polynomial itself in the given number field.

[0084] For current binary system computers, GF(2 k ) is particularly important. Many encryption standard algorithms use bytes as processing units. For example, each byte can be regarded as GF(2 8 )(k=8), each element corresponds to a polynomial with a degree not exceeding 7, a7a6a5a4a3a2a1a0=a7x 7 +a6x 6 +a5x 5 +a4x 4 +a3x 3 +a2x 2 +a1x 1 +a0.

[0085] If the input base is x, the exponent is n, and the irreducible polynomial is f, then the modular exponential operation is x n mod f.

[0086] Decomposing a square matrix A into the product of a lower triangular matrix L and an upper triangular matrix U is called LU decomposition. LUP decomposition adds a permutation matrix P to the LU decomposition. Matrix A is first processed by the permutation matrix to obtain AP, and then the LU decomposition is performed on the new matrix, i.e., AP = LU.

[0087] Step 202: Sending the index and the quantum circuit to a quantum computing unit;

[0088] Step 203: Receive the measurement result fed back by the quantum computing unit, and determine and output the modular exponential operation result based on the measurement result.

[0089] The quantum computing unit can excite the quantum state of a qubit to an initial state based on an exponential loading. For example, if the exponent is 5, its binary representation is 101. Therefore, the 0th and 2nd qubits can be excited from the ground state |0> to the excited state |1>. The qubits are then driven to evolve from the initial quantum state based on the quantum circuit to obtain measurement results for the qubits. The quantum computing unit executes the quantum circuit a specified number of times.

[0090] The measurement results may be in the form of an array. For example, for two quantum bits and 1024 execution times, the measurement results may be "00": 251, "01": 213, "10": 260, and "11": 300, where "00", "01", "10", and "11" are the measured quantum states, and "251, 213, 260, and 300" are the times corresponding to the measured quantum states.

[0091] Specifically, the quantum computing unit generates a first pulse modulation signal based on the exponent, and the first pulse modulation signal is used to drive the quantum bit to be excited to an initial quantum state; and generates a second pulse modulation signal based on the quantum circuit, and the first pulse modulation signal is used to drive the quantum bit to evolve from the initial quantum state to the target state; the quantum computing unit generates a third pulse modulation signal, and the third pulse modulation signal is used to measure the quantum bit to obtain a measurement result corresponding to the target state.

[0092] Compared with the prior art, the present invention provides a method and a related device for processing modular exponential data generation tasks. The classical calculation unit is constructed based on a preset irreducible polynomial, a base number and a LUP decomposition method to calculate GF(2 k ) in the quantum circuit; and sending the exponent and the quantum circuit to a quantum computing unit;

[0093] The quantum computing unit excites the quantum bit to an initial quantum state based on the index, and drives the quantum bit to evolve from the initial quantum state based on the quantum circuit to obtain a measurement result of the quantum bit; and sends the measurement result to the classical computing unit;

[0094] The classical computing unit determines and outputs the modular exponential operation result based on the measurement result; a quantum circuit is constructed by using irreducible polynomials, bases and LUP decomposition method, and the exponent is used as the input of the quantum circuit to achieve efficient generation of GF(2 k ) in order to accelerate the cracking of classic encryption algorithms.

[0095] Optionally, the method for calculating GF(2k ) is a quantum circuit that generates the modular exponential operation result of the base and exponent input in , including:

[0096] Decomposing the modular exponential operation into modular multiplication operations of k polynomials;

[0097] Constructing a sub-quantum circuit corresponding to each polynomial in the modular multiplication operation based on a preset irreducible polynomial, the base number, and the LUP decomposition method to obtain k sub-quantum circuits;

[0098] The k sub-quantum circuits are cascaded to obtain the k ) is a quantum circuit that generates the result of modular exponential operations on the base and exponent input in .

[0099] If the binary number of n is n k n k-1 …n1, then For example Therefore, modular exponential operations can be decomposed into modular multiplication operations of k polynomials.

[0100] The input of the quantum circuit is the quantum state of the quantum bit. Since the finite field GF(2 k ) is decomposed into k polynomial multiplication operations. Therefore, except for the sub-quantum circuits corresponding to the first and last polynomials, the output of the sub-quantum circuit corresponding to the first polynomial is the input of the sub-quantum circuit corresponding to the next polynomial; the input of the sub-quantum circuit corresponding to the first polynomial is the quantum state of the quantum bit encoding the input data.

[0101] Furthermore, the step of constructing a sub-quantum circuit corresponding to each polynomial in the modular multiplication operation based on a preset irreducible polynomial, the base number, and the LUP decomposition method includes:

[0102] Determining a first square matrix based on a preset irreducible polynomial and the base;

[0103] Iteratively calculate the square of the first matrix until k-1 second matrices are obtained, where the second matrix is ​​2 of the first matrix. m power, where m is an integer in [1, k-1];

[0104] Perform LUP decomposition on the first square matrix and k-1 second square matrices to obtain k L-type, k U-type, and k P-type matrices respectively;

[0105] Constructing quantum circuits corresponding to the L-type and U-type matrices based on CNOT gates, and constructing quantum circuits corresponding to the P-type matrix based on SWAP gates;

[0106] Each of the P-type matrices and the quantum circuits corresponding to the U-type and L-type matrices corresponding to the P-type matrix are spliced ​​to obtain a sub-quantum circuit corresponding to each polynomial in the modular multiplication operation.

[0107] Specifically, determining the first matrix based on the preset irreducible polynomial and the base includes:

[0108] Determine the degree corresponding to the highest term in the preset irreducible polynomial;

[0109] Determining a modular multiplication result of the base and each term of a lower degree than the highest term;

[0110] A first square matrix is ​​determined based on the modular multiplication result.

[0111] For example, the preset irreducible polynomial is f=1+x+x 4 , the base is the polynomial 1+x, and the modular multiplication results of the base and each term with a lower degree than the highest term are:

[0112] (1+x)×1modf=1+x

[0113] (1+x)×xmodf=x+x 2

[0114] (1+x)×x 2 modf=x 2 +x 3

[0115] (1+x)×x 3 modf=x 3 +x 4 modf=1+x+x 3

[0116] Convert the above expression into the language of linear algebra:

[0117] (1, 1, 0, 0) × (1, 0, 0, 0) = (1, 1, 0, 0)

[0118] (1, 1, 0, 0) × (0, 1, 0, 0) = (0, 1, 1, 0)

[0119] (1, 1, 0, 0) × (0, 0, 1, 0) = (0, 0, 1, 1)

[0120] (1, 1, 0, 0) × (0, 0, 0, 1) = (1, 1, 0, 1)

[0121] Putting the above four equations together we get:

[0122]

[0123] Thus, the first matrix to be determined can be obtained as:

[0124]

[0125] First, left-multiplying a matrix by a vector in the domain is equivalent to multiplying (1+x) by its elements, which is obvious because polynomial operations obey the distribution ratio of multiplication to addition.

[0126] Specifically, iteratively calculate the square of the first matrix until k-1 second matrices are obtained, where the second matrix is ​​2 of the first matrix. m For example, when m=1, then (1+x) 2 The corresponding second matrix is ​​the square of the first matrix:

[0127]

[0128] According to the above method, the iterative calculation can be obtained The corresponding second matrix.

[0129] Among them, the elements of P-type, U-type, and L-type matrices are all taken from {0, 1}, so the quantum circuit corresponding to the P-type matrix can be realized by the SWAP gate, and the quantum circuits corresponding to the U-type and L-type matrices can be realized by the CNOT gate.

[0130] Specifically, constructing a quantum circuit corresponding to the L-type matrix based on a CNOT gate includes:

[0131] Determine the non-zero elements a in the L-type matrix except the diagonal ij , apply the CNOT gate to the i-th and j-th quantum bits to obtain the quantum circuit corresponding to the L-type matrix, the i-th quantum bit is the controlled bit, the j-th quantum bit is the control bit, and i and j are the number of rows and columns of the L-type matrix respectively.

[0132] like Figure 3 As shown, Figure 3 A schematic diagram of the structure of a quantum circuit corresponding to an L-type matrix provided in an embodiment of the present invention. For example, the L-type matrix is:

[0133]

[0134] The non-zero elements of the L-type matrix except the diagonal are a 20 、a 21 、a 30, then according to the order of the non-zero elements first from small to large and then from small to large, the CNOT gate is applied to the second and 0th quantum bits (q2 and q0), the second quantum bit q2 is the controlled bit, and the 0th quantum bit q0 is the control bit; the CNOT gate is applied to the second and first quantum bits (q2 and q1), the second quantum bit q2 is the controlled bit, and the first quantum bit q1 is the control bit; the CNOT gate is applied to the third and 0th quantum bits (q3 and q0), the third quantum bit q3 is the controlled bit, and the 0th quantum bit q0 is the control bit.

[0135] Specifically, the quantum circuit corresponding to the U-shaped matrix is ​​constructed based on the CNOT gate, including:

[0136] Determine the non-zero elements a in the U-shaped matrix except the diagonal ij , apply the CNOT gate to the i-th and j-th quantum bits to obtain the quantum circuit corresponding to the U-shaped matrix, the j-th quantum bit is the controlled bit, the i-th quantum bit is the control bit, and i and j are the number of rows and columns of the U-shaped matrix respectively.

[0137] The specific implementation process of the quantum circuit corresponding to the U-type matrix is ​​similar to the specific implementation process of the quantum circuit corresponding to the L-type matrix. Please refer to the specific implementation process of the quantum circuit corresponding to the above L-type matrix, and will not be repeated here.

[0138] Specifically, the quantum circuit corresponding to the P-type matrix is ​​constructed based on the SWAP gate, and the dimension of the P-type matrix is ​​k×k, including:

[0139] Transfer the quantum state of k qubits corresponding to the number of rows to the quantum state of k qubits corresponding to the number of columns, and determine the non-zero elements a in the P-type matrix except the diagonal. mn , m and n are the number of rows and columns of the P-type matrix respectively;

[0140] A SWAP gate is applied to the m-th qubit among the k qubits corresponding to the number of rows and the n-th qubit among the k qubits corresponding to the number of columns to obtain a quantum circuit corresponding to the P-type matrix.

[0141] Furthermore, transferring the quantum state of the k qubits corresponding to the number of rows to the quantum state of the k qubits corresponding to the number of columns includes:

[0142] The SWAP gate is applied to the qubits corresponding to the row number and the qubits corresponding to the column number with the same serial number, and there are k qubits corresponding to both the row number and the column number.

[0143] For example, Figure 4 As shown, Figure 4A structure schematic diagram of a quantum circuit corresponding to a P-type matrix is provided for an embodiment of the present application. Line0 Line1 Line2 Line3 Row0 Row1 Row2 Row3 The quantum states of the quantum bits corresponding to the row number can be transferred to the quantum states of the quantum bits corresponding to the column number by SWAP(q Line0 Row0 Line1 Row1 Line2 Row2 Line3 Row3 The four SWAP gates act on different quantum bits, so they do not affect the timing sequence. Figure 4 This is only one embodiment.

[0144] If the P-type matrix is:

[0145]

[0146] The non-zero elements are a 01 12 23 30 Therefore, SWAP(q Line0 Row1 Line1 Row2 Line2 Row3 Line3 Row0 The four SWAP gates act on different quantum bits, so they do not affect the timing sequence. Figure 4 This is only one embodiment.

[0147] Specifically, the quantum circuits corresponding to the P-type, U-type and L-type matrices are spliced to obtain a quantum circuit for calculating the modulus square operation result of an input polynomial in GF(2 k The dimensions of the L-type and U-type matrices are also k x k, and the k quantum bits corresponding to the row number of the P-type matrix can be cascaded with the k quantum bits included in the quantum circuits corresponding to the U-type and L-type matrices to achieve splicing.

[0148] Referring to Figure 5 ,​​​​​​​​​​​​​​​​​​​​​​​​ Figure 5 A structure diagram of a sub-quantum circuit corresponding to one of the polynomials in a modular multiplication operation is provided for an embodiment of the present application. The sub-quantum circuit is spliced by a matrix P k Corresponding quantum circuit MatP k , a matrix U k Corresponding quantum circuit MatU k , a matrix L k Corresponding quantum circuit MatL k .

[0149] Referring to Figure 6 , Figure 6 A quantum circuit for calculating the modular exponentiation result of the input base and exponent in the finite field GF(2 k ) is provided for an embodiment of the present application. The quantum circuit includes k data bits and k auxiliary bits. Among them, the k data bits are used to encode the binary value n k n k-1 …n1 of the exponent n, and the initial quantum state of one of the k auxiliary bits is the excited state |1>, for example, the initial state of the auxiliary bit representing the lowest bit is |1>. The k+1 quantum logic gates in the sub-quantum circuit shown in the embodiment act on the k auxiliary bits, and the quantum logic gates are controlled by the data bits corresponding to the binary bits. Finally, measuring the k auxiliary bits can obtain the quantum state corresponding to the modular exponentiation result of the base and the exponent. Figure 6

[0150] Referring to Figure 7 , Figure 7 Another flowchart of a processing method for a modular exponent data generation task is provided for an embodiment of the present application, which is applied to a quantum computing unit, and the modular exponent data generation task is used to calculate the modular exponentiation result of the input base and exponent in the finite field GF(2 k ), and the method includes:

[0151] Step 701: receiving the exponent and quantum circuit sent by a classical computing unit, the quantum circuit is used to calculate the modular exponentiation result of the input base and exponent in the finite field GF(2 k ), and the quantum circuit is constructed based on a predetermined irreducible polynomial, the base and LUP decomposition method;

[0152] Step 702: based on the exponent, exciting the quantum bit to an initial quantum state, and based on the quantum circuit, driving the quantum bit to evolve from the initial quantum state to obtain the measurement result of the quantum bit;

[0153] ​Step 703: Send the measurement result to the classical computing unit, so that the classical computing unit determines the modular exponential operation result based on the measurement result.

[0154] The specific implementation of this embodiment can be found in the application to the classic computing unit side. Figure 2 The embodiments shown are not described in detail here.

[0155] Yet another embodiment of the present invention provides a quantum computing system, the quantum computing system comprising a classical computing unit and a quantum computing unit;

[0156] The classical computing unit is used to perform the following steps:

[0157] Based on the preset irreducible polynomial, the base number and the LUP decomposition method, a method for calculating GF(2 k ) is a quantum circuit that generates a modular exponential operation based on the input base and exponent;

[0158] sending the index and the quantum circuit to a quantum computing unit;

[0159] Receive the measurement result fed back by the quantum computing unit, and determine and output the modular exponential operation result based on the measurement result.

[0160] The quantum computing unit is used to perform the following steps:

[0161] Receive the index and quantum circuit sent by the classical computing unit, the quantum circuit is used to calculate GF(2 k ), wherein the quantum circuit is constructed based on a preset irreducible polynomial, the base and the LUP decomposition method;

[0162] Exciting the quantum bit to an initial quantum state based on the index, and driving the quantum bit to evolve from the initial quantum state based on the quantum circuit to obtain a measurement result of the quantum bit;

[0163] The measurement result is sent to the classical computing unit, so that the classical computing unit determines the modular exponential operation result based on the measurement result.

[0164] Furthermore, the method further comprises:

[0165] The obtained ciphertext is decrypted based on the modular exponential operation result.

[0166] See also Figure 8 , Figure 8A structural diagram of a processing device for a modulus exponent data generation task is provided for an embodiment of the present application, and is applied to a classical computing unit. The modulus exponent data generation task is used to calculate a modulus exponent operation result of an input base and exponent in a finite field. The device comprises:

[0167] A processing unit 801 is configured to construct a quantum circuit for calculating a modulus exponent operation result of an input base and exponent based on a preset irreducible polynomial, the base and a LUP decomposition method;

[0168] A sending unit 802 is configured to send the exponent and the quantum circuit to a quantum computing unit;

[0169] A receiving unit 803 is configured to receive a measurement result fed back by the quantum computing unit, and determine and output the modulus exponent operation result based on the measurement result.

[0170] Referring to Figure 9 , Figure 9 A structural diagram of another processing device for a modulus exponent data generation task is provided for an embodiment of the present application, and is applied to a quantum computing unit. The modulus exponent data generation task is used to calculate a modulus exponent operation result of an input base and exponent in a finite field GF(2 k ). The method comprises:

[0171] A receiving unit 901 is configured to receive the exponent and a quantum circuit sent by a classical computing unit. The quantum circuit is used to calculate a modulus exponent operation result of an input base and exponent in GF(2 k ). The quantum circuit is constructed based on a preset irreducible polynomial, the base and a LUP decomposition method;

[0172] A computing unit 902 is configured to excite a quantum bit to an initial quantum state based on the exponent, and drive the quantum bit to evolve from the initial quantum state based on the quantum circuit, to obtain a measurement result of the quantum bit;

[0173] A sending unit 903 is configured to send the measurement result to the classical computing unit, so that the classical computing unit determines the modulus exponent operation result based on the measurement result.

[0174] The specific functions and effects of the processing device for the modulus exponent data generation task can be explained by referring to other embodiments of the present application, and will not be described here. Each module in the processing device for the modulus square data generation task can be realized by software, hardware and a combination thereof. The modules can be embedded in or independent of a processor in a computer device in hardware form, or stored in a memory in a computer device in software form, so as to be called and executed by a processor to perform operations corresponding to each module.

[0175] Please refer to Figure 10 The embodiments of the present specification also provide a computer device comprising a memory and a processor, wherein the memory stores a computer program, and wherein the processor implements the processing method of the modular exponent data generation task in any of the above embodiments when executing the computer program. Please refer to Figure 10 The computer device can be a classical computer. The computer device can also be a quantum computer.

[0176] The embodiments of the present specification also provide a computer-readable storage medium, which stores a computer program, and wherein the computer program causes the computer to execute the processing method of the modular exponent data generation task in any of the above embodiments when the computer executes the computer program.

[0177] The embodiments of the present specification also provide a computer program product comprising instructions, which cause the computer to execute the processing method of the modular exponent data generation task in any of the above embodiments when the computer executes the instructions.

[0178] It can be understood that the specific examples in the present specification are only to help those skilled in the art better understand the embodiments of the present specification, and not to limit the scope of the present application.

[0179] It can be understood that in various embodiments of the present specification, the size of the serial number of each process does not mean the order of execution, and the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present specification.

[0180] It can be understood that the various embodiments described in the present specification can be implemented alone or in combination, and the embodiments of the present specification do not limit this.

[0181] Unless otherwise defined, all technical and scientific terms used in the embodiments of the present specification have the same meanings as those commonly understood by those skilled in the art of the present specification. The terms used in the present specification are only for the purpose of describing the specific embodiments and are not intended to limit the scope of the present specification. The term "and / or" used in the present specification includes any and all combinations of one or more of the related listed terms. The singular forms "a", "an" and "the" used in the embodiments of the present specification and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0182] It can be understood that the processor of the embodiments of the present specification can be an integrated circuit chip with processing capability of signals. In the implementation process, each step of the method embodiments described above can be completed by integrated logic circuits in hardware or instructions in software form in the processor. The processor described above can be a general processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. Each method, step and logic block disclosed in the embodiments of the present specification can be implemented or executed. The general processor can be a microprocessor or the processor can also be any conventional processor or the like. The steps of the method disclosed in combination with the embodiments of the present specification can be directly embodied as a hardware coding processor for execution, or a combination of hardware and software modules in the coding processor for execution. The software module can be located in a random access memory, a flash memory, a read only memory, a programmable read only memory or an electrically erasable programmable memory, a register or other mature storage medium in the art. The storage medium is located in the storage, and the processor reads the information in the storage, and combines the hardware to complete the steps of the above method.

[0183] It can be understood that the memory in the embodiments of the present specification can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read only memory (ROM), a programmable read only memory (PROM), an erasable programmable read only memory (EPROM), an electrically erasable programmable read only memory (EEPROM) or a flash memory. The volatile memory can be a random access memory (RAM). It should be noted that the memory of the system and method described herein is intended to include but not limited to these and any other suitable type of memory.

[0184] Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be realized in electronic hardware, or a combination of computer software and electronic hardware. Whether the functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present specification.

[0185] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described system, device and unit can refer to the corresponding processes in the foregoing method embodiments, which will not be repeated here.

[0186] In several embodiments provided in the specification, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the above-described device embodiments are only schematic, and the division of the units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be omitted or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some interface, device or unit, and can be electrical, mechanical or other forms.

[0187] The units described as separate components can or can not be physically separated, and the components shown as units can or can not be physical units, i.e., can be located in one place or can be distributed on a plurality of network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment scheme.

[0188] In addition, each functional unit in each embodiment of the specification can be integrated into one processing unit, or each unit can exist physically, or two or more units can be integrated into one unit.

[0189] If the functions are realized in the form of software functional units and sold or used as independent products, they can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the specification or the essential part of the prior art or the part of the technical solutions can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the specification. The foregoing storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk, and various program code storage media.

[0190] The above is only a specific embodiment of the specification, but the protection scope of the application is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical scope disclosed in the specification, which should be covered within the protection scope of the specification. Therefore, the protection scope of the application should be subject to the protection scope of the claims.

Claims

1. A method for processing a modular exponential data generation task, characterized in that: Applied to the classical computing unit, the modular exponential data generation task is used to calculate the finite field A result of a modular exponential operation of a base and an exponent inputted in the method comprising: Based on the preset irreducible polynomial, the base number and the LUP decomposition method, a method for calculating The quantum circuit for the modular exponential operation of the input base and exponent includes: Decomposing the modular exponential operation into modular multiplication operations of k polynomials; Constructing a sub-quantum circuit corresponding to each polynomial in the modular multiplication operation based on a preset irreducible polynomial, the base number, and the LUP decomposition method to obtain k sub-quantum circuits; The k sub-quantum circuits are cascaded to obtain the The quantum circuit of the modular exponential operation result of the input base and exponent; sending the index and the quantum circuit to a quantum computing unit; Receive the measurement result fed back by the quantum computing unit, and determine and output the modular exponential operation result based on the measurement result.

2. The method according to claim 1, wherein The constructing of a sub-quantum circuit corresponding to each polynomial in the modular multiplication operation based on a preset irreducible polynomial, the base number and the LUP decomposition method includes: Determining a first square matrix based on a preset irreducible polynomial and the base; Iterate and calculate the square of the first matrix until k-1 second matrices are obtained, and the second matrix is ​​the square of the first matrix. power, where m is an integer in [1, k-1]; Perform LUP decomposition on the first square matrix and k-1 second square matrices to obtain k L-type, k U-type, and k P-type matrices respectively; Constructing quantum circuits corresponding to the L-type and U-type matrices based on CNOT gates, and constructing quantum circuits corresponding to the P-type matrix based on SWAP gates; Each of the P-type matrices and the quantum circuits corresponding to the U-type and L-type matrices corresponding to the P-type matrix are spliced ​​to obtain a sub-quantum circuit corresponding to each polynomial in the modular multiplication operation.

3. The method according to claim 2, wherein The determining of the first square matrix based on the preset irreducible polynomial and the base includes: Determine the degree corresponding to the highest term in the preset irreducible polynomial; Determining a modular multiplication result of the base and each term of a lower degree than the highest term; A first square matrix is ​​determined based on the modular multiplication result.

4. A method for processing a modular exponential data generation task, characterized in that: Applied to quantum computing units, the modular exponential data generation task is used to calculate finite fields A result of a modular exponential operation of a base and an exponent inputted in the method comprising: Receive the index and quantum circuit sent by the classical computing unit, the quantum circuit is used to calculate The result of modular exponential operation of the base and exponent input in the quantum circuit is constructed based on a preset irreducible polynomial, the base and the LUP decomposition method, including: Decomposing the modular exponential operation into modular multiplication operations of k polynomials; Constructing a sub-quantum circuit corresponding to each polynomial in the modular multiplication operation based on a preset irreducible polynomial, the base number, and the LUP decomposition method to obtain k sub-quantum circuits; The k sub-quantum circuits are cascaded to obtain the The quantum circuit of the modular exponential operation result of the input base and exponent; Exciting the quantum bit to an initial quantum state based on the index, and driving the quantum bit to evolve from the initial quantum state based on the quantum circuit to obtain a measurement result of the quantum bit; The measurement result is sent to the classical computing unit, so that the classical computing unit determines the modular exponential operation result based on the measurement result.

5. A quantum computing system, characterized in that The quantum computing system includes a classical computing unit and a quantum computing unit; The classical computing unit is used to perform the following steps: Based on the preset irreducible polynomial, base and LUP decomposition method, it is used for calculation The quantum circuit for the modular exponential operation of the input base and exponent includes: Decomposing the modular exponential operation into modular multiplication operations of k polynomials; Constructing a sub-quantum circuit corresponding to each polynomial in the modular multiplication operation based on a preset irreducible polynomial, the base number, and the LUP decomposition method to obtain k sub-quantum circuits; The k sub-quantum circuits are cascaded to obtain the The quantum circuit of the modular exponential operation result of the input base and exponent; sending the index and the quantum circuit to a quantum computing unit; receiving a measurement result fed back by a quantum computing unit, and determining and outputting the modular exponential operation result based on the measurement result; The quantum computing unit is used to perform the following steps: receiving the index and quantum circuit sent by a classical computing unit; Exciting the quantum bit to an initial quantum state based on the index, and driving the quantum bit to evolve from the initial quantum state based on the quantum circuit to obtain a measurement result of the quantum bit; The measurement result is sent to the classical computing unit, so that the classical computing unit determines the modular exponential operation result based on the measurement result.

6. A processing device for modular exponential data generation task, characterized in that: Applied to a classical computing unit, the modular exponential data generation task is used to calculate the modular exponential operation result of the input base and exponent in a finite field. The device includes: A processing unit, configured to construct a quantum circuit for calculating a modular exponential operation result of a base and an exponent input in the calculation based on a preset irreducible polynomial, the base, and the LUP decomposition method, comprising: Decomposing the modular exponential operation into modular multiplication operations of k polynomials; Constructing a sub-quantum circuit corresponding to each polynomial in the modular multiplication operation based on a preset irreducible polynomial, the base number, and the LUP decomposition method to obtain k sub-quantum circuits; The k sub-quantum circuits are cascaded to obtain the The quantum circuit of the modular exponential operation result of the input base and exponent; a sending unit, configured to send the index and the quantum circuit to a quantum computing unit; A receiving unit is used to receive the measurement result fed back by the quantum computing unit, and determine and output the modular exponential operation result based on the measurement result.

7. A processing device for modular exponential data generation task, characterized in that: Applied to quantum computing units, the modular exponential data generation task is used to calculate finite fields The modular exponential operation result of the base and the exponent input in the method includes: A receiving unit is configured to receive the index and quantum circuit sent by the classical computing unit, wherein the quantum circuit is used to calculate The result of modular exponential operation of the base and exponent input in the quantum circuit is constructed based on a preset irreducible polynomial, the base and the LUP decomposition method, including: Decomposing the modular exponential operation into modular multiplication operations of k polynomials; Constructing a sub-quantum circuit corresponding to each polynomial in the modular multiplication operation based on a preset irreducible polynomial, the base number, and the LUP decomposition method to obtain k sub-quantum circuits; The k sub-quantum circuits are cascaded to obtain the The quantum circuit of the modular exponential operation result of the input base and exponent; a computing unit, configured to excite the qubit to an initial quantum state based on the index, and drive the qubit to evolve from the initial quantum state based on the quantum circuit, to obtain a measurement result of the qubit; A sending unit is configured to send the measurement result to the classical computing unit, so that the classical computing unit determines the modular exponential operation result based on the measurement result.

8. A storage medium, characterized in that: The storage medium stores a computer program, wherein the computer program is configured to execute the method according to any one of claims 1 to 4 when executed.

9. An electronic device comprising a memory and a processor, characterized in that: A computer program is stored in the memory, and the processor is configured to run the computer program to perform the method according to any one of claims 1 to 4.

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