Control method and device for three-level DCDC parallel positive and negative current sharing and storage medium

Abstract

A three-level DCDC parallel positive and negative current sharing control method and device and storage medium, the method comprising: each DCDC takes the current average value of the first pole inductor as the target to obtain the current sharing compensation value of the first pole inductor by tracking the current sampling value of the first pole inductor, adds it to the given of the current inner loop, and generates the first driving signal based on the output value of the current inner loop; taking the current sampling value of the first pole inductor as the target to obtain the current error compensation value between the two pole inductors by tracking the current sampling value of the second pole inductor, adding the current error compensation value and the output value of the current inner loop, and generating the second driving signal based on the addition result; in this way, the DCDC driving signal is generated by taking the current inner loop control of the first pole inductor current as the leading role and the current sharing loop control of the second pole inductor current as the auxiliary role, solving the positive and negative pole current imbalance problem in the operation process of multiple DCDCs, and avoiding the oscillation caused by the control conflict of multiple current loop control.

Description

Technical Field

[0001] The present invention relates to the technical field of three-level DC-DC technology, and in particular to a control method, device and storage medium for positive and negative current sharing of a three-level DC-DC system in parallel. Background Art

[0002] With the continuous expansion of new energy storage power station capacity, the use of parallel converters is becoming increasingly widespread to optimize converter capacity. Because three-level DC-DC converters contain both positive and negative inductors, they can effectively reduce the size of the inductor while maintaining the same current ripple compared to two-level DC-DC converters. Furthermore, the AC component of the output voltage of a three-level DC-CDC converter is significantly smaller than that of a two-level converter, improving the converter's dynamics and efficiency. Consequently, three-level DC-CDC converters are widely used.

[0003] In a three-level DC-DC expansion parallel system, due to the common DC source and the parallel DC bus connected to renewable energy sources such as photovoltaics and energy storage, as well as inevitable differences in device parameters and driver delays among the parallel converters, uneven currents in the positive and negative inductors of the parallel converters can occur. This can affect the lifespan of the converters and, in severe cases, even undermine reliable system operation. Therefore, it is necessary to implement current-sharing control measures for the positive and negative inductor currents in a three-level DC-DC parallel system to ensure that the positive and negative inductor currents of each DC-DC converter in the parallel system are properly controlled.

[0004] The above information disclosed in this Background section is included only for enhancement of understanding of the background of the disclosure and therefore it may contain information that does not form the prior art that is currently known to a person of ordinary skill in the art. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a control method, device and storage medium for the positive and negative current sharing of the three-level DCDC parallel system in response to the demand for current sharing control of the positive and negative inductor currents in the above-mentioned three-level DCDC parallel system in the prior art.

[0006] The technical solution adopted by the present invention to solve its technical problem is:

[0007] On the one hand, a control method for current sharing of the positive and negative electrodes of a three-level DC-DC parallel connection is constructed, which is applicable to current sharing control on the input side when multiple DC-DC modules are connected in parallel. The input side of the DC-DC module includes a positive inductor connected to the positive electrode of the input DC source and a negative inductor connected to the negative electrode of the input DC source. The method includes:

[0008] The DCDC module uses the current sampling value of its own first-pole inductor to track the current average value of the first-pole inductors of all the DCDC modules, performs closed-loop feedback control to obtain a current sharing compensation value of the first-pole inductors, superimposes the current sharing compensation value on the given current inner loop, and generates a corresponding first drive signal based on the output value of the current inner loop;

[0009] The DCDC module uses the current sampling value of its own second-pole inductor to track the current sampling value of the first-pole inductor, performs closed-loop feedback control to obtain a current error compensation value between the second-pole inductor and the first-pole inductor, superimposes the current error compensation value with the output value of the current inner loop, and generates a corresponding second drive signal based on the superposition result;

[0010] Among them, the first pole refers to the negative pole and the second pole refers to the positive pole, the first drive signal is the DCDC lower tube drive signal, and the second drive signal is the DCDC upper tube drive signal; or, the first pole refers to the positive pole and the second pole refers to the negative pole, the first drive signal is the DCDC upper tube drive signal, and the second drive signal is the DCDC lower tube drive signal.

[0011] Furthermore, in the control method for current sharing of the positive and negative poles of a three-level DCDC in parallel according to the present invention, the current sampling value of the first pole inductor thereof is used to track the current average value of the first pole inductors of all the DCDC modules, and closed-loop feedback control is performed to obtain the current sharing compensation value of the first pole inductor, specifically including:

[0012] The average current of the first-pole inductors of all the DCDC modules is used as a given value, the current sampling value of the first-pole inductor of the module itself is used as feedback, the difference between the given value and the feedback is calculated and the calculated difference is input into a first closed-loop feedback controller, and the output of the first closed-loop feedback controller is used as the current sharing compensation value of the first-pole inductor.

[0013] Furthermore, in the control method for current sharing of the positive and negative electrodes of a three-level DCDC in parallel according to the present invention, the current sharing compensation value is superimposed on the given current inner loop, and a corresponding first drive signal is generated based on the output value of the current inner loop, specifically including:

[0014] The DCDC module superimposes the current feedforward value, the current sharing compensation value, and the output value of its own voltage outer loop as the given value of the current inner loop, uses the current sampling value of its own first-pole inductor as feedback, calculates the difference between the given value and the feedback value, and inputs the calculated difference into the second closed-loop feedback controller, and generates a corresponding first drive signal based on the output of the second closed-loop feedback controller;

[0015] The current feedforward value refers to the current of the first pole of the input DC source.

[0016] Furthermore, in the control method for current sharing of positive and negative electrodes of a three-level DC-DC device in parallel according to the present invention, the method further includes:

[0017] The DCDC module uses a uniformly set voltage reference value as a given value and a voltage sampling value of its own output voltage as feedback, calculates the difference between the given value and the feedback value, and inputs the calculated difference value into a third closed-loop feedback controller, and uses the output of the third closed-loop feedback controller as the output value of the voltage outer loop.

[0018] Furthermore, in the control method for equalizing the positive and negative currents of the three-level DCDC in parallel according to the present invention, among all the DCDC modules, one of the DCDC modules is a master and the other DCDC modules are slaves;

[0019] The DCDC modules communicate with each other via a local area network, the host sends the voltage reference value to the local area network, and the slave obtains the voltage reference value from the local area network;

[0020] Except for the closed-loop feedback control of the voltage outer loop of the slave, which is implemented based on the P controller, all other closed-loop feedback controls are implemented based on the PI controller.

[0021] Furthermore, in the control method for current sharing of the positive and negative electrodes of a three-level DC-DC device in parallel according to the present invention, the current sampling value of the second electrode inductor is used to track the current sampling value of the first electrode inductor, and closed-loop feedback control is performed to obtain a current error compensation value between the second electrode inductor and the first electrode inductor, specifically including:

[0022] The current sampling value of its own first-pole inductor is used as a given value, and the current sampling value of its own second-pole inductor is used as feedback. The difference between the given value and the feedback is calculated and the calculated difference is input into a fourth closed-loop feedback controller, and the output of the fourth closed-loop feedback controller is used as a current error compensation value between the second-pole inductor and the first-pole inductor.

[0023] Furthermore, in the control method for current sharing of positive and negative electrodes of a three-level DC-DC device in parallel according to the present invention, the method further includes:

[0024] Sharing the current sampling value of the first-pole inductor with the other DCDC modules, and obtaining the current sampling values ​​of the first-pole inductor shared by the other DCDC modules, summing and averaging the current sampling values ​​of the first-pole inductors of all the DCDC modules to obtain an average current value of the first-pole inductor.

[0025] Furthermore, in the control method for equalizing the positive and negative currents of a three-level DCDC in parallel according to the present invention, the DCDC modules communicate with each other via a local area network. The DCDC module sends a current sampling value of its own first-pole inductor to the local area network in real time, and obtains current sampling values ​​of the first-pole inductors of other DCDC modules from the local area network in real time.

[0026] On the second aspect, a control device for equalizing the positive and negative currents of a three-level DCDC in parallel is constructed, which includes a processor and a memory, wherein the memory stores a computer program, and when the computer program is executed by the processor, the steps of the method described in any of the above items are implemented.

[0027] In a third aspect, a computer-readable storage medium is constructed, characterized in that a computer program is stored therein, and when the computer program is executed by a processor, the steps of the method described in any of the preceding items are implemented.

[0028] The control method, device, and storage medium for positive and negative current sharing of a three-level DCDC in parallel of the present invention have the following beneficial effects: on the one hand, each DCDC in the parallel system uses the current sampling value of its own first-pole inductor to track the current average value of the first-pole inductors of all the DCDCs as the target, performs closed-loop feedback control, and generates a corresponding first drive signal to drive the corresponding switch tube; on the other hand, uses the current sampling value of its own second-pole inductor to track the current sampling value of the first-pole inductor as the target, performs closed-loop feedback control to obtain a current error compensation value between the second-pole inductor and the first-pole inductor, superimposes the current error compensation value with the output value of the current inner loop, and generates a second drive signal based on the superposition result to drive another switch. Since the current sharing control of the second-pole inductor is slow and the control output amplitude is not large, it serves as an auxiliary fine-tuning Therefore, the first-pole inductor current inner-loop control is always maintained as the primary control, and the second-pole current sharing control is maintained as the auxiliary control, so that the positive and negative inductors of multiple DCDCs share the current. This control method is simple and effective, and reduces the complexity and difficulty of parallel control. Moreover, because the present invention cleverly uses the first-pole inductor current inner-loop control of each DCDC as the primary control and the second-pole current sharing control as the auxiliary control, it avoids oscillation caused by loss of control or conflicting control effects caused by multiple current loops. In addition, because the auxiliary control of the second-pole inductor current does not require additional acquisition of any information related to other DCDCs, the consumption of data communication resources (mainly the local area network is responsible for data transmission between DCDCs) is reduced, and the upper limit of the number of parallel machines is increased to a certain extent. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only embodiments of the present invention. Those skilled in the art can also derive other drawings based on the provided drawings without inventive work.

[0030] Figure 1 This is a schematic diagram of three-level DCDC in parallel;

[0031] Figure 2 is a schematic diagram of the control method of the present invention;

[0032] Figure 3 It is a schematic diagram of a specific model corresponding to the control method of the present invention;

[0033] Figure 4 Schematic diagram of an application scenario of the method of the present invention;

[0034] Figure 5 It is a principle diagram of a specific embodiment of the control method of the present invention. DETAILED DESCRIPTION

[0035] To facilitate understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Typical embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical solutions of the present application, rather than limitations of the technical solutions of the present application. In the absence of conflict, the embodiments of the present invention and the technical features in the embodiments can be combined with each other.

[0036] The method of the present invention is applicable to the current sharing control of the input side when multiple DCDC modules are connected in parallel. Therefore, before introducing the method of the present invention, Figure 1 The parallel connection of three-level DC-DC converters is described.

[0037] DCDC is used to convert a DC voltage (i.e. Figure 1 The input DC source in the Figure 1 A power electronic device (e.g., an output DC source) is used to provide a stable voltage supply or adapt to different voltage requirements. DC-DC converters can be categorized as two-level DC-DC converters and three-level DC-DC converters. The present invention is a three-level DC-DC converter.

[0038] like Figure 1 As shown, the DCDC module mainly includes a DCDC upper tube and a DCDC lower tube. The DCDC upper tube is specifically composed of a first tube (such as Figure 1 Q1 in the figure), the second tube (as shown in Figure 1 The DCDC lower tube is specifically composed of the third tube (as shown in Q2 in FIG). Figure 1 Q3 in FIG), the fourth tube (as shown in FIG Figure 1 (as shown in Q4 in the figure). The first and second transistors are complementary, and the third and fourth transistors are complementary. The input side of the DCDC module includes a positive inductor and a negative inductor, as well as a set of input capacitors connected in series between the positive and negative poles of the input DC source. The output side of the DCDC module primarily includes a set of output capacitors. The input DC source can be a battery or other DC-DC source. The output side of the DCDC module generally provides positive and negative DC busses. A set of output capacitors are connected in series between the positive and negative DC busses, thereby outputting DC power through the positive and negative DC busses, corresponding to the output DC source in the figure, where Vbus+ and Vbus- represent the positive and negative poles of the output DC source, respectively. The first, second, third, and fourth DCDC transistors are connected in series between the positive and negative DC busses. The positive inductor is specifically connected to the positive pole of the input DC source (i.e., Vin+ in the figure) and the node between the first and second DCDC transistors. The negative inductor is specifically connected to the negative pole of the input DC source (i.e., Vin- in the figure) and the node between the third and fourth DCDC transistors.

[0039] The parallel connection of DCDC modules means that the input sides of each DCDC module are connected in parallel to the same input DC source. Specifically, the positive inductors of each DCDC module are connected to the positive pole of the same input DC source, and the negative inductors of each DCDC module are connected to the negative pole of the same input DC source. Similarly, the output sides of each DCDC module are connected in parallel to the same output DC source. Specifically, a group of output capacitors of each DCDC module are connected between the positive and negative DC bus bars.

[0040] The method of the present invention is to control the current of the positive inductor and the negative inductor of each DCDC module in parallel. Figure 2 The execution subject of the method may be a controller of a DCDC module, and the method specifically includes:

[0041] S101: Using the current sampling value of its own first-pole inductor to track the average current of the first-pole inductors of all DCDC modules, perform closed-loop feedback control to obtain a current sharing compensation value for the first-pole inductors, superimpose the current sharing compensation value on the given current inner loop, and generate a corresponding first drive signal based on the output value of the inner current loop;

[0042] Wherein, the first pole can be a positive pole or a negative pole. If the first pole refers to the negative pole, the second pole mentioned later refers to the positive pole, the first drive signal is the DCDC lower tube drive signal (for example, it can be a drive signal for generating the fourth tube, and the drive signal of the third tube is complementary to the drive signal of the fourth tube. It can also be a drive signal for generating the third tube, and the drive signal of the fourth tube is complementary to the drive signal of the third tube), and the second drive signal is the DCDC upper tube drive signal (for example, it can be a drive signal for generating the first tube, and the drive signal of the second tube is complementary to the drive signal of the first tube. It can also be a drive signal for generating the second tube, and the drive signal of the first tube is complementary to the drive signal of the second tube). If the first pole refers to the positive pole, the second pole mentioned later refers to the negative pole, the first drive signal is the DCDC upper tube drive signal (same as above, it can generate the drive signal of one of the first and second tubes, and the drive signal of the other is complementary), and the second drive signal is the DCDC lower tube drive signal (same as above, it can generate the drive signal of one of the third and fourth tubes, and the drive signal of the other is complementary).

[0043] S102: With the current sampling value of the second-pole inductor tracking the current sampling value of the first-pole inductor, closed-loop feedback control is performed to obtain a current error compensation value between the second-pole inductor and the first-pole inductor, the current error compensation value is superimposed with the output value of the current inner loop, and a corresponding second drive signal is generated based on the superposition result.

[0044] It should be noted that there is no strict time sequence relationship between steps S101 and S102. The time sequence relationship of the detailed contents in the steps should be defined by the association relationship between the specific contents in the steps.

[0045] The following combination Figure 3 , taking the i-th DCDC module as an example, the above steps are explained in detail.

[0046] Specifically, refer to Figure 3 , step S101 mainly includes:

[0047] 1) The DCDC module uses the average current of the first-pole inductors of all the DCDC modules as a given value, uses the current sampling value of its own first-pole inductor as feedback, calculates the difference between the given value and the feedback value, inputs the calculated difference into a first closed-loop feedback controller, and uses the output of the first closed-loop feedback controller as the current sharing compensation value of the first-pole inductor of the DCDC module itself;

[0048] Figure 3Where ILreal_i1 represents the current sampling value of the first-pole inductor of the i-th DCDC module. Assuming there are N DCDC modules in total, ILavg_i represents the average current of the first-pole inductors of all the DCDC modules. Then ILavg_i is obtained by summing the current sampling values ​​of the first-pole inductors of N DCDC modules and averaging them, that is, ILavg_i = (ILreal_11 + ILreal_21 + ... + ILreal_N1) / N. The difference between ILavg_i and ILreal_i1 is sent to the first closed-loop feedback controller. Figure 3 Where ILcomp_i1 represents the output of the first closed-loop feedback controller, that is, the current sharing compensation value of the i-th DCDC module.

[0049] 2) The DCDC module uses a uniformly set voltage reference value as a given value and a voltage sampling value of its own output voltage as feedback, calculates the difference between the given value and the feedback value, and inputs the calculated difference value into a third closed-loop feedback controller, and uses the output of the third closed-loop feedback controller as the output value of the voltage outer loop of the DCDC module itself;

[0050] Figure 3 Where Vref represents the voltage reference value, Vbusi represents the voltage sampling value of the output voltage of the i-th DCDC module, and Vbusi is composed of Figure 1 The Vbusi+ and Vbusi- in the output are added together, and the difference between Vref and Vbusi is sent to the third closed-loop feedback controller. Figure 3 Vouti represents the output of the third closed-loop feedback controller, that is, the output value of the voltage outer loop of the i-th DCDC module.

[0051] 3) The DCDC module superimposes the current feedforward value, the current sharing compensation value of the DCDC module itself, and the output value of the DCDC module's voltage outer loop as the reference for the DCDC module's current inner loop. The current sampling value of the DCDC module's first-pole inductor is used as feedback. The difference between the reference and feedback is calculated and input into a second closed-loop feedback controller. Based on the output of the second closed-loop feedback controller, a corresponding first drive signal is generated. If the first pole is negative, the first drive signal drives the DCDC module's fourth transistor. Otherwise, if the first pole is positive, the first drive signal drives the DCDC module's first transistor. Whether generating the drive signal for the first or fourth transistor, the specific process of generating the drive signal is conventional and will not be repeated here. The pulse drive signal for the second transistor is complementary to that for the first transistor, and the pulse drive signal for the third transistor is complementary to that for the fourth transistor.

[0052] The current feedforward value refers to the current of the first pole of the input DC source, such as Figure 3As shown in IBattreal_1 in . Calculate IBattreal_1+ILcomp_i1+Vouti=ILref_i1, ILref_i1 represents the superposition value, and the difference between ILref_i1 and ILreal_i1 is sent to the second closed-loop feedback controller. Figure 3 Where ILout_i1 represents the output of the second closed-loop feedback controller.

[0053] refer to Figure 3 , step S102 specifically includes:

[0054] 1) The DCDC module uses the current sampling value of its own first-pole inductor as a given value and the current sampling value of its own second-pole inductor as feedback, calculates the difference between the given value and the feedback value, and inputs the calculated difference into a fourth closed-loop feedback controller, and uses the output of the fourth closed-loop feedback controller as the current error compensation value between the second-pole inductor and the first-pole inductor of the DCDC module;

[0055] This process can also be called the current sharing loop control of the second-pole inductor current. Figure 3 In the equation, ILreal_i2 represents the current sampling value of the second-stage inductor. The difference between ILreal_i1 and ILreal_i2 is sent to the fourth closed-loop feedback controller. Figure 3 ILout_i2 represents the output of the fourth closed-loop feedback controller.

[0056] 2) The DCDC module superimposes its own current error compensation value with the output value of its own current inner loop and generates a corresponding second drive signal based on the superposition result. If the first pole is negative, the second drive signal drives its own DCDC first transistor; otherwise, if the first pole is positive, the second drive signal drives its own DCDC fourth transistor. The pulse drive signal for the second transistor is complementary to that for the first transistor, and the pulse drive signal for the third transistor is complementary to that for the fourth transistor.

[0057] refer to Figure 3 , that is, ILout_i2 and ILout_i1 are superimposed to obtain ILout_i2', and a corresponding second driving signal is generated based on ILout_i2'.

[0058] Steps S101 and S102 are described in detail above. Some parameters need to be obtained from other DCDC modules. For example, the calculation of the parameter ILavg_i in step S101 depends on the ILreal_i1 of other DCDC modules. Another example is that Vref in step S102 also needs to be set uniformly. The transmission of these parameter data can rely on the local area network (such as the CAN local area network) between these DCDC modules for communication. Each DCDC module shares the current sampling value ILreal_i1 of its own first-pole inductor with other DCDC modules via the local area network. Specifically, the current sampling value ILreal_i1 of its own first-pole inductor is sent to the local area network in real time, and the current sampling value ILreal_i1 of the first-pole inductor shared by other DCDC modules is obtained from the local area network in real time. After obtaining the ILreal_i1 shared by other DCDC modules, ILavg_i can be calculated.

[0059] Among all the DCDC modules, one DCDC module is a master and the other DCDC modules are slaves. When a master goes offline, another master is automatically generated. It is understood that this master-slave competition control method is now very mature, and the specific algorithm will not be described in detail here. The master sends the voltage reference value Vref to the local area network, and the slave obtains the voltage reference value Vref from the local area network. In addition, the ILavg_i mentioned above can also be statistically calculated by the master and sent to the local area network to notify other slaves. In this way, other slaves do not need to calculate ILavg_i. This also falls within the scope of protection of the present invention. However, in this embodiment, it is preferred to let each DCDC calculate ILavg_i independently. This is faster than the master calculating and sending it, and also reduces the current sharing target value occupying CAN resources.

[0060] In addition, except that the third closed-loop feedback controller of the voltage outer loop of the slave is a P controller, the first, second, and fourth closed-loop feedback controllers of the slave are PI controllers, and the first, second, third, and fourth closed-loop feedback controllers of the master are PI controllers.

[0061] A specific application scenario of the present invention is introduced below.

[0062] refer to Figure 4 , is a three-level bipolar energy storage and photovoltaic coupling system with AC and DC parallel connection and busbar parallel connection, the system includes three-level DCDC, three-level DCAC, battery and PV. The control method provided by the present invention is applied to this system, that is, for the case where the three-level DCDC is connected in parallel with DC and busbar parallel connection, to control the current sharing of positive inductance and negative inductance. The system connection is as follows Figure 4As shown, one end of the DCDC module is the DC input terminal and the other end is the DC bus terminal. The DC input terminals of all DCDC modules are connected in parallel to the same DC source (i.e., the battery); the DC bus terminals of all DCDC modules are connected in parallel, that is, connected to the same pair of busbars. The input terminal of the DCAC module is the same pair of DC busbars, and the output terminal is the grid. That is, the output terminals of all DCAC modules are connected in parallel.

[0063] In this multi-parallel system, there is one master (numbered 1) and the rest are slaves (numbered 2-N). The DC / DC converters communicate via the CAN local area network. Master 1 transmits the voltage loop reference value (Vref). Slaves 2-N receive this Vref from the master to control the voltage outer loop. The difference is that the master's voltage outer loop uses PI control, while the slaves' voltage outer loop uses P control.

[0064] refer to Figure 5 The following describes the specific control process for master 1 and slave m. For other slaves, refer to slave m. It should be noted that the following description focuses solely on the negative inductor current sharing control as the primary control, with the positive inductor current sharing control as the auxiliary control. While control can also be achieved with the positive inductor current sharing control as the primary control, and the negative inductor current sharing control as the auxiliary control, this description focuses solely on the former.

[0065] 1) Each DCDC module sends its own sampled negative inductor current ILreal_11, ILreal_21, ..., ILreal_N1 to the CAN bus. Each DCDC module collects the negative inductor currents of other DCDC modules, so that each DCDC module can obtain the average negative inductor current ILavg_i through logical processing;

[0066] 2) Host 1 calculates the difference between the real-time negative inductor current value ILreal_11 obtained by the sampling module and the calculated average negative inductor current value ILavg_1, and outputs the negative inductor current sharing compensation value ILcomp_11 of host 1 after PI control;

[0067] Slave m calculates the difference between the real-time negative inductor current value ILreal_m1 obtained by the sampling module and the calculated average negative inductor current ILavg_m, and outputs the negative inductor current sharing compensation value ILcomp_m1 of slave m after PI control. The same applies to other slaves.

[0068] 3) Host 1 calculates the difference between Vref and its own output voltage Vbus1, and sends it to the PI controller to obtain Vout1. The sum of the voltage outer loop output value Vout1, the current feedforward IBattreal_1, and the negative inductor current sharing compensation value ILcomp_11 is used as the given value ILref_11 of the negative inductor current inner loop of host 1.

[0069] Slave m calculates the difference between Vref and its own output voltage Vbusm, and sends it to the P controller to obtain Voutm. The sum of the voltage outer loop output value Voutm, the current feedforward IBattreal_m, and the negative inductor current sharing compensation value ILcomp_m1 is used as the given value ILref_m1 of the negative inductor current inner loop of slave m.

[0070] In particular, the host 1 and the slave m use the real-time value of the negative battery current obtained by their own sampling modules as the current feedforward values ​​IBattreal_1 and IBattreal_m. Here, the real-time value of the negative battery current is used as feedforward to replace the integrator output.

[0071] 4) Host 1 performs PI control based on the negative inductor current control target value ILref_11 obtained above to obtain the negative inductor current inner loop output value ILout_11;

[0072] The slave m performs PI control based on the negative inductor current control target value ILref_m1 obtained above to obtain the negative inductor current inner loop output value ILout_m1;

[0073] 5) The PWM drive module uses the negative current loop outputs ILout_11 and ILout_m1 as drive signals, respectively, causing the PWM to change the duty cycle on transistors 1 and 4, thereby completing the DC-DC bus control of master 1 and slave m. Furthermore, due to the presence of the negative current sharing loop, negative current sharing is also achieved across all modules. The pulse drive signal for transistor 2 is complementary to that of transistor 1, and the pulse drive signal for transistor 3 is complementary to that of transistor 4.

[0074] Furthermore, if the positive inductor current is controlled using the same method as the negative inductor current, the following problems will arise: First, if each DCDC module also sends its own positive inductor current sampling value to the CAN bus, this will consume additional CAN local area network communication resources, increase the communication load rate, and significantly reduce the number of parallel units, which is not conducive to the use of multi-DCDC parallel systems. Second, if the positive inductor current inner loop control is added, the negative current sharing control of each DCDC will be disrupted, affecting the positive and negative current sharing control. During system operation, the two types of current sharing will inevitably switch back and forth, and the ultimate result is that the positive and negative inductor current sharing effect is not obvious, and even more serious current oscillations will occur.

[0075] Therefore, in particular, the positive current is achieved in another way, which is based on the negative current. Specifically:

[0076] 6) The sampling module of host 1 obtains the real-time value of the positive inductor current ILreal_12, takes the difference between the negative inductor current ILreal_11 and the positive inductor current ILreal_12, and obtains the positive and negative inductor current error compensation value ILout_12 after PI control;

[0077] The sampling module of slave m obtains the real-time value of the positive inductor current ILreal_m2, and subtracts the negative inductor current ILreal_m1 from the positive inductor current ILreal_m2. After PI control, the positive and negative inductor current error compensation value ILout_m2 is obtained.

[0078] 7) The positive and negative inductor current error compensation value ILout_12 is superimposed on the negative inductor current inner loop output value ILout_11 to be applied to the PWM drive signal for the first transistor of master 1, thereby fine-tuning the PWM duty cycle of the first transistor of master 1 and controlling the positive inductor current output. The positive and negative inductor current error compensation value ILout_m2 is superimposed on the negative inductor current inner loop output value ILout_m1 to be applied to the PWM drive signal for the first transistor of slave m, thereby fine-tuning the PWM duty cycle of the first transistor of slave m and controlling the positive inductor current output. The pulse drive signal for the second transistor is complementary to that of the first transistor. The purpose of this control is to control the positive inductor current to be the same as the negative inductor current. Since the negative inductor current is shared, the controller can ensure that each DCDC achieves positive current sharing. Since the positive current sharing control is slow and the control output amplitude is small, it serves as a fine-tuning auxiliary control.

[0079] Among them, the real-time value of the negative inductor current ILreal_i1 and the real-time value of the positive inductor current ILreal_i2 of each DCDC are collected through the sampling module of each DCDC.

[0080] In general, the above control method of the present invention has the following beneficial effects:

[0081] 1. It avoids the consumption of CAN local area network resources and increases the upper limit of the number of parallel machines to a certain extent;

[0082] 2. Cleverly use a control method that takes the negative inductor current control of each DCDC as the leading role and the positive inductor current control as the auxiliary role. This negative inductor current following control method avoids oscillation caused by loss of control or conflicting control actions due to multiple current loops.

[0083] 3. This control method is simple and effective, alleviating the complexity and difficulty of parallel control.

[0084] Those skilled in the art will appreciate that all or part of the processes in the above-described method embodiments can be implemented by instructing related hardware through a computer program. The program can be stored in a computer-readable storage medium, and when executed, the program can include the processes in the above-described method embodiments. The storage medium can be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM).

[0085] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0086] Terms containing ordinal numbers, such as "first" and "second," used in this specification may be used to describe various components, but these components are not limited by these terms. These terms are used solely to distinguish one component from another. For example, a first component may be named a second component, and similarly, a second component may be named a first component, without departing from the scope of the present invention.

[0087] An embodiment of the present invention further provides a control device for equalizing the positive and negative currents of a three-level DC-DC system in parallel, including a processor and a memory, wherein the memory stores a computer program. When the computer program is executed by the processor, the steps of the method described in the above embodiment are implemented. The specific implementation process can be found in the description of the above method embodiment, which will not be repeated here.

[0088] An embodiment of the present invention further provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, the steps of the method described in the above embodiment are implemented. The specific implementation process can be found in the description of the above method embodiment, which will not be repeated here.

[0089] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the present invention and the claims, all of which are protected by the present invention.

Claims

1. A method for controlling positive and negative current sharing in a three-level DC-DC parallel connection, applicable to current sharing control on the input side when multiple three-level DC-DC modules are connected in parallel. The input side of each DC-DC module includes a positive inductor connected to the positive electrode of an input DC source and a negative inductor connected to the negative electrode of the input DC source. The method is characterized in that: The method comprises: The DCDC module uses the current sampling value of its own first-pole inductor to track the current average value of the first-pole inductors of all the DCDC modules, performs closed-loop feedback control to obtain a current sharing compensation value of the first-pole inductors, superimposes the current sharing compensation value on the given current inner loop, and generates a corresponding first drive signal based on the output value of the current inner loop; The DCDC module uses the current sampling value of its own second-pole inductor to track the current sampling value of the first-pole inductor, performs closed-loop feedback control to obtain a current error compensation value between the second-pole inductor and the first-pole inductor, superimposes the current error compensation value with the output value of the current inner loop, and generates a corresponding second drive signal based on the superposition result; Among them, the first pole refers to the negative pole and the second pole refers to the positive pole, the first drive signal is the DCDC lower tube drive signal, and the second drive signal is the DCDC upper tube drive signal; or, the first pole refers to the positive pole and the second pole refers to the negative pole, the first drive signal is the DCDC upper tube drive signal, and the second drive signal is the DCDC lower tube drive signal.

2. The control method for positive and negative current sharing of a three-level DC-DC parallel connection according to claim 1, characterized in that: The method of tracking the average current value of the first-pole inductors of all the DCDC modules with the current sampling value of the first-pole inductor as the goal and performing closed-loop feedback control to obtain the current sharing compensation value of the first-pole inductor specifically includes: The average current of the first-pole inductors of all the DCDC modules is used as a given value, the current sampling value of the first-pole inductor of the module itself is used as feedback, the difference between the given value and the feedback is calculated and the calculated difference is input into a first closed-loop feedback controller, and the output of the first closed-loop feedback controller is used as the current sharing compensation value of the first-pole inductor.

3. The control method for positive and negative current sharing of a three-level DC-DC parallel connection according to claim 1, characterized in that: The step of superimposing the current sharing compensation value on the given current inner loop and generating a corresponding first drive signal based on the output value of the current inner loop specifically includes: The DCDC module superimposes the current feedforward value, the current sharing compensation value, and the output value of its own voltage outer loop as the given value of the current inner loop, uses the current sampling value of its own first-pole inductor as feedback, calculates the difference between the given value and the feedback value, and inputs the calculated difference into the second closed-loop feedback controller, and generates a corresponding first drive signal based on the output of the second closed-loop feedback controller; The current feedforward value refers to the current of the first pole of the input DC source.

4. The control method for positive and negative current sharing of a three-level DC-DC parallel connection according to claim 3, characterized in that: The method further comprises: The DCDC module uses a uniformly set voltage reference value as a given value and a voltage sampling value of its own output voltage as feedback, calculates the difference between the given value and the feedback value, and inputs the calculated difference value into a third closed-loop feedback controller, and uses the output of the third closed-loop feedback controller as the output value of the voltage outer loop.

5. The control method for positive and negative current sharing of a three-level DC-DC parallel connection according to claim 4, characterized in that: Among all the DCDC modules, one of the DCDC modules is a master and the other DCDC modules are slaves; The DCDC modules communicate with each other via a local area network, the host sends the voltage reference value to the local area network, and the slave obtains the voltage reference value from the local area network; Except for the closed-loop feedback control of the voltage outer loop of the slave, which is implemented based on the P controller, all other closed-loop feedback controls are implemented based on the PI controller.

6. The control method for positive and negative current sharing of a three-level DC-DC parallel connection according to claim 1, characterized in that: The method of performing closed-loop feedback control to obtain a current error compensation value between the second-pole inductor and the first-pole inductor with the goal of tracking the current sampling value of the first-pole inductor by the current sampling value of the second-pole inductor itself specifically includes: The current sampling value of its own first-pole inductor is used as a given value, and the current sampling value of its own second-pole inductor is used as feedback. The difference between the given value and the feedback is calculated and the calculated difference is input into a fourth closed-loop feedback controller, and the output of the fourth closed-loop feedback controller is used as a current error compensation value between the second-pole inductor and the first-pole inductor.

7. The control method for positive and negative current sharing of a three-level DC-DC parallel connection according to claim 1, characterized in that: The method further comprises: Sharing the current sampling value of the first-pole inductor with the other DCDC modules, and obtaining the current sampling values ​​of the first-pole inductor shared by the other DCDC modules, summing and averaging the current sampling values ​​of the first-pole inductors of all the DCDC modules to obtain an average current value of the first-pole inductor.

8. The control method for positive and negative current sharing of a three-level DC-DC system in parallel according to claim 7, characterized in that: The DCDC modules communicate with each other via a local area network. The DCDC module sends the current sampling value of its own first-pole inductor to the local area network in real time, and obtains the current sampling values ​​of the first-pole inductors of other DCDC modules from the local area network in real time.

9. A control device for equalizing the positive and negative currents of a three-level DC-DC parallel connection, characterized in that: The method comprises a processor and a memory, wherein the memory stores a computer program, and when the computer program is executed by the processor, the steps of the method according to any one of claims 1 to 8 are implemented.

10. A computer-readable storage medium, characterized in that A computer program is stored, and when the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 8 are implemented.

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