Data reading and writing method and device, equipment and medium

Abstract

The invention discloses a data read-write method, device and equipment and a medium, and relates to the field of data processing, and the method comprises the steps that a main control chip of a nonvolatile memory configures a control descriptor based on a data read-write command sent by a host end; the control descriptor is used for managing data read-write operation of the host end on the nonvolatile memory based on the system memory; if it is determined that the data read-write operation is a data read-write operation based on a discontinuous address based on a continuous flag bit in the control descriptor, determining an address descriptor chain table based on an initial address in the control descriptor, and performing data read-write operation based on a discontinuous data read-write address space in the nonvolatile memory obtained by analyzing each address descriptor in the address descriptor linked list. For the data read-write operation of the discontinuous address in the nonvolatile memory, the control descriptor only needs to be configured and read once, so that the data read-write rate is improved, and resources required by data read-write are reduced.

Description

Technical Field

[0001] The present invention relates to the field of data processing, and in particular to a data reading and writing method, device, equipment and medium. Background Art

[0002] When the HOST performs data read and write operations on the SSD (Solid State Disk), the SSD's main control chip MCU (Microcontroller Unit) obtains the data read and write commands sent by the host from the SQ (Submission Queue), parses the commands to configure the DMA (Direct Memory Access) descriptor, and after the DMA descriptor is configured, starts the DMA engine to start data read and write operations. Specifically, the DMA engine determines the host address based on the SGL (Scatter-Gather List) or PRP (Physical Region Page) in the DMA descriptor. Based on the host address, the data read from the SSD local memory can be stored in the host-specified location or the data read from the host-specified location can be written to the SSD local memory. In addition, the host address can be flexibly described through the SGL / PRP mechanism. However, the way to indicate the SSD local memory is determined by the starting address and total data volume in the DMA descriptor, so it can only indicate a continuous address space. If you want to realize data transmission of non-continuous addresses in the SSD local memory, you can only do it by configuring the DMA descriptor multiple times, which will not only affect the data reading and writing rate, but also increase the resources required for data reading and writing. Summary of the invention

[0003] In view of this, the purpose of the embodiments of the present invention is to provide a data reading and writing method, device, equipment and medium, which introduces an address descriptor linked list so that for the data reading and writing operation of non-continuous addresses in a non-volatile memory, it is only necessary to configure and read the control descriptor once, thereby improving the data reading and writing rate of non-continuous addresses and reducing the resources required for data reading and writing. The specific scheme is as follows:

[0004] In a first aspect, the present invention discloses a data reading and writing method, which is applied to a main control chip of a non-volatile memory, comprising:

[0005] Obtaining a data read and write command sent by the host, and configuring a control descriptor based on the parsing result of the data read and write command, and setting the state of the control descriptor to a pending state; the control descriptor is used to manage the data read and write operation of the host on the non-volatile memory based on the system memory, wherein the non-volatile memory accesses the system memory based on the direct memory access technology and the non-volatile memory interface specification;

[0006] After the control descriptor is configured, determining whether the data read / write operation is a data read / write operation based on a non-continuous address based on a continuous flag bit in the control descriptor by a preset engine;

[0007] If the data read / write operation is a data read / write operation based on a non-continuous address, an address descriptor linked list is determined based on the start address in the control descriptor, and each of the address descriptors in the address descriptor linked list is analyzed in sequence from front to back, so as to perform the data read / write operation based on the data read / write address space corresponding to the address descriptor obtained by the analysis; wherein the data read / write address space is located in the non-volatile memory, and the data read / write address spaces corresponding to any two of the address descriptors are non-continuous address spaces;

[0008] After completing the data read and write operations on the data read and write address spaces respectively corresponding to the address descriptors in the address descriptor linked list, the state of the control descriptor is updated from a pending state to a completed state.

[0009] Optionally, determining an address descriptor linked list based on the starting address in the control descriptor, and analyzing each of the address descriptors in the address descriptor linked list in order from front to back, so as to perform the data read and write operation based on the data read and write address space corresponding to the address descriptor obtained by the analysis, includes:

[0010] Determine a starting descriptor address corresponding to a first address descriptor in an address descriptor linked list based on the starting address in the control descriptor to obtain a current descriptor address, and determine a current address descriptor from the address descriptor linked list based on the current descriptor address;

[0011] Analyze the current address descriptor, determine the data read / write address space corresponding to the current address descriptor based on the first address and data size obtained by the analysis, and perform the data read / write operation based on the data read / write address space;

[0012] A new current descriptor address is determined based on the next descriptor address obtained by analyzing the current address descriptor, and the process jumps again to the step of determining the current address descriptor from the address descriptor linked list based on the current descriptor address until the current address descriptor is the last address descriptor in the address descriptor linked list.

[0013] Optionally, analyzing the current address descriptor, determining a data read / write address space corresponding to the current address descriptor based on a first address and a data size obtained by the analysis, and performing the data read / write operation based on the data read / write address space, includes:

[0014] Analyze the current address descriptor to obtain the first address and the data size; the data size is a positive integer;

[0015] Determine the current value based on the initial value, determine the current data amount based on the multiplication of the current value and the unit data amount, and determine the current starting read / write address based on the addition of the current data amount and the first address; wherein the initial value is 0; the unit data amount is the size of the logical block address;

[0016] Determine a current data read / write address space based on the current start read / write address and the unit data amount, and generate data read / write request information based on the current data read / write address space, so as to perform the data read / write operation on the current data read / write address space using the data read / write request information;

[0017] Determine whether the current value is equal to a preset value; the preset value is 1 less than the data amount;

[0018] If the current value is not equal to the preset value, the current value is incremented by one to obtain a new current value, and the process jumps again to the step of determining the current data amount based on the multiplication of the current value and the unit data amount until the current value is equal to the preset value, and triggers the step of determining the new current descriptor address based on the next descriptor address obtained by analyzing the current address descriptor.

[0019] Optionally, determining a new current descriptor address based on a next descriptor address obtained by analyzing the current address descriptor includes:

[0020] If the linked list continuous bit in the current address descriptor is the first continuous bit, it indicates that the relationship between the current descriptor address and the next descriptor address satisfies a preset close proximity relationship, and the next descriptor address is determined based on the size of the current address descriptor and the current descriptor address, and the next descriptor address is determined as a new current descriptor address;

[0021] If the linked list continuous bit in the current address descriptor is the second continuous bit, it indicates that the relationship between the current descriptor address and the next descriptor address does not satisfy the preset adjacent relationship, and the next descriptor address is determined based on the descriptor address information in the current address descriptor, and the next descriptor address is determined as the new current descriptor address.

[0022] Optionally, the method further includes:

[0023] During the data read and write operation, error detection is performed on the data read and write operation, and when an error is detected in the data read and write operation, corresponding error information is recorded, and the state of the control descriptor is updated from a pending state to an error state.

[0024] Optionally, determining whether the data read / write operation is a data read / write operation based on a non-continuous address based on a continuous flag bit in the control descriptor includes:

[0025] If the continuous flag bit in the control descriptor is the first flag bit, determining that the data read and write operation is a data read and write operation based on a non-continuous address;

[0026] If the continuous flag bit in the control descriptor is the second flag bit, it is determined that the data read and write operation is a data read and write operation based on a continuous address.

[0027] Optionally, after determining whether the data read / write operation is a data read / write operation based on a non-continuous address based on the continuous flag bit in the control descriptor, the method further includes:

[0028] If the data read / write operation is a data read / write operation based on a continuous address, a continuous read / write address space is determined based on the start address and the total data amount in the control descriptor, and the data read / write operation is performed based on the continuous read / write address space; wherein the continuous read / write address space is located in the non-volatile memory;

[0029] After the data read and write operations on the continuous read and write address space are completed, the state of the control descriptor is updated from a pending state to a completed state.

[0030] In a second aspect, the present invention discloses a data reading and writing device, which is applied to a main control chip of a non-volatile memory, comprising:

[0031] A descriptor configuration module, used for obtaining a data read and write command sent by a host, and configuring a control descriptor based on a parsing result of the data read and write command, and setting the state of the control descriptor to a pending state; the control descriptor is used for managing the data read and write operation of the host on the non-volatile memory based on the system memory, wherein the non-volatile memory accesses the system memory based on direct memory access technology and non-volatile memory interface specification;

[0032] A read / write operation determination module, configured to determine whether the data read / write operation is a data read / write operation based on a non-continuous address based on a continuous flag bit in the control descriptor through a preset engine after the control descriptor configuration is completed;

[0033] A data read / write module, for determining an address descriptor linked list based on a starting address in the control descriptor if the data read / write operation is a data read / write operation based on a non-continuous address, and analyzing each of the address descriptors in the address descriptor linked list in order from front to back, so as to perform the data read / write operation based on a data read / write address space corresponding to the address descriptor obtained by the analysis; wherein the data read / write address space is located in the non-volatile memory, and the data read / write address spaces corresponding to any two of the address descriptors are non-continuous address spaces;

[0034] The status update module is used to update the status of the control descriptor from a pending status to a completed status after completing the data read and write operations on the data read and write address spaces respectively corresponding to the address descriptors in the address descriptor linked list.

[0035] In a third aspect, the present invention discloses an electronic device, comprising:

[0036] Memory for storing computer programs;

[0037] A processor is used to execute the computer program to implement the steps of the aforementioned data reading and writing method.

[0038] In a fourth aspect, the present invention discloses a computer-readable storage medium having a computer program stored thereon, and the computer program implements the steps of the aforementioned data reading and writing method when executed by a processor.

[0039] In the present application, the main control chip of the non-volatile memory obtains the data read and write command sent by the host side, and configures the control descriptor based on the parsing result of the data read and write command, and sets the state of the control descriptor to the pending state; the control descriptor is used to manage the data read and write operation of the host side on the non-volatile memory based on the system memory, wherein the non-volatile memory accesses the system memory based on the direct memory access technology and the non-volatile memory interface specification; after the control descriptor is configured, the preset engine is used to determine whether the data read and write operation is a data read and write operation based on a non-continuous address based on the continuous flag bit in the control descriptor; if the data read and write operation is a data read and write operation based on a non-continuous address For read and write operations, an address descriptor linked list is determined based on the starting address in the control descriptor, and each of the address descriptors in the address descriptor linked list is analyzed in sequence from front to back, so as to perform the data read and write operations based on the data read and write address space corresponding to the address descriptor obtained by the analysis; wherein the data read and write address space is located in the non-volatile memory, and the data read and write address spaces corresponding to any two of the address descriptors are non-continuous address spaces; after completing the data read and write operations on the data read and write address spaces corresponding to each of the address descriptors in the address descriptor linked list, the state of the control descriptor is updated from a pending state to a completed state.

[0040] Beneficial effect: The present invention determines whether the data read and write operation of the host side on the non-volatile memory based on the system memory is a data read and write operation based on a non-continuous address based on the continuous flag bit in the control descriptor. If the data read and write operation is a data read and write operation based on a non-continuous address, the corresponding data read and write address space located in the non-volatile memory is determined based on each address descriptor in the address descriptor linked list, and the data read and write operation is performed based on the data read and write address space. Since the data read and write address space corresponding to any two address descriptors is a non-continuous address space in the non-volatile memory, the present invention can realize the data read and write operation on the non-continuous address space in the non-volatile memory through the address descriptor linked list; and, for the data read and write operation of the non-continuous address in the non-volatile memory, the present invention only needs to configure the control descriptor once and read the control descriptor once, which reduces the configuration times and reading times of the control descriptor, thereby improving the data reading and writing rate of the non-continuous address in the non-volatile memory, and reducing the resources required for data reading and writing of the non-continuous address. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0042] Figure 1 A flow chart of a data reading and writing method provided by an embodiment of the present invention;

[0043] Figure 2 An address descriptor chain diagram provided in an embodiment of the present invention;

[0044] Figure 3 An address descriptor structure diagram provided by an embodiment of the present invention;

[0045] Figure 4 A data reading and writing flow chart provided by an embodiment of the present invention;

[0046] Figure 5 A schematic diagram of the structure of a data reading and writing device provided by an embodiment of the present invention;

[0047] Figure 6 A structural diagram of an electronic device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0048] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0049] When the host performs data reading and writing operations on the SSD, the DMA descriptor is configured and after the DMA descriptor configuration is completed, the DMA engine is started to perform data reading and writing operations. The method of indicating the local memory of the SSD is determined by the starting address and the total amount of data in the DMA descriptor, so it can only indicate a continuous address space. If you want to realize data transmission of non-continuous addresses in the local memory of the SSD, you can only do it by configuring the DMA descriptor multiple times, which will not only affect the data reading and writing rate, but also increase the resources required for data reading and writing. To this end, an embodiment of the present invention discloses a data reading and writing method, which introduces an address descriptor linked list so that for the data reading and writing operations of non-continuous addresses in a non-volatile memory, it is only necessary to configure and read the control descriptor once, thereby improving the data reading and writing rate for non-continuous addresses and reducing the resources required for data reading and writing.

[0050] See also Figure 1 As shown, an embodiment of the present invention discloses a data reading and writing method, which is applied to a main control chip of a non-volatile memory, comprising:

[0051] Step S11, obtaining the data read and write commands sent by the host end, and configuring the control descriptor based on the parsing results of the data read and write commands, and setting the status of the control descriptor to a pending state; the control descriptor is used to manage the data read and write operations of the host end on the non-volatile memory based on the system memory, wherein the non-volatile memory accesses the system memory based on direct memory access technology and non-volatile memory interface specifications.

[0052] In this embodiment, the main control chip of the non-volatile memory obtains the data read and write commands sent by the host side, and parses the data read and write commands to obtain the corresponding parsing results, and then configures the corresponding control descriptor based on the parsing results, and sets the state of the control descriptor to the pending state. Among them, the non-volatile memory can be selected from SSD, flash memory, etc.; the main control chip can be selected from MCU chip, etc. In addition, the control descriptor can be a DMA descriptor, which is used to manage the data read and write operations of the host side on the non-volatile memory based on the system memory, wherein the non-volatile memory accesses the system memory based on direct memory access technology and the non-volatile memory interface specification (NVMe, Non-Volatile Memory Express).

[0053] Step S12: after the control descriptor is configured, determining whether the data read / write operation is a data read / write operation based on a non-continuous address based on a continuous flag bit in the control descriptor through a preset engine.

[0054] In this embodiment, after the control descriptor is configured, the continuous flag in the control descriptor is determined by the preset engine to determine whether the data read and write operation of the host side based on the system memory to the non-volatile memory is a data read and write operation based on a non-continuous address based on the continuous flag.

[0055] According to one embodiment, if the continuous flag bit in the control descriptor is the first flag bit, the data read / write operation is determined to be a data read / write operation based on a non-continuous address; if the continuous flag bit in the control descriptor is the second flag bit, the data read / write operation is determined to be a data read / write operation based on a continuous address. The first flag bit and the second flag bit are different flag bits, for example, the first flag bit can be 0 or 1, and the second flag bit can be 1 or 0 accordingly.

[0056] Furthermore, if it is determined that the data read / write operation is a data read / write operation based on a continuous address, the continuous read / write address space in the non-volatile memory can be determined based on the starting address and the total amount of data in the control descriptor, so that after the continuous read / write address space is determined, the data read / write operation is performed based on the continuous read / write address space in the non-volatile memory. Furthermore, after the data read / write operation on the continuous read / write address space is completed, the state of the control descriptor is updated from a pending state to a completed state; wherein the completed state indicates that the data read / write operation on the non-volatile memory by the host end based on the system memory has been completed.

[0057] Step S13: If the data read and write operation is a data read and write operation based on a non-continuous address, the address descriptor linked list is determined based on the starting address in the control descriptor, and each address descriptor is analyzed in sequence from front to back in the address descriptor linked list, so as to perform the data read and write operation based on the data read and write address space corresponding to the address descriptor obtained by analysis; wherein the data read and write address space is located in the non-volatile memory, and the data read and write address spaces corresponding to any two address descriptors are non-continuous address spaces.

[0058] In this embodiment, if the data read / write operation is determined to be a data read / write operation based on a non-continuous address based on the continuous flag bit in the control descriptor, the first address descriptor in the address descriptor linked list is determined based on the starting address in the control descriptor, and each address descriptor in the address descriptor linked list is analyzed in sequence starting from the first address descriptor, so as to perform the data read / write operation based on the data read / write address space corresponding to the address descriptor in the non-volatile memory obtained by the analysis. It should be noted that the data read / write address space corresponding to any two address descriptors in the address descriptor linked list is a non-continuous address space in the non-volatile memory.

[0059] According to one embodiment, Figure 2As shown, if the data read and write operation is determined to be a data read and write operation based on a non-continuous address based on the continuous flag bit in the control descriptor, the starting descriptor address corresponding to the first address descriptor in the address descriptor linked list is determined based on the starting address in the control descriptor, the starting descriptor address is determined as the current descriptor address, and the current address descriptor is determined from the address descriptor linked list based on the current descriptor address. The current address descriptor is analyzed, and the data read and write address space corresponding to the current address descriptor located in the non-volatile memory is determined based on the first address and data size obtained by the analysis, so as to perform data read and write operations based on the data read and write address space. Then, a new current descriptor address is determined based on the next descriptor address obtained by analyzing the current address descriptor, and the process jumps again to the above step of determining the current address descriptor from the address descriptor linked list based on the current descriptor address, until the current address descriptor is the last address descriptor in the address descriptor linked list.

[0060] Wherein, after determining the current address descriptor from the address descriptor linked list based on the current descriptor address, the current address descriptor is analyzed to obtain the first address and the data size; wherein the data size is a positive integer, and the first address is an address constructed based on the first address high bit and the first address low bit in the current address descriptor. And considering that in the embodiment of the present invention, the size of the logical block address (LBA, Logical Block Addressing) is used as the unit data amount for data reading and writing, therefore, after obtaining the first address and the data size, the current value is determined based on the initial value, wherein the initial value is 0, and the current data amount is determined based on the multiplication of the current value and the unit data amount, and the current starting read and write address is determined based on the addition of the current data amount and the first address. After that, the continuous current data read and write address space located in the non-volatile memory determined based on the current starting read and write address and the unit data amount can be used to generate data read and write request information, so as to use the data read and write request information to perform data read and write operations on the continuous current data read and write address space in the non-volatile memory. Afterwards, it is necessary to determine whether the current value is equal to a preset value, where the preset value is smaller than the data size and the difference between the preset value and the data size is 1; if the current value is not equal to the preset value, the current value is incremented by one to obtain a new current value, and the process jumps again to the above step of determining the current data size based on multiplying the current value by the unit data size until the current value is equal to the preset value, and a new current descriptor address is determined based on the next descriptor address obtained by analyzing the current address descriptor, so as to re-determine a new current address descriptor from the address descriptor linked list based on the new current descriptor address, and re-execute the above disclosed operation.

[0061] In a specific implementation, determining a new current descriptor address based on the next descriptor address obtained by analyzing the current address descriptor includes: determining a linked list continuous bit in the current address descriptor, if the linked list continuous bit in the current address descriptor is the first continuous bit, then it indicates that the relationship between the current descriptor address and the next descriptor address satisfies a preset close proximity relationship, and the next descriptor address is determined based on the size of the current address descriptor and the addition of the current descriptor address, and the next descriptor address is determined as the new current descriptor address. If the linked list continuous bit in the current address descriptor is the second continuous bit, then it indicates that the relationship between the current descriptor address and the next descriptor address does not satisfy the preset close proximity relationship, and the next descriptor address is determined based on the descriptor address information in the current address descriptor, and the next descriptor address is determined as the new current descriptor address. Wherein, the first continuous bit and the second continuous bit are different continuous bits, for example, when the first continuous bit is 0 or 1, the second continuous bit is correspondingly 1 or 0.

[0062] Figure 3 The structure of an address descriptor is described, wherein the address descriptor includes an end flag, a linked list continuity bit, a data size, a first address high bit and a first address low bit, a descriptor address high bit and a descriptor address low bit. The end flag is used to determine whether the address descriptor is the last address descriptor in the address descriptor linked list, for example: if the end flag is the first end bit, it indicates that the address descriptor is the last address descriptor in the address descriptor linked list, and if the end flag is the second end bit, it indicates that the address descriptor is not the last address descriptor in the address descriptor linked list; wherein the first end bit and the second end bit can be set to 0 and 1. The linked list continuity bit is used to determine whether the relationship between the descriptor address and the next descriptor address satisfies a preset adjacent relationship. The first address high bit and the first address low bit can determine the first address. The descriptor address high bit and the descriptor address low bit are the descriptor address information, which can be used to determine the next descriptor address.

[0063] by Figure 3 For example, each row of information in the address descriptor occupies 4 bits. If the relationship between the current descriptor address and the next descriptor address is determined to meet the preset close proximity relationship based on the continuous bits of the linked list, it indicates that the two rows of information of the descriptor address high and the descriptor address low do not exist in the address descriptor. Therefore, the next descriptor address can be obtained by adding the size of the current address descriptor (3 rows × 4 bits = 12 bits) and the current descriptor address. If the relationship between the current descriptor address and the next descriptor address does not meet the preset close proximity relationship based on the continuous bits of the linked list, it indicates that the two rows of information of the descriptor address high and the descriptor address low exist in the address descriptor. Therefore, the next descriptor address can be determined based on the descriptor address high and the descriptor address low.

[0064] Step S14: after completing the data read and write operations on the data read and write address spaces respectively corresponding to the address descriptors in the address descriptor linked list, updating the state of the control descriptor from a pending state to a completed state.

[0065] In this embodiment, after completing the data read and write operations on the data read and write address spaces in the non-volatile memory corresponding to the address descriptors in the address descriptor linked list, the state of the control descriptor is updated from the pending state to the completed state, which is used to indicate that the data read and write operations on the non-volatile memory based on the system memory by the host end have been completed. It can be found that the data read and write address spaces corresponding to the address descriptors in the address descriptor linked list constitute the complete address space corresponding to the control descriptor; wherein, the data read and write address space corresponding to the address descriptor is a continuous address space in the non-volatile memory, and the complete address space corresponding to the control descriptor is a non-continuous address space in the non-volatile memory.

[0066] It should be noted that when the host performs data reading and writing operations on the non-volatile memory based on the system memory, error detection will be performed on the data reading and writing operations. When an error is detected in the data reading and writing operations, the corresponding error information will be recorded to output the error information to the host side, and the status of the control descriptor will be updated from the pending state to the error state, and the data reading and writing operations will be suspended.

[0067] In addition, the embodiment of the present invention can also pre-set multiple data read and write threads in the main control chip of the non-volatile memory, so that when it is determined based on the continuous flag bit in the control descriptor that the data read and write operation of the host end based on the system memory to the non-volatile memory is a data read and write operation based on a non-continuous address, the address descriptor chain list is determined based on the starting address in the control descriptor, and the total number of descriptors of each address descriptor in the address descriptor chain list is determined, and then according to the load balancing strategy and based on the total number of descriptors, a corresponding number of data read and write threads are selected from the pre-set multiple data read and write threads, so as to use the corresponding number of data read and write threads to perform data read and write operations on the data read and write address spaces corresponding to each address descriptor in the non-volatile memory in parallel. Among them, the data read and write address spaces corresponding to each address descriptor are non-continuous address spaces. In this way, by setting multiple data read and write threads, data read and write operations are performed on the non-continuous address spaces in the non-volatile memory in parallel, thereby greatly improving the efficiency of data reading and writing.

[0068] Beneficial effect: The present invention determines whether the data read and write operation of the host side on the non-volatile memory based on the system memory is a data read and write operation based on a non-continuous address based on the continuous flag bit in the control descriptor. If the data read and write operation is a data read and write operation based on a non-continuous address, the corresponding data read and write address space located in the non-volatile memory is determined based on each address descriptor in the address descriptor linked list, and the data read and write operation is performed based on the data read and write address space. Since the data read and write address space corresponding to any two address descriptors is a non-continuous address space in the non-volatile memory, the present invention can realize the data read and write operation on the non-continuous address space in the non-volatile memory through the address descriptor linked list; and, for the data read and write operation of the non-continuous address in the non-volatile memory, the present invention only needs to configure the control descriptor once and read the control descriptor once, which reduces the configuration times and reading times of the control descriptor, thereby improving the data reading and writing rate of the non-continuous address in the non-volatile memory, and reducing the resources required for data reading and writing of the non-continuous address.

[0069] See also Figure 4 As shown, an embodiment of the present invention discloses a data reading process, which is applied to a main control chip of a non-volatile memory, including:

[0070] Get the control descriptor configured based on the data read and write command sent by the host. At this time, the state of the control descriptor is to be completed. Then, based on the continuous flag bit in the control descriptor, determine whether the data read and write operation is based on a non-continuous address or a continuous address. The data read and write operation is the host's data read and write operation based on the system memory to the non-volatile memory.

[0071] If the data read / write operation is based on a continuous address, the read / write start address is determined based on the start address in the control descriptor, and a preset value is determined based on the total data amount in the control descriptor minus one, and then the data preparation state is entered.

[0072] If the data read and write operation is a data read and write operation based on a non-continuous address, the starting descriptor address corresponding to the first address descriptor in the address descriptor linked list is determined based on the starting address in the control descriptor, the starting descriptor address is determined as the current descriptor address, and the current address descriptor is determined from the address descriptor linked list based on the current descriptor address, and then the current address descriptor is analyzed to obtain the first address and the data size, and the first address is determined as the read and write first address, the data size is reduced by one and determined as a preset value, and then the data preparation state is entered.

[0073] After entering the data preparation state, for data reading, it is necessary to determine whether the preset read request queue is not full. If the preset read request queue is full, a waiting operation is performed until the preset read request queue is not full; if the preset read request queue is not full, the data read and write state is entered. For data writing, it is necessary to determine whether the unit data amount sent by the host is received. If not, a waiting operation is performed until the unit data amount sent by the host is received. If received, the data read and write state is entered.

[0074] After entering the data read and write state, the current value is determined based on the initial value 0, the current data volume is determined based on the multiplication of the current value and the unit data volume, and the current starting read and write address is determined based on the addition of the current data volume and the read and write first address. After that, the continuous current data read and write address space in the non-volatile memory determined based on the current starting read and write address and the unit data volume can be used to generate a data read and write request; wherein the data read and write request is a data read request or a data write request, and the data read request needs to be written into the preset read request queue. Then, based on the data read and write request, the current data read and write address space in the non-volatile memory is subjected to data read and write operations.

[0075] After performing a data read and write operation on the current data read and write address space, there may be three situations: the first situation is that the current value is not equal to the preset value, then the current value needs to be self-incremented to obtain a new current value, and then jump back to the above step of determining the current data amount based on the multiplication of the current value and the unit data amount to continue the data read and write operation. The second situation is that the current value is equal to the preset value and the data read and write operation is a data read and write operation based on a non-continuous address, then the new current descriptor address is determined based on the next descriptor address obtained by analyzing the current address descriptor, and then jump back to the above step of determining the current address descriptor from the address descriptor linked list based on the current descriptor address to continue the data read and write operation. The third situation is that the data to be read and written by the control descriptor have been read and written, that is, the current value is equal to the preset value and the data read and write operation is a data read and write operation based on a continuous address, or the current address descriptor is the last address descriptor in the address descriptor linked list, at which time the state of the control descriptor is updated from the pending state to the completed state, and enters the idle state to obtain the next control descriptor to perform the corresponding data read and write operation.

[0076] Beneficial effect: The present invention determines whether the data read and write operation of the host side on the non-volatile memory based on the system memory is a data read and write operation based on a non-continuous address based on the continuous flag bit in the control descriptor. If the data read and write operation is a data read and write operation based on a non-continuous address, the corresponding data read and write address space located in the non-volatile memory is determined based on each address descriptor in the address descriptor linked list, and the data read and write operation is performed based on the data read and write address space. Since the data read and write address space corresponding to any two address descriptors is a non-continuous address space in the non-volatile memory, the present invention can realize the data read and write operation on the non-continuous address space in the non-volatile memory through the address descriptor linked list; and, for the data read and write operation of the non-continuous address in the non-volatile memory, the present invention only needs to configure the control descriptor once and read the control descriptor once, which reduces the configuration times and reading times of the control descriptor, thereby improving the data reading and writing rate of the non-continuous address in the non-volatile memory, and reducing the resources required for data reading and writing of the non-continuous address.

[0077] See also Figure 5 As shown, an embodiment of the present invention discloses a data reading and writing device, which is applied to a main control chip of a non-volatile memory, including:

[0078] A descriptor configuration module 11 is used to obtain a data read and write command sent by the host end, and configure a control descriptor based on the parsing result of the data read and write command, and set the state of the control descriptor to a pending state; the control descriptor is used to manage the data read and write operation of the host end on the non-volatile memory based on the system memory, wherein the non-volatile memory accesses the system memory based on the direct memory access technology and the non-volatile memory interface specification;

[0079] A read / write operation determination module 12, configured to determine whether the data read / write operation is a data read / write operation based on a non-continuous address based on a continuous flag bit in the control descriptor through a preset engine after the control descriptor configuration is completed;

[0080] A data read / write module 13, for determining an address descriptor linked list based on a starting address in the control descriptor if the data read / write operation is a data read / write operation based on a non-continuous address, and analyzing each of the address descriptors in the address descriptor linked list in order from front to back, so as to perform the data read / write operation based on a data read / write address space corresponding to the address descriptor obtained by the analysis; wherein the data read / write address space is located in the non-volatile memory, and the data read / write address spaces corresponding to any two of the address descriptors are non-continuous address spaces;

[0081] The status update module 14 is used to update the status of the control descriptor from a pending status to a completed status after completing the data read and write operations on the data read and write address spaces respectively corresponding to the address descriptors in the address descriptor linked list.

[0082] Since the embodiments of the device part correspond to the above embodiments, please refer to the description of the embodiments of the method part for the embodiments of the device part, and will not be repeated here.

[0083] Beneficial effect: The present invention determines whether the data read and write operation of the host side on the non-volatile memory based on the system memory is a data read and write operation based on a non-continuous address based on the continuous flag bit in the control descriptor. If the data read and write operation is a data read and write operation based on a non-continuous address, the corresponding data read and write address space located in the non-volatile memory is determined based on each address descriptor in the address descriptor linked list, and the data read and write operation is performed based on the data read and write address space. Since the data read and write address space corresponding to any two address descriptors is a non-continuous address space in the non-volatile memory, the present invention can realize the data read and write operation on the non-continuous address space in the non-volatile memory through the address descriptor linked list; and, for the data read and write operation of the non-continuous address in the non-volatile memory, the present invention only needs to configure the control descriptor once and read the control descriptor once, which reduces the configuration times and reading times of the control descriptor, thereby improving the data reading and writing rate of the non-continuous address in the non-volatile memory, and reducing the resources required for data reading and writing of the non-continuous address.

[0084] Furthermore, the present application also discloses an electronic device. Figure 6 It is a structural diagram of an electronic device according to an exemplary embodiment, and the content in the figure cannot be regarded as any limitation on the scope of use of this application. The electronic device may specifically include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input and output interface 25 and a communication bus 26. Among them, the memory 22 is used to store a computer program, and the computer program is loaded and executed by the processor 21 to implement the relevant steps in the data reading and writing method disclosed in any of the aforementioned embodiments. In addition, the electronic device in this embodiment may specifically be an electronic computer.

[0085] In this embodiment, the power supply 23 is used to provide working voltage for each hardware device on the electronic device; the communication interface 24 can create a data transmission channel between the electronic device and the external device, and the communication protocol it follows is any communication protocol that can be applied to the technical solution of the present application, and is not specifically limited here; the input and output interface 25 is used to obtain external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs and is not specifically limited here.

[0086] In addition, the memory 22, as a carrier for storing resources, can be a read-only memory, a random access memory, a disk or an optical disk, etc. The resources stored thereon can include an operating system 221, a computer program 222, etc., and the storage method can be temporary storage or permanent storage.

[0087] The operating system 221 is used to manage and control various hardware devices on the electronic device and the computer program 222, which can be Windows Server, Netware, Unix, Linux, etc. In addition to including a computer program that can be used to complete the data reading and writing method performed by the electronic device disclosed in any of the aforementioned embodiments, the computer program 222 can further include a computer program that can be used to complete other specific tasks.

[0088] Furthermore, the present application also discloses a computer-readable storage medium for storing a computer program; wherein the computer program, when executed by a processor, implements the aforementioned disclosed data reading and writing method. For the specific steps of the method, reference may be made to the corresponding contents disclosed in the aforementioned embodiments, and no further description will be given here.

[0089] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0090] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0091] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0092] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0093] The technical solution provided by the present application is introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for general technicians in this field, according to the idea of ​​the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A data reading and writing method, characterized in that: Main control chips used in non-volatile memory include: Obtaining a data read and write command sent by the host, and configuring a control descriptor based on the parsing result of the data read and write command, and setting the state of the control descriptor to a pending state; the control descriptor is used to manage the data read and write operation of the host on the non-volatile memory based on the system memory, wherein the non-volatile memory accesses the system memory based on the direct memory access technology and the non-volatile memory interface specification; After the control descriptor is configured, determining whether the data read / write operation is a data read / write operation based on a non-continuous address based on a continuous flag bit in the control descriptor by a preset engine; If the data read / write operation is a data read / write operation based on a non-continuous address, an address descriptor linked list is determined based on the start address in the control descriptor, and each of the address descriptors in the address descriptor linked list is analyzed in sequence from front to back, so as to perform the data read / write operation based on the data read / write address space corresponding to the address descriptor obtained by the analysis; wherein the data read / write address space is located in the non-volatile memory, and the data read / write address spaces corresponding to any two of the address descriptors are non-continuous address spaces; After completing the data read and write operations on the data read and write address spaces respectively corresponding to the address descriptors in the address descriptor linked list, the state of the control descriptor is updated from a pending state to a completed state.

2. The data reading and writing method according to claim 1, characterized in that: The determining of the address descriptor linked list based on the starting address in the control descriptor, and analyzing each of the address descriptors in the address descriptor linked list in order from front to back, so as to perform the data read and write operation based on the data read and write address space corresponding to the address descriptor obtained by the analysis, includes: Determine a starting descriptor address corresponding to a first address descriptor in an address descriptor linked list based on the starting address in the control descriptor to obtain a current descriptor address, and determine a current address descriptor from the address descriptor linked list based on the current descriptor address; Analyze the current address descriptor, determine the data read / write address space corresponding to the current address descriptor based on the first address and data size obtained by the analysis, and perform the data read / write operation based on the data read / write address space; A new current descriptor address is determined based on the next descriptor address obtained by analyzing the current address descriptor, and the process jumps again to the step of determining the current address descriptor from the address descriptor linked list based on the current descriptor address until the current address descriptor is the last address descriptor in the address descriptor linked list.

3. The data reading and writing method according to claim 2, characterized in that: The analyzing the current address descriptor, determining the data read / write address space corresponding to the current address descriptor based on the first address and data size obtained by the analysis, and performing the data read / write operation based on the data read / write address space, includes: Analyze the current address descriptor to obtain the first address and the data size; the data size is a positive integer; Determine the current value based on the initial value, determine the current data amount based on the multiplication of the current value and the unit data amount, and determine the current starting read / write address based on the addition of the current data amount and the first address; wherein the initial value is 0; the unit data amount is the size of the logical block address; Determine a current data read / write address space based on the current start read / write address and the unit data amount, and generate data read / write request information based on the current data read / write address space, so as to perform the data read / write operation on the current data read / write address space using the data read / write request information; Determine whether the current value is equal to a preset value; the preset value is 1 less than the data amount; If the current value is not equal to the preset value, the current value is incremented by one to obtain a new current value, and the process jumps again to the step of determining the current data amount based on the multiplication of the current value and the unit data amount until the current value is equal to the preset value, and triggers the step of determining the new current descriptor address based on the next descriptor address obtained by analyzing the current address descriptor.

4. The data reading and writing method according to claim 2, characterized in that: The determining a new current descriptor address based on a next descriptor address obtained by analyzing the current address descriptor comprises: If the linked list continuous bit in the current address descriptor is the first continuous bit, it indicates that the relationship between the current descriptor address and the next descriptor address satisfies a preset close proximity relationship, and the next descriptor address is determined based on the size of the current address descriptor and the current descriptor address, and the next descriptor address is determined as a new current descriptor address; If the linked list continuous bit in the current address descriptor is the second continuous bit, it indicates that the relationship between the current descriptor address and the next descriptor address does not satisfy the preset adjacent relationship, and the next descriptor address is determined based on the descriptor address information in the current address descriptor, and the next descriptor address is determined as the new current descriptor address.

5. The data reading and writing method according to claim 1, characterized in that: Also includes: During the data read and write operation, error detection is performed on the data read and write operation, and when an error is detected in the data read and write operation, corresponding error information is recorded, and the state of the control descriptor is updated from a pending state to an error state.

6. The data reading and writing method according to any one of claims 1 to 5, characterized in that: The determining, based on the continuous flag bit in the control descriptor, whether the data read / write operation is a data read / write operation based on a non-continuous address includes: If the continuous flag bit in the control descriptor is the first flag bit, determining that the data read and write operation is a data read and write operation based on a non-continuous address; If the continuous flag bit in the control descriptor is the second flag bit, it is determined that the data read and write operation is a data read and write operation based on a continuous address.

7. The data reading and writing method according to claim 6, characterized in that: After determining whether the data read / write operation is a data read / write operation based on a non-continuous address based on the continuous flag bit in the control descriptor, the method further includes: If the data read / write operation is a data read / write operation based on a continuous address, a continuous read / write address space is determined based on the start address and the total data amount in the control descriptor, and the data read / write operation is performed based on the continuous read / write address space; wherein the continuous read / write address space is located in the non-volatile memory; After the data read and write operations on the continuous read and write address space are completed, the state of the control descriptor is updated from a pending state to a completed state.

8. A data reading and writing device, characterized in that: Main control chips used in non-volatile memory include: A descriptor configuration module, used for obtaining a data read and write command sent by a host, and configuring a control descriptor based on a parsing result of the data read and write command, and setting the state of the control descriptor to a pending state; the control descriptor is used for managing the data read and write operation of the host on the non-volatile memory based on the system memory, wherein the non-volatile memory accesses the system memory based on direct memory access technology and non-volatile memory interface specification; A read / write operation determination module, configured to determine whether the data read / write operation is a data read / write operation based on a non-continuous address based on a continuous flag bit in the control descriptor through a preset engine after the control descriptor configuration is completed; A data read / write module, for determining an address descriptor linked list based on a starting address in the control descriptor if the data read / write operation is a data read / write operation based on a non-continuous address, and analyzing each of the address descriptors in the address descriptor linked list in order from front to back, so as to perform the data read / write operation based on a data read / write address space corresponding to the address descriptor obtained by the analysis; wherein the data read / write address space is located in the non-volatile memory, and the data read / write address spaces corresponding to any two of the address descriptors are non-continuous address spaces; The status update module is used to update the status of the control descriptor from a pending status to a completed status after completing the data read and write operations on the data read and write address spaces respectively corresponding to the address descriptors in the address descriptor linked list.

9. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to execute the computer program to implement the steps of the data reading and writing method as claimed in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the data reading and writing method according to any one of claims 1 to 7 are implemented.

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