Uncooled infrared focal plane array reading circuit and detector

Abstract

The invention relates to an uncooled infrared focal plane array reading circuit and a detector. The readout circuit comprises a pixel circuit module and a readout circuit bias module. The pixel circuit module comprises a pixel resistor, a correction voltage end, a first node, a pixel bias submodule and a correction submodule, and the pixel bias submodule is connected with the pixel resistor; the correction sub-module is connected with a correction voltage end so as to correct the deviation of the output result of the reading circuit caused by the resistance deviation of the pixel resistor; the reading circuit bias module comprises a working resistor, a bias voltage providing module and a feedback module; one connecting end of the bias voltage providing module is connected with the feedback module, and the output end is connected with one end of the working resistor; the other end of the working resistor is connected with the first node; the voltage of the bias voltage providing module fluctuates along with at least one of the correction voltage and the target temperature of the pixel resistor; the feedback module generates a feedback current corresponding to the first node voltage and provides the feedback current to the bias voltage providing module.

Description

Technical Field

[0001] The present application relates to the technical field of uncooled infrared focal plane array detectors, and in particular to an uncooled infrared focal plane array readout circuit and detector. Background Art

[0002] The uncooled infrared focal plane array readout circuit can integrate and process the weak electrical signals generated by its uncooled detector array and then output them after analog-to-digital conversion. Generally, the uncooled infrared focal plane array readout circuit includes a bias module connected to the infrared sensitive pixel and providing the corresponding infrared sensitive pixel with the bias voltage required for operation, a correction submodule and an integration module connected to the infrared sensitive pixel, and an analog-to-digital conversion module connected to the other end of the integration module. For different infrared sensitive pixels in the uncooled infrared focal plane array, the corresponding correction submodule corrects the deviation of the output result of the readout circuit caused by the resistance deviation between different pixel resistors. However, different correction voltages configured for different pixel correction modules will affect the readout effect of the readout circuit. Summary of the invention

[0003] The present application provides an uncooled infrared focal plane array readout circuit and a detector to improve the stability of the response rate of the uncooled infrared focal plane array readout circuit. The specific technical solution is as follows:

[0004] The embodiment of the present application provides an uncooled infrared focal plane array readout circuit, the uncooled infrared focal plane array readout circuit comprising:

[0005] A pixel circuit module, comprising a pixel resistor, a correction voltage terminal, a first node, a pixel bias submodule and a correction submodule connected to the first node, wherein the pixel bias submodule is connected to the pixel resistor to provide a pixel bias voltage for the pixel resistor; the correction submodule is connected to the correction voltage terminal to correct the deviation of the output result of the readout circuit caused by the resistance deviation of the pixel resistor;

[0006] A readout circuit bias module comprises a working resistor, a connected bias voltage providing module and a feedback module; wherein, one connection end of the bias voltage providing module is connected to the feedback module, and the output end of the bias voltage providing module is connected to one end of the working resistor; the other end of the working resistor is connected to the first node; the voltage of the output end of the bias voltage providing module fluctuates with at least one of the voltage of the correction voltage end and the target temperature of the pixel resistor; the feedback module is used to generate a feedback current corresponding to the voltage of the first node according to the voltage of the first node, and provide the feedback current to the bias voltage providing module.

[0007] In some embodiments, the uncooled infrared focal plane array readout circuit includes a voltage detection module, which is connected between the feedback module and the first node, for detecting the voltage of the first node and providing the detected voltage of the first node to the feedback module.

[0008] In some embodiments, the feedback module has an input end and an output end, the input end of the feedback module is connected to the voltage detection module, and the output end of the feedback module is connected to a connection end of the bias voltage providing module, and can generate a feedback current corresponding to the detected voltage based on the detected voltage.

[0009] In some embodiments, the feedback current is proportional to the voltage detected by the voltage detection module.

[0010] In some embodiments, the feedback current is inversely proportional to the voltage detected by the voltage detection module.

[0011] In some embodiments, the uncooled infrared focal plane array readout circuit further comprises:

[0012] The integration module is connected to the first node and is used to integrate the voltage of the first node to generate a corresponding analog response signal.

[0013] In some embodiments, the uncooled infrared focal plane array readout circuit further comprises:

[0014] A driving module is connected between the integration module and the first node, and can increase the current from the first node to the integration module.

[0015] In some embodiments, the feedback module has a detection end; wherein,

[0016] The detection end is connected between the driving module and the integration module; or,

[0017] The detection end is connected between the driving module and the first node.

[0018] In some embodiments, the uncooled infrared focal plane array readout circuit comprises:

[0019] an analog-to-digital converter, connected to the integration module, and used to convert the analog response signal generated by the integration module and corresponding to each of the infrared sensitive pixels into a digital signal;

[0020] The output unit is connected to the analog-to-digital converter and is used to process the digital signal converted by the analog-to-digital converter to generate processed data and output the processed data.

[0021] An embodiment of the present application provides another uncooled infrared focal plane array readout circuit detector, which includes the uncooled infrared focal plane array readout circuit as described above.

[0022] The uncooled infrared focal plane array readout circuit and the uncooled infrared focal plane array readout circuit detector provided in the embodiments of the present application are configured such that a readout circuit bias module is configured to include a bias voltage providing module and a feedback module connected thereto; and a connection end of the bias voltage providing module is connected to the feedback module; the feedback module is configured to generate a feedback current corresponding to the voltage of the first node according to the voltage of the first node, so that the output end of the bias voltage providing module has a stable voltage, thereby stabilizing the response rate of the uncooled infrared focal plane array readout circuit and improving the readout effect of the readout circuit.

[0023] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0025] Figure 1 It is a partial circuit diagram of a related uncooled infrared focal plane array readout circuit in the related art;

[0026] Figure 2 A schematic diagram of a module of an uncooled infrared focal plane array readout circuit and a corresponding uncooled infrared focal plane array provided in one embodiment of the present application;

[0027] Figure 3 A partial circuit diagram of an uncooled infrared focal plane array readout circuit provided in one embodiment of the present application;

[0028] Figure 4 A partial circuit diagram of another uncooled infrared focal plane array readout circuit provided in an embodiment of the present application;

[0029] Figure 5 A partial circuit diagram of yet another uncooled infrared focal plane array readout circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0030] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0031] Combination Figure 1 As shown, in the related art, the uncooled infrared focal plane array readout circuit includes a bias module 30' connected to the infrared sensitive pixel 1001' and providing the corresponding infrared sensitive pixel 1001' with the bias voltage required for operation, a correction submodule 11' and an integration module 20' connected to the infrared sensitive pixel 1001', and an analog-to-digital conversion module (not shown) connected to the other end of the integration module 20'. For different infrared sensitive pixels 1001' in the uncooled infrared focal plane array, the corresponding correction submodule 11' corrects the deviation of the output result of the readout circuit caused by the resistance deviation between different pixel resistors. The inventors have found through analysis and research that configuring different correction voltages for different correction submodules 11 can directly lead to different corresponding response rates.

[0032] Specifically, Figure 1 As shown, Rs is the resistance of the infrared sensitive pixel 1001' (referred to as pixel resistance), and the response relationship between its resistance and the target temperature can be expressed as: Rs = Rsoexp (TCR*ΔTt), where Rso is the initial value of the pixel resistance, TCR is the temperature coefficient of resistance, and ΔTt is the change in target temperature. The relationship Rs = Rsoexp (TCR*ΔTt) reflects the different resistance values ​​of the pixel resistance Rs at different target temperatures. The transistor M1 converts the resistance change of Rs into a corresponding response current I1, where I1 = Vs / Rs. Since Rd of the correction submodule 11' does not sense the target temperature, I2 is a constant current, so the current I4 flowing through R = I1-I2. The function of the bias module 30' is to provide a bias voltage for the entire readout circuit to work, and the output voltage Vo of the integration module 20' can be adjusted by adjusting the overall voltage of the Vd node.

[0033] The integration module 20 ′ converts the voltage Vd into an integrated current, and then integrates the integrated current to obtain an output voltage Vo, so Vo=K*Vd, where K is a coefficient mapping Vd to Vo.

[0034] The bias module 30' includes a current source I0, which provides a current of I0, and a source follower module 33'. The bias module 30' is connected to the regulating voltage terminal VT, and the voltage of the regulating voltage terminal is Vt. The current I3 of the internal transistor of the bias module 30' is I0-I4=I0+I2-I1, so Vd=Vt+Vgs3-I4R, Vgs3=I3 / gm3. Combining the above formulas, the response rate formula can be obtained as follows:

[0035]

[0036] Also because Therefore, the transconductance of the transistor inside the source follower module 33' changes with different I3, causing Vgs3 to change accordingly. Therefore, when the target temperature is in different ranges or different correction voltages Veb are configured, the size of Vgs3 is different, the resulting response rate is also different, and the slope of the response rate change is also different, that is, the response rate is affected by Vgs3 and also changes nonlinearly with the target temperature and the correction voltage Veb, thereby affecting the imaging and the effect of correcting the pixel deviation by adjusting the correction voltage Veb.

[0037] To this end, the present application provides an uncooled infrared focal plane array readout circuit and detector. The uncooled infrared focal plane array readout circuit includes a pixel circuit module and a readout circuit bias module. The pixel circuit module includes a pixel resistor, a correction voltage terminal, a first node, a pixel bias submodule connected to the first node, and a correction submodule, wherein the pixel bias submodule is connected to the pixel resistor to provide a pixel bias voltage for the pixel resistor; the correction submodule is used to correct the deviation of the readout circuit output result caused by the resistance deviation of the pixel resistor; the readout circuit bias module includes a working resistor, a connected bias voltage providing module and a feedback module; wherein one connection end of the bias voltage providing module is connected to the feedback module, and the output end of the bias voltage providing module is connected to one end of the working resistor; the other end of the working resistor is connected to the first node; the voltage of the output end of the bias voltage providing module fluctuates with at least one of the voltage of the correction voltage terminal and the target temperature of the pixel resistor; the feedback module is used to generate a feedback current corresponding to the voltage of the first node according to the voltage of the first node, and provide the feedback current to the bias voltage providing module. The above-mentioned uncooled infrared focal plane array readout circuit is configured by setting the readout circuit bias module to include a connected bias voltage providing module and a feedback module; and a connection end of the bias voltage providing module is connected to the feedback module; the feedback module is used to generate a feedback current corresponding to the voltage of the first node according to the voltage of the first node. Based on the voltage stability of the output end of the bias voltage providing module, the response rate of the uncooled infrared focal plane array readout circuit can be affected. The configuration of the above-mentioned uncooled infrared focal plane array readout circuit can make the output end of the bias voltage providing module have a stable voltage, which can stabilize the response rate of the uncooled infrared focal plane array readout circuit and improve the readout effect of the readout circuit.

[0038] Combine the following Figures 2 to 5 The uncooled infrared focal plane array readout circuit and detector provided in the embodiments of the present application are described in detail.

[0039] Please refer to Figure 2 and Figure 3 As shown, the present application provides an uncooled infrared focal plane array readout circuit 200. The uncooled infrared focal plane array readout circuit 200 can be applied to the signal readout of an uncooled infrared focal plane array 100, wherein the uncooled infrared focal plane array 100 has a plurality of pixel units 101 arranged in an array, and each pixel unit 101 has at least one or more infrared sensitive pixel elements 1001. The uncooled infrared focal plane array readout circuit 200 includes a pixel circuit module 10 and a readout circuit bias module 30.

[0040] The pixel circuit module 10 includes a pixel resistor 13 , a correction voltage terminal VEB, a first node N1 , a pixel bias submodule 12 connected to the first node N1 , and a correction submodule 11 .

[0041] It is understandable that the pixel resistor 13 is a resistor of the pixel unit 101 . Each pixel resistor 13 is a resistor of a corresponding pixel unit 101 .

[0042] The uncooled infrared focal plane array readout circuit 200 may include one pixel circuit module, or may include multiple pixel circuit modules. For a pixel circuit module including one pixel circuit module, each pixel resistor 13 corresponding to each pixel unit 101 may be connected to the pixel circuit module 10 respectively through timing control or other designs. For a pixel circuit module including multiple pixel circuit modules 10, these multiple pixel circuit modules 10 may be arranged in the same column or the same row, or arranged in other arrangements. Taking the pixel units 101 arranged in an array of M rows and N columns in the uncooled infrared focal plane array 100 as an example, for the uncooled infrared focal plane array readout circuit 200 including 1 row and N columns of pixel circuit modules, each pixel resistor 13 corresponding to different pixel units 101 in each column may be connected to the pixel circuit module 10 of the current column respectively through timing control or other designs. Similarly, for an uncooled infrared focal plane array readout circuit 200 including M rows and 1 column of pixel circuit modules, each pixel resistor 13 corresponding to different pixel units 101 in each row can be connected to the pixel circuit module 10 of the current row through timing control or other designs.

[0043] The pixel bias submodule 12 is connected to at least one pixel resistor 13 to provide a pixel bias voltage Vs for the pixel resistor 13 .

[0044] The correction submodule 11 is used to correct the deviation of the readout circuit output result caused by the resistance deviation of the pixel resistor 13. The correction submodules 11 corresponding to different pixel resistors 13 can be configured with different correction voltages to correct the deviation of the readout circuit output result caused by the resistance deviation between different pixel resistors 13.

[0045] The readout circuit bias module 30 includes a working resistor R, a connected bias voltage providing module 33 and a feedback module 32; wherein, one connection end of the bias voltage providing module 33 is connected to the feedback module 32, and the other connection end of the bias voltage providing module 33 is connected to one end of the working resistor R, and the connection end of the bias voltage providing module 33 connected to the working resistor R is the output end of the bias voltage providing module 33. The other end of the working resistor R is connected to the first node N1, and the voltage at the output end of the bias voltage providing module 33 fluctuates with the voltage Veb of the correction voltage terminal VEB (hereinafter referred to as the correction voltage Veb); the feedback module is used to generate a feedback current corresponding to the voltage Vd of the first node N1 according to the voltage Vd of the first node N1, and provide the feedback current to the bias voltage providing module 33, so that the output end of the bias voltage providing module 33 can output a stable voltage, and the voltage stability of the output end of the bias voltage providing module 33 can affect the response rate of the uncooled infrared focal plane array readout circuit, thereby stabilizing the response rate of the uncooled infrared focal plane array readout circuit. Specifically, the output end of the bias voltage providing module 33 outputs a stable voltage, which can reduce the influence of the correction voltage Veb of the correction submodule 11 and the target temperature of the corresponding pixel unit 101 on the response rate of the uncooled infrared focal plane array readout circuit 200.

[0046] The bias voltage providing module 33 may also be called a source follower module.

[0047] It should be noted that the voltage outputted from the output terminal of the bias voltage providing module 33 may also be referred to as a bias voltage, and the voltage of the bias voltage after being divided by the working resistor R may be provided to the first node N1.

[0048] like Figure 3 As shown, in some embodiments, the bias voltage providing module 33 has a current connection terminal 331, a voltage connection terminal 332 and a voltage output terminal 333 (that is, the output terminal 333 of the bias voltage providing module 33), the current connection terminal 331 is connected to the feedback module 32, the voltage connection terminal 332 is connected to the regulating voltage terminal VT, and the voltage output terminal 333 is connected to one end of the working resistor R.

[0049] The other end of the working resistor R is connected to the first node N1.

[0050] The pixel unit 101 includes one sensitive pixel 1001 for exemplary description. In some other embodiments, the pixel unit may include multiple sensitive pixels.

[0051] In some embodiments, the pixel bias submodule 12 includes a field effect transistor M1. The first electrode of the field effect transistor M1 is connected to the first node N1, and the second electrode of the field effect transistor M1 is connected to the sensitive pixel 1001 of the pixel unit 101. The control electrode of the field effect transistor M1 is connected to the control voltage terminal VFID. The pixel bias submodule 12 can provide a pixel bias voltage Vs for the sensitive pixel 1001 of the pixel unit 101 under the control voltage provided by the control voltage terminal VFID.

[0052] In some embodiments, the correction submodule 11 includes a field effect transistor M2 and a resistor Rd. The first electrode of the field effect transistor M2 is connected to the resistor Rd, and the second electrode of the field effect transistor M2 is connected to the first node N1. The control electrode of the field effect transistor M2 is connected to the correction voltage terminal VEB. The correction submodule 11 is used to correct the deviation of the output result of the readout circuit caused by the resistance deviation between different pixel resistors 13. The magnitude of the correction voltage Veb of the correction submodule 11 and the target temperature of the corresponding pixel unit 101 affects the response rate of the uncooled infrared focal plane array readout circuit 200.

[0053] like Figure 3 As shown, in some embodiments, the feedback module includes a connected voltage detection module 31. The voltage detection module 31 is connected between the feedback module 32 and the first node N1, and is used to detect the voltage Vd of the first node N1 and provide the detected voltage Vd of the first node N1 to the feedback module 32.

[0054] The voltage detection module 31 has a detection terminal 311 and an output terminal 312 .

[0055] The feedback module 32 has an input terminal 321 and an output terminal 322. The input terminal 321 of the feedback module 32 is connected to the voltage detection module 31, and the output terminal 322 of the feedback module 32 is connected to a connection terminal of the bias voltage providing module 33, and can generate a feedback current I0 corresponding to the detected voltage Vd according to the detected voltage Vd.

[0056] Specifically, the output terminal 322 of the feedback module 32 may be connected to the current connection terminal 331 of the bias voltage providing module 33. The input terminal 321 of the feedback module 32 may be connected to the output terminal 312 of the voltage detecting module 31.

[0057] In some embodiments, the feedback current I0 is proportional to the voltage Vd detected by the voltage detection module 31 .

[0058] In some embodiments, the voltage detection module 31 can directly detect a voltage Vd such as Figure 3The voltage detection module 31 shown in the figure can detect a signal which is proportional to the voltage Vd, and the feedback current I0 is inversely proportional to the voltage Vd detected by the voltage detection module 31, so as to better reduce the influence of the change of the correction voltage Veb and the target temperature of the corresponding pixel unit 101 on the response rate of the uncooled infrared focal plane array readout circuit 200.

[0059] Of course, in other embodiments, if a processing module is connected between the detection end of the voltage detection module and the first node, and the processing module can form a signal inversely proportional to the voltage of the first node, then the feedback current may be proportional to the voltage detected by the voltage detection module.

[0060] like Figure 2 As shown, in some embodiments, the uncooled infrared focal plane array readout circuit 200 further includes:

[0061] The integration module 20 is connected to the first node N1, and is used for integrating the voltage Vd of the first node N1 to generate a corresponding analog response signal.

[0062] Combination Figure 4 and Figure 5 As shown, in some other embodiments, the uncooled infrared focal plane array readout circuit 300, 400 further includes a driving module 60. The driving module 60 is connected between the integration module 20 and the first node N1.

[0063] The driving module 60 can increase the current from the first node N1 to the integration module 20 , so as to improve the voltage establishment speed from the first node N1 to the integration module 20 .

[0064] For example, the driving module 60 may transmit the value of the voltage Vd of the first node N1 to the integration module 20 in a 1:1 manner, so as to improve the accuracy of the analog response signal obtained by integration of the integration module 20 .

[0065] In some embodiments, the detection terminal is connected between the driving module 60 and the first node N1.

[0066] For example, Figure 4 As shown, the detection terminal 311 of the feedback module voltage detection module 31 is connected between the driving module 60 and the first node N1.

[0067] In some other embodiments, the feedback module 32 has a detection end. The detection end of the feedback module 32 is connected between the driving module 60 and the integration module 20 .

[0068] For example, Figure 5As shown, the detection terminal 311 of the feedback module voltage detection module 31 is connected between the driving module 60 and the integration module 20 .

[0069] Combination Figure 2 As shown, in some embodiments, the uncooled infrared focal plane array readout circuit further includes an analog-to-digital converter 40 and an output unit 50 .

[0070] The analog-to-digital converter 40 is connected to the integration module 20 and is used to convert the analog response signal generated by the integration module 20 and corresponding to each of the infrared sensitive pixels 1001 into a digital signal.

[0071] The output unit 50 is connected to the analog-to-digital converter 40, and is used to process the digital signal converted by the analog-to-digital converter 40 to generate processed data, and output the processed data.

[0072] From the perspective of large signals, if the target temperature rises, the resistance of Rs decreases, I1 increases, and I4 increases. If I3 decreases when there is no feedback module 32, the transconductance gm3 of the internal transistor M3 of the bias voltage providing module 33 changes, affecting the response rate. When the feedback module 32 is introduced, the Vd voltage decreases, I0 increases, and I3 increases. After the feedback module 32 is introduced, the amount of I3 increase can largely compensate for the amount of I3 decrease when there is no feedback module 32, so I3 can be kept basically unchanged, gm3 basically does not change, and Vgs3 basically does not change. Therefore, after the feedback module 32 is introduced, the response rate can be kept basically unchanged at different target temperatures and different VEB configuration voltages, greatly reducing the impact of the response rate nonlinearity on imaging and pixel-level correction, and improving the correction effect.

[0073] In addition, in order to ensure that the current source can provide sufficient current under a larger temperature range and prevent the pixel bias submodule 12 (such as the field effect transistor M1) from entering the linear region and affecting the circuit function due to the inability to extract the required current, in the related art, the current I0 provided by the constant current source will increase some design redundancy compared to the actual required current to ensure the normal operation of the circuit. The readout circuit bias module 30 proposed in the present application includes a feedback module, and I0 can provide a corresponding current according to the size of the current required for the normal operation of the circuit, thereby improving the current utilization and reducing power consumption.

[0074] The present application also provides an uncooled infrared focal plane array readout circuit detector, which includes the uncooled infrared focal plane array readout circuit 200 as described above.

[0075] In the present application, the structural embodiments and method embodiments may complement each other if they do not conflict.

[0076] In the present application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance. The terms "plurality" and "several" refer to two or more than two, unless otherwise clearly defined.

[0077] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the disclosure disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0078] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. An uncooled infrared focal plane array readout circuit, characterized in that: The uncooled infrared focal plane array readout circuit comprises: A pixel circuit module, comprising a pixel resistor, a correction voltage terminal, a first node, a pixel bias submodule and a correction submodule connected to the first node, wherein the pixel bias submodule is connected to the pixel resistor to provide a pixel bias voltage for the pixel resistor; the correction submodule is connected to the correction voltage terminal to correct the deviation of the output result of the readout circuit caused by the resistance deviation of the pixel resistor; A readout circuit bias module comprises a working resistor, a connected bias voltage providing module and a feedback module; wherein, one connection end of the bias voltage providing module is connected to the feedback module, and the output end of the bias voltage providing module is connected to one end of the working resistor; the other end of the working resistor is connected to the first node; the voltage of the output end of the bias voltage providing module fluctuates with at least one of the voltage of the correction voltage end and the target temperature of the pixel resistor; the feedback module is used to generate a feedback current corresponding to the voltage of the first node according to the voltage of the first node, and provide the feedback current to the bias voltage providing module.

2. The uncooled infrared focal plane array readout circuit according to claim 1, characterized in that: The uncooled infrared focal plane array readout circuit comprises a voltage detection module, which is connected between the feedback module and the first node and is used to detect the voltage of the first node and provide the detected voltage of the first node to the feedback module.

3. The uncooled infrared focal plane array readout circuit according to claim 2, characterized in that: The feedback module has an input end and an output end. The input end of the feedback module is connected to the voltage detection module, and the output end of the feedback module is connected to a connection end of the bias voltage providing module. It can generate a feedback current corresponding to the detected voltage based on the detected voltage.

4. The uncooled infrared focal plane array readout circuit according to claim 3, characterized in that: The feedback current is proportional to the voltage detected by the voltage detection module.

5. The uncooled infrared focal plane array readout circuit according to claim 4, characterized in that: The feedback current is inversely proportional to the voltage detected by the voltage detection module.

6. The uncooled infrared focal plane array readout circuit according to claim 2, characterized in that: The uncooled infrared focal plane array readout circuit also includes: The integration module is connected to the first node and is used to integrate the voltage of the first node to generate a corresponding analog response signal.

7. The uncooled infrared focal plane array readout circuit according to claim 6, characterized in that: The uncooled infrared focal plane array readout circuit also includes: A driving module is connected between the integration module and the first node, and can increase the current from the first node to the integration module.

8. The uncooled infrared focal plane array readout circuit according to claim 7, characterized in that: The detection module has a detection end; wherein, The detection end is connected between the driving module and the integration module; or, The detection end is connected between the driving module and the first node.

9. The uncooled infrared focal plane array readout circuit according to any one of claims 6 to 8, characterized in that: The uncooled infrared focal plane array readout circuit comprises: an analog-to-digital converter, connected to the integration module, and used to convert the analog response signal generated by the integration module and corresponding to each of the infrared sensitive pixels into a digital signal; The output unit is connected to the analog-to-digital converter and is used to process the digital signal converted by the analog-to-digital converter to generate processed data and output the processed data.

10. An uncooled infrared focal plane array readout circuit detector, characterized in that: The uncooled infrared focal plane array readout circuit detector comprises the uncooled infrared focal plane array readout circuit as claimed in any one of claims 1 to 9.

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