High-power frequency converter fault recording system and method

Abstract

The fault recording system comprises a cloud server, a gateway and the high-power frequency converter, the cloud server is connected with the gateway through a wireless network, and the gateway is connected with the high-power frequency converter through a network cable. According to the invention, more monitoring means can be provided for testing, debugging, operation and maintenance personnel. Fault data collected by the system is wide in sampling period range and good in synchronization performance, the fault data is collected, stored and transmitted in a classified mode, key data are not lost in power failure, it is ensured that the data are not lost and not repeated in the communication process, and meanwhile network transmission blocking is avoided. A user can check a fault list or waveform data at a computer end and a mobile communication end.

Description

Technical Field

[0001] The invention belongs to the technical field of variable frequency speed regulation, and in particular to a high-power frequency converter fault recording system and method. Background Art

[0002] As an important industrial automation equipment, frequency converters are widely used in metallurgy, textile, electricity, coal and other industries. Traditional frequency converters lack functions such as remote monitoring, intelligent management, and big data analysis, which limits their application scope. With the development needs and trends of industrial Internet of Things technology and industrial intelligence, more and more industrial equipment needs to rely on "cloud technology" to improve operation and maintenance efficiency. The market demand for frequency converter solutions that can support "cloud technology" is increasing.

[0003] High-power inverters are usually connected in parallel with multiple inverters of the same model. The parallel system is usually implemented in a one-master-multiple-slave mode. Fault waveform recording is of great significance for locating faults, analyzing problems, and ensuring safe operation. Summary of the invention

[0004] The purpose of the present invention is to overcome the shortcomings of the prior art and propose a high-power inverter fault recording system and method. The fault data collected by the present invention has a wide sampling period range and good synchronization performance. The fault data classification collection, storage and transmission method is adopted. The key data is not lost when the power is off. The communication process ensures that the data is not lost or repeated, and the network transmission blockage is avoided. The user can view the fault list or waveform data on the computer terminal or the mobile communication terminal.

[0005] The present invention solves the technical problem by adopting the following technical solutions:

[0006] A high-power inverter fault recording system includes a cloud server, a gateway and a high-power inverter, wherein the cloud server is connected to the gateway via a wireless network, and the gateway is connected to the high-power inverter via a network cable. The cloud server is used to collect, calculate, analyze and store data, and the gateway is used to process the MQTT protocol sent by the cloud server, convert it into an internal protocol and send it to the high-power inverter; at the same time, the internal protocol sent by the high-power inverter is converted into the MQTT protocol and fed back to the cloud server.

[0007] Moreover, the high-power inverter adopts a parallel mode of multiple inverters of the same model, wherein the controller of the high-power inverter is divided into a master controller and a slave controller according to its function; the master controller and the slave controller are connected through optical fiber, and a star or linear connection method is adopted according to the on-site conditions.

[0008] Moreover, the main control adopts FPGA+ARM+DSP chip architecture to realize the outer loop control of the inverter. FPGA includes sampling control, caching and optical fiber communication functions; DSP includes read-write control and caching functions; ARM is used to collect fault data and real-time data of high-power inverters and upload them to the cloud server through the gateway.

[0009] Moreover, the slave control uses an FPGA chip to implement the inverter inner loop control and power drive control. The FPGA includes sampling control, cache, read-write control and fiber optic communication functions. The slave control is connected to the master control via optical fiber and is not directly connected to the gateway.

[0010] A fault recording method for a high-power frequency converter fault recording system includes type I fault identification, type II fault identification and type III fault identification.

[0011] Moreover, the Class I fault identification includes the following steps:

[0012] When a fault occurs, the slave controller executes in parallel:

[0013] (1) Generate a fault code and send it to the master FPGA via optical fiber. The master FPGA sends the fault code to ARM, which then publishes it to the cloud server through the gateway;

[0014] (2) FIFO automatically expands to cache data after the fault point. When FIFO is full, no more data will be written. When FIFO is full, the slave controller will automatically import the data into EEPROM for storage. The fault data includes analog quantity, digital quantity, fault code and fault time. EEPROM can ensure that the fault data is not lost when power is off.

[0015] When the cloud server reads the fault data:

[0016] (1) The cloud server sends an upload data instruction, which passes through the gateway, ARM, and master FPGA in sequence. The master FPGA converts the instruction and sends it to the slave FPGA via optical fiber.

[0017] (2) The slave FPGA reads data from the EEPROM in batches, marks the channel, packet number, and group number information, and sends it to the master FPGA via optical fiber. At this time, optical fiber communication uses non-periodic transmission to ensure normal transmission of periodic communication. Since optical fiber communication is much faster than other communications, fault data is read cyclically in response mode and cached in the master FPGA according to protocol rules.

[0018] (3) After the slave controller sends all fault data, the ARM sets the fault data format, marks the device ID and fault time, and publishes the message to the cloud server via the gateway using the same communication protocol;

[0019] (4) The data acquisition and storage thread of the cloud server processes the fault waveform data, and then the data drawing and display thread displays the fault waveform on the interface.

[0020] Moreover, the type II fault identification includes the following steps:

[0021] When a fault occurs, the master controller executes the following sequence:

[0022] (1) DSP generates a fault code, sends it to ARM, and then publishes it to the cloud server through the gateway;

[0023] (2) The FIFO cache automatically expands to cache data after the fault point. When the FIFO is full, no more data will be written. When the FIFO is full, the data will be imported into the EEPROM for storage. The fault data includes analog quantity, digital quantity, fault code and fault time;

[0024] When the cloud server reads the fault data:

[0025] (1) The cloud server sends an upload data instruction, which passes through the gateway, ARM, and DSP in sequence;

[0026] (2) DSP reads data from EEPROM in batches using a response method and marks the channel, package number and group number information. ARM sets the fault data format, marks the device identification and fault time, uses the same communication protocol, and publishes messages to the cloud server via the gateway;

[0027] (3) The data acquisition and storage thread of the cloud server processes the fault waveform data, and then the data drawing and display thread displays the fault waveform on the interface.

[0028] Moreover, the specific implementation method of the Class III fault identification is: regardless of whether the inverter fails or not, the master control transmits the station data and the slave control data transmitted by optical fiber to the gateway through ARM, and the gateway publishes the data as real-time data to the cloud server. The fault trigger point monitoring thread of the cloud server determines whether a fault occurs; when a fault occurs, the slave control data drawing and display thread displays the fault waveform on the interface.

[0029] The advantages and positive effects of the present invention are:

[0030] 1. The present invention includes a cloud server, a gateway and a high-power inverter, wherein the cloud server is connected to the gateway via a wireless network, the gateway is connected to the high-power inverter via a network cable, the cloud server is connected to the gateway via a wireless network, the gateway is connected to the high-power inverter via a network cable, the cloud server is used to collect, calculate, analyze and store data, the gateway is used to process the MQTT protocol sent by the cloud server, and convert it into an internal protocol and send it to the high-power inverter; at the same time, the internal protocol sent by the high-power inverter is converted into the MQTT protocol and fed back to the cloud server. The present invention can provide more monitoring means for testing, debugging, and operation and maintenance personnel. The fault data collected by this system has a wide sampling period range and good synchronization performance. It adopts the method of classified collection, storage and transmission of fault data. The key data is not lost when the power is off, and the communication process ensures that the data is not lost or repeated, while avoiding network transmission blockage. Users can view fault lists or waveform data on the computer side and mobile communication side.

[0031] 2. The present invention has the characteristics of wide range of fault data sampling cycle, good fault data synchronization, and key data not lost in case of power failure. Fault data is collected, stored and transmitted in a classified manner, and data from different sources are processed differently. Since high-power inverters generally adopt parallel mode, the present invention can ensure that the master control and slave control time have high synchronization. The present invention can realize multiple important fault data recording, and important data is stored in the inverter without being lost in case of power failure.

[0032] 3. When a high-power inverter fails, the present invention supports remote wireless reading of fault data. The cloud server will push relevant notifications to the user. The system uploads the corresponding fault data according to the user's choice to avoid network transmission congestion. At the same time, the communication process ensures that the fault data is not lost or repeated. At the same time, the present invention is an embedded software system with good application effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 The fault recording system structure of the high-power frequency converter of the present invention;

[0034] Figure 2 This is a flow chart for storing and reading Class I fault data of the present invention;

[0035] Figure 3 This is a flow chart for storing and reading type II fault data of the present invention;

[0036] Figure 4 This is a flow chart of storing and reading Class III fault data of the present invention;

[0037] Figure 5 This is a fault information list diagram of the present invention;

[0038] Figure 6 This is the fault data waveform diagram of the present invention. DETAILED DESCRIPTION

[0039] The present invention is further described in detail below with reference to the accompanying drawings.

[0040] A high-power inverter fault recording system, such as Figure 1 As shown, it includes a cloud server, a gateway and a high-power inverter, wherein the cloud server is connected to the gateway via a wireless network, and the gateway is connected to the high-power inverter via a network cable.

[0041] The cloud server is responsible for collecting, calculating, analyzing and storing data to achieve cloud control. It can be accessed through computer WEB (web page) or mobile phone APP (application), and can realize data monitoring, fault management, event reminder and other functions of high-power inverters. The multi-threaded mode is used to process fault data, including fault trigger point monitoring thread, data collection and storage thread, data drawing and display thread, etc.

[0042] The gateway of the present invention belongs to the Internet of Things gateway, which is integrated into a movable control panel to realize wireless communication connection with the cloud server and Internet of Things connection with the device. The gateway processes the MQTT (Message Queuing Telemetry Transport) protocol sent by the cloud server, converts it into an internal protocol and sends it to each inverter; at the same time, it converts the internal protocol sent by the inverter into the MQTT protocol and feeds it back to the cloud server.

[0043] High-power inverters generally use multiple inverters of the same model in parallel mode. The controllers are divided into master and slave according to their functions. The master and slave are connected through optical fiber, and star or linear connection is adopted according to the site conditions.

[0044] The main control adopts the "FPGA+ARM+DSP" chip architecture to realize functions such as inverter external loop control. In this system, FPGA includes sampling control, cache, optical fiber communication and other functions; DSP includes read-write control, cache and other functions; ARM is used to collect fault data and real-time data of high-power inverters and upload them to the cloud server through the gateway.

[0045] The slave controller uses FPGA chip to realize the functions of inverter inner loop control, power drive control, etc. In this system, FPGA includes sampling control, cache, read-write control, optical fiber communication, etc. The slave controller is not directly connected to the gateway.

[0046] This system can realize multi-channel and multi-fault waveform data recording, can realize the recording of analog quantity, digital quantity, fault code, fault time and other information of each fault, and can configure the fault trigger point location, data sampling cycle and depth and other conditions. Fault data will not be lost when power is off.

[0047] For example, record 32 channels of fault data (each channel is 1 analog quantity or 16 digital quantities), of which 27 channels are analog quantities and 5 channels are digital quantities. Configure the fault trigger point position to "first 50% + last 50%", the sampling period to 2us, and the sampling depth to 1024. Then when a fault occurs, the fault recorder can record 27 channels of analog quantities and 80 channels of digital quantities, and each channel records the fault waveform 1.024ms before and 1.024ms after the fault occurs, with a waveform resolution of 2us.

[0048] A fault recording method for a high-power inverter fault recording system adopts a fault data classification collection, storage and transmission method. Users can configure the fault type and sampling period according to data characteristics. Due to the large span of the sampling period, this system is divided into three categories for collection and storage: Class I fault identification, Class II fault identification and Class III fault identification.

[0049] (1) Type I fault: The sampling period is in the microsecond (us) level, ranging from 1us to 500us; the acquisition point is located at the slave control, and the fault data of power devices (such as R / S / T phase pulses, encoder pulses, etc.) are collected.

[0050] (2) Type II fault: The sampling period is in the hundreds of microseconds, ranging from 500us to 10ms; the sampling point is located at the main control, collecting fault data such as inverter control quantity and feedback quantity (such as motor speed, torque, etc.).

[0051] (3) Class III faults: The sampling period is above 100 milliseconds (ms), and the range is 500 ms and above. The collection points are located at the master control and slave control, and the fault data such as the overall state of the inverter (such as switch state, main contactor state, etc.) are collected.

[0052] The master control ARM will mark and classify Class I and Class II fault data, focusing on marking the equipment identification, fault time, etc., and upload it to the cloud server in the same data format.

[0053] Since fault data is very important and has consistency, loss or duplication will affect fault analysis, so the communication reliability must be ensured when fault data is transmitted. Communication can be divided into two parts: one is the internal communication of the inverter, and the other is the communication between the inverter and the cloud server through the gateway. Among them, since the gateway performs the protocol conversion function, only the wireless communication between the gateway and the cloud server needs to be considered.

[0054] (1) Inverter communication

[0055] Due to the memory space and communication bandwidth of the inverter, fault data is read in batches and needs to be cached in the chip before uploading. To avoid data loss or duplication, FPGA and DSP use a communication "response" method, that is, after sending a frame of data, wait for a reply. If a reply is received, the next frame of data is sent; if no reply is received, the current frame of data continues to be sent. Each frame of communication includes information such as the number of faults and data numbers to ensure that fault data is not lost or repeated.

[0056] (2) Wireless communication

[0057] The fault data is ultimately uploaded to the cloud server by the master ARM via the gateway. The message protocol uses MQTT based on the publish / subscribe paradigm, and EMQxbroker is selected as the IoT message middleware. According to the data characteristics, the data service quality is shown in the following table. Among them, QoS (Quality of Service) is the message service quality defined in the protocol, that is, the message reliability mechanism.

[0058] Function Quality of Service 1 Real-time data QoS0 2 Fault waveform data QoS1 3 Fault Codes QoS2

[0059] The gateway uploads relevant data according to the service quality: When a high-power inverter fails, the gateway uploads the fault message, and needs to ensure that the cloud server receives it and only receives it once, so the fault code upload adopts QoS2; to avoid the loss or duplication of fault waveform data, QoS1 is used for uploading waveform data of Class I and Class II faults to ensure that the message is delivered at least once, and the cloud server needs to identify and delete duplicate information; Class III faults are judged on the cloud server, and real-time data upload adopts QoS0.

[0060] The purpose of time synchronization is to make the master control and slave control run at the same time, ensuring high accuracy and high synchronization of the fault trigger point, making it easier for users to observe and analyze the overall operation of the high-power inverter when a fault occurs.

[0061] The cloud server periodically transmits the system time to the inverter. After receiving the system time, the main control ARM intercepts the "day-hour-minute-second-millisecond-microsecond" part and converts it into the counter time T m The master FPGA sends T m Sent to the slave FPGA. The slave FPGA m (k-1), this cycle T m (k), local time of the previous period T s (k-1), accurately calculate the local time T of this cycle s (k) T m (k) and T s The error of (k) does not exceed 100ns, ensuring the overall time synchronization of the high-power inverter system.

[0062] When a fault occurs, the counter T s (k) will be recorded. When the cloud server reads the fault data, the main control ARM will s (k) Convert and supplement into the “year-month-day-hour-minute-second-millisecond-microsecond” format and upload it to the cloud server together with the fault data.

[0063] When a high-power inverter fails, the fault code is uploaded to the cloud server, and the gateway will publish a fault message to the cloud server, which contains the type identifier, device identifier, random number and timestamp. After receiving the message, the cloud server pushes a notification to the WEB or APP to remind the user to handle the fault in time. The user can see the fault information list through the WEB or APP, and can choose whether to view the fault waveform data.

[0064] When the user chooses to upload a certain fault waveform data, the cloud server will determine the source of the fault data based on the channel. Type I and II fault data are stored in the EEPROM (Electrically Erasable Programmable Read-Only Memory) of the inverter. The data will not be lost when the power is off. The relevant process is initiated only when the user clicks "Upload"; and after being transmitted to the cloud server once, the data is saved in the cloud server. Type III directly calls the data in the cloud server database. This can avoid network transmission congestion caused by the transmission of a large amount of fault data.

[0065] The Class I fault collection point is located in the slave control, which is mainly used for fault data recording of power devices (such as R / S / T phase pulses, encoder pulses, etc.). When a system fault occurs, the power device signal change level is generally at the microsecond level. The slave control implements sampling with a sampling period of 1us-0.5ms. Class I fault waveform recording is jointly implemented by the master control ARM and FPGA, the slave control FPGA and the memory EEPROM. The fault trigger condition is solidified and cannot be modified during operation. Figure 2 The figure shows the process flow of storing and reading fault data.

[0066] When a fault occurs, the slave controller executes in parallel:

[0067] (1) Generate a fault code and send it to the master FPGA via optical fiber. The master FPGA sends the fault code to ARM, which then publishes it to the cloud server through the gateway;

[0068] (2) FIFO automatically expands to cache data after the fault point. When FIFO is full, no more data will be written. When FIFO is full, the slave controller will automatically import the data into EEPROM for storage. The fault data includes analog quantity, digital quantity, fault code and fault time. EEPROM can ensure that the fault data is not lost when power is off.

[0069] When the cloud server reads the fault data:

[0070] (1) The cloud server sends an upload data instruction, which passes through the gateway, ARM, and master FPGA in sequence. The master FPGA converts the instruction and sends it to the slave FPGA via optical fiber.

[0071] (2) The slave FPGA reads data from the EEPROM in batches, marks the channel, packet number, and group number information, and sends it to the master FPGA via optical fiber. At this time, optical fiber communication uses non-periodic transmission to ensure normal transmission of periodic communication. Since optical fiber communication is much faster than other communications, fault data is read cyclically in response mode and cached in the master FPGA according to protocol rules.

[0072] (3) After the slave controller sends all fault data, the ARM sets the fault data format, marks the device ID and fault time, and publishes the message to the cloud server via the gateway using the same communication protocol;

[0073] (4) The data acquisition and storage thread of the cloud server processes the fault waveform data, and then the data drawing and display thread displays the fault waveform on the interface.

[0074] The acquisition point of type II fault is located at the main control. When a system fault occurs, the control signal change level is generally at the level of hundreds of microseconds, and the sampling period is 0.5ms-10ms. It is jointly implemented by the main control ARM, FPGA, and memory EEPROM.

[0075] When a fault occurs, the master controller executes the following sequence:

[0076] (1) DSP generates a fault code, sends it to ARM, and then publishes it to the cloud server through the gateway;

[0077] (2) The FIFO cache automatically expands to cache data after the fault point. When the FIFO is full, no more data will be written. When the FIFO is full, the data will be imported into the EEPROM for storage. The fault data includes analog quantity, digital quantity, fault code and fault time;

[0078] When the cloud server reads the fault data:

[0079] (1) The cloud server sends an upload data instruction, which passes through the gateway, ARM, and DSP in sequence;

[0080] (2) DSP reads data from EEPROM in batches using a response method and marks the channel, package number and group number information. ARM sets the fault data format, marks the device identification and fault time, uses the same communication protocol, and publishes messages to the cloud server via the gateway;

[0081] (3) The data acquisition and storage thread of the cloud server processes the fault waveform data, and then the data drawing and display thread displays the fault waveform on the interface.

[0082] The collection points for Class III faults are located at the master and slave controllers, and the sampling period is 500ms or more. Figure 4 As shown, regardless of whether the inverter fails or not, the master control transmits the local data and the slave control data transmitted by optical fiber to the gateway through ARM. The gateway publishes the data as real-time data to the cloud server. The fault trigger point monitoring thread of the cloud server determines whether a fault occurs. When a fault occurs, the slave control data drawing and display thread displays the fault waveform on the interface.

[0083] Figure 5 This is a list of fault information displayed on the WEB side. The interface can display the faults and fault information that have occurred on the field equipment. Users can click on the corresponding fault according to the fault list to initiate the transmission, storage and drawing process of fault data. Figure 6 This is a single fault waveform diagram displayed on the WEB side. The example in the figure is a type II fault. After the user selects, the fault data is uploaded to the cloud server through the gateway and drawn on the WEB interface. The user can zoom in / out, measure with a ruler, etc. to observe and analyze the fault data. The high-power inverter fault recording method proposed in the present invention provides a more convenient and comprehensive equipment monitoring method for testing, debugging, and operation and maintenance personnel, and the on-site application effect is good.

[0084] It should be emphasized that the embodiments described in the present invention are illustrative rather than restrictive. Therefore, the present invention includes but is not limited to the embodiments described in the specific implementation manner. Any other implementation manners derived by those skilled in the art based on the technical solution of the present invention also fall within the scope of protection of the present invention.

Claims

1. A high-power inverter fault recording system, characterized in that: It includes a cloud server, a gateway and a high-power inverter, wherein the cloud server is connected to the gateway via a wireless network, and the gateway is connected to the high-power inverter via a network cable. The cloud server is used to collect, calculate, analyze and store data, and the gateway is used to process the MQTT protocol sent by the cloud server, and convert it into an internal protocol and send it to the high-power inverter; at the same time, the internal protocol sent by the high-power inverter is converted into the MQTT protocol and fed back to the cloud server.

2. A high-power inverter fault recording system according to claim 1, characterized in that: The high-power inverter adopts a parallel connection mode of multiple inverters of the same model, wherein the controllers of the high-power inverter are divided into a master control and a slave control according to their functions; the master control and the slave control are connected through optical fibers, and a star-shaped or linear connection mode is adopted according to the on-site conditions.

3. A high-power inverter fault recording system according to claim 2, characterized in that: The main control adopts FPGA+ARM+DSP chip architecture to realize the outer loop control of the inverter. FPGA includes sampling control, cache and optical fiber communication functions; DSP includes read-write control and cache functions; ARM is used to collect fault data and real-time data of high-power inverters and upload them to the cloud server through the gateway.

4. A high-power inverter fault recording system according to claim 1, characterized in that: The slave controller uses an FPGA chip to implement the inner loop control and power drive control of the inverter. The FPGA includes sampling control, cache, read-write control and optical fiber communication functions. The slave controller is connected to the master controller via optical fiber and is not directly connected to the gateway.

5. A fault recording method of a high-power inverter fault recording system according to any one of claims 1 to 4, characterized in that: It includes Type I fault identification, Type II fault identification and Type III fault identification. The sampling period of Type I fault identification is in microsecond level, ranging from 1us to 500us, the sampling period of Type II fault identification is in hundred microsecond level, ranging from 500us to 10ms, and the sampling period of Type III fault identification is above hundred millisecond level, ranging from 500ms and above.

6. The fault recording method of a high-power frequency converter fault recording system according to claim 1, characterized in that: The type I fault identification includes the following steps: When a fault occurs, the slave controller executes in parallel: (1) Generate a fault code and send it to the master FPGA via optical fiber. The master FPGA sends the fault code to ARM, which then publishes it to the cloud server through the gateway; (2) FIFO automatically expands to cache data after the fault point. When FIFO is full, no more data will be written. When FIFO is full, the slave controller will automatically import the data into EEPROM for storage. The fault data includes analog quantity, digital quantity, fault code and fault time. EEPROM can ensure that the fault data is not lost when power is off. When the cloud server reads the fault data: (1) The cloud server sends an upload data instruction, which passes through the gateway, ARM, and master FPGA in sequence. The master FPGA converts the instruction and sends it to the slave FPGA via optical fiber. (2) The slave FPGA reads data from the EEPROM in batches, marks the channel, packet number, and group number information, and sends it to the master FPGA via optical fiber. At this time, optical fiber communication uses non-periodic transmission to ensure normal transmission of periodic communication. Since optical fiber communication is faster than other communications, fault data is read cyclically in response mode and cached in the master FPGA according to protocol rules. (3) After the slave controller sends all the fault data, the ARM adjusts the fault data format, marks the device ID and fault time, and uses the same communication protocol to publish the message to the cloud server via the gateway; (4) The data acquisition and storage thread of the cloud server processes the fault waveform data, and then the data drawing and display thread displays the fault waveform on the interface.

7. The fault recording method of a high-power inverter fault recording system according to claim 1, characterized in that: The type II fault identification includes the following steps: When a fault occurs, the master controller executes the following sequence: (1) DSP generates a fault code, sends it to ARM, and then publishes it to the cloud server through the gateway; (2) The FIFO buffer is automatically expanded to cache the data after the fault point. When the FIFO is full, no more data will be written. When the FIFO is full, the data will be imported into the EEPROM for storage. The fault data includes analog quantity, digital quantity, fault code and fault time. When the cloud server reads the fault data: (1) The cloud server sends an upload data instruction, which passes through the gateway, ARM, and DSP in sequence; (2) DSP reads data from EEPROM in batches using a response method and marks the channel, package number and group number information. ARM sets the fault data format, marks the device identification and fault time, and uses the same communication protocol to publish messages to the cloud server via the gateway. (3) The data acquisition and storage thread of the cloud server processes the fault waveform data, and then the data drawing and display thread displays the fault waveform on the interface.

8. The fault recording method of a high-power inverter fault recording system according to claim 1, characterized in that: The specific implementation method of the Class III fault identification is as follows: regardless of whether the inverter fails or not, the master control transmits the local data and the slave control data transmitted by optical fiber to the gateway through ARM, and the gateway publishes the data as real-time data to the cloud server. The fault trigger point monitoring thread of the cloud server determines whether a fault occurs; when a fault occurs, the slave control data drawing and display thread displays the fault waveform on the interface.

Images