System and method for testing dynamic characteristics of silicon carbide device
By designing a dynamic characteristic testing system and measuring the saturation zone characteristics of silicon carbide chips, the problem of difficulty in evaluating dynamic current sharing in the prior art is solved, and the current capacity utilization and reliability of multi-chip parallel devices are improved.
Patent Information
- Application Number
- CN202411353005.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-26
- Publication Date
- 2024-12-13
AI Technical Summary
The prior art is difficult to measure the dynamic characteristics of silicon carbide chips in the saturated region, which makes it difficult to evaluate and optimize the dynamic current sharing problem, affecting the current capacity utilization and reliability of multi-chip parallel devices.
A dynamic characteristic testing system for device including the first drive board, the second drive board, the control board, the test board, the PC terminal, the DC power supply, the high voltage power supply and the oscilloscope were designed to limit the maximum current through short pulse test and auxiliary switch tube. , measure the saturation region characteristics of the silicon carbide chip, and use MATLAB software to fit to obtain the characteristic curve.
Accurate measurement of the saturation zone characteristics of high-power silicon carbide chips is achieved, the impact of junction temperature changes is avoided, and the dynamic current sharing model optimization solution is provided, which improves the current capacity utilization and reliability of multi-chip parallel devices.
Smart Images
Figure CN119125847A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of silicon carbide power device testing, and relates to a silicon carbide device dynamic characteristic testing system and method. Background Art
[0002] Silicon carbide power semiconductor devices are being used more and more widely due to their advantages over traditional silicon-based semiconductor devices in high frequency, high temperature, and high voltage. However, due to the production process of silicon carbide power semiconductor chips, silicon carbide power semiconductor chips still have a large shortcoming in maximum current capacity. In high-power applications such as electric vehicles and new energy grid-connected fields, multi-chip parallel connection is required to form silicon carbide multi-chip parallel devices. However, in actual applications, there will be significant uneven current in each parallel branch inside the multi-chip parallel device, resulting in the maximum current capacity of some power chips being limited. In addition, the uneven current in each branch will also lead to uneven temperature of the chip, which will lead to a decrease in the overall reliability of the power device. Therefore, modeling and optimization of silicon carbide multi-chip parallel power devices is the key to improving the current capacity utilization rate of silicon carbide multi-chip parallel devices, improving their reliability, and further promoting their application in the high-power field. The current sharing problem of parallel SiC chips mainly includes two parts: dynamic current sharing and static current sharing. The formation mechanism of dynamic current sharing is relatively complex, and it is also the main difficulty of current research. The factors affecting dynamic current sharing mainly include the package equivalent parasitic parameter network and the chip's own characteristics and their differences. This process is in the saturation region of the SiC chip. Therefore, a low-cost device dynamic test platform for the saturation region characteristics of SiC chips is designed and manufactured. The voltage, current, and junction temperature relationship of the SiC chip working in the saturation region is obtained through testing, which is important for constructing a multi-chip parallel current sharing model and further proposing optimization and improvement plans for the multi-chip current sharing problem.
[0003] The existing tests for the characteristics of silicon carbide chips are mainly based on static characteristics tests. The device datasheet often only provides the static characteristics test parameters of silicon carbide power semiconductor chips, including the chip's output characteristic curve and transfer characteristic curve at a lower drain-source voltage, the curve of the change of each parasitic capacitance with voltage, the curve of the change of chip on-resistance with gate-source voltage and junction temperature, the reverse characteristics of the chip, the change of the chip's thermal resistance, etc. However, these static characteristic parameters can only be used to evaluate the steady-state characteristics of silicon carbide chips, such as when the chip is in a fully on or off state, but cannot evaluate dynamic processes such as chip switching. In the process of silicon carbide chip switching, taking a 1200V / 120A SiC MOSFET as an example, its drain-source voltage can reach 800V, and the peak current is close to 120A. At this time, the instantaneous power reaches 96kW. The commonly used static characteristic test equipment such as 1505A and 1506A cannot meet the test requirements, and it is difficult to obtain chip dynamic characteristic data. The main problem faced by silicon carbide multi-chip parallel devices in the application process is the dynamic current sharing problem, which mainly occurs in the saturation region of silicon carbide chips. Summary of the invention
[0004] The purpose of the present invention is to overcome the above-mentioned shortcomings of the prior art and provide a system and method for testing the dynamic characteristics of a silicon carbide device. The system and method can measure the saturation region characteristics of a high-power silicon carbide chip.
[0005] In order to achieve the above object, the present invention adopts the following technical scheme:
[0006] In one aspect of the present invention, the device dynamic characteristics test system of the present invention comprises a first driving board, a second driving board, a control board, a test board, a PC terminal, a DC power supply, a high-voltage power supply and an oscilloscope;
[0007] The output end of the PC end is connected to the input end of the control board, the output end of the control board is connected to the input end of the first driving board and the input end of the second driving board, the output end of the first driving board is connected to the control end of the auxiliary switch tube in the test board, the output end of the second driving board is connected to the control end of the silicon carbide chip under test in the test board, the input end of the oscilloscope is connected to the gate, source, drain and freewheeling diode of the silicon carbide chip under test in the test board, the output end of the oscilloscope is connected to the input end of the PC end, the DC power supply is connected to the control board, and the high-voltage power supply is connected to the test board.
[0008] Furthermore, the first driving board and the second driving board both include an isolated power supply, a voltage regulating circuit, a first DC / DC converter, a second DC / DC converter, a push-pull circuit and a driving chip. The output end of the control board is connected to the input end of the isolated power supply, the input end of the voltage regulating circuit and the input end of the driving chip. The output end of the isolated power supply is connected to the input end of the first DC / DC converter and the input end of the second DC / DC converter. The output end of the voltage regulating circuit is connected to the input end of the first DC / DC converter and the input end of the second DC / DC converter. The output end of the first DC / DC converter is connected to the driving chip. The output end of the second DC / DC converter is connected to the push-pull circuit. The output end of the driving chip is connected to the input end of the push-pull circuit. The output end of the push-pull circuit in the first driving board is connected to the control end of the auxiliary switch tube. The output end of the push-pull circuit in the second driving board is connected to the control end of the silicon carbide chip under test.
[0009] Furthermore, the test board includes an auxiliary switch tube, an auxiliary switch tube input signal terminal driving gate, a high-voltage power supply input negative electrode, a silicon carbide chip under test, a silicon carbide chip input signal terminal driving gate, a high-voltage power supply input positive electrode, a freewheeling diode, a load inductor, a high-frequency decoupling capacitor and a large-capacity electrolytic capacitor;
[0010] The positive electrode of the high-voltage power supply is connected to the positive electrode of the high-voltage power supply input, the negative electrode of the high-voltage power supply is connected to the negative electrode of the high-voltage power supply input, the positive electrode of the high-voltage power supply input is connected to the negative electrode of the freewheeling diode, one end of the load inductor, one end of the high-frequency decoupling capacitor and one end of the large-capacity electrolytic capacitor, the positive electrode of the freewheeling diode is connected to the other end of the load inductor, the drain of the auxiliary switch and the drain of the silicon carbide chip to be tested, the source of the auxiliary switch, the source of the silicon carbide chip to be tested, the other end of the high-frequency decoupling capacitor and the other end of the large-capacitance electrolytic capacitor are all grounded, the output end of the first driving board drives the gate to be connected to the gate of the auxiliary switch tube via the auxiliary switch tube input signal terminal, and the output end of the second driving board drives the gate to be connected to the gate of the silicon carbide chip to be tested via the silicon carbide chip input signal terminal.
[0011] Furthermore, the control panel is connected to a human-machine interface.
[0012] Furthermore, the test board is connected to a temperature control module.
[0013] Furthermore, the PC is connected to the control board via a serial port or Bluetooth.
[0014] In a second aspect of the present invention, the device dynamic characteristics testing method of the present invention comprises:
[0015] The PC end sends double pulse test data to the control board, and the control board generates a double pulse signal according to the double pulse test data, and then drives the test board to work through the first driver board and the second driver board according to the double pulse signal, and the PC end obtains the gate-source voltage waveform, the drain-source voltage waveform and the drain current waveform of the tested silicon carbide chip and the current waveform of the freewheeling diode through an oscilloscope;
[0016] According to the gate-source voltage waveform, drain-source voltage waveform and drain current waveform of the tested silicon carbide chip and the current waveform of the freewheeling diode, the characteristic curve of the tested silicon carbide chip in the saturation region is obtained by fitting.
[0017] Furthermore, the test board includes an auxiliary switch tube, an auxiliary switch tube input signal terminal driving gate, a high-voltage power supply input negative electrode, a silicon carbide chip under test, a silicon carbide chip input signal terminal driving gate, a high-voltage power supply input positive electrode, a freewheeling diode, a load inductor, a high-frequency decoupling capacitor and a large-capacity electrolytic capacitor;
[0018] The positive electrode of the high-voltage power supply is connected to the positive electrode of the high-voltage power supply input, the negative electrode of the high-voltage power supply is connected to the negative electrode of the high-voltage power supply input, the positive electrode of the high-voltage power supply input is connected to the negative electrode of the freewheeling diode, one end of the load inductor, one end of the high-frequency decoupling capacitor and one end of the large-capacity electrolytic capacitor, the positive electrode of the freewheeling diode is connected to the other end of the load inductor, the drain of the auxiliary switch and the drain of the silicon carbide chip to be tested, the source of the auxiliary switch, the source of the silicon carbide chip to be tested, the other end of the high-frequency decoupling capacitor and the other end of the large-capacitance electrolytic capacitor are all grounded, the output end of the first driving board drives the gate to be connected to the gate of the auxiliary switch tube via the auxiliary switch tube input signal terminal, and the output end of the second driving board drives the gate to be connected to the gate of the silicon carbide chip to be tested via the silicon carbide chip input signal terminal.
[0019] Furthermore, the control board generates a double pulse signal according to the double pulse test data, and then drives the test board to work through the first drive board and the second drive board according to the double pulse signal. The process is:
[0020] The control board receives the double pulse test data sent by the PC end, and after the delay time t1, outputs the first pulse signal to the first driver board. The width of the first pulse signal is t2. The first driver board drives the auxiliary switch tube in the test board to turn on to charge the load inductor. When the first pulse signal ends, the auxiliary switch tube is closed, and the current of the load inductor is continued through the freewheeling diode. At this time, the current passing through the freewheeling diode is the protection current of the silicon carbide chip under test. After the pulse interval time t3, the control board outputs the second pulse signal to the second driver board, and the duration is t4. t4 is greater than the switching time of the silicon carbide chip under test. When the current flowing through the silicon carbide chip under test is stable, when the current of the freewheeling diode has not dropped to zero, the silicon carbide chip under test is in the saturation zone under the current driving voltage and junction temperature.
[0021] Furthermore, according to the gate-source voltage waveform, drain-source voltage waveform and drain current waveform of the tested silicon carbide chip and the current waveform of the freewheeling diode, statistics and fitting are performed through MATLAB software to obtain the characteristic curve of the tested silicon carbide chip in the saturation region.
[0022] The present invention has the following beneficial effects:
[0023] During specific operation, the device dynamic characteristics testing system and method described in the present invention use a short pulse method to measure the dynamic characteristics of the silicon carbide chip in the saturation region, and use an auxiliary switch tube to limit and adjust the maximum current, while avoiding the influence of the junction temperature change of the silicon carbide chip under test during the conduction process to the greatest extent. In addition, according to the gate-source voltage waveform, drain-source voltage waveform and drain current waveform of the silicon carbide chip under test and the current waveform of the freewheeling diode, the characteristic curve of the silicon carbide chip under test in the saturation region is fitted to measure the saturation region characteristics of the high-power silicon carbide chip. It should be noted that the present invention can be flexibly adjusted according to different packaging forms, different device currents, and voltage levels of the silicon carbide chip under test to meet different testing requirements. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] The accompanying drawings constituting a part of the present invention are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the accompanying drawings:
[0025] Figure 1 It is a schematic diagram of the structure of this invention.
[0026] Figure 2 Schematic diagram of the test board in the present invention.
[0027] Figure 3 Schematic diagram of the driving plate in the present invention.
[0028] Figure 4Schematic diagram of the control board pulse generation sequence in the present invention.
[0029] Figure 5 This is a waveform diagram of some test results of the present invention on the ON Semiconductor NVH4L020N120SC1 chip.
[0030] Among them, 101 is the first driving board, 102 is the second driving board, 103 is the control board, 104 is the test board, 105 is the PC end, 106 is the human-machine interface, 107 is the DC power supply, 108 is the high-voltage power supply, 109 is the temperature control module, 110 is the oscilloscope, 200 is the auxiliary switch tube, 201 is the auxiliary switch tube input signal terminal driving gate, 202 is the high-voltage power supply input negative electrode, 203 is the silicon carbide chip under test, 204 is the silicon carbide chip under test input signal terminal driving gate, 205 is the high-voltage power supply input positive electrode, 206 is the freewheeling diode, 207 is the load inductor, 208 is the high-frequency decoupling capacitor, 209 is the large-capacity electrolytic capacitor, 301 is the isolation power supply, 302 is the voltage regulation circuit, 303 is the first DC / DC converter, 304 is the second DC / DC converter, 305 is the driver chip, and 306 is the push-pull circuit. DETAILED DESCRIPTION
[0031] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiment of the present invention. Obviously, the described embodiment is only an embodiment of a part of the present invention, not all embodiments, and is not intended to limit the scope of the present invention. In addition, in the following description, the description of well-known structures and technologies is omitted to avoid unnecessary confusion of the concepts disclosed in the present invention. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work should fall within the scope of protection of the present invention.
[0032] The accompanying drawings show schematic diagrams of structures according to embodiments disclosed in the present invention. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.
[0033] Embodiment 1
[0034] refer to Figure 1The device dynamic characteristics test system of the present invention comprises a first driving board 101, a second driving board 102, a control board 103, a test board 104, a PC terminal 105, a human-machine interface 106, a DC power supply 107, a high-voltage power supply 108, a temperature control module 109 and an oscilloscope 110;
[0035] The output end of the PC terminal 105 is connected to the input end of the control board 103, the output end of the control end is connected to the input end of the first driving board 101 and the input end of the second driving board 102, the output end of the first driving board 101 is connected to the control end of the auxiliary switch tube 200 in the test board 104, the output end of the second driving board 102 is connected to the control end of the silicon carbide chip 203 under test in the test board 104, the input end of the oscilloscope 110 is connected to the gate, source, drain and freewheeling diode 206 of the silicon carbide chip 203 under test in the test board 104, and the output end of the oscilloscope 110 is connected to the input end of the PC terminal 105.
[0036] refer to Figure 3 Specifically, the first driving board 101 and the second driving board 102 each include an isolated power supply 301, a voltage regulating circuit 302, a first DC / DC converter 303, a second DC / DC converter 304, a push-pull circuit 306 and a driving chip 305, the output end of the control board 103 is connected to the input end of the isolated power supply 301, the input end of the voltage regulating circuit 302 and the input end of the driving chip 305, the output end of the isolated power supply 301 is connected to the input end of the first DC / DC converter 303 and the input end of the second DC / DC converter 304, the output end of the voltage regulating circuit 302 is connected to The input end of the first DC / DC converter 303 is connected to the input end of the second DC / DC converter 304, the output end of the first DC / DC converter 303 is connected to the driving chip 305, the output end of the second DC / DC converter 304 is connected to the push-pull circuit 306, the output end of the driving chip 305 is connected to the input end of the push-pull circuit 306, the output end of the push-pull circuit 306 in the first driving board 101 is connected to the control end of the auxiliary switch tube 200, and the output end of the push-pull circuit 306 in the second driving board 102 is connected to the control end of the silicon carbide chip 203 under test.
[0037] refer to Figure 2The test board 104 includes an auxiliary switch tube 200, an auxiliary switch tube input signal terminal driving gate 201, a high-voltage power supply input negative electrode 202, a silicon carbide chip under test 203, a silicon carbide chip under test input signal terminal driving gate 204, a high-voltage power supply input positive electrode 205, a freewheeling diode 206, 207 is a load inductor 207, a high-frequency decoupling capacitor 208 and a large-capacity electrolytic capacitor 209; the positive electrode of the high-voltage power supply 108 is connected to the high-voltage power supply input positive electrode 205, the negative electrode of the high-voltage power supply 108 is connected to the high-voltage power supply input negative electrode 202, the high-voltage power supply input positive electrode 205 is connected to the negative electrode of the freewheeling diode 206, one end of the load inductor 207, One end of the high-frequency decoupling capacitor 208 is connected to one end of the large-capacity electrolytic capacitor 209, the positive electrode of the freewheeling diode 206 is connected to the other end of the load inductor 207, the drain of the auxiliary switch and the drain of the silicon carbide chip to be tested, the source of the auxiliary switch, the source of the silicon carbide chip to be tested, the other end of the high-frequency decoupling capacitor 208 and the other end of the large-capacitance electrolytic capacitor are all grounded, the output end of the first driving board 101 drives the gate 201 to be connected to the gate of the auxiliary switch tube 200 via the auxiliary switch tube input signal terminal, and the output end of the second driving board 102 drives the gate 204 to be connected to the gate of the silicon carbide chip 203 to be tested via the silicon carbide chip input signal terminal.
[0038] As an implementation mode of the present invention, the control board 103 is connected to a human-machine interface 106 and a DC power supply 107 .
[0039] As an implementation manner of the present invention, the test board 104 is connected to a temperature control module 109 .
[0040] The device dynamic characteristics testing method of the present invention comprises the following steps:
[0041] The PC end 105 is connected to the control board 103 through a serial port or Bluetooth, and the PC end 105 sends double pulse test data to the control board 103, wherein the double pulse test data includes a delay time t1, a first pulse time t2, a pulse interval time t3, and a second pulse time t4. The control board 103 generates a double pulse signal according to the double pulse test data, and adjusts the temperature control module 109 so that the test board 104 reaches the set temperature. The first drive board 101 and the second drive board 102 drive the auxiliary switch tube 200 and the silicon carbide chip 203 under test according to the double pulse signal. When the control board 103 receives a test instruction from the PC end 105 or a button, a pulse signal is output to the first drive board 101 after a delay time t1, and the width of the pulse signal is t2. The first drive board 101 drives the auxiliary switch tube 200 in the test board 104 to turn on and charge the load inductor 207. The voltage across the load inductor 207 is approximately considered to be the DC bus voltage, and the current rises approximately linearly. When the pulse signal After the signal ends, the auxiliary switch tube 200 is closed, and the current of the load inductor 207 is continued to flow through the freewheeling diode 206. At this time, the current passing through the freewheeling diode 206 is the protection current of the silicon carbide chip 203 under test. After the pulse interval time t3, the voltage and current oscillation of the system are basically stable. At this time, the control board 103 outputs a pulse signal to the second drive board 102, and the duration is t4. t4 is greater than the switching time of the silicon carbide chip 203 under test. At this time, the freewheeling diode 206 is measured using the Rogowski coil. 206 and the current of the tested silicon carbide chip 203. When the current flowing through the tested silicon carbide chip 203 is stable and the current of the freewheeling diode 206 has not dropped to zero, the tested silicon carbide chip 203 is in the saturation zone under the current driving voltage and junction temperature. At this time, the drain-source voltage waveform of the tested silicon carbide chip 203 is measured by the oscilloscope 110, and the channel current of the tested silicon carbide chip 203 in the saturation zone under the test condition, i.e., the driving voltage, DC bus voltage, drain-source voltage and junction temperature can be obtained. When the current of the freewheeling diode 206 drops to zero, the protection current is increased by increasing the delay time t1, and the maximum current value that can be passed through the tested silicon carbide chip 203 is increased; the test condition is changed, the last measurement step is repeated many times, and finally the curve fitting is performed to obtain the dynamic characteristics of the tested silicon carbide chip 203 in the saturation zone.
[0042] refer to Figure 4 , is the driving pulse output timing diagram of the present invention, which can be adjusted by adjusting t1, t2, t3, t4 and V on1 、V off1 、V on2 and V off2 The output waveforms of the first driving board 101 and the second driving board 102 are adjusted.
[0043] refer to Figure 5, which is a waveform diagram of some test results of the ON Semiconductor NVH4L020N120SC1 chip using the present invention. At this time, the DC bus voltage is 500V. In this test pulse, the MOSFET is in the saturation region before the current inflection point, and the current gradually increases from 59.175A to the set protection current of about 78.341A and remains basically unchanged.
[0044] Embodiment 2
[0045] In this embodiment, the PC end 105 is connected to the control board 103 via Bluetooth or a serial port, and sends pulse time instructions t1, t2, t3, t4 and a pulse generation signal to the control board 103 while receiving test data from the oscilloscope 110, including the gate-source voltage waveform, drain-source voltage waveform, drain current waveform, and anti-parallel diode current waveform of the chip under test, and performs statistics and fitting on the measured parameters through MATLAB software to obtain the characteristic curve of the silicon carbide chip 203 under test in the saturation region.
[0046] The control board 103 uses STM32 as the main control chip, and is connected to the DC power supply 107, the human-machine interface 106, the PC terminal 105, the first driver board 101 and the second driver board 102 respectively. The PC terminal 105 provides pulse time instructions, and the human-machine interface 106 provides reset and pulse generation instructions for the control board 103 through function keys. The power supply voltage provided by the DC power supply 107 is 24V, which is stepped down to 6.5V through a DC / DC converter and then stepped down to 3.3V through an LDO to power the single-chip computer system. At the same time, a LDO output 5V is used to supply the first driver board 101 and the second driver board 102. At the same time, the control board 103 converts the received pulse time instructions into high-precision pulse instructions with an accuracy of 2.08ns through the control algorithm combined with the advanced timer peripherals. The pulse timing generated is as follows Figure 4 As shown, t1 is the delay time of the rising edge of pulse 1 after the pulse generation signal is sent, t2 is the pulse width of pulse 1, t3 is the delay time between the falling edge of pulse 1 and the rising edge of pulse 2, and t4 is the pulse width of pulse 2, wherein pulse 1 is output to the first driving board 101, and pulse 2 is output to the second driving board 102.
[0047] The first driver board 101 and the second driver board 102 are both connected to the control board 103, receive pulse signals and 5V and 24V power supplies from the control board 103, and are connected to the test board 104, wherein the first driver board 101 provides a driving signal for the auxiliary switch tube in the test board 104, and the second driver board 102 provides a driving signal for the silicon carbide chip 203 under test in the test board 104. The structures of the first driver board 101 and the second driver board 102 are exactly the same, and the core component block diagram inside them is as follows: Figure 3As shown, the isolated power supply 301 has two input ports, namely, a power supply port and a power ground port. The input 24V power supply is converted into an isolated 24V power supply after the isolated power supply 301, and is respectively input into the first DC / DC converter 303 and the second DC / DC converter 304. The input isolation voltage level and the output isolation voltage level of the isolated power supply 301 are both 1500V. The voltage regulating circuit 302 has four input ports, namely, reference voltage 1, reference ground 1, reference voltage 2 and reference ground 2. The reference voltage 1 and the reference ground 1 provide feedback reference voltages for the first DC / DC converter 303, which are used to adjust the output voltage of the first DC / DC converter 303. The reference voltage 2 and the reference ground 2 provide feedback reference voltages for the second DC / DC converter 304, which are used to adjust the output voltage of the second DC / DC converter 304. The first DC / DC converter 303 and the second DC / DC converter 304 convert the voltage output by the isolation power supply 301 into a secondary voltage and provide the required positive voltage and negative voltage for the driver chip 305 and the push-pull circuit 306. The voltage is regulated by the voltage regulating circuit 302. The first DC / DC converter 303 is used to output positive voltage, and its output voltage range is 0.8V-20V; the second DC / DC converter 304 is used to output negative voltage, and its output voltage regulation range is -10V--0.8V. The driver chip 305 has three input ports, namely, the input 5V power supply port, the pulse signal input port and the control circuit ground port. The UVLO of the driver chip 305 is 3V, and the maximum drive side input voltage of the driver chip 305 is 30V. According to the designed DC / DC output voltage range, the drive voltage output by the driver chip 305 is in the range of -10V-20V. In order to further improve the output capacity of the drive, the output voltage of the driver chip 305 is amplified by the push-pull circuit 306.
[0048] The test board 104 receives the driving control pulses output by the first driving board 101 and the second driving board 102, and tests the silicon carbide chip 203 under test, wherein the output signal of the first driving board 101 is used to drive the auxiliary switch tube 200, and the output signal of the second driving board 102 is used to drive the silicon carbide chip 203 under test, and the DC bus voltage to be tested is applied to the silicon carbide chip 203 under test through the high-voltage power supply input positive electrode 205 and the high-voltage power supply input negative electrode 202, and the adjustment range of the voltage is 0-1000V. Figure 4As shown, the output pulse of the first driving board 101 is before the output pulse of the second driving board 102. In the actual test process, the auxiliary switch tube 200 is turned on first. At this time, the energy stored in the high-frequency decoupling capacitor 208 and the large-capacity electrolytic capacitor 209 flows through the load inductor 207, so that the auxiliary switch tube 200 is turned on, and the current rises approximately linearly. By controlling this time, the limiting current value of the system can be further controlled, and then the auxiliary switch tube 200 is turned off. During this delay time, the current of the load inductor 207 is freewheeling through the freewheeling diode 206, and then the silicon carbide chip 203 under test is turned on, and the test waveform is obtained through the oscilloscope 110. The waveform is transmitted to the PC end 105 through the interface, and MATLAB is used for data processing. In the test process, the maximum test current is limited to the maximum current limit range.
[0049] The test process of the test system is:
[0050] 1) According to the voltage and current level of the test chip, the size of the load inductance 207, and the DC bus voltage, select a suitable current protection value, and set suitable timing parameters according to the protection value. Taking this example, the DC bus voltage is 500V, the size of the load inductance 207 is 50μH, and the protection current is set to 70A. At this time, the calculated pulse time t2 is 7us.
[0051] 2) Select a suitable t3 according to different test conditions to avoid the influence of system voltage and current oscillation on the test results; in this example, select t3 = 5us. Select a suitable t4 according to the current rise time and change law of the tested silicon carbide chip 203 to avoid device failure due to excessive junction temperature of the device. In this example, select t4 = 2us. t1 does not affect the experimental results and can be selected at any value. In this example, select t1 = 1us.
[0052] 3) Set the junction temperature to be measured and set the parameters of the temperature control module 109. In this example, T j =20℃.
[0053] 4) Setting the driving voltage, wherein the auxiliary switch tube 200 needs to ensure that the switch tube is fully turned on and off. In this example, V on1 =18V, V off1 = -4V, the silicon carbide chip 203 under test can be set to any value from -10V to 0.8V to 0.8V to 20V. In this example, V on2 =8.5V, V off2 =-4V.
[0054] 5) Use the PC terminal 105 to connect to the control board 103, send a pulse timing signal, and after the control board 103 is updated, send a pulse generation signal, and read the data of the oscilloscope 110 through the PC terminal 105. The experimental results obtained in this example test are as follows Figure 5 shown.
[0055] The above embodiment is only one of the implementation methods that can realize the technical solution of the present invention. The scope of protection claimed by the present invention is not limited only to this embodiment, but also includes changes, replacements and other implementation methods that can be easily thought of by any technician familiar with the technical field within the technical scope disclosed by the present invention.
Claims
1. A silicon carbide device dynamic characteristics test system, characterized in that: It comprises a first driving board (101), a second driving board (102), a control board (103), a test board (104), a PC terminal (105), a direct current power supply (107), a high voltage power supply (108) and an oscilloscope (110); The output end of the PC end (105) is connected to the input end of the control board (103), the output end of the control board (103) is connected to the input end of the first drive board (101) and the input end of the second drive board (102), the output end of the first drive board (101) is connected to the control end of the auxiliary switch tube (200) in the test board (104), the output end of the second drive board (102) is connected to the control end of the silicon carbide chip (203) under test in the test board (104), the input end of the oscilloscope (110) is connected to the gate, source, drain and freewheeling diode (206) of the silicon carbide chip (203) under test in the test board (104), the output end of the oscilloscope (110) is connected to the input end of the PC end (105), the DC power supply (107) is connected to the control board (103), and the high voltage power supply (108) is connected to the test board (104).
2. The device dynamic characteristics testing system according to claim 1, characterized in that: The first driving board (101) and the second driving board (102) both comprise an isolated power supply (301), a voltage regulating circuit (302), a first DC / DC converter (303), a second DC / DC converter (304), a push-pull circuit (306) and a driving chip (305); the output end of the control board (103) is connected to the input end of the isolated power supply (301), the input end of the voltage regulating circuit (302) and the input end of the driving chip (305); the output end of the isolated power supply (301) is connected to the input end of the first DC / DC converter (303) and the input end of the second DC / DC converter (304); the output end of the voltage regulating circuit (302) is connected to the input end of the first DC / DC converter (303) and the input end of the second DC / DC converter (304); The input end of the first DC / DC converter (303) and the input end of the second DC / DC converter (304) are connected, the output end of the first DC / DC converter (303) is connected to the driving chip (305), the output end of the second DC / DC converter (304) is connected to the push-pull circuit (306), the output end of the driving chip (305) is connected to the input end of the push-pull circuit (306), the output end of the push-pull circuit (306) in the first driving board (101) is connected to the control end of the auxiliary switch tube (200), and the output end of the push-pull circuit (306) in the second driving board (102) is connected to the control end of the silicon carbide chip (203) under test.
3. The device dynamic characteristics testing system according to claim 1, characterized in that: The test board (104) comprises an auxiliary switch tube (200), an auxiliary switch tube input signal terminal driving gate (201), a high-voltage power supply input negative electrode (202), a silicon carbide chip to be tested (203), a silicon carbide chip input signal terminal driving gate (204), a high-voltage power supply input positive electrode (205), a freewheeling diode (206), a load inductor (207), a high-frequency decoupling capacitor (208) and a large-capacity electrolytic capacitor (209); The positive electrode of the high-voltage power supply (108) is connected to the positive electrode (205) of the high-voltage power supply input, the negative electrode of the high-voltage power supply (108) is connected to the negative electrode (202) of the high-voltage power supply input, the positive electrode (205) of the high-voltage power supply input is connected to the negative electrode of the freewheeling diode (206), one end of the load inductor (207), one end of the high-frequency decoupling capacitor (208) and one end of the large-capacity electrolytic capacitor (209), the positive electrode of the freewheeling diode (206) is connected to the other end of the load inductor (207), the drain of the auxiliary switch and the to-be-tested The output end of the first driving board (101) is connected to the gate of the auxiliary switch tube (200) via the auxiliary switch tube input signal terminal driving the gate (201), and the output end of the second driving board (102) is connected to the gate of the silicon carbide chip (203) via the silicon carbide chip input signal terminal driving the gate (204).
4. The device dynamic characteristics testing system according to claim 1, characterized in that: The control panel (103) is connected to a human-machine interface (106).
5. The device dynamic characteristics testing system according to claim 1, characterized in that: The test board (104) is connected to a temperature control module (109).
6. The device dynamic characteristics testing system according to claim 1, characterized in that: The PC end (105) is connected to the control board (103) via a serial port or Bluetooth.
7. A device dynamic characteristics testing method, characterized in that: The device dynamic characteristics testing system according to claim 1 comprises: The PC end (105) sends double pulse test data to the control board (103), the control board (103) generates a double pulse signal according to the double pulse test data, and then drives the test board (104) to work through the first drive board (101) and the second drive board (102) according to the double pulse signal, and the PC end (105) obtains the gate-source voltage waveform, the drain-source voltage waveform and the drain current waveform of the tested silicon carbide chip (203) and the current waveform of the freewheeling diode (206) through the oscilloscope (110); According to the gate-source voltage waveform, drain-source voltage waveform and drain current waveform of the tested silicon carbide chip (203) and the current waveform of the freewheeling diode (206), a characteristic curve of the tested silicon carbide chip (203) in the saturation region is obtained by fitting.
8. The device dynamic characteristics testing method according to claim 7, characterized in that: The test board (104) comprises an auxiliary switch tube (200), an auxiliary switch tube input signal terminal driving gate (201), a high-voltage power supply input negative electrode (202), a silicon carbide chip to be tested (203), a silicon carbide chip input signal terminal driving gate (204), a high-voltage power supply input positive electrode (205), a freewheeling diode (206), a load inductor (207), a high-frequency decoupling capacitor (208) and a large-capacity electrolytic capacitor (209); The positive electrode of the high-voltage power supply (108) is connected to the positive electrode (205) of the high-voltage power supply input, the negative electrode of the high-voltage power supply (108) is connected to the negative electrode (202) of the high-voltage power supply input, the positive electrode (205) of the high-voltage power supply input is connected to the negative electrode of the freewheeling diode (206), one end of the load inductor (207), one end of the high-frequency decoupling capacitor (208) and one end of the large-capacity electrolytic capacitor (209), the positive electrode of the freewheeling diode (206) is connected to the other end of the load inductor (207), the drain of the auxiliary switch and the to-be-tested The output end of the first driving board (101) is connected to the gate of the auxiliary switch tube (200) via the auxiliary switch tube input signal terminal driving the gate (201), and the output end of the second driving board (102) is connected to the gate of the silicon carbide chip (203) via the silicon carbide chip input signal terminal driving the gate (204).
9. The device dynamic characteristic testing method according to claim 8, characterized in that: The control board (103) generates a double pulse signal according to the double pulse test data, and then drives the test board (104) to work through the first drive board (101) and the second drive board (102) according to the double pulse signal. The process is as follows: The control board (103) receives the double pulse test data sent by the PC terminal (105), and after a delay time t1, outputs a first pulse signal to the first driving board (101), wherein the width of the first pulse signal is t2, and the first driving board (101) drives the auxiliary switch tube (200) in the test board (104) to turn on, so as to charge the load inductor (207). When the first pulse signal ends, the auxiliary switch tube (200) is turned off, and the current of the load inductor (207) continues to flow through the freewheeling diode (206). The current of the freewheeling diode (206) is the protection current of the silicon carbide chip (203) under test. After the pulse interval time t3, the control board (103) outputs a second pulse signal to the second driving board (102), and the duration is t4. t4 is greater than the switching time of the silicon carbide chip (203) under test. When the current flowing through the silicon carbide chip (203) under test is stable and the current of the freewheeling diode (206) has not dropped to zero, the silicon carbide chip (203) under test is in a saturation region at the current driving voltage and junction temperature.
10. The device dynamic characteristic testing method according to claim 7, characterized in that: According to the gate-source voltage waveform, drain-source voltage waveform and drain current waveform of the silicon carbide chip (203) under test The current waveform of the freewheeling diode (206) is statistically analyzed and fitted by MATLAB software. A characteristic curve of the tested silicon carbide chip (203) in the saturation region is obtained.