Enhanced nitride semiconductor transistor epitaxial structure

Abstract

The invention provides an enhanced nitride semiconductor transistor epitaxial structure, which comprises a substrate, a nucleating layer, a buffer layer, a channel layer, a barrier layer and a cap layer arranged on the barrier layer, and the cap layer comprises a p-type polarization doped AlInGaN structure in which the Al component is gradually reduced along the epitaxial growth direction or the In component is gradually increased along the epitaxial growth direction. P-type doping is achieved through polarization doping instead of Mg atom impurity doping, higher negative ionization charge density and hole concentration are obtained, meanwhile, due to the fact that ionization charges and hole concentration generated by polarization doping are hardly affected by impurity ionization energy, an AlGaN or AlInGaN layer with the forbidden band width larger than that of GaN can be adopted as the cap layer, and therefore the performance of the device is improved. Therefore, the nitride transistor can obtain higher threshold voltage, and the reliability of the device in work is improved.

Description

Technical Field

[0001] The invention belongs to the field of semiconductor technology, and in particular relates to an enhanced nitride semiconductor transistor epitaxial structure. Background Art

[0002] Compared with traditional silicon material devices, nitride semiconductor power devices have high breakdown electric field, more energy saving, more stable physical and chemical properties, can work at higher ambient temperature, have higher switching speed, can reduce the volume and weight of application systems, and other advantages. They can be applied to various household appliances, electric vehicles, solar and wind energy and other new energy generation, electric vehicles, robots, intelligent manufacturing industry, large data processing centers and other fields. At present, nitride transistor devices mainly adopt high electron mobility transistor (HEMT) structure, using the high concentration of two-dimensional electron gas formed by the discontinuity of polarization electric field at the interface of AlGaN barrier layer and GaN channel layer. The two-dimensional electron gas has high electron mobility, so it can significantly reduce the on-resistance of the device. However, due to the existence of two-dimensional electron gas, nitride transistors are depletion type (normally open) devices. The channel is conductive without external gate voltage. Considering the safety of use, enhancement type (normally closed) devices are required. There are currently two main technical routes for commercializing enhancement-mode nitride transistors. One is to use depletion-mode nitride devices and normally-off silicon transistors to form a cascode cascade structure to achieve enhancement-mode functions; the other is to grow a p-type GaN cap layer on the barrier layer to deplete the two-dimensional electron gas in the channel layer below the gate to achieve enhancement-mode. The presence of Si transistors in the cascode structure limits the performance of the device under high temperature and high frequency conditions, and has high requirements for the performance matching of nitride transistors and Si transistors, which will also increase the cost of the chip; the p-type GaN cap layer is used to achieve enhancement-mode. Since the activation energy of the p-type doped impurity Mg in GaN is high, as the bandgap width increases, the activation energy of the impurity Mg in AlGaN further increases, making it difficult to achieve a high p-type ionized impurity concentration, and the threshold voltage of the enhancement-mode nitride transistor is low, affecting the reliability of use.

[0003] In the non-patent literature Journal of Applied Physics 113,034502 (2013), Mizutani et al. reported a method for realizing an enhanced nitride high electron mobility transistor using a polarization-doped p-type InGaN cap layer. The method uses a 4nm Mg-doped InGaN 0.23 Ga 0.77 N cap layer.

[0004] In the non-patent document Applied Physics Express 15,016502 (2022), Zeng et al. reported a method for realizing an enhanced nitride high electron mobility transistor using a composition-gradient polarization-doped p-type InGaN cap layer. The method uses a 130nm undoped InGaN cap layer in which the In component increases linearly from 0 to 16% along the growth direction.

[0005] Since In is easily decomposed at temperatures above 600°C, the performance of the cap layer is easily affected by high-temperature processes such as annealing in subsequent processing. In addition, the InGaN bandgap is narrow, and using InGaN as a cap layer has no effect on improving the threshold voltage of the transistor. Summary of the invention

[0006] The present invention provides an enhanced nitride semiconductor transistor epitaxial structure, comprising: a substrate, a nucleation layer, a buffer layer, a channel layer, and a barrier layer, characterized in that it also comprises a cap layer arranged on the barrier layer. The cap layer comprises a p-type polarization doped AlInGaN structure in which the Al component gradually decreases along the epitaxial growth direction, or the In component gradually increases along the epitaxial growth direction.

[0007] In the enhanced nitride semiconductor transistor epitaxial structure, the substrate is selected from: a silicon substrate, a silicon carbide substrate, a sapphire substrate, a gallium nitride substrate, or a composite substrate formed with the above substrate as the surface and other materials.

[0008] In the enhanced nitride semiconductor transistor epitaxial structure, the nucleation layer is selected from: AlN, GaN, InN, or their alloy materials, or a multilayer stacked structure of the above materials; it can also be that a layer of 3C-SiC or SiN material is first grown on the surface of the silicon substrate, and then the above AlN, GaN, InN, or their alloy materials, or a multilayer stacked structure of the above materials are continued to grow.

[0009] In the enhanced nitride semiconductor transistor epitaxial structure, the buffer layer is selected from AlN, AlGaN, GaN single layer or multilayer stacked structure, AlN / GaN, AlN / AlGaN, AlGaN / GaN superlattice structure, or a composite structure including the above structures.

[0010] In the enhanced nitride semiconductor transistor epitaxial structure, the barrier layer is selected from an AlGaN layer, an AlN layer, an AlInN layer, an AlInGaN layer, or a plurality of superpositions of the above material layers.

[0011] In the enhanced nitride semiconductor transistor epitaxial structure, the channel layer is GaN, or any other alloy of AlInGaN in any proportion, or a composite stack of the above material layers.

[0012] An enhanced nitride semiconductor transistor epitaxial structure, wherein the cap layer is Al x In y Ga z N(0 < x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1, x + y + z = 1) alloy layer, where the Al component decreases along the epitaxial growth direction, the In component remains unchanged or increases along the epitaxial growth direction, or the In component increases along the epitaxial growth direction while the Al component remains unchanged, forming a p-type polarization doping structure; B element can also be doped into this AlInGaN layer to form a BAlInGaN alloy.

[0013] In an enhanced nitride semiconductor transistor epitaxial structure, when the p-type polarization doping layer in the cap layer AlInGaN is a single layer, the component growth direction changes continuously according to the above trend; when the p-type polarization doping layer in the cap layer AlInGaN is a multi-layer, the layer that does not contact the barrier layer can be an InGaN layer, and the component growth direction in each layer changes continuously according to the above trend. There is no specific limitation on other layers included in the cap layer.

[0014] An enhanced nitride semiconductor transistor epitaxial structure, wherein the cap layer is unintentionally doped, or p-type doping is performed with Mg atoms in some regions, or p-type doping is performed with Mg atoms in all regions.

[0015] An enhanced nitride semiconductor transistor epitaxial structure, a high-concentration Mg atom-doped p-type nitride is further provided as a contact layer on the p-type polarization doping cap layer, and the Mg doping concentration in this contact layer is not less than 5×10 18 / cm 3 .

[0016] Compared with the prior art, the present invention provides a nitride semiconductor transistor epitaxial structure with the following

[0017] Beneficial effects:

[0018] P-type doping is achieved through polarization doping rather than Mg atom impurity doping, obtaining a higher negative ionization charge density and hole concentration. At the same time, since the ionization charge and hole concentration generated by polarization doping are hardly affected by the impurity ionization energy, an AlGaN or AlInGaN layer with a wider bandgap than GaN can be used as the cap layer. Therefore, the nitride transistor can obtain a higher threshold voltage, improving the reliability of the device during operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a schematic diagram of the transistor epitaxial structure of Embodiment 1 of the present invention.

[0020] Figure 2This is a schematic diagram of the transistor epitaxial structure of Example 2 of the present invention.

[0021] Figure 3 This is a schematic diagram of the transistor epitaxial structure of Example 3 of the present invention.

[0022] Description of the drawings: 10-substrate; 11-nucleation layer; 12-buffer layer; 13-channel layer; 14-barrier layer; 15-AlGaN layer; 161-source, 162-gate electrode; 163-drain. 20-substrate; 21-nucleation layer; 22-buffer layer; 23-channel layer; 24-barrier layer; 25-AlGaN layer; 26-p-type GaN contact layer; 271-source, 272-gate electrode; 273-drain; 30-substrate; 31-nucleation layer; 32-buffer layer; 33-channel layer; 34-barrier layer; 35-polarization doping layer; 351-AlGaN layer; 352-InGaN layer; 361-source, 362-gate electrode; 363-drain. DETAILED DESCRIPTION

[0023] The present disclosure will now be described more fully below with reference to the accompanying drawings, however, the present disclosure can be implemented in many different ways and should not be construed as being limited to the embodiments set forth herein. On the contrary, providing these embodiments herein will make the present disclosure more detailed and complete, and fully convey the scope of the present disclosure to those skilled in the art. The same reference numerals throughout the text represent the same objects.

[0024] Example 1

[0025] In the first exemplary embodiment, referring to Figure 1 The epitaxial growth of this embodiment 1 adopts metal organic chemical vapor deposition (MOCVD). The provided nitride transistor structure includes:

[0026] The substrate 10 is a conductive silicon substrate in this embodiment.

[0027] The nucleation layer 11 formed on the substrate 10 is an AlN layer with a thickness of 100 nm;

[0028] The buffer layer 12 formed on the nucleation layer 11 includes an AlN / AlGaN / superlattice structure grown sequentially from bottom to top, wherein AlN is 100nm, and AlGaN can be a single layer or a multilayer with different components. In this embodiment, it is a 100nm AlGaN single layer structure with an Al component of 50%. The superlattice structure can be AlN / GaN, AlN / AlGaN, AlGaN / GaN superlattice structure, or a combination of the above structures. In this embodiment, an AlN / GaN superlattice structure is used, and each period includes AlN 4nm, AlGaN 20nm, Al component is 20%, the total thickness is about 3 microns, and the carbon doping concentration is about 1×1019 / cm 3 The pressure resistance of the buffer layer can be effectively improved by appropriately increasing the Al component of the buffer layer, increasing the thickness of the buffer layer, and increasing the carbon doping concentration in the buffer layer within a certain range;

[0029] The channel layer 13 is grown on the buffer layer 12, using 300nm of unintentionally doped GaN with a background electron concentration of about 4×10 16 / cm 3 .

[0030] The barrier layer 14 is formed of a 10 nm thick AlGaN layer having an Al composition of 22%.

[0031] An AlGaN layer 15 with a thickness of 50 nm and an Al content gradually decreasing from 22% to 2% is grown on the barrier layer 14. (P is the polarization intensity, x2 and x1 are the Al component contents at both ends of the AlGaN layer, and d is the thickness of the AlGaN layer in cm) It is calculated that the hole concentration is about 2×10 18 / cm 3 , which is significantly higher than the hole concentration obtained by Mg impurity doping (generally about 5×10 17 / cm 3 ).

[0032] The polarization doped AlGaN layer 15 outside the gate region is etched away by photolithography to form transistor electrodes, including an ohmic contact electrode source 161 and a drain 163 , and a Schottky contact electrode gate electrode 162 is formed on the gate dielectric.

[0033] Example 2

[0034] In the second exemplary embodiment, referring to Figure 2 , the nitride transistor structure of embodiment 2 comprises: a substrate 20, which is a conductive silicon substrate in this embodiment;

[0035] The nucleation layer 21 formed on the substrate 20 is an AlN layer with a thickness of 100 nm;

[0036] The buffer layer 22 includes an AlN / AlGaN / superlattice structure grown sequentially from bottom to top, wherein AlN is 100nm, and AlGaN can be a single layer or a multilayer with different components. In this embodiment, it is a 50nm AlGaN single layer structure with an Al component of 50%. The superlattice structure can be AlN / GaN, AlN / AlGaN, AlGaN / GaN superlattice structure, or a combination of the above structures. In this embodiment, an AlN / AlGaN superlattice structure is used, and each period includes AlN 4nm, AlGaN 20nm, Al component is 20%, the total thickness is about 2 microns, and the carbon doping concentration is about 1×10 19 / cm 3 ;

[0037] The channel layer 23 is grown on the buffer layer 22, using 300nm of unintentionally doped GaN with a background electron concentration of about 4×10 16 / cm 3 ;

[0038] The barrier layer 24 is made of a 10nm AlGaN layer, and the Al component gradually increases from 22% to 24% along the growth direction;

[0039] An AlGaN layer 25 with a thickness of 50 nm and an Al content gradually decreasing from 24% to 0% is grown on the barrier layer 24. A 20 nm p-type doped GaN contact layer 26 is grown with a Mg atom doping concentration of 3×10 19 / cm 3 The doped Mg atoms were activated by a furnace annealing process at 650 °C in a N2 atmosphere.

[0040] The polarization doped AlGaN layer 25 and the p-type GaN contact layer 26 outside the gate region are etched away by photolithography to form transistor electrodes, including an ohmic contact electrode source 271 and a drain 273 , and an ohmic contact electrode gate electrode 272 is formed on the gate dielectric.

[0041] Example 3

[0042] In the third exemplary embodiment, referring to Figure 3 , the nitride transistor structure of embodiment 3 comprises: a substrate 30, which is a conductive silicon substrate in this embodiment;

[0043] The nucleation layer 31 formed on the substrate 30 is an AlN layer with a thickness of 100 nm;

[0044] The buffer layer 32 includes an AlN / AlGaN superlattice structure grown sequentially from bottom to top, wherein AlN is 100nm, and AlGaN can be a single layer or a multilayer with different components. In this embodiment, it is a 50nm AlGaN single layer structure with 50% Al component. The superlattice structure can be AlN / GaN, AlN / AlGaN, AlGaN / GaN superlattice structure, or a combination of the above structures. In this embodiment, an AlN / GaN superlattice structure is used, and each period includes AlN 4nm, GaN 20nm, a total thickness of about 2.6 microns, and a carbon doping concentration of about 1×10 19 / cm 3 ; A channel layer 33 is grown on the buffer layer 32, using 300nm of unintentionally doped GaN, with a background electron concentration of about 4×10 16 / cm 3 ;

[0045] The barrier layer 34 is a 10 nm AlGaN layer with an Al content of 22%;

[0046] A polarization doping layer 35 is grown on the barrier layer 34, including an AlGaN layer 351 with a thickness of 50nm, in which the Al component gradually decreases along the growth direction, and the Al component gradually decreases from 22% to 0%. Then an InGaN layer 352 is grown with a thickness of 30nm, and the In component gradually increases from 0% to 10%.

[0047] The polarization doping layer 35 outside the gate region is etched away by photolithography to make transistor electrodes, including an ohmic contact electrode source 361 and a drain 363, and a Schottky contact electrode gate electrode 362 is made above the gate dielectric. The above is only a specific implementation of the embodiment of the present invention, but the protection scope of the embodiment of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of changes or replacements within the technical scope disclosed in the embodiment of the present invention, which should be covered within the protection scope of the embodiment of the present invention. Therefore, the protection scope of the embodiment of the present invention shall be based on the protection scope of the claims.

Claims

1. An enhanced nitride semiconductor transistor epitaxial structure, comprising: A substrate, a nucleation layer, a buffer layer, a channel layer, and a barrier layer, characterized in that it also includes a cap layer arranged on the barrier layer, wherein the cap layer is a p-type polarization doped AlInGaN structure, and the Al component in the cap layer gradually decreases along the epitaxial growth direction, or the In component in the cap layer gradually increases along the epitaxial growth direction.

2. The enhancement mode nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: The substrate is selected from: a silicon substrate, a silicon carbide substrate, a sapphire substrate, a gallium nitride substrate or a composite substrate with the above substrate as the surface layer.

3. The enhancement mode nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: The nucleation layer is AlN, GaN, InN, or their alloy materials, or a multilayer stacked structure of the above materials; or a layer of 3C-SiC or SiN material is first grown on the surface of the silicon substrate, and then the above AlN, GaN, InN, or their alloy materials, or a multilayer stacked structure of the above materials are continued to grow.

4. The enhancement mode nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: The buffer layer is a structure of AlN, AlGaN, GaN single layer or multilayer stacking, AlN / GaN, AlN / AlGaN, AlGaN / GaN super lattice structure, or a composite structure including the above structures.

5. The enhancement mode nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: The barrier layer is an AlGaN layer, an AlN layer, an AlInN layer, an AlInGaN layer, or a plurality of superpositions of the above material layers.

6. The enhancement mode nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: The channel layer is GaN, or other alloys of AlInGaN in any proportion, or a composite stack of the above material layers.

7. The enhancement mode nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: The capping layer is Al x In y Ga z N (0 < x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1, x + y + z = 1) alloy layer, where the Al component decreases along the epitaxial growth direction, the In component remains unchanged or increases along the epitaxial growth direction, or the In component increases along the epitaxial growth direction while the Al component remains unchanged, forming a p-type polarization doping structure; B element can also be doped into the AlInGaN layer to form a BAlInGaN alloy.

8. The enhancement mode nitride semiconductor transistor epitaxial structure according to claim 7, characterized in that: When the p-type polarization doped layer in the cap layer AlInGaN is a single layer, the growth direction of the component changes continuously according to the trend described in claim 7; when the p-type polarization doped layer in the cap layer AlInGaN is a multilayer, the layer not in contact with the barrier layer can be an InGaN layer, and the growth direction of the component in each layer changes continuously according to the trend described in claim 7.

9. The enhancement mode nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: The cap layer is unintentionally doped, or a portion of the region is doped with Mg atoms for p-type doping, or the entire region is doped with Mg atoms for p-type doping.

10. The enhancement mode nitride semiconductor transistor epitaxial structure according to claim 1, characterized in that: A high-concentration Mg atom-doped p-type nitride is also provided on the p-type polarization doped cap layer as a contact layer, and the Mg doping concentration in the contact layer is not less than 5×10 18 / cm 3 .

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