Laser splicing opening processed back contact solar cell and preparation method, and cell assembly

Abstract

The present invention belongs to the technical field of solar cells, and specifically relates to a back-contact solar cell with laser splicing opening treatment and a preparation method thereof. By opening a first semiconductor region by laser double-line splicing, the effective area of ​​the first semiconductor region can be increased. At the same time, since the splicing intersection position is subjected to two laser treatments, the thickness of the N-type doped polysilicon layer in the splicing region is thinned relative to other positions in the opening region, thereby enhancing the collection of photogenerated carriers in a PN junction battery, thereby effectively improving the conversion efficiency of the battery. In addition, since the minimum splicing width is greater than the width of the silver paste electrode fine grid line, the battery current collection is maximized, which is beneficial to increasing the battery short-circuit current Isc and further improving the photoelectric conversion efficiency of the battery.

Description

Technical Field

[0001] The invention belongs to the technical field of solar cells, and in particular relates to a back-contact solar cell processed by laser splicing and opening, a preparation method and a cell assembly. Background Art

[0002] In the preparation of existing back-contact solar cells, the first semiconductor opening area on the back of the silicon wafer is generally made by laser, that is, a single row of lasers is used to open the opening area of ​​the N region (i.e., the first semiconductor region), so the opening area of ​​the N region (i.e., the first semiconductor region) is limited and the preparation efficiency is low. If you want to increase the opening area, you can only increase the energy of the laser, but this method has limited effect on increasing the opening on the one hand, and will seriously damage the lens on the other hand.

[0003] It should be noted that this part of the present invention only provides background technology related to the present invention and does not necessarily constitute prior art or known technology. Summary of the invention

[0004] The purpose of the present invention is to provide a back-contact solar cell with laser splicing opening processing and a preparation method thereof, so as to solve the technical problem of how to increase the size of the first semiconductor opening of the back-contact solar cell without damaging the optical device / optical lens.

[0005] In order to achieve the above-mentioned object, in a first aspect, an embodiment of the present invention provides a method for preparing a back-contact solar cell with laser splicing opening processing, comprising:

[0006] S01, providing a silicon wafer, and polishing both sides of the silicon wafer;

[0007] S02, sequentially preparing a tunneling silicon oxide layer and an N-type doped polysilicon layer on the back side of the silicon wafer, thereby obtaining a first semiconductor layer;

[0008] S03, preparing a first mask layer on the surface of the first semiconductor layer;

[0009] S04, etching an opening on the back side of the silicon wafer for the first time, removing a portion of the mask layer and a corresponding portion of the first semiconductor layer, and forming a second semiconductor opening region arranged alternately;

[0010] S05, forming a pyramid velvet surface on the front side of the silicon wafer by texturing and cleaning, and removing the first semiconductor layer in the second semiconductor region on the back side of the silicon wafer and then removing the first mask layer, so as to form a silicon wafer with a single-side texturing and single-side polishing structure;

[0011] S06, sequentially preparing a passivation layer and an anti-reflection layer on the front side of the silicon wafer, and preparing a second semiconductor layer on the back side of the silicon wafer, wherein the second semiconductor layer is an intrinsic amorphous silicon layer and a P-type doped amorphous silicon layer or a P-type microcrystalline silicon layer;

[0012] S07, etching an opening on the back side of the silicon wafer for the second time to form a first semiconductor opening region alternately arranged with the second semiconductor region, wherein the width of the first semiconductor opening region is 150-350 um; the first semiconductor opening region is laser etched by double-line splicing, wherein the width of the double-line splicing is W3, and W3 is 50-200 um;

[0013] S08, after cleaning the silicon wafer to remove the passivation layer in the first semiconductor opening region, a transparent conductive film layer is deposited on the back side of the silicon wafer;

[0014] S09, making an opening on the transparent conductive film layer between the first semiconductor opening region and the second semiconductor opening region to form an isolation groove;

[0015] S10, forming an insulating ink layer arranged at intervals on the transparent conductive layer on the back of the silicon wafer;

[0016] S11, printing silver paste fine grid lines and silver paste main grid lines on the back of the silicon wafer to form silver paste grid line electrodes, wherein the printing width of the silver paste fine grid lines is Wxs, Wxs is 40-100um, and Wxs <W3。

[0017] Optionally, the thickness of the N-type doped polysilicon layer is 80-200 nm.

[0018] Optionally, the laser used to form the first semiconductor opening region is a flat-top picosecond green laser or a flat-top picosecond ultraviolet laser, and the power of the laser is 20KW-100KW and the frequency is 200KHZ-1000KHZ.

[0019] Optionally, a width of the second semiconductor opening region is 300um-700um.

[0020] Optionally, the width of the isolation groove is 30um-200um, and the isolation groove is formed at the junction of the texturing area and the polishing area.

[0021] Optionally, the first mask layer is at least one of silicon nitride, silicon oxide or silicon oxynitride.

[0022] Optionally, the insulating ink layer is formed by printing or spraying.

[0023] In a second aspect, an embodiment of the present invention further provides a back-contact solar cell with laser splicing opening processing, which is prepared using the preparation method of the back-contact solar cell with laser splicing opening processing as described in the first aspect.

[0024] Optionally, a first semiconductor layer is arranged on the back side of the silicon wafer, the first semiconductor layer comprises a tunneling silicon oxide layer and an N-type doped polycrystalline silicon layer sequentially formed on the silicon wafer; the first semiconductor layer is separated by a plurality of second semiconductor opening regions, the second semiconductor opening regions and the surface of the first semiconductor layer around the second semiconductor opening regions are covered with a second semiconductor layer, the second semiconductor layer is composed of an intrinsic amorphous silicon layer and a P-type doped amorphous or P-type microcrystalline silicon layer; a first semiconductor opening region formed by laser etching in a double-line splicing manner is provided between adjacent second semiconductor opening regions, the first semiconductor opening region separates the second semiconductor layer; the width of the first semiconductor opening region is W2, W2 is 150-350um, the width of the double-line splicing is W3, W3 is 50-200um;

[0025] The isolation groove is located between the adjacent first semiconductor opening region and the second semiconductor opening region; the first semiconductor opening region and the second semiconductor layer are both covered with a transparent conductive film layer, and the isolation groove separates the transparent conductive film layer located in the first semiconductor opening region from the transparent conductive film layer located on the second semiconductor layer;

[0026] The insulating ink layer covers the side of the transparent conductive film layer away from the silicon wafer, and the silver paste fine grid lines and the silver paste main grid lines are respectively located at the openings of the transparent conductive film layer reserved by the insulating ink layer on the first semiconductor layer and the second semiconductor layer. The printing width of the silver paste fine grid lines is Wxs, Wxs is 40-100um, and Wxs <W3。

[0027] A third aspect is a battery module, comprising the back-contact solar cell as described in the second aspect.

[0028] The embodiments of the present invention have at least the following beneficial effects:

[0029] The present invention adopts the above technical solution, and by opening the first semiconductor region by laser double-line splicing, the effective area of ​​the first semiconductor region can be increased. At the same time, since the splicing intersection position is laser processed twice, the thickness of the N-type doped polysilicon layer in the splicing area is thinned relative to other positions in the opening area, thereby enhancing the collection of photogenerated carriers in the PN junction battery, thereby effectively improving the conversion efficiency of the battery. In addition, since the minimum splicing width is greater than the width of the silver paste electrode fine grid line, the battery current collection is maximized, which is conducive to increasing the battery short-circuit current Isc and further improving the photoelectric conversion efficiency of the battery. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0031] Figure 1 A schematic diagram of the internal structure of a back-contact solar cell with laser splicing openings provided in an embodiment of the present invention;

[0032] Figure 2 A schematic flow chart of a method for preparing a back-contact solar cell with laser splicing openings provided in an embodiment of the present invention;

[0033] Figure 3 A process structure diagram of step S01 in a method for preparing a back-contact solar cell with laser splicing opening processing provided by an embodiment of the present invention;

[0034] Figure 4 A process structure diagram of step S02 in a method for preparing a back-contact solar cell with laser splicing opening processing provided in an embodiment of the present invention;

[0035] Figure 5 A process structure diagram of step S03 in a method for preparing a back-contact solar cell with laser splicing opening processing provided by an embodiment of the present invention;

[0036] Figure 6 A process structure diagram of step S04 in a method for preparing a back-contact solar cell with laser splicing opening processing provided by an embodiment of the present invention;

[0037] Figure 7 A process structure diagram of step S05 in a method for preparing a back-contact solar cell with laser splicing opening processing provided by an embodiment of the present invention;

[0038] Figure 8 A process structure diagram of step S06 in a method for preparing a back-contact solar cell with laser splicing opening processing provided by an embodiment of the present invention;

[0039] Fig. 9 A process structure diagram of step S07 in a method for preparing a back-contact solar cell with laser splicing opening processing provided by an embodiment of the present invention;

[0040] Fig.10 A process structure diagram of step S08 in a method for preparing a back-contact solar cell with laser splicing opening processing provided by an embodiment of the present invention;

[0041] Fig.11A process structure diagram of step S09 in a method for preparing a back-contact solar cell with laser splicing opening processing provided in an embodiment of the present invention.

[0042] Description of Figure Numbers.

[0043] 1-silicon wafer; 2-tunneling silicon oxide layer; 3-N-type doped polysilicon layer; 4-passivation layer; 5-anti-reflection layer; 6-intrinsic amorphous silicon layer; 7-P-type doped amorphous silicon layer or P-type microcrystalline silicon layer; 8-transparent conductive film layer; 9-silver paste fine grid line; 10-first mask layer. DETAILED DESCRIPTION

[0044] In the present invention, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0045] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0046] The endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of each range, the endpoint values ​​of each range and the individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed in this article. Among them, the terms "optional" and "optional" all mean that they may be included or not included (or may be present or not).

[0047] The first aspect, such as Figure 1 As shown, an embodiment of the present invention provides a back-contact solar cell with laser splicing opening processing, comprising: a silicon wafer 1, a first semiconductor layer, a second semiconductor layer, a transparent conductive film layer 8 and;

[0048] The silicon wafer 1 has a front side and a back side, wherein the front side refers to the light-receiving side of the silicon wafer 1, and the back side is the opposite back side of the light-receiving side. In the embodiment of the present invention, the side close to the silicon wafer 1 is usually considered as the inside, and the side far from the silicon wafer 1 is considered as the outside.

[0049] The first semiconductor layer is arranged on the back side of the silicon wafer 1 , and the first semiconductor layer includes a tunneling silicon oxide layer 2 and an N-type doped polysilicon layer 3 which are sequentially formed on the silicon wafer 1 .

[0050] In the embodiment of the present invention, a plurality of openings are formed on the first semiconductor layer by an etching process, thereby obtaining a second semiconductor opening region W1, that is, the first semiconductor layer is separated by a plurality of second semiconductor opening regions W1. The second semiconductor layer (including an intrinsic amorphous silicon layer 6 and a P-type doped amorphous silicon layer or a P-type microcrystalline silicon layer 7) covers the second semiconductor opening region W1 (including the sidewalls of the second semiconductor opening region W1) and the surface of the first semiconductor layer around the second semiconductor opening region W1. A first semiconductor opening region W2 is provided between adjacent second semiconductor opening regions W1, and the first semiconductor opening region W2 separates the second semiconductor layer. Optionally, the second semiconductor layer is composed of an intrinsic amorphous silicon layer 6 and a P-type doped amorphous or P-type microcrystalline silicon layer 7.

[0051] A first semiconductor opening region formed by laser etching in a double-line splicing manner is provided between adjacent second semiconductor opening regions, and the first semiconductor opening region separates the second semiconductor layer; the width of the first semiconductor opening region W2 is 150-350um, and the width of the double-line splicing region W3 is 50-200um. The ratio of the thickness of the N-type doped polysilicon layer 3 in the splicing overlap region (i.e., W3) in the first semiconductor opening region to the thickness of the N-type doped polysilicon layer 3 in the non-overlapping region (i.e., the region of the first semiconductor opening region except W3) is 1:1.1-1.5, so that the thickness of the N-type doped polysilicon layer 3 outside the double-splicing region and W2 can be compared, which is equivalent to thinning the thickness of the N-type doped polysilicon layer 3 in the splicing region, thereby enhancing the technical effect of collecting photogenerated carriers in the PN junction battery.

[0052] The isolation groove is located between the adjacent first semiconductor opening area and the second semiconductor opening area; the first semiconductor opening area and the second semiconductor layer are both covered with a transparent conductive film layer 8, and the isolation groove separates the transparent conductive film layer 8 located in the first semiconductor opening area from the transparent conductive film layer 8 located on the second semiconductor layer.

[0053] Insulation ink layer ( Figure 1The silver paste fine grid line 9 and the silver paste main grid line are respectively located at the openings reserved in the insulating ink layer on the first semiconductor layer and the second semiconductor layer. The printing width of the silver paste fine grid line 9 is Wxs, Wxs is 40-100um, and Wxs is <W3。

[0054] A passivation layer 4 and an anti-reflection layer 5 are sequentially stacked on the front side of the silicon wafer 1 to reduce the loss of incident light.

[0055] The second aspect, such as Figure 2 As shown, an embodiment of the present invention provides a method for preparing a back-contact solar cell with laser splicing opening processing, comprising the following steps:

[0056] S01, providing a silicon wafer 1, and polishing the silicon wafer 1 on both sides, referring to Figure 3 .

[0057] S02, sequentially preparing a tunneling silicon oxide layer 2 and an N-type doped polysilicon layer 3 on the back side of the silicon wafer 1, thereby obtaining a first semiconductor layer, see Figure 4 .

[0058] Optionally, the thickness of the N-type doped polysilicon layer 3 is 80-200 nm.

[0059] S03, preparing a first mask layer 10 on the surface of the first semiconductor layer, referring to Figure 5 .

[0060] Optionally, the first mask layer 10 is at least one of silicon nitride, silicon oxide or silicon oxynitride.

[0061] S04, etching an opening on the back side of the silicon wafer 1 for the first time, removing part of the mask layer and the corresponding part of the first semiconductor layer, and forming a second semiconductor opening area arranged alternately, referring to Figure 6 .

[0062] Optionally, a width of the second semiconductor opening region W1 is 300um-700um.

[0063] S05, forming a pyramid velvet surface on the front side of the silicon wafer 1 by texturing and cleaning, and removing the first semiconductor layer in the second semiconductor region on the back side of the silicon wafer 1 and then removing the first mask layer 10, so as to form a silicon wafer 1 with a single-side texturing and single-side polishing structure, see Figure 7 .

[0064] S06, sequentially preparing a passivation layer 4 and an anti-reflection layer 5 on the front side of the silicon wafer 1, and preparing a second semiconductor layer on the back side of the silicon wafer 1, wherein the second semiconductor layer is an intrinsic amorphous silicon layer 6 and a P-type doped amorphous silicon layer or a P-type microcrystalline silicon layer 7, see Figure 8 .

[0065] Specifically, the passivation layer 4 and the anti-reflection layer 5 formed on the front side of the silicon wafer 1 are mainly used to reduce the loss of light.

[0066] S07, a second opening is etched on the back of the silicon wafer 1 to form a first semiconductor opening region alternately arranged with the second semiconductor region, the width of the first semiconductor opening region is 150-350um; the first semiconductor opening region is laser etched by double-line splicing, the width of the double-line splicing is W3, W3 is 50-200um, see Fig. 9 .

[0067] Optionally, the laser used in the first semiconductor opening region is a flat-top picosecond green laser (wavelength 532nm) or a flat-top picosecond ultraviolet laser (355nm), the power of the laser is 20KW-100KW, and the frequency is 200KHZ-1000KHZ.

[0068] Preferably, the laser is a flat-top picosecond green laser with an operating frequency of 400KHZ and an actual output power of 40KW.

[0069] S08, cleaning the silicon wafer 1, removing the passivation layer 4 in the first semiconductor opening region, and depositing a transparent conductive film layer 8 on the back of the silicon wafer 1, see Fig.10 .

[0070] S09, opening the transparent conductive film layer 8 between the first semiconductor opening region and the second semiconductor opening region to form an isolation groove, see Fig.11 .

[0071] Optionally, the width WgL of the isolation groove is 30um-200um, and the isolation groove is formed at the junction of the texturing area and the polishing area.

[0072] S10, forming insulating ink layers arranged at intervals on the transparent conductive layer on the back side of the silicon wafer 1.

[0073] Optionally, the insulating ink layer is formed by printing or spraying, and the material of the insulating ink layer is insulating glue.

[0074] S11, printing silver paste fine grid lines 9 and silver paste main grid lines on the back of the silicon wafer 1 to form silver paste grid line electrodes, wherein the printing width of the silver paste fine grid lines 9 is Wxs, Wxs is 40-100um, and Wxs <W3。

[0075] It should be noted that the silver paste main grid line and the silver paste fine grid line are in a vertical relationship. Because it is consistent with the setting of conventional back contact batteries, it is not reflected in the schematic diagram.

[0076] The embodiment of the present invention uses a laser double-line splicing method to open the first semiconductor region, which not only increases the effective area of ​​the first semiconductor region, but also undergoes two laser etchings at the splicing intersection position, thereby thinning the thickness of the N-type doped polysilicon layer 3 in the splicing area relative to other positions in the first opening area, thereby enhancing the collection of photogenerated carriers in the PN junction battery, thereby effectively improving the conversion efficiency of the battery; at the same time, in terms of the double-line splicing design, the minimum splicing width is greater than the width of the silver paste electrode fine grid line, ensuring the maximization of the battery current collection, thereby increasing the battery short-circuit current Isc, and further improving the battery's photoelectric conversion efficiency.

[0077] An embodiment of the present invention also provides a battery assembly, which includes the back-contact solar cell described in the aforementioned embodiment. The back-contact solar cell included in the battery assembly can achieve the opening of the first semiconductor region by adopting laser double splicing wires, thereby maximizing the effective area of ​​the first semiconductor region and utilizing the splicing overlap area to thin the polycrystalline layer, thereby enhancing carrier collection and improving battery efficiency.

[0078] The embodiments of the present invention are described in detail below, which are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0079] Example 1

[0080] like Figure 2 As shown, the method for preparing a back contact solar cell comprises:

[0081] S01. Provide a silicon wafer 1 and polish both sides of the silicon wafer 1.

[0082] S02. A tunneling silicon oxide layer 2 and an N-type doped polysilicon layer 3 are sequentially prepared on the back side of the silicon wafer 1 to obtain a first semiconductor layer.

[0083] S03, preparing a first mask layer 10 on the surface of the first semiconductor layer.

[0084] S04, etching an opening on the back side of the silicon wafer 1 for the first time, removing part of the mask layer and a corresponding part of the first semiconductor layer, and forming a second semiconductor opening region arranged alternately.

[0085] S05. Form a pyramid texture surface on the front side of the silicon wafer 1 through texturing and cleaning, and at the same time remove the first semiconductor layer in the second semiconductor region on the back side of the silicon wafer 1 and then remove the first mask layer 10 to form a silicon wafer 1 with a single-side texture and single-side polishing structure.

[0086] S06. A passivation layer 4 and an anti-reflection layer 5 are sequentially prepared on the front side of the silicon wafer 1, and a second semiconductor layer is prepared on the back side of the silicon wafer 1. The second semiconductor layer is an intrinsic amorphous silicon layer 6 and a P-type doped amorphous silicon layer or a P-type microcrystalline silicon layer 7.

[0087] S07. A second opening is etched on the back side of the silicon wafer 1 to form a first semiconductor opening region alternately arranged with the second semiconductor region, wherein the width W2 of the first semiconductor opening region is 300um; the first semiconductor opening region is laser etched by double-line splicing, wherein the width W3 of the double-line splicing is 100um, and the ratio of W3 to W2 is 1:3.

[0088] S08 , the silicon wafer 1 is cleaned, the second semiconductor layer in the first semiconductor opening region is removed, and then a transparent conductive film layer 8 is deposited on the back side of the silicon wafer 1 .

[0089] S09, making an opening on the transparent conductive film layer 8 between the first semiconductor opening region and the second semiconductor opening region to form an isolation groove.

[0090] S10, forming insulating ink layers arranged at intervals on the transparent conductive layer on the back side of the silicon wafer 1.

[0091] S11, printing silver paste fine grid lines 9 and silver paste main grid lines on the back of the silicon wafer 1 to form silver paste grid line electrodes, wherein the printing width Wxs of the silver paste fine grid lines 9 is 60 um, and Wxs <W3。

[0092] Example 2

[0093] Referring to the back contact solar cell structure of Example 1, the difference is that the width W2 of the first semiconductor opening region is 250um; the first semiconductor opening region is laser etched by double-line splicing, and the width W3 of the double-line splicing is 150um.

[0094] Example 3

[0095] Refer to the back contact solar cell structure of Example 1, except that the ratio of W3 to W2 is 1:5.

[0096] Example 4

[0097] Referring to the back contact solar cell structure of Example 1, the difference is that the printing width Wxs of the silver paste fine grid line 9 is 60um, and the width W3 of the double line splicing is 50um.

[0098] Example 5

[0099] Referring to the back contact solar cell structure of Example 1, the difference is that the difference between the thinnest thickness of the N-type doped polysilicon layer 3 of the first semiconductor layer located in the first semiconductor opening region and the normal thickness is 50 nm.

[0100] Comparative Example 1

[0101] Referring to the back contact solar cell structure of Example 1, the difference is that ordinary single-row laser opening is used to form the first semiconductor opening region, that is, laser double-line splicing etching is not used to form the first semiconductor opening region.

[0102] Comparative Example 2

[0103] Referring to the back contact solar cell structure of Example 1, the difference is that the first semiconductor opening region is formed by laser double-line splicing etching, but the width W3 of the double-line splicing is 30 um.

[0104] Comparative Example 3

[0105] Referring to the back contact solar cell structure of Example 1, the difference is that the first semiconductor opening region is formed by laser double-line splicing etching, but the width W3 of the double-line splicing is 200um, and the width W2 of the first semiconductor opening region is 200um.

[0106] Comparative Example 4

[0107] Refer to the back contact solar cell structure of Example 1, except that the ratio of W3 to W2 is 1:6.

[0108] Test Case

[0109] The performance of the back-contact solar cells obtained in the above-mentioned embodiments and comparative examples was tested.

[0110] Table 1 Comparison of performance parameters of various embodiments and comparative examples

[0111]

[0112] It can be seen from the above results that, compared with the comparative example, the embodiment scheme of the present invention can maximize the effective area of ​​the first semiconductor region, which is beneficial to improving the battery efficiency. Furthermore, according to Example 1 and Examples 2-5, it can be seen that the preferred double-line setting scheme of the present invention can enhance the collection of photogenerated carriers, which is more conducive to improving the short-circuit current Isc, and further improving the battery conversion efficiency.

[0113] The preferred embodiments of the present invention are described in detail above, but the present invention is not limited thereto. Within the technical concept of the present invention, the technical solution of the present invention can be subjected to a variety of simple modifications, including the combination of various technical features in any other suitable manner, and these simple modifications and combinations should also be regarded as the contents disclosed by the present invention and belong to the protection scope of the present invention.

Claims

1. A method for preparing a back-contact solar cell with laser splicing opening treatment, characterized in that: include: S01, providing a silicon wafer, and polishing both sides of the silicon wafer; S02, sequentially preparing a tunneling silicon oxide layer and an N-type doped polysilicon layer on the back side of the silicon wafer, thereby obtaining a first semiconductor layer; S03, preparing a first mask layer on the surface of the first semiconductor layer; S04, etching an opening on the back side of the silicon wafer for the first time, removing a portion of the mask layer and a corresponding portion of the first semiconductor layer, and forming a second semiconductor opening region arranged alternately; S05, forming a pyramid velvet surface on the front side of the silicon wafer by texturing and cleaning, and removing the first semiconductor layer in the second semiconductor region on the back side of the silicon wafer and then removing the first mask layer, so as to form a silicon wafer with a single-side texturing and single-side polishing structure; S06, sequentially preparing a passivation layer and an anti-reflection layer on the front side of the silicon wafer, and preparing a second semiconductor layer on the back side of the silicon wafer, wherein the second semiconductor layer is an intrinsic amorphous silicon layer and a P-type doped amorphous silicon layer or a P-type microcrystalline silicon layer; S07, etching an opening on the back side of the silicon wafer for the second time to form a first semiconductor opening region alternately arranged with the second semiconductor region, wherein the width of the first semiconductor opening region is 150-350 um; the first semiconductor opening region is laser etched by double-line splicing, wherein the width of the double-line splicing is W3, and W3 is 50-200 um; S08, after cleaning the silicon wafer to remove the passivation layer in the first semiconductor opening region, a transparent conductive film layer is deposited on the back side of the silicon wafer; S09, opening the transparent conductive film layer between the first semiconductor opening region and the second semiconductor opening region to form an isolation groove; S10, forming an insulating ink layer arranged at intervals on the transparent conductive layer on the back of the silicon wafer; S11, printing silver paste fine grid lines and silver paste main grid lines on the back of the silicon wafer to form silver paste grid line electrodes, wherein the printing width of the silver paste fine grid lines is Wxs, Wxs is 40-100um, and Wxs <W3。 2. The method for preparing a back-contact solar cell with laser splicing opening treatment according to claim 1, characterized in that: The thickness of the N-type doped polysilicon layer is 80-200 nm.

3. The method for preparing a back-contact solar cell with laser splicing opening treatment according to claim 1, characterized in that: The laser used to form the first semiconductor opening region is a flat-top picosecond green laser or a flat-top picosecond ultraviolet laser, and the power of the laser is 20KW-100KW and the frequency is 200KHZ-1000KHZ.

4. The method for preparing a back-contact solar cell with laser splicing opening processing according to claim 1, characterized in that: The width of the second semiconductor opening region is 300um-700um.

5. The method for preparing a back-contact solar cell with laser splicing opening processing according to claim 1, characterized in that: The width of the isolation groove is 30um-200um, and the isolation groove is formed at the junction of the texturing area and the polishing area.

6. The method for preparing a back-contact solar cell with laser splicing opening treatment according to claim 1, characterized in that: The first mask layer is at least one of silicon nitride, silicon oxide or silicon oxynitride.

7. The method for preparing a back-contact solar cell with laser splicing opening treatment according to claim 1, characterized in that: The insulating ink layer is formed by printing or spraying.

8. A back contact solar cell with laser splicing opening treatment, characterized in that: The solar cell is prepared by the method for preparing a back-contact solar cell with laser splicing and opening processing as described in any one of claims 1 to 7.

9. The back-contact solar cell processed by laser splicing opening according to claim 8, characterized in that: A first semiconductor layer is arranged on the back side of the silicon wafer, wherein the first semiconductor layer comprises a tunneling silicon oxide layer and an N-type doped polysilicon layer sequentially formed on the silicon wafer; The first semiconductor layer is separated by a plurality of second semiconductor opening regions, the second semiconductor opening regions and the surface of the first semiconductor layer around the second semiconductor opening regions are covered with a second semiconductor layer, the second semiconductor layer is composed of an intrinsic amorphous silicon layer and a P-type doped amorphous or P-type microcrystalline silicon layer; a first semiconductor opening region formed by laser etching in a double-line splicing manner is provided between adjacent second semiconductor opening regions, the first semiconductor opening region separates the second semiconductor layer; the width of the first semiconductor opening region is W2, W2 is 150-350um, the width of the double-line splicing is W3, W3 is 50-200um; The isolation groove is located between the adjacent first semiconductor opening region and the second semiconductor opening region; the first semiconductor opening region and the second semiconductor layer are both covered with a transparent conductive film layer, and the isolation groove separates the transparent conductive film layer located in the first semiconductor opening region from the transparent conductive film layer located on the second semiconductor layer; The insulating ink layer covers the side of the transparent conductive film layer away from the silicon wafer, and the silver paste fine grid lines and the silver paste main grid lines are respectively located at the openings of the transparent conductive film layer reserved by the insulating ink layer on the first semiconductor layer and the second semiconductor layer. The printing width of the silver paste fine grid lines is Wxs, Wxs is 40-100um, and Wxs <W3。 10. A battery assembly, characterized in that: It comprises the back-contact solar cell as claimed in claim 8 or 9.

Images