Pixel signal output circuit and image sensor

Abstract

The invention provides a pixel signal output circuit and an image sensor, and the circuit comprises a pixel module which is used for generating a pixel signal; and the feedback capacitance module is connected with the output end of the pixel module and is used for equivalently reducing the total load capacitance of the pixel module so as to accelerate the establishment of a pixel signal. The feedback capacitor module is additionally arranged at the output end of the pixel module, and the total load capacitance of the pixel module is equivalently reduced by utilizing the capacitance of the feedback capacitor module, so that the time constant of the pixel signal output circuit can be effectively reduced, the slew rate is increased, the establishment speed of the pixel signal is accelerated, and the pixel signal output efficiency is improved. The problem of how to improve the establishment speed of the pixel signal is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit design, and in particular to a pixel signal output circuit and an image sensor. Background Art

[0002] Image sensors use the photoelectric conversion function of photoelectric devices to convert the light image on the photosensitive surface into an electrical signal that is proportional to the light image. They are divided into two categories: CCD structure and CMOS structure. With the continuous improvement of various application requirements, image sensors not only need to have multiple pixels and low noise, but also high dynamic range and high image frame rate, which puts higher requirements on the output of pixel signals of image sensors.

[0003] The pixel signal settling speed is an important indicator that affects the image frame rate. In high image frame rate scenarios, the pixel signal needs to complete the settling and data conversion in a relatively short time. However, with the popularity of high-pixel-count and large-size image sensors, the capacitive load and resistive load of the pixel signal output circuit have increased, resulting in an increase in the pixel signal settling time, which limits the application of image sensors in high image frame rate scenarios. Summary of the invention

[0004] The object of the present invention is to provide a pixel signal output circuit and an image sensor to solve the problem of how to improve the speed of establishing a pixel signal.

[0005] In order to solve the above technical problems, the present invention provides a pixel signal output circuit, comprising: A pixel module, used for generating a pixel signal; The feedback capacitor module is connected to the output end of the pixel module and is used to equivalently reduce the total load capacitance of the pixel module to accelerate the establishment of the pixel signal.

[0006] Optionally, in the pixel signal output circuit, the feedback capacitor module includes a feedback unit, a switch unit and a capacitor unit; the feedback unit is connected to the pixel module to obtain the voltage change of the pixel signal output by the pixel module; the switch unit is used to decide whether to use the capacitor unit to equivalently reduce the total load capacitance of the pixel module under the control of a load selection signal to accelerate the establishment of the pixel signal.

[0007] Optionally, in the pixel signal output circuit, the pixel module includes a pixel signal generating unit and a tail current unit; the pixel signal generating unit is used to generate a pixel signal; the tail current unit is used to generate a bias current; the output end of the pixel signal generating unit is connected to the feedback unit; the output end of the tail current unit is connected to the capacitor unit.

[0008] Optionally, in the pixel signal output circuit, the feedback unit includes a feedback source follower tube; the gate of the feedback source follower tube is connected to the output end of the pixel module to receive the pixel signal; the drain of the feedback source follower tube is connected to the power supply; and the source of the feedback source follower tube is connected to the switch unit.

[0009] Optionally, in the pixel signal output circuit, the feedback unit includes a first transistor, a second transistor, a third transistor and a fourth transistor; the source of the first transistor and the source of the second transistor are connected to a power supply; the gate of the first transistor is connected to the gate of the second transistor; the drain of the first transistor is short-circuited with the gate and connected to the drain of the third transistor; the drain of the second transistor is connected to the drain of the fourth transistor; the gate of the third transistor is connected to the output end of the pixel module to receive the pixel signal; the gate and the drain of the fourth transistor are short-circuited and connected to the output end of the capacitor unit; the source of the third transistor and the source of the fourth transistor are connected to the switch unit.

[0010] Optionally, in the pixel signal output circuit, the switching unit includes a switching control circuit and a tail current source tube; one end of the switching control circuit is connected to the output end of the feedback unit, and the other end is connected to the drain of the tail current source tube, for determining whether to turn on under the control of a load selection signal; the gate of the tail current source tube is connected to a bias signal; and the source of the tail current source tube is connected to a power supply.

[0011] Optionally, in the pixel signal output circuit, the switch control circuit includes a first load enable switch tube and a second load enable switch tube; the drain of the first load enable switch tube and the drain of the second load enable switch tube are connected to the output end of the feedback unit; the gate of the first load enable switch tube is connected to the first load enable signal, and the gate of the second load enable switch tube is connected to the second load enable signal; the source of the first load enable switch tube and the source of the second load enable switch tube are connected to the drain of the tail current source tube and the output end of the capacitor unit.

[0012] Optionally, in the pixel signal output circuit, the switch control circuit includes a third load-enabling switch tube; the drain of the third load-enabling switch tube is connected to the output end of the feedback unit; the gate of the third load-enabling switch tube is connected to the load-enabling signal; the source of the third load-enabling switch tube is connected to the drain of the tail current source tube.

[0013] Optionally, in the pixel signal output circuit, the capacitor unit includes a capacitor gating switch tube and an adjustable capacitor; the source of the capacitor gating switch tube is connected to the output end of the tail current unit; the gate of the capacitor gating switch tube is connected to the load gating signal; the drain of the capacitor gating switch tube is connected to one end of the adjustable capacitor; and the other end of the adjustable capacitor is the output end.

[0014] Optionally, in the pixel signal output circuit, the pixel signal generating unit includes a photosensitive diode, a charge transfer tube, a reset tube, a pixel source follower tube and a pixel selection switch tube; the positive electrode of the photosensitive diode is connected to a power supply, and the negative electrode is connected to the source of the charge transfer tube; the gate of the charge transfer tube is connected to a transfer tube control signal, and the drain is connected to the source of the reset tube and the gate of the pixel source follower tube to form a floating node; the gate of the reset tube is connected to a reset signal, and the drain is connected to a power supply; the drain of the pixel source follower tube is connected to a power supply, and the source is connected to the drain of the pixel selection switch tube; the gate of the pixel selection switch tube is connected to a pixel selection signal, and the source is the output end to output the pixel signal.

[0015] Optionally, in the pixel signal output circuit, the tail current unit includes a common source and common gate tube and a bias current mirror tube; the drain of the common source and common gate tube is connected to the output end of the pixel signal generating unit, the gate is connected to the bias signal, and the source is connected to the drain of the bias current mirror tube; the gate of the bias current mirror tube is connected to the bias signal, the source is connected to the power supply, and the drain is connected to the capacitor unit as the output end.

[0016] In order to solve the above technical problem, the present invention further provides an image sensor, comprising the pixel signal output circuit as described in any one of the above items.

[0017] The pixel signal output circuit and image sensor provided by the present invention include: a pixel module for generating a pixel signal; a feedback capacitor module connected to the output end of the pixel module and used to equivalently reduce the total load capacitance of the pixel module to accelerate the establishment of the pixel signal. By adding the feedback capacitor module to the output end of the pixel module, the total load capacitance of the pixel module is equivalently reduced by using the capacitance of the feedback capacitor module, thereby effectively reducing the time constant of the pixel signal output circuit, increasing the slew rate, and accelerating the establishment speed of the pixel signal, solving the problem of how to improve the establishment speed of the pixel signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A structural block diagram of a pixel signal output circuit provided in this embodiment; Figure 2 A circuit schematic diagram of a pixel module provided in this embodiment; Figure 3A circuit schematic diagram of a pixel signal output circuit provided in this embodiment; Figure 4 A circuit schematic diagram of another pixel signal output circuit provided in this embodiment; Figure 5 The working timing diagram used when both the RX signal and the TX signal provided in this embodiment are not fully established; Figure 6 This is a working timing diagram used when the RX signal provided in this embodiment is not fully established and the TX signal is fully established; Figure 7 This is a working timing diagram used when the RX signal provided in this embodiment is fully established and the TX signal is not fully established. DETAILED DESCRIPTION

[0019] The pixel signal output circuit and image sensor proposed in the present invention are further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the accompanying drawings are in a very simplified form and use non-precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the accompanying drawings is often a part of the actual structure. In particular, the emphasis of each accompanying drawing is different, and sometimes different proportions are used.

[0020] It should be noted that the terms "first", "second", etc. in the specification, claims and drawings of the present invention are used to distinguish similar objects in order to describe the embodiments of the present invention, rather than to describe a specific order or sequence. It should be understood that the structures used in this way can be interchanged under appropriate circumstances. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0021] The pixel signal settling speed is mainly determined by the time constant and slew rate of the pixel signal output circuit.

[0022] The time constant can be expressed as:

[0023] For the pixel signal output circuit, R (resistance) mainly includes the wiring resistance , the on-resistance of the gate switch SEL and the output resistance of the source follower tube SF ; C (capacitance) mainly includes trace capacitance and the input capacitance of the comparator CM The sum of the two is taken as the total load capacitance .

[0024] From this, the time constant of the pixel signal output circuit (excluding the body effect) can be obtained, which is expressed as:

[0025] The slew rate can be expressed as:

[0026] For the pixel signal output circuit, I (current) is the leakage current of the tail current source ; C (capacitance) mainly includes trace capacitance and the input capacitance of the comparator CM The sum of the two is taken as the total load capacitance .

[0027] From this, the slew rate of the pixel signal output circuit can be obtained, which is expressed as:

[0028] The pixel signal build-up time, i.e., the voltage Settling to voltage There are usually two ways to determine whether the pixel signal has been established: one is to judge by the establishment rate, that is, the voltage is established to , where k is the establishment rate, usually 90%, 95% or 99% is used as the standard for the establishment completion; the other is to judge by the establishment error, that is, the voltage is established to ,in To establish the error.

[0029] When the floating node (FD) voltage of the pixel circuit changes When the pixel signal output voltage From the initial voltage follow Change to (without considering the body effect), during the pixel signal establishment process, the voltage that changes with time is , the error voltage established is determined to be .

[0030] The establishment of pixel signals can be divided into two cases: ① When the change of floating point voltage is much smaller than the saturation voltage of source follower tube SF, that is, when When the settling is not limited by the slew rate, the output voltage of the pixel signal during the settling process can be expressed as:

[0031] The error voltage can be obtained and is expressed as:

[0032] Then, the settling time to reach the error voltage can be expressed as:

[0033] It follows that when settling is not slew rate limited, settling can be accelerated by reducing the time constant.

[0034] ②When the change of floating voltage is greater than the saturation voltage of source follower tube SF, that is, when When the voltage is set, the settling is limited by the slew rate and the settling is divided into two steps: This part of the voltage is established at the slew rate SR; the rest Part of it is determined by the time constant.

[0035] Then, the settling time to reach the error voltage can be expressed as:

[0036] It can be concluded that when settling is slew rate limited, settling can be accelerated by reducing the time constant and increasing the slew rate.

[0037] Through the above analysis, it can be known that reducing the R and C of the pixel signal output circuit can reduce the time constant, and increasing the current I and reducing C can increase the slew rate, that is, by reducing the wiring resistance , the on-resistance of the gate switch SEL and the output resistance of the source follower tube SF , reduce trace capacitance and the input capacitance of the comparator CM , and increase the leakage current of the tail current source , to accelerate the establishment of pixel signals.

[0038] Based on this, this embodiment provides a pixel signal output circuit, such as Figure 1 As shown, including: A pixel module, used for generating a pixel signal; The feedback capacitor module is connected to the output end of the pixel module and is used to equivalently reduce the total load capacitance of the pixel module to accelerate the establishment of the pixel signal.

[0039] The pixel signal output circuit provided in this embodiment adds a feedback capacitor module at the output end of the pixel module and uses the capacitance of the feedback capacitor module to equivalently reduce the total load capacitance of the pixel module, thereby effectively reducing the time constant of the pixel signal output circuit and increasing the slew rate, thereby accelerating the establishment speed of the pixel signal and solving the problem of how to improve the establishment speed of the pixel signal.

[0040] Specifically, in this embodiment, the feedback capacitor module includes a feedback unit, a switch unit and a capacitor unit; the feedback unit is connected to the pixel module to obtain the voltage change of the pixel signal output by the pixel module; the switch unit is used to decide whether to use the capacitor unit to equivalently reduce the total load capacitance of the pixel module under the control of the load selection signal to accelerate the establishment of the pixel signal.

[0041] Furthermore, in this embodiment, the pixel module includes a pixel signal generating unit and a tail current unit; the pixel signal generating unit is used to generate a pixel signal; the tail current unit is used to generate a bias current; the output end of the pixel signal generating unit is connected to the feedback unit; the output end of the tail current unit is connected to the capacitor unit.

[0042] The following describes in detail the circuit structure and working principle of the pixel signal output circuit provided by the present application through specific embodiments. The power supply selected in this embodiment includes VSS, PVDD and VDD, where VSS represents the common ground terminal voltage; PVDD represents the power supply, which is used to provide power for the circuit with high current; and VDD represents the internal working voltage of the circuit.

[0043] like Figure 2 As shown, the pixel signal generating unit includes a photosensitive diode PD, a charge transfer tube Mtg, a reset tube Mrst, a pixel source follower tube Msf and a pixel gate switch tube Msel. The positive electrode of the photosensitive diode PD is connected to the power supply VSS, and the negative electrode is connected to the source of the charge transfer tube Mtg; the gate of the charge transfer tube Mtg is connected to the transfer tube control signal TX, and the drain is connected to the source of the reset tube Mrst and the gate of the pixel source follower tube Msf to form a floating node FD; the gate of the reset tube Mrst is connected to the reset signal RX, and the drain is connected to the power supply PVDD; the drain of the pixel source follower tube Msf is connected to the power supply PVDD, and the source is connected to the drain of the pixel gate switch tube Msel; the gate of the pixel gate switch tube Msel is connected to the pixel gate signal SEL, and the source is the output terminal to output the pixel signal PIX_OUT.

[0044] The working principle of the pixel signal generating unit provided in this embodiment is roughly as follows: the photosensitive diode PD is sensitive to light and generates photoelectrons proportional to the light intensity; the function of the charge transfer tube Mtg is to transfer the photoelectrons in the photosensitive diode PD. When the transfer tube control signal TX is a high voltage, the charge transfer tube Mtg is turned on, and the photoelectrons in the photosensitive diode PD are transferred to the floating node FD, and there is a floating voltage Vfd at the floating node FD; the function of the reset tube Mrst is to reset the floating node FD when the reset signal RX is a high potential; Msf is a pixel source follower tube. When the pixel selection signal SEL is a high potential and the pixel selection switch tube Msel is turned on, the pixel source follower tube Msf, the pixel selection switch tube Msel and the current source to the ground form a path. At this time, the pixel source follower tube Msf follows the change of the potential of the floating node FD and finally outputs the pixel signal PIX_OUT.

[0045] And, if Figure 2 As shown, the tail current unit includes a cascode tube Ncas and a bias current mirror tube Nbias; the drain of the cascode tube Ncas is connected to the output end of the pixel signal generating unit, the gate is connected to the bias signal NBC, and the source is connected to the drain of the bias current mirror tube Nbias; the gate of the bias current mirror tube Nbias is connected to the bias signal NB, the source is connected to the power supply VSS, and the drain is connected to the capacitor unit as the output end. Among them, the bias signal NBC is used to control the working state of the cascode tube Ncas and ensure the enhanced amplification effect of the cascode tube Ncas on the signal, so that the source of the cascode tube Ncas has a stable voltage output; the bias signal NB is used to control the working state of the bias current mirror tube Nbias and ensure that the bias current mirror tube Nbias can maintain a certain conductive state even when there is no input signal.

[0046] In the pixel module, when the reset signal RX and the transmission tube control signal TX are activated, the charge transfer tube Mtg, the reset tube Mrst and the pixel source follower tube Msf interact with each other, causing the voltage at the floating node FD to change, and then the pixel signal is established with the voltage change.

[0047] Of course, in practical applications, other components may exist in the specific circuit structure of the pixel module. This embodiment only takes the most basic pixel module as an example to illustrate how the feedback capacitor module provided by the present application is connected to the pixel module in practical applications, and plays a role in reducing the total load capacitance of the pixel module to accelerate the establishment of the pixel signal. Under the technical enlightenment of this embodiment, those skilled in the art can obtain a method of using the feedback capacitor module provided by the present application to connect with pixel modules of other structures to achieve accelerated establishment of the pixel signal.

[0048] To illustrate the working principle of the pixel signal output circuit provided in this embodiment, Figure 3 and Figure 4 In the circuit structure shown, the output end of the pixel module reflects its total load resistance R_LOAD and total load capacitance C_LOAD, and the capacitance value of the adjustable capacitor is Ct.

[0049] like Figure 3 and Figure 4 As shown, in the pixel module, since there is a coupling capacitor between the gate of the reset tube Mrst and the charge transfer tube Mtg and the floating node FD, the reset signal RX and the transfer tube control signal TX will cause a voltage change at the FD point when in action, and then the changed voltage is transmitted to the output terminal PIX_OUT through the pixel source follower tube Msf. The voltage change on the pixel signal PIX_OUT requires a settling time, which is determined by the tail current size I, the resistance load R_LOAD and the capacitance load C_LOAD. When the current I is small or the RC load is large, the voltage change cannot be fully established before the subsequent analog-to-digital converter ADC quantization, and its settling error will affect the accuracy of the pixel signal quantization result.

[0050] In order to accelerate the establishment of pixel signals and reduce the establishment error, a feedback capacitor module is added in this embodiment. When the load selection signal C_SEL is turned on during the acceleration period, the feedback capacitor module works to follow the same-phase voltage change in the pixel signal PIX_OUT to the N terminal (C_N) of the adjustable capacitor C, so that the polarity of the adjustable capacitor C is opposite to that of the load capacitor C_LOAD, which is equivalent to reducing the capacitive load of the pixel signal output circuit.

[0051] The following two specific embodiments are used to describe in detail the circuit structure and effect of the feedback capacitor module in the pixel signal output circuit provided by the present application. In the following two specific embodiments, the pixel module uses the above circuit structure. Of course, in practical applications, the pixel module can also be implemented using other circuit structures, and the present application does not limit this.

[0052] [Example 1] like Figure 3 As shown, in the feedback capacitor module provided in this embodiment, the feedback unit includes a feedback source follower tube Msf1; the gate of the feedback source follower tube Msf1 is connected to the output end of the pixel module to receive the pixel signal PIX_OUT; the drain of the feedback source follower tube Msf1 is connected to the power supply VDD; the source of the feedback source follower tube Msf1 is connected to the switch unit.

[0053] In this embodiment, the source follower function can be realized by using only one transistor. In practical applications, the feedback source follower tube Msf1 can be NMOS. Of course, in other embodiments, the feedback source follower tube Msf1 can also be PMOS. When the feedback source follower tube Msf1 uses PMOS, its specific connection method is well known to those skilled in the art, and this application will not repeat it. In addition, the technical solution of using PMOS as the feedback source follower tube Msf1 should also fall within the scope of protection of this application.

[0054] In this embodiment, the switch unit includes a switch control circuit and a tail current source tube Nbias1; one end of the switch control circuit is connected to the output end of the feedback unit, and the other end is connected to the drain of the tail current source tube Nbias1, which is used to determine whether to turn on under the control of the first load selection signal C_SEL and the second load selection signal C_SELB; the gate of the tail current source tube Nbias1 is connected to the bias signal NB1; the source of the tail current source tube Nbias1 is connected to the power supply VSS.

[0055] Specifically, the switch control circuit includes a first load enable switch tube Ms1 and a second load enable switch tube Ms2; the drain of the first load enable switch tube Ms1 and the drain of the second load enable switch tube Ms2 are connected to the output end of the feedback unit; the gate of the first load enable switch tube Ms1 is connected to the first load enable signal C_SEL, and the gate of the second load enable switch tube Ms2 is connected to the second load enable signal C_SELB; the source of the first load enable switch tube Ms1 and the source of the second load enable switch tube Ms2 are connected to the drain of the tail current source tube Nbias1 and the output end of the capacitor unit.

[0056] In this embodiment, the load selection signals C_SEL and C_SELB connected to the first load selection switch tube Ms1 and the second load selection switch tube Ms2 are usually signals with opposite phases, so that the on-off control of the circuit can be accurately realized by using two transistors, thereby controlling the operation of the capacitor unit. In practical applications, the first load selection switch tube Ms1 is NMOS, and the second load selection switch tube Ms2 is PMOS.

[0057] And, if Figure 3 As shown, in this embodiment, the capacitor unit includes a capacitor gating switch tube Mcsel and an adjustable capacitor C; the source of the capacitor gating switch tube Mcsel is connected to the output end of the tail current unit; the gate of the capacitor gating switch tube Mcsel is connected to the load gating signal C_SEL; the drain of the capacitor gating switch tube Mcsel is connected to one end (C_P) of the adjustable capacitor C; the other end (C_N) of the adjustable capacitor C is the output end.

[0058] In this embodiment, since the source follower is realized by using the first load-selecting switch tube Ms1 and the second load-selecting switch tube Ms2 of the switch control circuit, it is necessary to connect the C_N terminal of the adjustable capacitor C to the switch control circuit, that is, the C_N terminal of the adjustable capacitor C is connected to the source of the first load-selecting switch tube Ms1 and the second load-selecting switch tube Ms2, so as to realize the control of the operation of the capacitor unit by the switch control circuit, so that the C_N terminal of the adjustable capacitor C receives the voltage change of the pixel signal.

[0059] In the feedback capacitor module provided in this embodiment, the input end of the feedback unit (the gate of the feedback source follower tube Msf1) is connected to the output PIX_OUT of the pixel signal generating unit, and the output end of the feedback unit (the source of the feedback source follower tube Msf1) is connected to the N end (C_N) of the adjustable capacitor C through the switch unit. The gain of the feedback unit is recorded as Av, and the output is in phase with the input. When the output of the pixel signal generating unit undergoes a voltage change ΔV, the voltage of the N end (C_N) of the adjustable capacitor C follows the change Av×ΔV, and the P end (C_P) is connected to the output end of the tail current unit (the drain of the bias current mirror tube Nbias). The P end of the adjustable capacitor C is suppressed by the common source and common gate tube Ncas in the tail current unit, and the voltage remains basically unchanged, which is equivalent to the voltage of the N end of the adjustable capacitor C remaining unchanged, and the voltage of the P end changes -Av×ΔV. In this way, for the pixel module, the P-terminal voltage change of the total load capacitance C_LOAD is ΔV, the P-terminal voltage change of the adjustable capacitance C is -Av×ΔV, and the two capacitors are connected in parallel, then the equivalent total capacitance of the pixel signal output circuit is (C_LOAD-Av×Ct), which is equivalent to reducing the total load capacitance.

[0060] [Example 2] like Figure 4 As shown, in the feedback capacitor module provided in this embodiment, the feedback unit includes a first transistor M1, a second transistor M2, a third transistor M3 and a fourth transistor M4; the source of the first transistor M1 and the source of the second transistor M2 are connected to a power supply; the gate of the first transistor M1 and the gate of the second transistor M2 are connected; the drain of the first transistor M1 is short-circuited with the gate and is connected to the drain of the third transistor M3; the drain of the second transistor M2 is connected to the drain of the fourth transistor M4; the gate of the third transistor M3 is connected to the output end of the pixel module to receive the pixel signal PIX_OUT; the gate and the drain of the fourth transistor M4 are short-circuited and are connected to the output end of the capacitor unit; the source of the third transistor M3 and the source of the fourth transistor M4 are connected to the switch unit.

[0061] In this embodiment, the first transistor M1, the second transistor M2, the third transistor M3 and the fourth transistor M4 form a unity gain buffer, wherein the first transistor M1 and the second transistor M2 form a current mirror load, and the third transistor M3 and the fourth transistor M4 form a differential input pair. In this way, a more stable and accurate source follower function can be provided.

[0062] In practical applications, the first transistor M1 and the second transistor M2 are PMOS, and the third transistor M3 and the fourth transistor M4 are NMOS. Of course, in other embodiments, the current mirror load and the differential input pair can also be replaced by current mirror loads and differential input pairs of other structures, and the present application does not limit this. In addition, those skilled in the art can learn the circuit structure and access method of the current mirror load and differential input pair of other structures from the inspiration of the circuit structure and access method of the current mirror load and differential input pair provided in the present application, and the present application will not repeat them.

[0063] In this embodiment, the switch unit also includes a switch control circuit and a tail current source tube Nbias1; one end of the switch control circuit is connected to the output end of the feedback unit, and the other end is connected to the drain of the tail current source tube Nbias1, which is used to determine whether to turn on under the control of the load selection signal C_SEL; the gate of the tail current source tube Nbias1 is connected to the bias signal NB1; the source of the tail current source tube Nbias1 is connected to the power supply VSS.

[0064] Different from Example 1, in this embodiment, Figure 4 As shown, the switch control circuit includes a third load gate switch tube Ms3; the drain of the third load gate switch tube Ms3 is connected to the output end of the feedback unit; the gate of the third load gate switch tube Ms3 is connected to the load gate signal C_SEL; the source of the third load gate switch tube Ms3 is connected to the drain of the tail current source tube Nbias1. In this embodiment, only one transistor is used to realize the switch control function of the circuit.

[0065] In practical applications, the third load gate switch tube Ms3 can be NMOS. Of course, in other embodiments, the third load gate switch tube Ms3 can also be PMOS. When the third load gate switch tube Ms3 uses PMOS, its specific connection method is well known to those skilled in the art, and this application will not repeat it. And the technical solution of using PMOS as the third load gate switch tube Ms3 should also fall within the protection scope of this application.

[0066] In this embodiment, the structure of the capacitor unit is the same as that of Embodiment 1, including a capacitor gating switch tube Mcsel and an adjustable capacitor C; the source of the capacitor gating switch tube Mcsel is connected to the output end of the tail current unit; the gate of the capacitor gating switch tube Mcsel is connected to the load gating signal C_SEL; the drain of the capacitor gating switch tube Mcsel is connected to one end (C_P) of the adjustable capacitor C; the other end (C_N) of the adjustable capacitor C is the output end.

[0067] Different from Embodiment 1, in this embodiment, since the feedback unit constitutes a unit gain buffer to realize the source follower function, the C_N terminal of the adjustable capacitor C of this embodiment is connected to the feedback unit, that is, connected to the gate of the fourth transistor M4, to realize the feedback unit's control over the operation of the capacitor unit, so that the C_N terminal of the adjustable capacitor C receives the voltage change of the pixel signal.

[0068] The feedback capacitor module provided in this embodiment has a feedback unit which is a unit gain buffer. The input end (gate of the third transistor M3) of the unit gain buffer is connected to the output PIX_OUT of the pixel signal generating unit, and the output end (gate of the fourth transistor M4) is connected to the N end (C_N) of the adjustable capacitor C. The gain of the feedback unit is recorded as Av, and the output is in phase with the input. When the voltage of the C output of the pixel signal generating unit changes ΔV, the voltage of the N end (C_N) of the adjustable capacitor follows the change Av×ΔV, and the P end (C_P) is connected to the output end of the tail current unit (the drain of the bias current mirror tube Nbias). The P end of the adjustable capacitor C is suppressed by the common source and common gate tube Ncas in the tail current unit, and the voltage remains basically unchanged, which is equivalent to the voltage of the N end of the adjustable capacitor C remains unchanged, and the voltage of the P end changes -Av×ΔV. In this way, for the pixel module, the P-terminal voltage change of the total load capacitance C_LOAD is ΔV, the P-terminal voltage change of the adjustable capacitance C is -Av×ΔV, and the two capacitors are connected in parallel, then the equivalent total capacitance of the pixel signal output circuit is (C_LOAD-Av×Ct), which is equivalent to reducing the total load capacitance.

[0069] The pixel signal output circuit provided in this embodiment transmits the voltage change of the pixel signal to the adjustable capacitor C in phase through the feedback unit, so that the polarity of the adjustable capacitor C is opposite to the total load capacitance of the pixel module, which equivalently reduces the total load capacitance of the pixel module, thereby reducing its time constant and increasing the slew rate, thereby realizing the accelerated establishment of the pixel signal.

[0070] In practical applications, since the capacitance value of the adjustable capacitor C is adjustable, the capacitance value of the adjustable capacitor C can be adjusted so that the total load capacitance (C_LOAD-Av×Ct) can be reduced according to actual needs, and the error voltage establishment time t meets the working timing design requirements.

[0071] Of course, in other embodiments, when the circuit structure of the pixel module is determined and the size of its load capacitance is known, the adjustable capacitor C in the capacitor unit can be replaced with a fixed capacitor, so that the total load capacitance can be reduced to a certain extent, and the error voltage establishment time t meets the working timing design requirements.

[0072] Considering that in actual applications, the pixel signal generating unit is controlled by the reset signal RX and the transmission tube control signal TX, and outputs a pixel reset signal or a pixel photosensitive signal, wherein when the reset signal RX is at a high potential, the pixel signal PIX_OUT is a pixel reset signal; when the reset signal RX is at a low potential and the transmission tube control signal TX is at a high potential, the pixel signal PIX_OUT is a pixel photosensitive signal. Whether the establishment of the reset signal RX and the transmission tube control signal TX is sufficient makes the establishment of the pixel signal exist in three situations, therefore, this embodiment provides a corresponding working timing to ensure that the pixel signal output circuit provided in this embodiment can correctly accelerate the establishment of the pixel signal. Among them, insufficient signal establishment refers to the situation where the quality of signal transmission is unstable, delayed, attenuated, distorted, etc. due to signal communication failure, interference, etc. does not meet the requirements; sufficient signal establishment refers to the situation where the signal can be correctly established at the receiving end as expected during the signal transmission process and meets certain quality requirements.

[0073] When both the RX signal and the TX signal are not fully established, you can use Figure 5 The working timing diagram shown is used as the working timing of the pixel signal output circuit, so as to accelerate the establishment speed of the two stages. Among them, the load selection signal C_SEL is turned on in the establishment stage of the voltage change caused by the reset signal RX and the transmission tube control signal TX, that is, when the pixel unit generates the pixel reset signal and the pixel photosensitive signal, the feedback capacitor module is used to reduce the total load capacitance, accelerate the establishment of the pixel reset signal and the pixel photosensitive signal, and then compensate for the pixel signal error caused by the insufficient establishment of the reset signal RX and the transmission tube control signal TX, and reduce the establishment error of the two quantizations of CDS (Correlated Double Sampling).

[0074] When the RX signal is not fully established and the TX signal is fully established, you can use Figure 6The working timing diagram shown is used as the working timing of the pixel signal output circuit, so as to accelerate the establishment speed of the reset signal RX stage. Among them, the load selection signal C_SEL is turned on in the establishment stage of the voltage change caused by the reset signal RX, that is, when the pixel unit generates the pixel reset signal, the feedback capacitor module is used to reduce the total load capacitance, accelerate the establishment of the pixel reset signal, and then make up for the pixel reset signal error caused by the insufficient establishment of the reset signal RX, and reduce the establishment error of the first quantization of the CDS. Since the transmission tube control signal TX is fully established, there is no error in the pixel photosensitive signal, and there is no need to accelerate the signal establishment of this stage.

[0075] When the TX signal is not fully established and the RX signal is fully established, you can use Figure 7 The working timing diagram shown is used as the working timing of the pixel signal output circuit, so as to accelerate the establishment speed of the transmission tube control signal TX stage. Among them, the load selection signal is turned on in the establishment stage of the voltage change caused by the transmission tube control signal TX, that is, when the pixel unit generates the pixel photosensitive signal, the feedback capacitor module is used to reduce the total load capacitance, accelerate the establishment of the pixel reset signal, and then make up for the pixel photosensitive signal error caused by the insufficient establishment of the transmission tube control signal TX, and reduce the establishment error of the second quantization of CDS. Since the reset signal RX is fully established, there is no error in the pixel reset signal, and there is no need to accelerate the signal establishment at this stage.

[0076] It should be noted that although this embodiment only uses Figure 3 and Figure 4 The pixel signal output circuit structure shown is used as an example to illustrate the working principle. However, those skilled in the art can replace or combine the modules and units mentioned above according to the composition of the present application, or use other circuit modules or units with the same functions to replace them, so as to obtain other pixel signal output circuit structures. Other pixel signal output circuit structures that do not violate the main purpose of the present application should also fall within the scope of protection of the present application. For example, Figure 3 Msf1 in Figure 4 The feedback unit in the feedback unit is replaced, and at this time, the C_N terminal of the adjustable capacitor C is connected to the gate of the fourth transistor M4 of the feedback unit.

[0077] This embodiment also provides an image sensor, comprising the pixel signal output circuit as described above.

[0078] The image sensor provided in this embodiment adds a feedback capacitor module in the pixel signal output circuit. Therefore, the capacitance of the feedback capacitor module can be used to equivalently reduce the total load capacitance of the pixel module, thereby effectively reducing the time constant of the pixel signal output circuit and increasing the slew rate, thereby accelerating the pixel signal establishment speed, solving the problem of how to improve the pixel signal establishment speed.

[0079] In practical applications, the image sensor may further include other circuit modules, such as a row selection module, an analog-to-digital conversion module, etc. The connection relationship between the various circuit modules is well known to those skilled in the art and will not be described in detail in this application.

[0080] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other. In addition, the different parts between the various embodiments can also be used in combination with each other, and the present invention is not limited to this.

[0081] The pixel signal output circuit and image sensor provided in this embodiment include: a pixel module for generating a pixel signal; a feedback capacitor module connected to the output end of the pixel module, and used to equivalently reduce the total load capacitance of the pixel module to accelerate the establishment of the pixel signal. By adding a feedback capacitor module to the output end of the pixel module, the total load capacitance of the pixel module is equivalently reduced by using the capacitance of the feedback capacitor module, thereby effectively reducing the time constant of the pixel signal output circuit, increasing the slew rate, and accelerating the establishment speed of the pixel signal, solving the problem of how to improve the establishment speed of the pixel signal.

[0082] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A pixel signal output circuit, characterized in that: include: A pixel module, used for generating a pixel signal; The feedback capacitor module is connected to the output end of the pixel module and is used to equivalently reduce the total load capacitance of the pixel module to accelerate the establishment of the pixel signal.

2. The pixel signal output circuit according to claim 1, characterized in that: The feedback capacitor module includes a feedback unit, a switch unit and a capacitor unit; the feedback unit is connected to the pixel module to obtain the voltage change of the pixel signal output by the pixel module; the switch unit is used to decide whether to use the capacitor unit to equivalently reduce the total load capacitance of the pixel module under the control of the load selection signal to accelerate the establishment of the pixel signal.

3. The pixel signal output circuit according to claim 2, characterized in that: The pixel module includes a pixel signal generating unit and a tail current unit; the pixel signal generating unit is used to generate a pixel signal; the tail current unit is used to generate a bias current; the output end of the pixel signal generating unit is connected to the feedback unit; the output end of the tail current unit is connected to the capacitor unit.

4. The pixel signal output circuit according to claim 2, characterized in that: The feedback unit includes a feedback source follower tube; the gate of the feedback source follower tube is connected to the output end of the pixel module to receive the pixel signal; the drain of the feedback source follower tube is connected to the power supply; the source of the feedback source follower tube is connected to the switch unit.

5. The pixel signal output circuit according to claim 2, characterized in that: The feedback unit includes a first transistor, a second transistor, a third transistor and a fourth transistor; the source of the first transistor and the source of the second transistor are connected to a power supply; the gate of the first transistor is connected to the gate of the second transistor; the drain of the first transistor is short-circuited with the gate and connected to the drain of the third transistor; the drain of the second transistor is connected to the drain of the fourth transistor; the gate of the third transistor is connected to the output end of the pixel module to receive the pixel signal; the gate and the drain of the fourth transistor are short-circuited and connected to the output end of the capacitor unit; the source of the third transistor and the source of the fourth transistor are connected to the switch unit.

6. The pixel signal output circuit according to claim 2, characterized in that: The switch unit includes a switch control circuit and a tail current source tube; one end of the switch control circuit is connected to the output end of the feedback unit, and the other end is connected to the drain of the tail current source tube, which is used to determine whether to turn on under the control of a load selection signal; the gate of the tail current source tube is connected to a bias signal; and the source of the tail current source tube is connected to a power supply.

7. The pixel signal output circuit according to claim 6, characterized in that: The switch control circuit includes a first load-enabling switch tube and a second load-enabling switch tube; the drain of the first load-enabling switch tube and the drain of the second load-enabling switch tube are connected to the output end of the feedback unit; the gate of the first load-enabling switch tube is connected to a first load-enabling signal, and the gate of the second load-enabling switch tube is connected to a second load-enabling signal; the source of the first load-enabling switch tube and the source of the second load-enabling switch tube are connected to the drain of the tail current source tube and the output end of the capacitor unit.

8. The pixel signal output circuit according to claim 6, characterized in that: The switch control circuit includes a third load-enabling switch tube; the drain of the third load-enabling switch tube is connected to the output end of the feedback unit; the gate of the third load-enabling switch tube is connected to the load-enabling signal; and the source of the third load-enabling switch tube is connected to the drain of the tail current source tube.

9. The pixel signal output circuit according to claim 3, characterized in that: The capacitor unit includes a capacitor gating switch tube and an adjustable capacitor; the source of the capacitor gating switch tube is connected to the output end of the tail current unit; the gate of the capacitor gating switch tube is connected to the load gating signal; the drain of the capacitor gating switch tube is connected to one end of the adjustable capacitor; the other end of the adjustable capacitor is the output end.

10. The pixel signal output circuit according to claim 3, characterized in that: The pixel signal generating unit comprises a photosensitive diode, a charge transfer tube, a reset tube, a pixel source follower tube and a pixel gate switch tube; the positive electrode of the photosensitive diode is connected to a power supply, and the negative electrode is connected to the source of the charge transfer tube; the gate of the charge transfer tube is connected to a transfer tube control signal, and the drain is connected to the source of the reset tube and the gate of the pixel source follower tube to form a floating node; the gate of the reset tube is connected to a reset signal, and the drain is connected to a power supply; the drain of the pixel source follower tube is connected to a power supply, and the source is connected to the drain of the pixel gate switch tube; the gate of the pixel gate switch tube is connected to a pixel gate signal, and the source outputs a pixel signal as an output terminal; The tail current unit includes a common source and common gate tube and a bias current mirror tube; the drain of the common source and common gate tube is connected to the output end of the pixel signal generating unit, the gate is connected to the bias signal, and the source is connected to the drain of the bias current mirror tube; the gate of the bias current mirror tube is connected to the bias signal, the source is connected to the power supply, and the drain is the output end connected to the capacitor unit.

11. An image sensor, characterized in that: Comprising the pixel signal output circuit as described in any one of claims 1 to 10.

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