PCB (Printed Circuit Board) defect identification method used in automatic PCB sorting process

Abstract

The invention discloses a PCB (Printed Circuit Board) defect identification method used in an automatic PCB sorting process, and relates to the technical field of defect identification, a visibility coefficient Kjxs is calculated based on the definition of a pattern formed by photoresist, an etching influence coefficient Syxs is calculated in combination with degree data after etching, and the etching influence coefficient Syxs is input into a defect evaluation model, so that the defect of the PCB is evaluated. Accurate evaluation of the defects is realized through a deep learning technology, and the method enables identification of the PCB defects to be more intelligent and efficient, and reduces manual intervention. On the basis of comparative analysis of the defect score Qpf and the preset evaluation threshold value Q, the system can automatically judge the defect condition of the PCB to be etched and adopt a corresponding automatic sorting mechanism, the intelligent automatic sorting mechanism can ensure that the qualified PCB enters the subsequent technological process, and the defective PCB is removed in time, so that the production efficiency is improved, and the production cost is reduced. And the risk that unqualified products flow into subsequent production links is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of defect recognition, and in particular to a PCB board defect recognition method used in an automatic PCB board sorting process. Background Art

[0002] In modern manufacturing, automation and efficient production are key factors in improving productivity and reducing costs. PCB (printed circuit board), as the most basic and crucial component of electronic equipment, is widely used in the manufacturing process of various electronic products. With the continuous advancement of science and technology, the design and production process of PCB is gradually developing towards high precision and high efficiency, especially in the defect identification and quality control of PCB boards. PCB board defect identification is a crucial part of the PCB manufacturing process, involving precise control and feedback of multiple links. Specifically, PCB board defect identification involves multiple process steps from photolithography, etching, development to final molding. Among them, photolithography and etching processes have a decisive influence on the quality and performance of PCB.

[0003] Existing PCB defect detection methods mostly rely on manual inspection or simple image recognition technology. These methods often fail to provide efficient and reliable defect assessment when faced with mass production. Specifically, inaccurate photomask alignment may cause the exposure area to shift, making it impossible to accurately copy the circuit pattern to the PCB board, which may cause the circuit pattern to partially disappear or short-circuit, and then cause unqualified PCB boards to flow into the next process or final product stage, causing production delays. During the etching process, if the clarity of the photoresist is not high, or the etching depth difference is too large, over-etching or under-etching problems will occur, resulting in unqualified circuit boards. Summary of the invention

[0004] In view of the deficiencies in the prior art, the present invention provides a PCB board defect identification method for use in the automatic PCB board sorting process, which solves the problems in the above-mentioned background technology.

[0005] To achieve the above objectives, the present invention is implemented through the following technical solutions: A PCB board defect identification method for PCB board automatic sorting process, comprising the following steps: S1. Pre-position the PCB to be etched, and use a photomask to expose a standard circuit pattern on the surface of the PCB to be etched, while monitoring the alignment accuracy of the photomask to obtain relevant position distribution data, and based on the relevant position distribution data, determine whether the current photolithography alignment is qualified; S2. When qualified, the PCB to be etched is automatically sorted to the etching process area. After the development process, a segmentation image is generated. Based on the segmentation image, the clarity of the pattern formed by the photoresist in the segmentation image is analyzed to construct a visibility coefficient Kjxs. Based on the segmentation image, the PCB to be etched is etched, and relevant etching degree data is obtained. Based on the relevant etching degree data, an etching influence coefficient Syxs is generated; S3. Use deep learning technology to build a defect assessment model, and input the etching influence coefficient Syxs and the visibility coefficient Kjxs into the defect assessment model, and after dimensionless processing, fit and output the defect score Qpf; S4. Preset an evaluation threshold Q, compare and analyze it with the defect score Qpf to comprehensively judge the defect situation of the current PCB board after the etching operation, and adopt a corresponding automatic sorting mechanism based on the judgment result.

[0006] Preferably, the specific steps of S1 include: S11, placing the PCB to be etched on the workbench in advance, limiting the PCB to be etched by a clamping assembly, and establishing a plane coordinate system with a corner of the PCB to be etched as the coordinate origin, and uniformly coating the surface of the PCB to be etched with photoresist; S12, based on step S11, using a photomask to expose the standard circuit pattern on the surface of the PCB to be etched, and during the exposure process, monitoring the position of the photomask to obtain relevant position distribution data, wherein the relevant position distribution data includes the position of the photomask position on the X-axis and the position of the photomask on the Y axis .

[0007] Preferably, the specific step S1 also includes: S13, according to the relevant position distribution data, analyzing the position deviation between the position of the photomask and the circuit pattern texture in the standard PCB board to calculate the mask alignment error , the mask alignment error Obtained by the following formula: ; ; In the formula, Expressed as the alignment error on the X-axis, Expressed as the alignment error on the Y axis, and They represent the standard positions of the circuit pattern patterns on the X-axis and Y-axis in the standard PCB board. and They represent the positions of the photomask on the X-axis and Y-axis respectively. Indicates the width of the PCB to be etched. Indicated as the length of the PCB board to be etched; S14, based on the mask alignment error obtained in S13 , the alignment error on the X-axis and the alignment error on the Y axis Vector synthesis is performed to construct the alignment tolerance Drc, which is obtained by the following formula: .

[0008] Preferably, the specific step S1 also includes: S15, presetting a safety threshold K, and comparing and analyzing it with the alignment tolerance Drc, to determine whether the exposure area of ​​the current PCB board to be etched is in a qualified state during the exposure process, the specific determination steps are as follows: S151, if the alignment tolerance Drc exceeds the safety threshold K, it is determined that the exposure area of ​​the current PCB board to be etched is not in a qualified state during the exposure process, and an alignment instruction is triggered outwardly; S152, if the alignment tolerance Drc does not exceed the safety threshold K, it is determined that the exposure area of ​​the current PCB board to be etched is in a qualified state during the exposure process, and the PCB board to be etched is automatically sorted to the etching process area; S16. After receiving the alignment instruction, the photomask position is adjusted through manual intervention. After the adjustment, steps S12, S13 and S14 are repeated until the exposure area of ​​the current PCB board to be etched is in a qualified state during the exposure process, and the repetitive steps are stopped.

[0009] Preferably, the specific steps of S2 include: S21, when qualified, automatically sorting the PCB board to be etched to the etching process area, and obtaining the divided image of the surface of the PCB board to be etched by using an image monitoring device after the PCB board to be etched undergoes a development process, wherein the divided area includes a non-protected area and a protected area, wherein the non-protected area and the protected area are distinguished by edge detection using a Canny edge detection method, so as to distinguish and extract the non-protected area and the protected area; S22, dividing the boundary between the protected area and the non-protected area into units and marking them to generate a No. 1 boundary unit , Boundary Unit No. 2 , Boundary Unit No. 3 ,...n number dividing unit ; S23, using an exposure intensity meter, capturing the relevant exposure data information of the multiple groups of boundary units, wherein the relevant exposure data information includes the exposure intensity difference Bqc within each group of boundary units, and extracting the maximum exposure intensity difference from the relevant exposure data information and minimum exposure intensity difference ; S24. Based on the divided image, obtain relevant edge curvature data, wherein the relevant edge curvature data includes the position coordinates P of each monitoring point at the boundary between the protection area and the non-protection area.

[0010] Preferably, the specific step S2 also includes: S25. Analyze the exposure difference between the boundary units of each group during the photolithography process according to the relevant exposure data information to obtain a contrast ratio Bdd. The contrast ratio Bdd is obtained by the following formula: ; In the formula, Expressed as the maximum exposure intensity difference, Expressed as the minimum exposure intensity difference; S26, analyzing the regularity of the protection area in the divided area during the photolithography process according to the relevant edge curvature data, so as to calculate and obtain the edge linearity Bxd, wherein the edge linearity Bxd is obtained by the following formula: ; In the formula, m represents the number of monitoring points. , Expressed as The actual coordinates of the monitoring point, Expressed as The preset coordinates of the monitoring point, Expressed as The actual coordinates of the monitoring point With Preset coordinates at the monitoring point The absolute difference between .

[0011] Preferably, the specific step S2 also includes: S27, by correlating the contrast Bdd and edge linearity Bxd obtained in S25 and S26, to analyze the clarity of the pattern formed by the photoresist in the divided image, and after dimensionless processing, construct a visibility coefficient Kjxs, the visibility coefficient Kjxs is obtained by the following formula: ; In the formula, a1 and a2 represent the weight values ​​of edge linearity Bxd and contrast Bdd respectively, and the specific values ​​of a1 and a2 are set by the user according to the situation.

[0012] Preferably, the specific step S2 also includes: S28, after the development process, the PCB surface to be etched is etched, and after the etching process, the image monitoring device is used to obtain relevant etching degree data, wherein the relevant etching degree data includes the remaining copper area in the non-protected area , missing copper area within the protection area and the etching depth difference Ssd in the non-protected area; according to the relevant etching degree data, the remaining copper area in the non-protected area and the missing copper area within the protection area The etching influence coefficient Syxs is obtained by correlating and dimensionless processing. The etching influence coefficient Syxs is obtained according to the following formula: ; Where b1 and b2 represent the remaining copper area in the non-protected area. and the missing copper area within the protected area The specific values ​​of b1 and b2 are set by the user according to the situation.

[0013] Preferably, the specific steps of S3 include: S31, by inputting the etching influence coefficient Syxs and the visibility coefficient Kjxs into the defect assessment model, after dimensionless processing and fitting, outputting the defect score Qpf from the output end of the defect assessment model, the defect score Qpf is obtained by the following formula: ; In the formula, Expressed as the etching depth difference in the unprotected area, Expressed as a correction constant, and They are respectively expressed as the visibility coefficient Kjxs, the etching influence coefficient Syxs and the etching depth difference in the unprotected area The weight value of and The specific value is set by the user according to the situation.

[0014] Preferably, The present invention provides a PCB board defect identification method for the automatic sorting process of PCB boards, which has the following beneficial effects: S4 specifically comprises the following steps: S41, by comparing and analyzing the defect score Qpf with the preset evaluation threshold Q, a comprehensive judgment is made on the defect situation of the PCB board after the etching operation, and the specific judgment content is as follows: If the defect score Qpf exceeds the preset evaluation threshold Q, it is comprehensively judged that the current PCB board after the etching operation is in an abnormal defect state. At this time, the current PCB board after the etching operation is automatically sorted to the unqualified area of ​​the production line to wait for manual intervention; If the defect score Qpf does not exceed the preset evaluation threshold Q, it is comprehensively judged that the current PCB board after the etching operation is not in an abnormal defect state. At this time, the current PCB board after the etching operation is automatically sorted to the qualified area of ​​the production line and transported to the next process area via a conveyor belt.

[0015] (1) This method monitors the alignment accuracy of the photomask during the process of limiting and exposing the photomask to the PCB to be etched in advance to ensure the accuracy of the photolithography alignment. This process can effectively avoid PCB board defects caused by unqualified photolithography alignment and improve the accuracy and efficiency of the sorting system. Through the analysis of the segmented image, the visibility coefficient Kjxs is calculated based on the clarity of the pattern formed by the photoresist, and the etching influence coefficient Syxs is calculated based on the degree data after etching, and input into the defect assessment model. The accurate assessment of defects is achieved through deep learning technology. This method makes the identification of PCB board defects more intelligent and efficient, reducing manual intervention. Based on the comparison and analysis of the defect score Qpf and the preset evaluation threshold Q, the system can automatically determine the defect situation of the PCB board to be etched and adopt the corresponding automatic sorting mechanism. This intelligent automatic sorting mechanism can ensure that qualified PCB boards enter the subsequent process flow, while defective boards are promptly eliminated, reducing the risk of unqualified products flowing into the subsequent production links and improving the overall production quality and efficiency. The defect recognition and automatic sorting method of the present invention provides a real-time monitoring and feedback mechanism for the defect status, etching accuracy and other parameters of each PCB board, which helps to achieve data traceability and quality control in the production process. Through timely defect recognition and automatic adjustment, the stability and consistency of the production process are ensured, and the overall quality of the product is further improved.

[0016] (2) Based on the quantitative calculation of the alignment tolerance Drc, the production line can provide real-time feedback on the alignment deviation and make process adjustments based on the tolerance data. This optimization mechanism ensures continuous self-adjustment and optimization during the production process, avoiding production stagnation and errors caused by alignment problems.

[0017] (3) In step S22, the multiple boundary units divided enable the exposure area to be accurately marked and processed. The exposure difference of each boundary unit is accurately captured and recorded. The maximum and minimum exposure intensity differences are measured by an exposure intensity meter, which can effectively identify the unevenness or abnormalities that may occur during the exposure process, thereby preventing or correcting problems in the photolithography process. In step S25, based on the analysis of the maximum and minimum exposure intensity differences, the contrast Bdd of the exposure area is obtained. This contrast index effectively reflects the degree of exposure difference in the photolithography process, reduces defects caused by uneven exposure, and improves the yield rate of the finished product. In step S26, by analyzing the edge curvature data, the edge linearity Bxd is calculated. This index reflects the regularity of the boundary between the protection area and the non-protection area. This analysis ensures the edge regularity of the circuit pattern and avoids defects in the etching process caused by irregular edges in the photolithography process, thereby reducing the occurrence of circuit breakage and rework.

[0018] (4) Efficient defect assessment and quality control: In step S3, by inputting key data such as the etching influence coefficient Syxs, the visibility coefficient Kjxs and the etching depth difference of the unprotected area into the defect assessment model, the defect score Qpf is calculated. This defect score combines multiple factors and can accurately assess the defects that may occur in each PCB board during the etching process. The introduction of this defect scoring model makes the quality control in the production process more accurate, and can timely detect and evaluate the quality of each PCB board, and reasonably sort and process them according to the scoring results, effectively reducing the risk of defective products flowing into subsequent processes. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 The present invention is a schematic flow chart of a PCB board defect recognition method used in a PCB board automatic sorting process. DETAILED DESCRIPTION

[0020] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0021] Example 1 See also Figure 1 The present invention provides a PCB board defect identification method for the PCB board automatic sorting process, comprising the following steps: S1. The PCB to be etched is limited in advance, and a standard circuit pattern (designed circuit pattern) is exposed on the surface of the PCB to be etched using a photomask, while the alignment accuracy of the photomask is monitored to obtain relevant position distribution data, and based on the relevant position distribution data, it is determined whether the current photolithography alignment is qualified; S2. When qualified, the PCB to be etched is automatically sorted to the etching process area. After the development process, a segmentation image is generated. Based on the segmentation image, the clarity of the pattern formed by the photoresist in the segmentation image is analyzed to construct a visibility coefficient Kjxs. Based on the segmentation image, the PCB to be etched is etched, and relevant etching degree data is obtained. Based on the relevant etching degree data, an etching influence coefficient Syxs is generated; S3. Use deep learning technology to build a defect assessment model, and input the etching influence coefficient Syxs and the visibility coefficient Kjxs into the defect assessment model, and after dimensionless processing, fit and output the defect score Qpf; S4. Preset an evaluation threshold Q, compare and analyze it with the defect score Qpf to comprehensively judge the defect situation of the current PCB board after the etching operation, and adopt a corresponding automatic sorting mechanism based on the judgment result.

[0022] In this embodiment, the accuracy of defect recognition is improved: the method ensures the accuracy of the photolithography process by using a photomask for precise alignment, and based on the visibility coefficient Kjxs and the etching influence coefficient Syxs of the divided image, the defect evaluation of the etched PCB board is performed through deep learning technology, thereby improving the accuracy of PCB board defect recognition. The method can accurately identify the defects caused by slight deviations in the photolithography and etching processes, and reduce unqualified products caused by manual inspection errors. Automation and intelligence: the method realizes a high degree of automation of the PCB board sorting process by combining the automatic sorting mechanism and deep learning technology, without manual intervention. By comparing the defect score Qpf with the evaluation threshold Q, it can automatically determine which PCB boards are qualified and which need to be reprocessed or eliminated. The intelligence of this process reduces the labor cost as much as possible and optimizes the production efficiency. Improve production efficiency: based on the real-time monitoring of the photomask alignment accuracy and etching data, the method can adjust the sorting strategy in time when problems are found, avoiding unqualified boards from entering the next process link, thereby avoiding greater losses that may be generated in subsequent processes. Overall, the production efficiency of PCB boards is improved, and the risk of later rework or scrapping caused by defective boards is reduced. Effectively reduce the defect rate: By implementing double inspection before and after the etching process, that is, through the analysis of visibility coefficient and etching influence coefficient, combined with the deep learning model to evaluate the defect score, high-precision defect identification and judgment can be achieved, which minimizes the product failure caused by human negligence. In short, this method combines the accuracy of photomask alignment, deep learning defect evaluation and automatic sorting mechanism to achieve efficient and accurate defect identification of PCB boards during the etching process, providing a strong guarantee for improving production efficiency, reducing defect rates and reducing human intervention.

[0023] Example 2 Please refer to Figure 1 , specifically: S1 specific steps include: S11, placing the PCB to be etched on the workbench in advance, limiting the PCB to be etched by a clamping assembly, and establishing a plane coordinate system with a corner of the PCB to be etched as the coordinate origin, and evenly coating the surface of the PCB to be etched with photoresist to prepare for later exposure; S12. Based on step S11, a standard circuit pattern (designed circuit pattern) is exposed on the surface of the PCB to be etched using a photomask, and during the exposure process, the position of the photomask is monitored to obtain relevant position distribution data, wherein the relevant position distribution data includes the position of the photomask on the X-axis. and the position of the photomask on the Y axis .

[0024] It should be noted that a photomask refers to a key tool used in the photolithography process to define circuit patterns in semiconductor manufacturing and microelectronics engineering. It is a transparent or translucent glass or quartz plate with a specific pattern, coated with a thin layer of photoresist material (usually metal or photosensitive material). Through photolithography technology, the pattern is transferred to the surface of the PCB board to be etched.

[0025] The main function of the photomask is to transfer the designed circuit pattern to the photoresist layer on the PCB to be etched by exposure. These patterns are the connection directions between the circuits and are used to manufacture integrated circuits (ICs) or micro-electromechanical systems (MEMS), etc. The photomask is illuminated by an exposure light source (such as an ultraviolet light source). The transparent part of the pattern allows light to pass through, while the opaque part blocks the light. Therefore, only the transparent part of the pattern on the photomask will produce an image on the photoresist, forming an exposure area corresponding to the photomask pattern.

[0026] The specific steps of S1 also include: S13, according to the relevant position distribution data, analyzing the position deviation between the position of the photomask and the circuit pattern texture in the standard PCB board to calculate the mask alignment error , the mask alignment error Obtained by the following formula: ; ; In the formula, Expressed as the alignment error on the X-axis, Expressed as the alignment error on the Y axis, and They represent the standard positions of the circuit pattern patterns on the X-axis and Y-axis in the standard PCB board. and They represent the positions of the photomask on the X-axis and Y-axis respectively. Indicates the width of the PCB to be etched. Indicated as the length of the PCB board to be etched; The circuit pattern texture in the standard PCB board refers to the circuit pattern designed in advance by the designer.

[0027] S14, based on the mask alignment error obtained in S13 , the alignment error on the X-axis and the alignment error on the Y axis Vector synthesis is performed to construct the alignment tolerance Drc, which is obtained by the following formula: .

[0028] In this embodiment, the photolithography alignment accuracy is improved: in step S11, the method uses a clamping assembly to limit the PCB board to be etched, and uses a corner of the PCB board to be etched as the coordinate origin to establish a plane coordinate system. This measure can effectively ensure the stable positioning of the PCB board to be etched during the photolithography process and reduce the impact caused by positioning errors. By establishing a standardized coordinate system, the alignment accuracy of the photolithography process can be improved to ensure the accurate transfer of the circuit pattern. Real-time monitoring of the photomask alignment position: In step S12, the present invention obtains the position distribution data of the photomask on the X-axis and Y-axis by real-time monitoring of the position information of the photomask. This monitoring technology can accurately grasp the position change of the photomask, timely discover possible deviations, and further avoid inaccurate photolithography patterns caused by the position offset of the photomask, which enables the photolithography process to be carried out with higher accuracy and consistency, reducing PCB defects caused by photomask alignment problems, quantifying mask alignment errors, and improving alignment accuracy control: ensuring photolithography accuracy: In step S14, the present invention calculates the alignment tolerance Drc by vector synthesis of the alignment errors on the X-axis and Y-axis. The calculation of this alignment tolerance can quantify the accuracy requirements of the photomask alignment and provide a standard for the accuracy control of subsequent processes. During the production process, if the mask alignment error exceeds the set alignment tolerance range, the system can automatically issue an alarm and take measures to further avoid the appearance of non-standard PCB boards during the production process and improve the overall stability and reliability of the photolithography operation.

[0029] Example 3 Please refer to Figure 1 Specifically: S1 includes the following steps: S15, presetting a safety threshold K, and comparing and analyzing it with the alignment tolerance Drc, to determine whether the exposure area of ​​the current PCB board to be etched is in a qualified state during the exposure process, the specific determination steps are as follows: S151, if the alignment tolerance Drc exceeds the safety threshold K, it is determined that the exposure area of ​​the current PCB board to be etched is not in a qualified state during the exposure process, and an alignment instruction is triggered outwardly; S152, if the alignment tolerance Drc does not exceed the safety threshold K, it is determined that the exposure area of ​​the current PCB board to be etched is in a qualified state during the exposure process, and the PCB board to be etched is automatically sorted to the etching process area; The above-mentioned exposure area is the area where the photoresist undergoes chemical changes when the light source is irradiated through the photomask to the photoresist surface (i.e. the surface of the PCB board coated with photoresist) in the photolithography process. Specifically, the exposure area refers to the part of the photoresist where the light is irradiated through the transparent part of the photomask, thereby forming a pattern or structure on the photoresist layer. The definition and shape of these areas directly depend on the pattern on the photomask and the exposure process of the photolithography process.

[0030] Morphology of the exposed area: In positive photoresist (i.e. when the PCB surface is coated with positive photoresist), the exposed area will become more soluble and will be removed during the development process, thereby forming an exposed substrate area. In negative photoresist (i.e. when the PCB surface is coated with negative photoresist), the exposed area will become less soluble, and the unexposed area will be removed to form a protective layer, exposing the substrate underneath. The protective layer here refers to the part that is not removed by the photoresist, that is, the protective area in step S21.

[0031] S16. After receiving the alignment instruction, the photomask position is adjusted through manual intervention. After the adjustment, steps S12, S13 and S14 are repeated until the exposure area of ​​the current PCB board to be etched is in a qualified state during the exposure process, and the repetitive steps are stopped.

[0032] In this embodiment, automated alignment error control and quality assurance: In step S15, by comparing and analyzing the preset safety threshold K with the alignment tolerance Drc, it is possible to determine in real time whether the exposure area of ​​the PCB board to be etched is in a qualified state. The automated judgment of this step effectively avoids the situation of untimely human intervention or misjudgment, ensuring that each PCB board can meet the strict alignment accuracy requirements during the exposure process, and improving the accuracy and stability of the lithography process. The introduction of automated comparison and judgment makes the entire process more efficient and reliable. Intelligent alignment judgment and abnormality detection mechanism: In step S151, if the alignment tolerance Drc exceeds the safety threshold K, the system will immediately determine that the exposure area is not in a qualified state and trigger the alignment instruction. This intelligent abnormality detection mechanism can immediately detect alignment problems during the exposure process and automatically trigger corresponding warning and correction instructions. By automatically identifying and judging deviations through the system, exposure failures caused by human errors or negligence can be further reduced, ensuring that the circuit pattern accuracy of the PCB board is not affected. Efficient triggering of alignment instructions and manual intervention mechanism: In step S16, once the alignment instruction is received, the system will automatically trigger manual intervention to adjust the position of the photomask, manually adjust the photomask and repeat the alignment process (steps S12, S13 and S14) until the exposure area of ​​the PCB board to be etched is in a qualified state. This mechanism enables the system to promptly initiate manual correction and precise adjustment when an abnormality is detected, avoiding the risk of continuous exposure to the wrong alignment state and ensuring that the final exposure quality of each PCB board meets the design standards.

[0033] Example 4 Please refer to Figure 1 , specifically: S2 specific steps include: S21, when qualified, automatically sorting the PCB board to be etched to the etching process area, and obtaining the divided image of the surface of the PCB board to be etched by using an image monitoring device after the PCB board to be etched undergoes a development process, wherein the divided area includes a non-protected area and a protected area, wherein the non-protected area and the protected area are distinguished by edge detection using a Canny edge detection method, so as to distinguish and extract the non-protected area and the protected area; wherein the image monitoring device includes but is not limited to a camera; Among them, the non-protected area is the part where the photoresist is removed; S22, dividing the boundary between the protected area and the non-protected area into units and marking them to generate a No. 1 boundary unit , Boundary Unit No. 2 , Boundary Unit No. 3 ,...n number dividing unit ; S23, using an exposure intensity meter, capturing the relevant exposure data information of the multiple groups of boundary units, wherein the relevant exposure data information includes the exposure intensity difference Bqc within each group of boundary units, and extracting the maximum exposure intensity difference from the relevant exposure data information and minimum exposure intensity difference ; S24. Based on the divided image, obtain relevant edge curvature data, wherein the relevant edge curvature data includes the position coordinates P of each monitoring point at the boundary between the protection area and the non-protection area.

[0034] The specific steps of S2 also include: S25. Analyze the exposure difference between the boundary units of each group during the photolithography process according to the relevant exposure data information to obtain a contrast ratio Bdd. The contrast ratio Bdd is obtained by the following formula: ; In the formula, Expressed as the maximum exposure intensity difference, Expressed as the minimum exposure intensity difference; S26, analyzing the regularity of the protection area in the divided area during the photolithography process according to the relevant edge curvature data, so as to calculate and obtain the edge linearity Bxd, wherein the edge linearity Bxd is obtained by the following formula: ; In the formula, m represents the number of monitoring points. , Expressed as The actual coordinates of the monitoring point, Expressed as The preset coordinates of the monitoring point, Expressed as The actual coordinates of the monitoring point With Preset coordinates at the monitoring point The absolute difference between .

[0035] The lower the edge linearity Bxd, the higher the visibility and accuracy of the pattern.

[0036] In this embodiment, accurate area division and edge detection: In step S21, the divided image of the surface of the PCB board to be etched is processed using the Canny edge detection method, which can effectively distinguish between the protected area and the unprotected area. Through accurate edge detection, a clear boundary can be extracted to ensure that the distinction between the unprotected area (i.e., the photoresist removal part) and the protected area is more accurate. This technology can effectively improve the accuracy of the PCB board etching process and reduce process errors and defects caused by unclear division. Detailed exposure intensity analysis: In step S23, the exposure data information of the boundary unit is captured by an exposure intensity meter, and the maximum exposure intensity difference and the minimum exposure intensity difference are extracted, which can comprehensively analyze the exposure intensity distribution in each unit area. Through the difference analysis of exposure intensity, potential exposure unevenness problems can be found during the etching process, and timely corrections can be made to avoid the possibility of over-removal or under-removal when removing the photoresist in the later stage. Evaluation of edge linearity of protected area: In step S26, by calculating edge linearity Bxd, the regularity of the boundary between protected area and non-protected area and the accuracy of the photolithography process can be quantitatively analyzed. This analysis provides a powerful tool for evaluating whether there is distortion, distortion or irregular boundary in the photolithography process. Through accurate measurement of edge linearity, problems in the photolithography process, such as irregular pattern boundary or uneven photolithography, can be discovered in time, and then process parameters can be adjusted to improve the accuracy and integrity of the final pattern.

[0037] Example 5 Please refer to Figure 1 Specifically: S2 includes the following specific steps: S27, by correlating the contrast Bdd and edge linearity Bxd obtained in S25 and S26, to analyze the clarity of the pattern formed by the photoresist in the divided image, and after dimensionless processing, construct a visibility coefficient Kjxs, the visibility coefficient Kjxs is obtained by the following formula: ; In the formula, a1 and a2 represent the weight values ​​of edge linearity Bxd and contrast Bdd respectively, wherein 0<a1<1, 0<a2<1, and the specific values ​​are set by the user according to the situation.

[0038] The specific steps of S2 also include: S28, after the development process, the PCB surface to be etched is etched, and after the etching process, the image monitoring device is used to obtain relevant etching degree data, wherein the relevant etching degree data includes the remaining copper area in the non-protected area , missing copper area within the protection area and the etching depth difference Ssd in the non-protected area; according to the relevant etching degree data, the remaining copper area in the non-protected area and the missing copper area within the protection area The etching influence coefficient Syxs is obtained by correlating and dimensionless processing. The etching influence coefficient Syxs is obtained according to the following formula: ; Where b1 and b2 represent the remaining copper area in the non-protected area. and the missing copper area within the protected area The weight value is 0<b1<1, 0<b2<1, and the specific value is set by the user according to the situation.

[0039] The remaining copper area in the non-protected area mentioned above and the missing copper area within the protected area This can be monitored using methods such as high-resolution microscopy, laser scanning microscopy and X-ray imaging.

[0040] In this embodiment, pattern clarity analysis: In step S27, by analyzing the correlation between contrast Bdd and edge linearity Bxd, a visibility coefficient Kjxs is constructed, which effectively reflects the clarity of the pattern formed by the photoresist. Contrast and edge linearity are important indicators that affect the quality of lithography, and can directly reflect the resolution and clarity of the pattern. After these two indicators are dimensionless, a unified visibility coefficient is obtained, which further enhances the quantitative analysis ability of pattern clarity. This method can help engineers evaluate the quality of lithography patterns in real time and provide more accurate data support to ensure that the final etching pattern meets the design standards. Etching quality inspection: In step S28, by obtaining the relevant etching degree data in the etching process, and constructing the etching influence coefficient Syxs after dimensionless processing, the etching influence coefficient comprehensively considers the etching effects of the non-protected area and the protected area, and quantifies the degree of influence in the etching process. The calculation of the etching influence coefficient Syxs can effectively reflect the difference in etching quality in different regions, help engineers monitor and adjust the etching process in real time, and avoid problems such as circuit short circuit, open circuit or signal interference caused by uneven etching.

[0041] Example 6 Please refer to Figure 1, specifically: S3 specific steps include: S31, by inputting the etching influence coefficient Syxs and the visibility coefficient Kjxs into the defect assessment model, after dimensionless processing and fitting, outputting the defect score Qpf from the output end of the defect assessment model, the defect score Qpf is obtained by the following formula: ; In the formula, Expressed as the etching depth difference in the unprotected area, Expressed as a correction constant, and They are respectively expressed as the visibility coefficient Kjxs, the etching influence coefficient Syxs and the etching depth difference in the unprotected area The weight value is 0<F1<1, 0<F2<1, 0<F3<1, and the specific value is set by the user according to the situation.

[0042] Etch depth difference in unprotected area It can be monitored and acquired through a profilometer or white light interferometer; The specific steps of S4 include: S41, by comparing and analyzing the defect score Qpf with the preset evaluation threshold Q, a comprehensive judgment is made on the defect situation of the PCB board after the etching operation, and the specific judgment content is as follows: If the defect score Qpf exceeds the preset evaluation threshold Q, it is comprehensively judged that the current PCB board after the etching operation is in an abnormal defect state. At this time, the current PCB board after the etching operation is automatically sorted to the unqualified area of ​​the production line to wait for manual intervention; If the defect score Qpf does not exceed the preset evaluation threshold Q, it is comprehensively judged that the current PCB board after the etching operation is not in an abnormal defect state. At this time, the current PCB board after the etching operation is automatically sorted to the qualified area of ​​the production line and transported to the next process area via a conveyor belt.

[0043] In this embodiment, intelligent evaluation and real-time feedback of defect scores: In step S3, the etching influence coefficient Syxs and the visibility coefficient Kjxs are input into the defect evaluation model, and the defect score Qpf is obtained through dimensionless processing and fitting calculation. This score combines the weight values ​​of the etching depth difference, visibility coefficient and etching influence coefficient in the non-protected area, and effectively comprehensively evaluates multiple process parameters into a comprehensive defect score. The score can reflect the quality of the PCB board after etching, especially the difference in photolithography pattern and etching degree. Through this intelligent evaluation system, process personnel can obtain defect conditions in real time, avoid errors caused by human negligence and manual inspection, and improve production efficiency. The calculation of defect scores not only helps to compare the quality differences of different production batches, but also provides a quantitative basis for process optimization. The automated evaluation of the system greatly reduces the frequency and cost of manual inspection and improves the automation level of the production line. Automatic sorting and process optimization based on scoring: In step S4, the defect score Qpf determines the destination of the PCB board by comparing it with the pre-set evaluation threshold Q. This automated defect judgment and sorting mechanism ensures that unqualified products will not enter the next link, thereby effectively avoiding subsequent process waste and losses due to quality problems.

[0044] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for identifying PCB board defects during automatic PCB board sorting, characterized in that: The following steps are included: S1. Pre-position the PCB to be etched, and use a photomask to expose a standard circuit pattern on the surface of the PCB to be etched, while monitoring the alignment accuracy of the photomask to obtain relevant position distribution data, and based on the relevant position distribution data, determine whether the current photolithography alignment is qualified; S2. When qualified, the PCB to be etched is automatically sorted to the etching process area. After the development process, a segmentation image is generated. Based on the segmentation image, the clarity of the pattern formed by the photoresist in the segmentation image is analyzed to construct a visibility coefficient Kjxs. Based on the segmentation image, the PCB to be etched is etched, and relevant etching degree data is obtained. Based on the relevant etching degree data, an etching influence coefficient Syxs is generated; S3. Use deep learning technology to build a defect assessment model, and input the etching influence coefficient Syxs and the visibility coefficient Kjxs into the defect assessment model, and after dimensionless processing, fit and output the defect score Qpf; S4. Preset an evaluation threshold Q, compare and analyze it with the defect score Qpf to comprehensively judge the defect situation of the current PCB board after the etching operation, and adopt a corresponding automatic sorting mechanism based on the judgment result.

2. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 1 is characterized in that: The specific steps of S1 include: S11, placing the PCB to be etched on the workbench in advance, limiting the PCB to be etched by a clamping assembly, and establishing a plane coordinate system with a corner of the PCB to be etched as the coordinate origin, and uniformly coating the surface of the PCB to be etched with photoresist; S12, based on step S11, using a photomask to expose the standard circuit pattern on the surface of the PCB to be etched, and during the exposure process, monitoring the position of the photomask to obtain relevant position distribution data, wherein the relevant position distribution data includes the position of the photomask position on the X-axis and the position of the photomask on the Y axis .

3. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 2 is characterized in that: The specific steps of S1 also include: S13, according to the relevant position distribution data, analyzing the position deviation between the position of the photomask and the circuit pattern texture in the standard PCB board to calculate the mask alignment error , the mask alignment error Obtained by the following formula: ； ； In the formula, Expressed as the alignment error on the X-axis, Expressed as the alignment error on the Y axis, and They represent the standard positions of the circuit pattern patterns on the X-axis and Y-axis in the standard PCB board. and They represent the positions of the photomask on the X-axis and Y-axis respectively. Indicates the width of the PCB to be etched. Indicated as the length of the PCB board to be etched; S14, based on the mask alignment error obtained in S13 , the alignment error on the X-axis and the alignment error on the Y axis Vector synthesis is performed to construct the alignment tolerance Drc, which is obtained by the following formula: 。 4. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 3 is characterized in that: The specific steps of S1 also include: S15, presetting a safety threshold K, and comparing and analyzing it with the alignment tolerance Drc, to determine whether the exposure area of ​​the current PCB board to be etched is in a qualified state during the exposure process, the specific determination steps are as follows: S151, if the alignment tolerance Drc exceeds the safety threshold K, it is determined that the exposure area of ​​the current PCB board to be etched is not in a qualified state during the exposure process, and an alignment instruction is triggered outwardly; S152, if the alignment tolerance Drc does not exceed the safety threshold K, it is determined that the exposure area of ​​the current PCB board to be etched is in a qualified state during the exposure process, and the PCB board to be etched is automatically sorted to the etching process area; S16. After receiving the alignment instruction, the photomask position is adjusted through manual intervention. After the adjustment, steps S12, S13 and S14 are repeated until the exposure area of ​​the current PCB board to be etched is in a qualified state during the exposure process, and the repetitive steps are stopped.

5. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 1, characterized in that: The specific steps of S2 include: S21, when qualified, automatically sorting the PCB board to be etched to the etching process area, and obtaining the divided image of the surface of the PCB board to be etched by using an image monitoring device after the PCB board to be etched undergoes a development process, wherein the divided area includes a non-protected area and a protected area, wherein the non-protected area and the protected area are distinguished by edge detection using a Canny edge detection method, so as to distinguish and extract the non-protected area and the protected area; S22, dividing the boundary between the protected area and the non-protected area into units and marking them to generate a No. 1 boundary unit , Boundary Unit No. 2 , Boundary Unit No. 3 ,...n number dividing unit ; S23, using an exposure intensity meter, capturing the relevant exposure data information of the multiple groups of boundary units, wherein the relevant exposure data information includes the exposure intensity difference Bqc within each group of boundary units, and extracting the maximum exposure intensity difference from the relevant exposure data information and minimum exposure intensity difference ; S24. Based on the divided image, obtain relevant edge curvature data, wherein the relevant edge curvature data includes the position coordinates P of each monitoring point at the boundary between the protection area and the non-protection area.

6. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 5 is characterized in that: The specific steps of S2 also include: S25. Analyze the exposure difference between the boundary units of each group during the photolithography process according to the relevant exposure data information to obtain a contrast ratio Bdd. The contrast ratio Bdd is obtained by the following formula: ； In the formula, Expressed as the maximum exposure intensity difference, Expressed as the minimum exposure intensity difference; S26, analyzing the regularity of the protection area in the divided area during the photolithography process according to the relevant edge curvature data, so as to calculate and obtain the edge linearity Bxd, wherein the edge linearity Bxd is obtained by the following formula: ； In the formula, m represents the number of monitoring points. , Expressed as The actual coordinates of the monitoring point, Expressed as The preset coordinates of the monitoring point, Expressed as The actual coordinates of the monitoring point With Preset coordinates at the monitoring point The absolute difference between .

7. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 6 is characterized in that: The specific steps of S2 also include: S27, by correlating the contrast Bdd and edge linearity Bxd obtained in S25 and S26, to analyze the clarity of the pattern formed by the photoresist in the divided image, and after dimensionless processing, construct a visibility coefficient Kjxs, the visibility coefficient Kjxs is obtained by the following formula: ； In the formula, a1 and a2 represent the weight values ​​of edge linearity Bxd and contrast Bdd respectively, and the specific values ​​of a1 and a2 are set by the user according to the situation.

8. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 7 is characterized in that: The specific steps of S2 also include: S28, after the development process, the PCB surface to be etched is etched, and after the etching process, the image monitoring device is used to obtain relevant etching degree data, wherein the relevant etching degree data includes the remaining copper area in the non-protected area , missing copper area within the protection area and the etching depth difference Ssd in the non-protected area; according to the relevant etching degree data, the remaining copper area in the non-protected area and the missing copper area within the protection area The etching influence coefficient Syxs is obtained by correlating and dimensionless processing. The etching influence coefficient Syxs is obtained according to the following formula: ； Where b1 and b2 represent the remaining copper area in the non-protected area. and the missing copper area within the protected area The specific values ​​of b1 and b2 are set by the user according to the situation.

9. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 1, characterized in that: The specific steps of S3 include: S31, by inputting the etching influence coefficient Syxs and the visibility coefficient Kjxs into the defect assessment model, after dimensionless processing and fitting, outputting the defect score Qpf from the output end of the defect assessment model, the defect score Qpf is obtained by the following formula: ; In the formula, Expressed as the etching depth difference in the unprotected area, Expressed as a correction constant, and They are respectively expressed as the visibility coefficient Kjxs, the etching influence coefficient Syxs and the etching depth difference in the unprotected area The weight value of and The specific value is set by the user according to the situation.

10. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 1, characterized in that: The specific steps of S4 include: S41, by comparing and analyzing the defect score Qpf with the preset evaluation threshold Q, a comprehensive judgment is made on the defect situation of the PCB board after the etching operation, and the specific judgment content is as follows: If the defect score Qpf exceeds the preset evaluation threshold Q, it is comprehensively judged that the current PCB board after the etching operation is in an abnormal defect state. At this time, the current PCB board after the etching operation is automatically sorted to the unqualified area of ​​the production line to wait for manual intervention; If the defect score Qpf does not exceed the preset evaluation threshold Q, it is comprehensively judged that the current PCB board after the etching operation is not in an abnormal defect state. At this time, the current PCB board after the etching operation is automatically sorted to the qualified area of ​​the production line and transported to the next process area via a conveyor belt.

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