Circuit device for photoacoustic system

Abstract

The invention discloses a circuit device for a photoacoustic system, and belongs to the technical field of laser gas detection photoelectric instruments. Aiming at the problems that a lock-in amplifier and a function signal generator are poor in portability and a front transimpedance amplifier is difficult to effectively amplify a quartz tuning fork signal, a circuit device suitable for a photoacoustic spectrometry system is designed based on STM32L431RCT6. The circuit mainly comprises a main control chip circuit, a power supply circuit of a digital module and a part of analog modules, a system clock and frequency dividing circuit, a reference clock generation circuit, a quartz tuning fork signal amplifier and power supply circuit, a composite signal generator circuit, an ultra-low noise reference voltage generation circuit, a signal conditioning circuit and an ADC acquisition circuit. An analog switch circuit; the device integrates a lock-in amplifier, a function signal generator and a quartz tuning fork signal amplifier, and realizes miniaturization and low power consumption. And meanwhile, an anti-interference shielding cover is designed for the quartz tuning fork signal amplifier which works independently, so that the anti-interference capability of the quartz tuning fork signal amplifier is improved.

Description

Technical Field

[0001] The invention belongs to the technical field of laser gas detection photoelectric instruments, and in particular relates to a circuit device for a photoacoustic system. Background Art

[0002] While scientific and technological progress accelerates social development, it also changes the proportion of atmospheric components, affecting human health and environmental climate. Therefore, accurate and rapid detection of pollutant gases has become a research hotspot, and real-time measurement of the content of pollutant gases in the atmosphere is the key to assessing environmental quality. Among the many gas detection technologies, photoacoustic spectroscopy has the characteristics of good selectivity, high detection accuracy, long life and low maintenance costs. It has become a hot spot for people to continuously study from principle to application for a long time. Quartz enhanced photoacoustic spectroscopy (QEPAS) technology is a new development of traditional photoacoustic spectroscopy technology. This technology not only retains the advantages of photoacoustic spectroscopy technology such as zero background, no wavelength selectivity, and response signal proportional to the excitation light power, but also has high quality factor, narrow response bandwidth, immunity to environmental noise, compact structure and low cost. Therefore, this technology has received widespread attention once it was proposed.

[0003] At present, laser gas detection systems based on quartz enhanced photoacoustic spectroscopy technology are mostly built with discrete phase-locked amplifiers, function signal generators, pre-transimpedance amplifiers, quartz tuning fork detectors, laser temperature control and flow control instruments and other components. The entire system is large in size, heavy in weight, and has high power consumption, which is not convenient to carry out for detection, which completely conceals the advantages of the quartz tuning fork detector itself, which is small in size and no power consumption. In addition, since the signal of the quartz tuning fork is extremely small, the feedback resistance of the general transimpedance amplifier needs to be above MΩ, that is, the current-to-voltage gain requirement is very high. However, the common transimpedance amplifiers at present often find it difficult to achieve wide bandwidth and high current-to-voltage gain at the same time, so the effect of amplifying the quartz tuning fork signal with high frequency and extremely small amplitude is not ideal. At the same time, since the offset voltage and bias current of most high-gain-bandwidth op amps are large, the quartz tuning fork signal will be submerged in the noise and the signal cannot be amplified normally. In addition, most transimpedance amplifier circuit boards are only operated on the laboratory bench. In outdoor environments, especially in the presence of strong electromagnetic interference, the effect of amplifying extremely small signals will also be affected. Summary of the invention

[0004] Aiming at the problems that a phase-locked amplifier and a function signal generator have poor portability and a pre-transimpedance amplifier is difficult to effectively amplify a quartz tuning fork signal, the present invention provides a circuit device for a photoacoustic system.

[0005] In order to achieve the above object, the present invention adopts the following technical solutions:

[0006] A circuit device for a photoacoustic system, the circuit device comprising a lock-in amplifier module, a composite signal generator module, a quartz tuning fork signal amplifier module, a signal channel conversion module, and a host computer;

[0007] The lock-in amplifier module includes a main control chip circuit, a power supply circuit of a digital module and some analog modules, a system clock and frequency division circuit, a reference clock generation circuit, an ultra-low noise reference voltage generation circuit, a signal conditioning circuit and an ADC acquisition circuit;

[0008] The composite signal generator module includes a main control chip circuit, a power supply circuit for a digital module and some analog modules, a system clock and frequency division circuit, a reference clock generation circuit, and a composite signal generator circuit;

[0009] The quartz tuning fork signal amplifier module includes a quartz tuning fork signal amplifier and a power supply circuit;

[0010] The signal channel conversion module includes an analog switch circuit.

[0011] The main control chip circuit is a STM32L431RCT6 low-power single-chip microcomputer and a peripheral circuit; the STM32L431RCT6 low-power single-chip microcomputer has a timer;

[0012] The power supply circuit of the digital module and some analog modules is a low-dropout linear regulator (LDO), which has the characteristics of low output ripple, high power supply rejection ratio and low noise, ensuring the stability and accuracy of the circuit;

[0013] The system clock and frequency division circuit is a high-frequency active crystal oscillator that generates a system clock. This clock not only serves as a reference for the reference clock generation circuit, but also generates a lower frequency clock signal through the frequency division circuit for use by the main control chip. In addition, an impedance matching design is implemented on the transmission path of the high-frequency clock signal to avoid signal distortion and performance degradation during the transmission of the high-frequency signal;

[0014] The reference clock generation circuit is composed of a direct frequency synthesizer (DDS), a bandpass filter and a comparator;

[0015] The quartz tuning fork signal amplifier and power supply circuit are quartz tuning fork signal amplifier and power supply circuit; the quartz tuning fork signal amplifier is a transimpedance amplifier, but a MOS tube is added to the feedback loop near the input end; the power supply circuit is an ultra-high power supply rejection ratio, ultra-low noise LDO power supply chip, which provides positive and negative voltages.

[0016] The composite signal generator circuit is composed of a high-precision external DAC and a follower;

[0017] The ultra-low noise reference voltage generation circuit is composed of a reference voltage source and a low-pass filter with a very low cut-off frequency; the ultra-low noise reference voltage generated by the reference voltage source provides a voltage reference for the composite signal generator circuit, the signal conditioning circuit and the ADC acquisition circuit; the reference voltage source can generate an ultra-low noise reference voltage, and the noise can be further reduced by the low-pass filter with a very low cut-off frequency. However, in actual circuit design, the use of capacitors with very high capacitance values ​​may cause the operational amplifier to be unstable or even cause self-excitation. In order to solve this potential stability problem, a combination of isolation resistors and compensation capacitors is added to the circuit. This design can enhance the stability of the system.

[0018] The signal conditioning circuit and the ADC acquisition circuit are divided into two parts: the signal conditioning circuit and the ADC acquisition circuit; the signal conditioning circuit uses an instrument amplifier to amplify the tiny voltage signal to be measured by a suitable multiple, and adds a suitable DC bias to the voltage signal to be measured to prevent it from exceeding the ADC measurement range; the ADC acquisition circuit is a high-precision, high-speed pseudo-differential input ADC, which uses the SPI protocol to transmit data and has a fast communication rate.

[0019] An anti-interference shielding cover is designed for the quartz tuning fork signal amplifier to ensure its stable operation in a complex electromagnetic environment;

[0020] The signal conditioning circuit is designed with a second-order active bandpass filter to improve the signal-to-noise ratio of the signal to be measured;

[0021] The composite signal generator module is designed with a fourth-order low-pass filter, and the sinusoidal signal generated by the main control chip is input into the filter to filter out the high-frequency components. After this processing, a sinusoidal signal with an undistorted waveform is finally obtained.

[0022] The analog switch circuit has two analog switches, the first analog switch is responsible for selecting the output channel of the composite signal generator, and is used to switch the output signal waveform and the output port; the second analog switch is responsible for selecting the input channel of the signal conditioning circuit, and is used to switch the input port of the signal conditioning circuit and select the signal of the interface at one end of the quartz tuning fork;

[0023] The output signal waveform includes a composite signal and a square wave signal generated by the composite signal generator circuit; the output port is divided into a direction facing the external interface and an interface direction connected to one end of the quartz tuning fork; when the output port points to the external interface, the signal is used to modulate the system, and then the second harmonic is demodulated by the phase-locked amplifier, and the system is in a working mode of measuring gas concentration; when the output port is connected to one end of the quartz tuning fork, the phase-locked amplifier demodulates the first harmonic, and the system switches to a working mode of detecting the resonant frequency of the quartz tuning fork;

[0024] The input port of the signal conditioning circuit has two options: one is an external interface, which directly receives the photoacoustic signal in the form of voltage; the other is the output signal of the quartz tuning fork signal amplifier, which is specifically used to demodulate the photoacoustic signal of the system;

[0025] The signal selection of the quartz tuning fork interface is divided into two situations: one is grounding. Before demodulating the quartz tuning fork signal, the interface at one end of the quartz tuning fork is grounded; the other is connected to the output signal of the composite signal generator. Before detecting the resonant frequency of the quartz tuning fork, the interface at one end of the quartz tuning fork is connected to the output signal of the composite signal generator.

[0026] The clock signal generation process in the reference clock generation circuit is as follows: a direct frequency synthesizer generates a sine wave signal with a specific frequency, the sine wave signal is then filtered by a bandpass filter, and an appropriate DC bias is added through a pull-up resistor; then, the sine wave signal is sent to a comparator, and converted into a square wave signal, which is used as a reference clock signal A;

[0027] The reference clock signal A generates two PWM waves through the timer of the main control chip: as clock B and clock C, they control the acquisition rate of ADC and the waveform of specific frequency generated by DAC respectively; the coordinated work of clock B and clock C ensures that the ADC acquisition signal has no phase shift, which is convenient for subsequent data processing to demodulate the second harmonic signal; the data collected by ADC is sent to the main control chip through the SPI interface, and the main control chip multiplies the received data with the internal sine table and cosine table respectively, and then accumulates them to obtain two data, recorded as data A and data B. After a period of accumulation, a group of data A and data B are formed, which are processed using a multiple sliding average filtering algorithm, and finally the arithmetic square root of the sum of the squares of data A and data B is calculated to obtain a group of data C. Data C is the signal amplitude demodulated by the phase-locked amplifier, that is, the second harmonic amplitude of the photoacoustic signal, and data C is sent to the host computer through the serial port.

[0028] The composite signal generation process in the composite signal generator circuit is as follows: the square wave signal generated by the main control chip is directly changed by modifying the content of the square wave table, and connected to the follower to improve the load capacity, so as to directly obtain the square wave signal required by the system; the sinusoidal signal generated by the main control chip is used as the external DAC reference signal after passing through the filter, and a new sinusoidal signal of the same frequency with controllable amplitude is obtained by writing the external DAC parameters, and the signal is used as the modulation signal required by the system;

[0029] At the same time, the main control chip regularly sends sawtooth wave table data to the external DAC, allowing the external DAC to generate a low-frequency sawtooth wave signal with controllable amplitude and frequency, which is used as the scanning signal required by the system; the modulation signal is combined with the scanning signal to generate a composite signal.

[0030] The method of combining the modulation signal with the scanning signal is as follows: first, the DC bias in the modulation signal is filtered out by a capacitor of appropriate size, and then the required DC bias is added by a pull-up resistor, and the source of the pull-up level is the low-frequency scanning signal. In this way, the low-frequency scanning signal and the modulation signal without DC bias can be simply added to realize a function similar to that of an adder, and finally a composite signal is generated.

[0031] In summary, the composite signal generator can generate signals with the following characteristics: 1. A square wave signal with controllable frequency and high and low levels, which is used for the intensity modulation of the system; 2. A composite signal composed of a low-frequency sawtooth wave signal with controllable frequency, high and low levels and a high-frequency sine wave signal with controllable frequency and amplitude, which is used for the wavelength modulation of the system. The design of this composite signal generator not only improves the accuracy and flexibility of the signal, but also meets the system's needs for complex modulation signals.

[0032] Compared with the prior art, the present invention has the following advantages:

[0033] 1. The present invention can generate composite signals and square wave signals suitable for the QEPAS system, thereby effectively replacing the traditional commercial function signal generator. In addition, the circuit device of the present invention exhibits excellent performance in signal demodulation, achieving a noise level of 3uV and a resolution of 3uV, which is sufficient to replace the application of commercial lock-and-release devices in the system.

[0034] 2. The present invention proposes solutions to the three major challenges faced by traditional transimpedance amplifiers when amplifying quartz tuning fork signals: First, it solves the problem that traditional transimpedance amplifiers are difficult to achieve wide bandwidth and high current-voltage gain at the same time, and thus have poor effects when amplifying high-frequency and weak quartz tuning fork signals. Secondly, it overcomes the problem that high gain-bandwidth product operational amplifiers are prone to drowning quartz tuning fork signals in noise due to large offset voltage and bias current. Finally, the present invention also solves the problem that most transimpedance amplifier circuit boards are only suitable for laboratory environments, and their ability to amplify weak signals is limited outdoors, especially under strong electromagnetic interference conditions.

[0035] 3. Aiming at the defects of the current QEPAS system, such as the bulky size, heavy weight and high power consumption of the phase-locked amplifier, composite signal generator and pre-transimpedance amplifier, the present invention successfully integrates these three key components through a highly integrated design, thus achieving miniaturization and low power consumption design. The size is reduced to 5cm*8cm and the power consumption is as low as 350mW, which greatly improves the portability of the system and the convenience of field detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1The main control chip and its peripheral circuit of the present invention, the main control chip is a STM32L431RCT6 low-power single-chip microcomputer;

[0037] Figure 2 It is a power supply circuit diagram of the digital module and part of the analog module of the present invention;

[0038] Figure 3 The system clock and frequency division circuit of the present invention;

[0039] Figure 4 A reference clock generating circuit of the present invention;

[0040] Figure 5 The quartz tuning fork signal amplifier and power supply circuit diagram of the present invention;

[0041] Figure 6 is a circuit diagram of a composite signal generator of the present invention;

[0042] Figure 7 A circuit diagram for generating an ultra-low noise reference voltage of the present invention;

[0043] Figure 8 It is a signal conditioning circuit and ADC acquisition circuit diagram of the present invention;

[0044] Fig. 9 is a circuit diagram of an analog switch of the present invention;

[0045] Fig.10 It is a physical diagram of the present invention;

[0046] Fig.11 It is the general principle diagram of the present invention;

[0047] Fig.12 Photoacoustic signal diagram of water vapor measured by the QEPAS system demodulated by SR830, signal amplitude: 7.8313*10 -5 V, noise: 2.2932*10 -6 V,SNR:34.15;

[0048] Fig.13 This is the photoacoustic signal diagram of the same concentration of water vapor measured by the demodulated QEPAS system of the present invention, with an SNR of 31.26, which is 91.5% of that of SR830. DETAILED DESCRIPTION

[0049] In order to gain a deeper understanding of the present invention, we will provide a comprehensive and detailed description of the present invention. However, the present invention has multiple implementations and is not limited to the specific examples listed herein. The presentation of these examples is intended to deepen the comprehensive understanding of the disclosure of the present invention.

[0050] A circuit device for a photoacoustic system, the circuit device includes a phase-locked amplifier module, a composite signal generator module, a quartz tuning fork signal amplifier module, a signal channel conversion module, and a host computer. The overall schematic diagram is shown in the attached figure. Fig.11 shown.

[0051] The lock-in amplifier module includes a main control chip circuit, a power supply circuit of a digital module and some analog modules, a system clock and frequency division circuit, a reference clock generation circuit, an ultra-low noise reference voltage generation circuit, a signal conditioning circuit and an ADC acquisition circuit;

[0052] The composite signal generator module includes a main control chip circuit, a power supply circuit for a digital module and some analog modules, a system clock and frequency division circuit, a reference clock generation circuit, and a composite signal generator circuit;

[0053] The quartz tuning fork signal amplifier module includes a quartz tuning fork signal amplifier and a power supply circuit;

[0054] The signal channel conversion module includes an analog switch circuit.

[0055] The main control chip circuit is a STM32L431RCT6 low-power single-chip microcomputer and a peripheral circuit; the STM32L431RCT6 low-power single-chip microcomputer has a timer; as shown in the attached Figure 1 As shown. The PB6 and PB7 pins of the STM32 microcontroller are the TX and RX of the serial port, which are responsible for transmitting data with the host computer. Resistor R11 is a pull-down resistor, which pulls down the level of the PH3 / BOOT0 pin of the STM32 microcontroller and is used to set the startup mode of the STM32 microcontroller. Magnetic beads L2, capacitor C25, and capacitor E1 are used for filtering to provide a stable analog reference voltage to the VDDA pin of the STM32 microcontroller. Capacitors C28, C29, C30, and C31 are filter capacitors, which provide stable power supply voltages to pins 19, 32, 48, and 64 of the STM32 microcontroller, respectively. Resistor R14 connects the analog ground and the digital ground, effectively reducing the noise from the digital ground from entering the analog ground and protecting the stability of the analog ground.

[0056] The power supply circuit of the digital module and some analog modules is a low-dropout linear regulator (LDO), which has the characteristics of low output ripple, high power supply rejection ratio and low noise, ensuring the stability and accuracy of the circuit; Figure 2As shown. U7 is an LDO, and pin 5 outputs a stable 2.5V voltage, which is used as the power supply for the ADC. U8 is an LDO, and pin 5 outputs a stable 1.5V voltage, which is used as the reference voltage for the reference clock generation circuit. U6 is an LDO, and pin 5 outputs a stable 3.3V voltage, which is used as the power supply for the analog circuit. U10 is an LDO, and pin 5 outputs a stable 3.3V voltage, which is used as the power supply for the digital circuit. The digital circuit and the analog circuit are powered separately to prevent the noise of the digital circuit from coupling into the noise-sensitive analog circuit, ensuring that the analog circuit works accurately and stably.

[0057] The system clock and frequency division circuit are high-frequency active crystal oscillators that generate system clocks. This clock not only serves as a reference for the reference clock generation circuit, but also generates a lower-frequency clock signal through the frequency division circuit for use by the main control chip. In addition, an impedance matching design is implemented on the transmission path of the high-frequency clock signal to avoid signal distortion and performance degradation during the transmission of the high-frequency signal; as shown in the attached Figure 3 As shown. X1 is a high-frequency active crystal oscillator, and pin 3 outputs a 64M high-frequency system clock signal. Resistors R1, R4, R5, and R6 are impedance matching resistors to ensure the stability of the high-frequency clock signal. U3 and U4 are D flip-flops that form a frequency division circuit. The system clock generates a lower frequency clock signal through R4, U3, and U4, which is connected to pin 5 of the STM32 microcontroller as the clock of the microcontroller. At the same time, the system clock is connected to pin 8 of U5 in the reference clock generation circuit through R1 and used as a clock reference.

[0058] The ultra-low noise reference voltage generation circuit is composed of a reference voltage source and a low-pass filter with a very low cut-off frequency. Figure 7As shown in the figure, the ultra-low noise reference voltage generated by the reference voltage source provides a voltage reference for the composite signal generator circuit, signal conditioning circuit and ADC acquisition circuit after processing; the reference voltage source can generate an ultra-low noise reference voltage, and the noise can be further reduced by a low-pass filter with a very low cutoff frequency. However, in the actual circuit design, the use of capacitors with very high capacitance may cause the operational amplifier to be unstable or even cause self-excitation. In order to solve this potential stability problem, a combination of isolation resistors and compensation capacitors is added to the circuit. This design can enhance the stability of the system. U20 is the reference voltage source, and pin 6 outputs an ultra-low noise reference voltage. Resistor R37 and capacitor C67 form a low-pass filter with a very low cutoff frequency, which can further reduce the noise of the reference voltage. Resistors R36, R38 and capacitors C65, C70 are isolation resistors and compensation capacitors, and together with U22, they form a follower to output an ultra-low noise reference voltage REF3V3. This voltage is connected to pin 1 of U21 in the ADC acquisition circuit as the reference voltage of the ADC. Similarly, reference voltages REFDAC and REF1V65 are generated and connected to pin 15 of U17 in the composite signal generator circuit and pin 3 of U24A in the signal conditioning circuit respectively.

[0059] The signal conditioning circuit and ADC acquisition circuit are divided into two parts: signal conditioning circuit and ADC acquisition circuit. Figure 8As shown in the figure, the signal conditioning circuit uses an instrumentation amplifier to amplify the tiny voltage signal to be measured by a suitable multiple, and adds a suitable DC bias to the voltage signal to be measured to prevent it from exceeding the ADC measurement range; the instrumentation amplifier has the advantages of low DC offset and low drift, high common mode rejection ratio, high input impedance and low noise, and can provide clear and accurate tiny signal amplification and processing. At the same time, the signal conditioning circuit is designed with a second-order active bandpass filter, which can effectively improve the signal-to-noise ratio of the signal to be measured. The ADC acquisition circuit is a high-precision, high-speed pseudo-differential input ADC, and the pseudo-differential signal connection method can reduce noise. In the pseudo-differential mode, the signal is connected to the positive end of the input, and the reference ground of the signal is connected to the negative end of the input. The pseudo-differential input reduces the impact caused by the difference between the signal source and the reference ground potential (ground loop current), which improves the measurement accuracy. The ADC uses the SPI protocol to transmit data, and the communication rate is fast. U13A, U13B and resistors and capacitors form a second-order active bandpass filter. The signal is input by C43, output by pin 7 of U13B, and then connected to pin 4 of U23. U23 is an instrumentation amplifier, responsible for amplifying the input signal. U24A constitutes an inverting amplifier circuit, and U24B constitutes a second-order active low-pass filter. The amplified and filtered signal is connected to pin 3 of U21 and sampled by the DAC. U21 is an ADC, and its pin 6 is connected to PA11 of the main control chip STM32 microcontroller, and the sampling is controlled by the microcontroller; pin 7 is connected to PB15 of the main control chip STM32 microcontroller to transmit data to the microcontroller; pin 8 is connected to pin 1 of U9 in the reference clock generation circuit.

[0060] The reference clock generation circuit is composed of a direct frequency synthesizer (DDS), a bandpass filter and a comparator; the DDS is used to generate a sine wave signal with a specific frequency. This sine wave signal is then filtered by a designed bandpass filter and an appropriate DC bias is added through a pull-up resistor. After this processing, the signal is sent to the comparator, which converts it into a square wave signal, which is used as the reference clock signal. Figure 4 As shown. U5 is a DDS, and its pins 13, 14, and 15 are connected to the PC2, PC0, and PC1 pins of the main control chip STM32 microcontroller respectively. The microcontroller sends data to the DDS in SPI mode through these three lines. The signal generated by the DDS is output from pin 20, and after filtering and other processing, it is sent to the comparator U9. The final reference clock signal is output from pin 1 of U9, which is connected to PA0 and PB13 of the main control chip STM32 microcontroller, and is also connected to pin 8 of U21.

[0061] The clock signal generation process in the reference clock generation circuit is as follows: a direct frequency synthesizer generates a sine wave signal with a specific frequency, the sine wave signal is then filtered by a bandpass filter, and an appropriate DC bias is added through a pull-up resistor; then, the sine wave signal is sent to a comparator, and converted into a square wave signal, which is used as a reference clock signal A;

[0062] The reference clock signal A generates two PWM waves through the timer of the main control chip: as clock B and clock C, they control the acquisition rate of ADC and the waveform of specific frequency generated by DAC respectively; the coordinated work of clock B and clock C ensures that the ADC acquisition signal has no phase shift, which is convenient for subsequent data processing to demodulate the second harmonic signal; the data collected by ADC is sent to the main control chip through the SPI interface, and the main control chip multiplies the received data with the internal sine table and cosine table respectively, and then accumulates them to obtain two data, recorded as data A and data B. After a period of accumulation, a group of data A and data B are formed, which are processed using a multiple sliding average filtering algorithm, and finally the arithmetic square root of the sum of the squares of data A and data B is calculated to obtain a group of data C. Data C is the signal amplitude demodulated by the phase-locked amplifier, that is, the second harmonic amplitude of the photoacoustic signal, and data C is sent to the host computer through the serial port.

[0063] Clock C is configured as the clock source of the direct memory access (DMA) on the main control chip to control the transfer rate of DMA. DMA is responsible for transferring the sine wave table and square wave table data stored in the memory to the digital-to-analog converter (DAC) of the main control chip. By accurately controlling the frequency of clock C, sine wave and square wave signals with controllable frequencies can be generated, and the frequency range of these signals is wide, which is particularly suitable for the generation of medium and high frequency composite signals required by the QEPAS system. Given that the QEPAS system has high requirements for signal frequency, in order to effectively reduce the processing burden of the main control chip DMA, a strategy of reducing the number of data points in the sine wave table needs to be adopted. However, this method will be accompanied by a problem that unnecessary high-frequency components will be mixed into the sine signal. To solve this problem, a fourth-order low-pass filter is designed, and the sine signal generated by the main control chip is input into this filter to filter out the high-frequency components. After this processing, a sine signal with undistorted waveform is finally obtained.

[0064] The composite signal generator circuit is composed of a high-precision external DAC and a follower; Figure 6As shown; U1A and U1B form a fourth-order low-pass filter, and the signal is input from one end of resistor R2, which is connected to the PA4 pin of the main control chip STM32 microcontroller. The sinusoidal signal generated by the microcontroller is output from resistor R7 after passing through the fourth-order low-pass filter, and then connected to pin 12 of U17 as a reference voltage. U17 is a DAC, and its pins 7, 8, and 9 are respectively connected to the PC4, PB0, and PC5 pins of the main control chip STM32 microcontroller. The microcontroller sends data to the DAC in SPI mode through these three lines to control the DAC to generate a composite signal. The generated composite signal is then connected to pin 10 of U18 in the analog switch circuit through a follower. U19B forms a follower, and the main control chip STM32 microcontroller outputs a square wave through the PA5 pin, which is connected to pin 6 of U18 after passing through the follower.

[0065] The composite signal generation process in the composite signal generator circuit is as follows: the square wave signal generated by the main control chip is directly changed by modifying the content of the square wave table, and connected to the follower to improve the load capacity, so as to directly obtain the square wave signal required by the system; the sinusoidal signal generated by the main control chip is used as the external DAC reference signal after passing through the filter, and a new sinusoidal signal of the same frequency with controllable amplitude is obtained by writing the external DAC parameters, and the signal is used as the modulation signal required by the system;

[0066] At the same time, the main control chip regularly sends sawtooth wave table data to the external DAC, allowing the external DAC to generate a low-frequency sawtooth wave signal with controllable amplitude and frequency, which is used as the scanning signal required by the system; the modulation signal is combined with the scanning signal to generate a composite signal.

[0067] The method of combining the modulation signal with the scanning signal is as follows: first, the DC bias in the modulation signal is filtered out by a capacitor of appropriate size, and then the required DC bias is added by a pull-up resistor, and the source of the pull-up level is the low-frequency scanning signal. In this way, the low-frequency scanning signal and the modulation signal without DC bias can be simply added to realize a function similar to that of an adder, and finally a composite signal is generated.

[0068] In summary, the composite signal generator can generate signals with the following characteristics: 1. A square wave signal with controllable frequency and high and low levels, which is used for the intensity modulation of the system; 2. A composite signal composed of a low-frequency sawtooth wave signal with controllable frequency, high and low levels and a high-frequency sine wave signal with controllable frequency and amplitude, which is used for the wavelength modulation of the system. The design of this composite signal generator not only improves the accuracy and flexibility of the signal, but also meets the system's needs for complex modulation signals.

[0069] The quartz tuning fork signal amplifier and power supply circuit is a quartz tuning fork signal amplifier and power supply circuit, as shown in the attached Figure 5As shown, the quartz tuning fork signal amplifier is a transimpedance amplifier, but a MOS tube is added to the feedback loop near the input end; at this time, the input impedance changes from the input impedance of the op amp to the gate impedance of the MOS tube of hundreds of MΩ, which greatly reduces the impact of the op amp offset voltage and bias current on the quartz tuning fork signal. At the same time, the huge input impedance and extremely small gate current of the MOS tube will hardly affect the tiny signal of the quartz tuning fork, ensuring the integrity of the signal. The op amp uses a high-speed operational amplifier, and the feedback resistor uses a large resistor of several MΩ, which makes the designed amplifier circuit have both the advantages of wide bandwidth and high current-to-voltage gain, which is very suitable for amplifying quartz tuning fork signals. The power supply circuit is an ultra-high power supply rejection ratio, ultra-low noise LDO power supply chip, which provides positive and negative voltages. The current signal generated by the quartz tuning fork sensor contains negative components, so the use of a positive and negative power supply system can ensure the integrity and accuracy of the signal during transmission. In contrast, if only a single power supply solution is used, in order to maintain the integrity of the signal, additional circuit components need to be greatly added, which not only increases the complexity of the system, but also may introduce additional noise interference, thereby affecting the signal quality. From this perspective, the use of positive and negative power supply can effectively reduce the overall signal noise level of the system. In addition, an anti-interference shielding cover is designed for the independently operated quartz tuning fork signal amplifier. The application of this shielding cover significantly improves the anti-interference ability of the amplifier, ensures its stable operation in complex electromagnetic environments, and further guarantees the clarity and reliability of signal transmission. Fig.10 As shown. JP4 is the interface of the quartz tuning fork sensor, and its pin 1 inputs the quartz tuning fork signal, and the pin 2 is connected to the pin 1 of U14 in the analog switch circuit. The analog switch circuit changes the state of the pin 2 of JP4. U16 is a MOS tube, and U15 is a high-speed operational amplifier. U16 and U15 are combined to form a quartz tuning fork signal amplifier. The amplified signal is output from the pin 1 of U15, and then connected to the pin 10 of U14 in the analog switch circuit. The analog switch circuit determines whether the amplified quartz tuning fork signal is input to the ADC acquisition circuit.

[0070] There are two analog switches in the analog switch circuit. An analog switch with low on-resistance is selected to prevent signal distortion. The first analog switch is responsible for selecting the output channel of the composite signal generator and is used to switch the output signal waveform and output port; the second analog switch is responsible for selecting the input channel of the signal conditioning circuit and is used to switch the input port of the signal conditioning circuit and select the signal of the interface at one end of the quartz tuning fork; as shown in the attached Fig. 9As shown; U14 is an analog switch, and its pin 13 and pin 7 are connected to the PC7 and PC9 pins of the main control chip STM32 microcontroller respectively, and the state of the analog switch is controlled by the microcontroller; pins 1 and 10 are connected to the JP4 pin 2 and the U15 pin 1 in the quartz tuning fork signal amplifier and power supply circuit respectively; pin 9 is connected to C43 in the signal conditioning circuit. U18 is an analog switch, and its pin 1 is connected to the PC8 pin of the main control chip STM32 microcontroller, and the state of the analog switch is controlled by the microcontroller; pins 10 and 6 are connected to the U19A pin 1 and the U19B pin 7 in the composite signal generator circuit respectively.

[0071] The output signal waveform includes a composite signal and a square wave signal generated by the composite signal generator circuit; the output port is divided into a direction facing the external interface and an interface direction connected to one end of the quartz tuning fork; when the output port points to the external interface, the signal is used to modulate the system, and then the second harmonic is demodulated by the phase-locked amplifier, and the system is in a working mode of measuring gas concentration; when the output port is connected to one end of the quartz tuning fork, the phase-locked amplifier demodulates the first harmonic, and the system switches to a working mode of detecting the resonant frequency of the quartz tuning fork;

[0072] The input port of the signal conditioning circuit has two options: one is an external interface, which directly receives the photoacoustic signal in the form of voltage; the other is the output signal of the quartz tuning fork signal amplifier, which is specifically used to demodulate the photoacoustic signal of the system;

[0073] The signal selection of the quartz tuning fork interface is divided into two situations: one is grounding. Before demodulating the quartz tuning fork signal, the interface at one end of the quartz tuning fork is grounded; the other is connected to the output signal of the composite signal generator. Before detecting the resonant frequency of the quartz tuning fork, the interface at one end of the quartz tuning fork is connected to the output signal of the composite signal generator.

[0074] The signal channel conversion module includes an analog switch circuit.

[0075] The analog switch circuit has two analog switches, the first analog switch is responsible for selecting the output channel of the composite signal generator, and is used to switch the output signal waveform and the output port; the second analog switch is responsible for selecting the input channel of the signal conditioning circuit, and is used to switch the input port of the signal conditioning circuit and select the signal of the interface at one end of the quartz tuning fork;

[0076] The output signal waveform includes a composite signal and a square wave signal generated by the composite signal generator circuit; the output port is divided into a direction facing the external interface and an interface direction connected to one end of the quartz tuning fork; when the output port points to the external interface, the signal is used to modulate the system, and then the second harmonic is demodulated by the phase-locked amplifier, and the system is in a working mode of measuring gas concentration; when the output port is connected to one end of the quartz tuning fork, the phase-locked amplifier demodulates the first harmonic, and the system switches to a working mode of detecting the resonant frequency of the quartz tuning fork;

[0077] The input port of the signal conditioning circuit has two options: one is an external interface, which directly receives the photoacoustic signal in the form of voltage; the other is the output signal of the quartz tuning fork signal amplifier, which is specifically used to demodulate the photoacoustic signal of the system;

[0078] The signal selection of the quartz tuning fork interface is divided into two situations: one is grounding. Before demodulating the quartz tuning fork signal, the interface at one end of the quartz tuning fork is grounded; the other is connected to the output signal of the composite signal generator. Before detecting the resonant frequency of the quartz tuning fork, the interface at one end of the quartz tuning fork is connected to the output signal of the composite signal generator.

[0079] Test plan: Use commercial lasers and temperature-controlled fluidics to build a QEPAS system, and use the system to measure the photoacoustic signal of water vapor in a confined space. Since the water vapor concentration in the confined space is stable, the photoacoustic signal obtained is also stable. First, use the SR830 lock-in amplifier of Stanford Company in the United States to demodulate the photoacoustic signal. The results are as follows: Fig.12 As shown, the second harmonic amplitude of the signal is 7.8313*10 -5 V, the noise is 2.2932*10 -6 V, SNR is 34.15. Then the same photoacoustic signal is demodulated using the circuit of the present invention, and the result is as follows Fig.13 From the figure, we can see that the second harmonic amplitude of the signal is 8.13*10 -5 V, the noise is 2.6*10 -6 V, SNR is 31.26, and its SNR can reach 91.5% of SR830.

[0080] The contents not described in detail in the specification of the present invention belong to the prior art known to the professional and technical personnel in the field. Although the illustrative specific embodiments of the present invention are described above to facilitate the understanding of the present invention by the technical personnel in the field, it should be clear that the present invention is not limited to the scope of the specific embodiments. For the ordinary technical personnel in the field, as long as various changes are within the spirit and scope of the present invention defined and determined by the attached claims, these changes are obvious, and all inventions and creations using the concept of the present invention are protected.

Claims

1. A circuit device for a photoacoustic system, characterized in that: The circuit device includes a phase-locked amplifier module, a composite signal generator module, a quartz tuning fork signal amplifier module, a signal channel conversion module, and a host computer; The lock-in amplifier module includes a main control chip circuit, a power supply circuit of a digital module and some analog modules, a system clock and frequency division circuit, a reference clock generation circuit, an ultra-low noise reference voltage generation circuit, a signal conditioning circuit and an ADC acquisition circuit; The composite signal generator module includes a main control chip circuit, a power supply circuit for a digital module and some analog modules, a system clock and frequency division circuit, a reference clock generation circuit, and a composite signal generator circuit; The quartz tuning fork signal amplifier module includes a quartz tuning fork signal amplifier and a power supply circuit; The signal channel conversion module includes an analog switch circuit.

2. A circuit device for a photoacoustic system according to claim 1, characterized in that: The main control chip circuit is a STM32L431RCT6 low-power single-chip microcomputer and a peripheral circuit; the STM32L431RCT6 low-power single-chip microcomputer has a timer; The power supply circuit of the digital module and some analog modules is a low voltage drop linear regulator; The system clock and frequency division circuit are high-frequency active crystal oscillators that generate system clocks; The reference clock generation circuit is composed of a direct frequency synthesizer, a bandpass filter and a comparator; The quartz tuning fork signal amplifier and power supply circuit are quartz tuning fork signal amplifier and power supply circuit; the quartz tuning fork signal amplifier is a transimpedance amplifier, but a MOS tube is added to the feedback loop near the input end; the power supply circuit is an ultra-high power supply rejection ratio, ultra-low noise LDO power supply chip, providing positive and negative voltages; The composite signal generator circuit is composed of a high-precision external DAC and a follower; The ultra-low noise reference voltage generation circuit is composed of a reference voltage source and a low-pass filter; the ultra-low noise reference voltage generated by the reference voltage source provides a voltage reference for the composite signal generator circuit, the signal conditioning circuit and the ADC acquisition circuit; The signal conditioning circuit and the ADC acquisition circuit are divided into two parts: the signal conditioning circuit and the ADC acquisition circuit; the signal conditioning circuit uses an instrument amplifier to amplify the tiny voltage signal to be measured by a suitable multiple, and adds a suitable DC bias to the voltage signal to be measured to prevent it from exceeding the ADC measurement range; The ADC acquisition circuit is a pseudo differential input ADC, which uses the SPI protocol to transmit data.

3. A circuit device for a photoacoustic system according to claim 2, characterized in that: Adding isolation resistors and compensation capacitors to the ultra-low noise reference voltage generation circuit enhances the stability of the system; Design an anti-interference shielding cover for the quartz tuning fork signal amplifier to ensure its stable operation in a complex electromagnetic environment; The signal conditioning circuit is designed with a second-order active bandpass filter to improve the signal-to-noise ratio of the signal to be measured; The composite signal generator module is designed with a fourth-order low-pass filter, and the sinusoidal signal generated by the main control chip is input into the filter to filter out the high-frequency components therein.

4. A circuit device for a photoacoustic system according to claim 3, characterized in that: The analog switch circuit has two analog switches, the first analog switch is responsible for selecting the output channel of the composite signal generator, and is used to switch the output signal waveform and the output port; the second analog switch is responsible for selecting the input channel of the signal conditioning circuit, and is used to switch the input port of the signal conditioning circuit and select the signal of the interface at one end of the quartz tuning fork; The output signal waveform includes a composite signal and a square wave signal generated by the composite signal generator circuit; the output port is divided into a direction facing the external interface and an interface direction connected to one end of the quartz tuning fork; when the output port points to the external interface, the signal is used to modulate the system, and then the second harmonic is demodulated by the phase-locked amplifier, and the system is in a working mode of measuring gas concentration; when the output port is connected to one end of the quartz tuning fork, the phase-locked amplifier demodulates the first harmonic, and the system switches to a working mode of detecting the resonant frequency of the quartz tuning fork; The input port of the signal conditioning circuit has two options: one is an external interface, which directly receives the photoacoustic signal in the form of voltage; the other is the output signal of the quartz tuning fork signal amplifier, which is specifically used to demodulate the photoacoustic signal of the system; The signal selection of the quartz tuning fork interface is divided into two situations: one is grounding. Before demodulating the quartz tuning fork signal, the interface at one end of the quartz tuning fork is grounded; the other is connected to the output signal of the composite signal generator. Before detecting the resonant frequency of the quartz tuning fork, the interface at one end of the quartz tuning fork is connected to the output signal of the composite signal generator.

5. A circuit device for a photoacoustic system according to claim 4, characterized in that: The clock signal generation process in the reference clock generation circuit is as follows: a direct frequency synthesizer generates a sine wave signal with a specific frequency, the sine wave signal is then filtered by a bandpass filter, and an appropriate DC bias is added through a pull-up resistor; then, the sine wave signal is sent to a comparator, and converted into a square wave signal, which is used as a reference clock signal A; The reference clock signal A generates two PWM waves through the timer of the main control chip: as clock B and clock C, they control the acquisition rate of the ADC and the waveform of the specific frequency generated by the DAC respectively; the coordinated work of clock B and clock C ensures that there is no phase shift in the ADC acquisition signal; The data collected by ADC is sent to the main control chip via the SPI interface. The main control chip multiplies the received data with the internal sine table and cosine table respectively and then performs accumulation operations to obtain two data, recorded as data A and data B. After a period of accumulation, a group of data A and data B are formed, which are processed using a multiple sliding average filtering algorithm. Finally, the arithmetic square root of the sum of the squares of data A and data B is calculated to obtain a group of data C. Data C is the signal amplitude demodulated by the phase-locked amplifier, that is, the second harmonic amplitude of the photoacoustic signal. Data C is sent to the host computer through the serial port.

6. A circuit device for a photoacoustic system according to claim 5, characterized in that: The composite signal generation process in the composite signal generator circuit is as follows: the square wave signal generated by the main control chip is directly changed by modifying the content of the square wave table, and the square wave signal is connected to the follower to improve the load capacity, so as to obtain the square wave signal required by the system; the sinusoidal signal generated by the main control chip is used as the external DAC reference signal after passing through the filter, and the same-frequency sinusoidal signal with controllable amplitude is obtained by writing the external DAC parameters, and the signal is used as the modulation signal required by the system; At the same time, the main control chip regularly sends sawtooth wave table data to the external DAC, allowing the external DAC to generate a low-frequency sawtooth wave signal with controllable amplitude and frequency, which is used as the scanning signal required by the system; the modulation signal is combined with the scanning signal to generate a composite signal.

7. A circuit device for a photoacoustic system according to claim 6, characterized in that: The method for combining the modulation signal with the scanning signal is: firstly, the DC bias in the modulation signal is filtered out by a capacitor of appropriate size, and then the required DC bias is increased by a pull-up resistor, and the source of the pull-up level is the low-frequency scanning signal.

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