A multi-channel high-precision PET circuit acquisition system and a use method thereof

Abstract

The application relates to the field of positron emission tomography technology, in particular to a multi-channel high-precision PET circuit acquisition system and a use method thereof, and the system comprises the following: an FPGA control board, which is used for controlling bias voltage programming output voltage values, controlling current programming output voltage values and current values according to DAC bias voltage values received from an upper computer, and sending DUT board configuration information received from the upper computer to a DUT board; and the DUT board, which comprises multi-channel high-precision PET circuits, each circuit is configured through an SPI protocol according to DUT board configuration information received from the upper computer, 16 channels are adopted to collect time electric signal information output by a PET detector, and 64 channels are adopted to collect energy electric signal information output by the PET detector. In the application, the multi-channel high-precision PET circuit acquisition software and the hardware of the control system are portable, the upper computer software program is programmable, and the operation is simple.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of positron emission tomography (PET) technology, and particularly relates to a multi-channel high-precision PET circuit acquisition system and a use method thereof. BACKGROUND

[0002] PET is one of the most advanced large-scale medical diagnostic imaging technologies today. A PET device includes a PET detector and a readout circuit. The PET detector includes a crystal array, a photoelectric conversion array or a silicon photomultiplier. The principle of PET imaging is that a living body located in a ring-shaped PET detector and injected with a visualizing agent will produce a positron due to the decay of a tracer, and the positron and a negative electron annihilate to emit two pairs of gamma rays moving in opposite directions at 180°. The crystals in the crystal array convert the received gamma rays into photons, and then the photons are converted into electrical signals by the photoelectric conversion array. The readout circuit acquires the pulse time and pulse amplitude of the electrical signals to generate corresponding time and energy signals, respectively, to determine the specific position in the crystal array where the received gamma rays occur and the photon energy, and further estimate the general position of positron annihilation and the image. Through the acquisition and analysis of a large amount of data, PET image reconstruction is realized, and a positron emission tomography image is formed.

[0003] A silicon photomultiplier (SiPM) array converts the gamma ray photon signals collected in lutetium-yttrium oxyorthosilicate scintillation single crystals (LYSO) into electrical signals, and simultaneously performs data acquisition through a multi-channel high-precision PET circuit to convert the electrical signals into energy and time signals. After the FPGA acquires 64 channels of energy and time signals, data transmission is performed through a JTAG communication protocol, and a host computer display is realized, and then the general position of positron annihilation is estimated.

[0004] The multi-channel high-precision PET circuit is a core component of a PET device and an imaging system, and its performance is directly related to the performance of the system. Building an effective multi-channel high-precision PET circuit acquisition system is a prerequisite for accurately evaluating the PET circuit, which has very important guiding significance for the designers and users of the PET circuit.

[0005] Compared with the traditional PET circuit signal acquisition and measurement, the multi-channel high-precision PET circuit has more channels, more complex functions and higher precision. The acquisition system requires higher acquisition efficiency and accuracy. The traditional PET circuit acquisition system cannot meet the system-level test verification and the personalized needs of user human-computer interaction. SUMMARY

[0006] In order to accurately evaluate the multi-channel high-precision PET circuit, the application provides a multi-channel high-precision PET circuit acquisition system for processing the electrical signals output by the PET detector, which comprises a host computer and a main control board, the main control board comprises an FPGA control board, a DUT board, a bias programming control, a current programming control, an energy acquisition module and a level conversion, wherein:

[0007] The host computer is configured to configure the bias value of the bias programming control, the current value of the current programming control and the SPI channel configuration of the DUT board circuit through the FPGA control board, and collect the data acquired by the DUT board through the FPGA control board;

[0008] The FPGA control board is configured to control the output voltage value of the bias programming control, the output voltage value and the current value of the current programming control according to the DAC bias value received from the host computer, and send the DUT board configuration information received from the host computer to the DUT board;

[0009] The bias programming control is configured to provide 6-way bias control for the DUT board according to the configuration information;

[0010] The current programming control is configured to provide 3-way current source control for the DUT board according to the configuration information;

[0011] The energy acquisition module is configured to perform analog-to-digital conversion on the energy information acquired by the DUT board, and send the converted information to the host computer through the FPGA control board;

[0012] The DUT board comprises a plurality of high-precision PET circuits, each circuit is configured according to the DUT board configuration information received from the host computer through SPI protocol, and 16 channels are used to acquire the time electrical signal information output by the PET detector and 64 channels are used to acquire the energy electrical signal information output by the PET detector.

[0013] The application collects and controls the data of the core part of the PET device and the imaging system, that is, the multi-channel high-precision PET circuit, in order to accurately evaluate the multi-channel high-precision PET circuit, a multi-channel high-precision PET circuit acquisition system is built, and a control method of the multi-channel high-precision PET circuit acquisition system is provided. The man-machine interface of register configuration, data acquisition and processing is independently developed by using the upper computer VB software. The bias voltage programming system is developed by selecting 16-bit 16-channel DAC; the energy acquisition system is developed by selecting 4 pieces of 16-bit 16-channel ADC; and the current programming system is developed by using the above two systems in the way of pulling the canister current. Compared with the prior art, the application has the following beneficial effects:

[0014] 1. The multi-channel high-precision PET circuit acquisition system has the advantages of low cost, simple operation, fast data acquisition, high precision and the like;

[0015] 2. The application adopts the SPI configuration of the USB to URAT communication protocol, the PC upper computer can realize real-time man-machine delivery, and the PET circuit can be effectively read and written in the full-channel register and single-channel register, so as to reduce the system noise generated during configuration, reduce the error code and random code generated by external interference during circuit SPI configuration, improve the efficiency and accuracy of SPI register batch configuration, quickly realize the debugging of different working modes of the PET circuit, and have better signal quality;

[0016] 3. The application develops a multi-channel high-precision PET circuit bias voltage and current control, data acquisition and processing system, which is fully visualized and has the ability of online acquisition, monitoring and testing of the PET circuit signal, and has real-time analysis of the position and energy of the gamma ray generated in the crystal;

[0017] 4. The application develops a bias voltage programming system, an energy acquisition system and a current programming system, and the system control and acquisition precision is high, the voltage control and acquisition can reach the uV level, and the current can reach the uA level;

[0018] The acquisition software and control system software of the multi-channel high-precision PET circuit of the upper computer in the application are independently developed, which ensures the accuracy of the multi-channel high-precision PET circuit test and signal acquisition, the hardware is portable, the program is programmable, and the complete localization is realized. The application provides another implementation method and path for the circuit analysis of large medical diagnostic PET imaging technology. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 The application provides a system block diagram of a multi-channel high-precision PET circuit acquisition system for the embodiment 1;

[0020] Figure 2The application provides a register configuration software of a multi-channel high-precision PET circuit acquisition system for the embodiment 1 of the application;

[0021] Figure 3 The application provides a bias current control and data acquisition processing software of a multi-channel high-precision PET circuit acquisition system for the embodiment 1 of the application;

[0022] Figure 4 The application provides an energy acquisition of a multi-channel high-precision PET circuit acquisition system for the embodiment 1 of the application;

[0023] Figure 5 The application provides a bias programming of a multi-channel high-precision PET circuit acquisition system for the embodiment 1 of the application;

[0024] Figure 6 The application provides a current programming of a multi-channel high-precision PET circuit acquisition system for the embodiment 1 of the application;

[0025] Figure 7 The application provides a flow chart of a multi-channel high-precision PET circuit acquisition system for the embodiment 1 of the application. DETAILED DESCRIPTION

[0026] The technical solutions in the embodiments of the application will be described clearly and completely below with reference to the drawings in the embodiments of the application. Obviously, the described embodiments are only part of the embodiments of the application, rather than all the embodiments of the application. Based on the embodiments in the application, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the application.

[0027] The application provides a multi-channel high-precision PET circuit acquisition system for processing electrical signals output by a PET detector, which comprises a host computer and a main control board, and the main control board comprises an FPGA control board, a DUT board, a bias programming, a current programming, and an energy acquisition module, wherein:

[0028] The host computer is configured to configure a bias value of the bias programming, a current value of the current programming, and an SPI channel configuration of the DUT board circuit through the FPGA control board, and collect data acquired by the DUT board through the FPGA control board;

[0029] The FPGA control board is configured to control a voltage value output by the bias programming, control a voltage value and a current value output by the current programming according to a DAC bias value received from the host computer, and send DUT board configuration information received from the host computer to the DUT board;

[0030] The bias programming is configured to provide 6-way bias control for the DUT board according to the configuration information;

[0031] Current process control, for providing 3-way current source control for the DUT board according to configuration information;

[0032] Energy collection module, for analog-digital conversion of energy information collected by the DUT board, and sending the converted information to the host computer through the FPGA control board;

[0033] The DUT board includes multiple high-precision PET circuits, each of which is configured according to DUT board configuration information received from the host computer through SPI protocol, and 16 channels are used to collect time electrical signal information output by the PET detector, and 64 channels are used to collect energy electrical signal information output by the PET detector.

[0034] As Figure 1 In the embodiment, a multi-channel high-precision PET circuit collection system includes a PC host computer, a power supply, a LYSO+SiPM detector, a main control board, and the main control board further includes a level conversion, a DUT board, a bias program control, an energy collection, a current process control, an FPGA control board, and a PC host computer.

[0035] The PC host computer is used for bias and current control, data acquisition and processing, and register configuration.

[0036] The power supply is used to provide high-voltage power supply for the LYSO+SiPM detector and power supply for the main control board.

[0037] The main control board is used for bias and current control, register configuration, simultaneous collection of 64-channel energy and time signals, data transmission through JTAG communication protocol, and host computer display.

[0038] The level conversion is used to power the main control board, the PET circuit of the DUT board, and the FPGA control board.

[0039] The DUT board is used to place the multi-channel high-precision PET circuit, which is fixed by a clamp for easy multiple taking and placing, and the electrical signal of the PET detector (LYSO+SiPM detector) is collected for time and energy, and 16 channels and 64 channels are used for output respectively. At the same time, the collected energy is output to the energy collection module through 64 channels, and the collected time TDC is transmitted to the FPGA.

[0040] The bias program control is used to provide 6-way bias control for the multi-channel high-precision PET circuit in the DUT board.

[0041] The energy collection is used to analog-digital convert the energy collected by the multi-channel high-precision PET circuit, and output the converted digital signal to the FPGA.

[0042] Current process control, for providing 3-way current source control for multi-channel high-precision PET circuit in DUT board, realized by means of load resistor R pulling tank current;

[0043] FPGA control board, for realizing collection of energy and time signals, control of timing, configuration of registers, and communication with the upper computer;The FPGA control board further comprises a crystal oscillator, a Nor Flash, an FPGA, and a JTAG, wherein the crystal oscillator is used to provide a 50MHz clock signal for the FPGA;The Nor Flash is used to perform SPI initialization configuration for the PET circuit through the FPGA after power-on;The JTAG is used to convert the collected signals through the JTAG communication protocol, and transmit the converted signals to the upper computer, which collects and processes the returned signals and displays them.

[0044] In the embodiment, the USB-to-URAT communication protocol is used for SPI configuration, and a man-machine interface for register configuration is developed by VB software on the PC, so that effective read and write operations can be performed on all registers and single-channel registers of the PET circuit, and the SPI configuration file can be imported in batches to the FPGA control board, and the FPGA control board can perform batch configuration on the registers in the PET circuit, so that the PET circuit can be quickly debugged in different working modes, and individual configuration and control are facilitated.

[0045] Similarly, in the embodiment, the PC upper computer independently develops a data acquisition and processing system through VB software, can control the bias and current of the PET circuit, and can perform batch data output and save through setting the time TDC and energy Energy data acquisition and processing mode of the PET circuit.

[0046] In the present application, LYSO crystal array and SiPM array optical coupling agent are coupled to each other to form a PET detector, the LYSO crystal array is used to contact and interact with gamma photons, and part or all of the energy of the high-energy gamma photons is deposited in the crystal, and the crystal is excited by the high-energy gamma photons and releases the excess energy in the form of visible light and other low-energy forms, and the SiPM array is used to convert the received visible light photons into electrical signals through a photoelectric conversion array.

[0047] The bias program control system selects a 16-bit 16-channel output AD5360BSTZ (hereinafter referred to as DAC) as a core to develop a bias program control system, provides a driving voltage for the PET circuit analog input end, and also provides a high-power voltage output and two high-precision voltage outputs.

[0048] The energy collection module selects four 16-bit 16-channel AD7616BSTZ (hereinafter referred to as ADC) to perform digital-to-analog conversion on the high-precision 64-channel PET circuit, and the FPGA calculates the energy output by the PET circuit by sampling the code value output by the ADC.

[0049] The current program control system selects the above-mentioned energy collection system and bias program control system, and the analog output port of the multi-channel high-precision PET circuit is connected to the energy collection system and the resistor R. The ADC in the energy collection system performs analog-to-digital conversion on the collected analog signal VIN (energy) to generate a corresponding digital signal CODE. The FPGA calculates the code value of the DAC bias program control according to the current value set by the upper computer and the received digital signal CODE, and transmits the code value to the DAC of the bias program control system, so as to obtain different bias voltages. The bias program control system outputs the output bias voltage to the one end VREF of the resistor R and the analog input port of the PET circuit.

[0050] Next, the multi-channel high-precision PET circuit collection system and the use method thereof according to the present application are further described in several embodiments in the present embodiment.

[0051] Embodiment 1

[0052] As shown in Figure 1 A multi-channel high-precision PET circuit collection system and a control method thereof, comprising a PC upper computer, a power supply, a LYSO+SiPM detector, and a main control board. The main control board further comprises a FPGA control board, a bias program control, a DUT board, an energy collection, and a level conversion, wherein:

[0053] The PC host computer includes bias and current control, data acquisition and processing, and register configuration. The bias and current control is used for putting the required DAC bias value in the DUT board into the bias register of the FPGA through the UART communication protocol. The data acquisition and processing is used for collecting and processing data through the JTAG interface with the FPGA and then displaying, so as to obtain the 64-channel time TDC and energy Energy data collected by the PET circuit. The register configuration is used for transmitting the generated circuit register configuration file to the UART-to-SPI module in the FPGA control board through the UART communication protocol, and the UART-to-SPI module converts the UART data into SPI data; the converted SPI data is used for SPI configuration of the multi-channel high-precision PET imaging circuit in the DUT board, and the working mode of different channels of the circuit is started. The URAT control end adopts the CP2102 circuit to realize USB-to-URAT, and is connected and communicated with the FPGA interface through the Dupont wire.

[0054] The power supply is used for providing high-voltage power supply for the LYSO+SiPM detector, and the IT6332B type multifunctional three-way power supply is selected, with a maximum output voltage of 30V and a maximum output current of 6A. The 28V is selected to supply power to the SiPM detector, and the 5V is selected to supply power to the main control board.

[0055] The LYSO+SiPM detector is coupled by the silicon oil or the silicon grease and other optical coupling agents in the PET system, and the scintillation crystal array LYSO and the photoelectric conversion device SiPM are coupled to form the PET detector. After the annihilation of the positron in the biological body, two gamma photons are generated, the scintillation crystal array first contacts and interacts with the gamma photons (including the Compton effect and the photoelectric effect), and the high-energy gamma photons are partially or completely deposited in the crystal. The electrons excited by the high-energy gamma photons in the crystal are converted from the ground state to the excited state, and finally return to the ground state from the excited state, and the excess energy is released in the form of visible light and other low-energy forms. The LYSO emits light with multiple wavelengths, and the number of photons of different wavelengths is also different. The emission spectrum of the LYSO refers to the distribution law between the number of photons emitted by the crystal and the wavelength, and the spectral characteristics of different scintillation crystals are different. The PET circuit imaging system requires that the emission spectrum peak of the LYSO can match the spectral response peak of the photoelectric device SiPM detector coupled therewith, so as to improve the detection sensitivity of the system.

[0056] The main control board collects the energy and time signals of the 64 channels, converts the data through the JTAG communication protocol, and realizes the display of the host computer, so as to determine the specific position and time of the crystal receiving the gamma rays, and further estimate the general position of the annihilation of the positron. The main control board also includes level conversion, a DUT board, bias programming, energy acquisition, current programming, and a FPGA control board.

[0057] Level conversion, 5V voltage provided by the power supply is converted to 3.3V by the large current LDO circuit LT1764EQ-3.3V, and then converted to 1.2V by the high-precision large current LDO circuit LT3083. 3.3V and 1.2V are used to supply power to the multi-channel high-precision PET circuit and FPGA of the DUT board at the same time.

[0058] DUT board, multi-channel high-precision PET circuit uses self-designed 64-channel photoelectric detection front-end special integrated readout circuit (hereinafter referred to as PET circuit). After the 8*8 array SiPM converts the input optical signal into an electrical signal, the FPGA provides a 100MHz LVDS data format clock and control timing to the PET circuit, and configures the SPI register of the circuit. At the same time, the DAC provides a bias voltage to the PET circuit, so that the PET circuit works normally, and the 64-channel electrical signals output by the LYSO+SiPM detector are collected for time and energy. The PET circuit outputs the collected 64-channel energy to the energy collection module, and directly transmits the collected time TDC to the FPGA.

[0059] Bias programming, in order to provide 6-way bias control for the multi-channel high-precision PET circuit in the DUT board, and provide one way of high power and two ways of high precision bias control. 16-channel output 16Bit AD5360BSTZ (hereinafter referred to as DAC) is selected for bias programming. The 5V reference voltage of the DAC is provided by the high-precision AD584, and the DC / DC-WRA-YMD-6W (DC / DC module, which realizes +5V to ±15V) is selected to provide ±15V voltage for the DAC. At the same time, one output of the DAC needs to be connected to the OPA544F high-power operational amplifier to improve the driving capacity of the output, and the two outputs of the DAC need to be connected to the LT6231CS8 high-precision operational amplifier to improve the voltage precision of the output.

[0060] Energy collection, the energy collected by the PET circuit is converted into digital signals, which are output to the FPGA. AD7616BSTZ (hereinafter referred to as ADC) is selected. It has built-in dual-channel 16-bit DAS, can process bipolar input signals, and can support dual-channel synchronous sampling of 16 channels. The ADC is powered by a 5V single power supply, and each pair of channels can have a throughput rate of up to 1Msps. ADR421ARZ is used to provide reference voltage for the ADC. Since the PET circuit has 64 channels of energy output, an energy collection module only has 16 collection channels, so four ADC modules are used for collection.

[0061] Current flow control, in order to make the DUT board in the multi-channel high-precision PET circuit to provide 3-way current source control, through the load resistance R pull tank current mode to achieve. First, the FPGA gets the energy collection system 16-bit ADC code value, the calculation of the load resistance end voltage value VIN, then the FPGA output code value to the bias voltage programming system, and then the bias voltage programming system output voltage value VREF, finally through the formula IREF = ± (VIN-VREF) / R to get the load current value.

[0062] FPGA control board, to achieve the collection of energy and time signal, timing control, register configuration, and communication with the host computer, FPGA control board also includes crystal oscillator, Nor Flash, FPGA, JTAG, wherein:

[0063] Crystal oscillator, select 50MHz active crystal oscillator to provide clock signal for FPGA.

[0064] Nor Flash, select SM25QH256M type 256Mbits SPI Flash non-volatile serial Nor Flash memory, store ASIC circuit hundreds of default register values, so that the ASIC circuit power-on can be initialized by FPGA SPI configuration.

[0065] FPGA, is the core part of the whole multi-channel high-precision PET circuit acquisition system. The UART-to-SPI module in the FPGA is used to transmit the UART control end of the host computer to the UART-to-SPI module in the FPGA control board through the UART communication protocol, and the UART-to-SPI module converts the UART data into SPI data, and configures the multi-channel high-precision PET circuit in the DUT board with the converted SPI data according to different register configurations to start different functions. The UART control end and the NorFlash memory are both register configuration for the circuit, but their difference lies in that the UART control end realizes the human interface, and the circuit is personalized and modified, while the Nor Flash automatically completes the initialization configuration of the circuit in a very short time after power-on. The bias register in the FPGA is used to store the DAC bias value transmitted by the PC host bias and current control end, and the FPGA controls the AD7616BSTZ according to the communication protocol to output the corresponding bias value, while collecting the energy signal and time TDC signal output from the multi-channel high-precision PET circuit.

[0066] JTAG, the FPGA converts the collected signals into JTAG communication protocol, and inputs the protocol converted signals to the PC host computer, and the host computer uploads the collected and processed signals and displays them.

[0067] Embodiment 2

[0068] As Figure 2 shown, in order to achieve the above-mentioned purpose, the application provides a register configuration software of a multi-channel high-precision PET circuit acquisition system. The implementation functions are as follows:

[0069] According to the PC host register configuration, the "multi-channel high-precision PET circuit register configuration system" is opened. When the software client is configured, the type and model of the connected FPGA board can be displayed and viewed; and the data length is selected when the register is configured; the sending mode is selected when the data is sent, which has two modes of "frame-by-frame sending" and "packaged sending"; the storage path of the configuration example is selected from the memory of the PC host computer, and the UART read is displayed in the "UART receiving" window; the shortcut of the full register configuration and full register read of the multi-channel high-precision PET circuit can be selected; and the single-channel register configuration of the PET circuit can also be selected. As Figure 2 shown, all are marked with dashed lines, wherein:

[0070] ①Realize the connection of URAT to the serial port com, and display the baud rate, and the type and model of the connected FPGA board are displayed in the frame;

[0071] ②Realize the selection of the import register configuration example path, and the path can select the batch register path saved in the PC;

[0072] ③Control the data length of the imported configuration example, which is in bytes;

[0073] ④When sending data, the sending mode can be selected, which has two modes of "frame-by-frame sending" and "packaged sending";

[0074] ⑤Display the data after importing the configuration example;

[0075] ⑥Display the register value after UART read-back;

[0076] ⑦Select the shortcut of the full register configuration and full register read of the multi-channel high-precision PET circuit;

[0077] ⑧Select the single-channel register configuration of the PET circuit (ASIC), which can select 64 channels; TIA gain attenuation value; current regulation range is (0-255mA); single-channel register configuration; register reset option.

[0078] This invention employs a USB-to-UART communication protocol for SPI configuration. A PC-based host computer enables human-machine interface (HMI) delivery, facilitating efficient read / write operations on the PET circuit's full-channel and single-channel registers. This reduces system noise during configuration, allows for rapid debugging of different operating modes of the PET circuit, and provides a good signal-to-noise ratio, enabling the PET circuit to accurately acquire the specific location and timing information of gamma rays generated in the crystal. This invention reduces the occurrence of bit errors and garbled characters caused by external interference during SPI configuration of the PET circuit, improving the efficiency and accuracy of SPI register configuration. The PET circuit acquisition system of this invention has online acquisition, monitoring, and testing capabilities, improving batch configuration efficiency.

[0079] Example 3

[0080] like Figure 3 As shown, to achieve the above objectives, this invention provides bias current control and data acquisition and processing software for a multi-channel high-precision PET circuit acquisition system. It can control the bias voltage and current of the PET circuit; select the acquisition and processing methods for the time TDC and energy data of the PET circuit; and acquire and display the time TDC and energy data of each of the 64 channels of the PET circuit. The specific working modes and functions of the multi-channel high-precision PET circuit bias control and data acquisition and processing system are as follows, indicated by dashed lines:

[0081] ① Acquire the 64-channel time TDC and energy data collected by the PET circuit. You can choose to save the data in the appropriate location, the data acquisition time, and enable or disable the trigger mode.

[0082] ② Process the raw Time DC and Energy data collected by the PET circuit, select the output positions of the raw data and the processed data respectively, and select the data conversion mode and the percentage of data processing. The output format after processing is Binary, Octal, Dec, Hex, etc.

[0083] ③ Bias control of multi-channel high-precision PET circuits can be set with voltage values ​​from 0 to 3.3V to control the reference voltages of VREF_BG_EXT, VREF_SEL, VREF_BG, VREF_SHAPER, VREF_BLH, and VREF_INT respectively.

[0084] ④ Current control is performed on the multi-channel high-precision PET circuit. The current value can be set from 0 to 100mA. The series resistor mode is used to control the external voltage value, thereby realizing the current pull-in function. The pull-in current of IBIAS_EXT, IREFT_ST, and IREFT_IN is controlled respectively.

[0085] ⑤The time TDC (unit: ps) of 64 channels of the high-precision PET circuit is collected respectively and displayed;

[0086] ⑥The energy Energy (unit: pC) of 64 channels of the high-precision PET circuit is collected respectively and displayed.

[0087] The application adopts the USB to URAT communication protocol to control the bias and current, adopts the JTAG to collect and process the data of the FPGA, and realizes the man-machine interaction, displays and controls the energy and time of 64 channels of the PET circuit respectively. The application has good man-machine interaction function for the control and collection of the multi-channel high-precision PET circuit, has real-time for the PET circuit analysis, and has different mode selection for the data collection and processing.

[0088] Example 4

[0089] As Figure 4 shown, in order to achieve the above-mentioned purpose, the application provides an energy collection of a multi-channel high-precision PET circuit collection system. The energy Energy (namely the input voltage VIN) of 64 channels of the PET circuit is collected respectively, the energy collected by the PET circuit is converted by the energy collection module, and the converted CODE is output to the FPGA through the control timing. The specific selected circuit and circuit function are as follows:

[0090] The energy collected by the PET circuit is converted by the AD7616BSTZ (hereinafter referred to as ADC), the built-in double-channel 16-bit DAS can process bipolar input signals, double-channel synchronous sampling, and further support double-channel synchronous sampling of 16 channels, and each pair of channels can have a throughput rate of up to 1Msps; the AMS1117-3.3V is selected to provide pull-up voltage for the ADC; the ADR421ARZ high-precision low-noise reference level is selected to provide 2.5V reference voltage for the ADC; the 40-pin 2.54mm dual-in-line connector is selected as the adapter for connecting the energy collection module and the FPGA main control board, and the control of the energy collection module and the reading of the digital signal by the FPGA are realized through the adapter. Since there are 64 channels of PET circuit energy output, only 16 channels of the energy collection module are collected, therefore, four ADC modules are used for collection.

[0091] The code value calculation of the ADC sampling is shown in formula (1):

[0092]

[0093] Wherein, VIN is input voltage; REFINOUT is reference voltage, 2.5V reference voltage is selected in the embodiment; Vrag is full-scale range of actual energy input, which can be set as ±10V, ±5V, ±2.5V, and is configured to ADC through the control timing of FPGA; CODE is the code value of AD output, that is, the code value obtained by FPGA sampling ADC. In order to obtain the corresponding input voltage, the input voltage value, that is, the energy output by the PET circuit, can be obtained through formula (1), and the energy calculation is shown in formula (2):

[0094]

[0095] Example 5

[0096] As Figure 5 shown, in order to achieve the above purpose, the present application provides a bias voltage program control of a multi-channel high-precision PET circuit acquisition system. The PET circuit is provided with a driving voltage, and the program control and display are realized through the visual interface of the upper computer, so that the circuit can work normally. Here, one high-power and two high-precision voltage outputs are also provided. The specific selected circuit and circuit functions are as follows:

[0097] Bias voltage program control, in order to provide 6-way bias voltage control for the multi-channel high-precision PET circuit in the DUT board, a 16-bit 16-channel output 16Bit AD5360BSTZ (hereinafter referred to as DAC) is selected as the core device, and the FPGA writes the control timing through the LDAC_DA, RESET_DA, SYNC_DA, SCLK_DA and SDI_DA ports to realize the bias voltage program control. The Ref_5V reference voltage of the ADC is provided by the high-precision AD584, and the DC / DC-WRA-_YMD-6W (DC / DC module, realizing +5V to ±15V) is used to provide ±15V voltage for the DAC. At the same time, the output of the DAC needs to be connected to the OPA544F high-power operational amplifier to improve the driving ability of the PET circuit output, and the two outputs of the DAC need to be connected to the LT6231CS8 high-precision operational amplifier to improve the voltage precision of the PET circuit output.

[0098] The calculation of bias voltage control is shown in formula (3):

[0099]

[0100] Wherein, VREF is output bias voltage, Ref_5V is reference voltage 5V, and DAC_CODE is the control code value of DAC. In order to obtain the corresponding output voltage, the control code value of the corresponding DAC can be obtained through formula (3), that is, the code value of the FPGA output used to control the DAC, and the calculation is shown in formula (4):

[0101]

[0102] Embodiment 6

[0103] As Figure 6 shown, in order to achieve the above-mentioned purpose, the present application provides a current flow control of a multi-channel high-precision PET circuit acquisition system. Three load currents are provided for the PET circuit, and the program control and display are realized through the visual interface of the upper computer, so that the circuit can work normally. The structure and function of the load current flow control are shown in Figure 6 As shown in the figure, the analog output port of the multi-channel high-precision PET circuit is connected to the energy acquisition system and the resistor R respectively. The energy acquisition system converts the collected analog signal VIN (i.e. energy) into corresponding digital signal CODE through analog-digital conversion, and the specific conversion process is shown in embodiment 4. The FPGA calculates the code value of the program-controlled DAC bias output according to the current value set by the upper computer, and the specific conversion process is shown in embodiment 5. The bias program control system outputs the voltage to one end VREF of the resistor R and the analog input port of the PET circuit. Wherein -IREFT represents the pull current value IREFT to the outside of the PET circuit, and +IREFT represents the fill current value IREFT to the inside of the PET circuit.

[0104] The calculation of the current flow control is shown in formula (5):

[0105]

[0106] Wherein, IREFT is the program-controlled current, which can be set through the upper computer interface in this embodiment, and the FPGA automatically generates the code value of the control DAC through the program-controlled current; ± is the direction of pull and fill current; R is the resistance value, which is 10k here; VIN is the voltage value output by the PET circuit port when it is empty, and the VIN value here is obtained by sampling AD7616BSTZ in embodiment 4 above; VREF is the resistance value of the 10k resistor, and the voltage value of the program control is calculated according to the required load current. By bringing VIN in formula (2) and VREF in formula (3) into formula (5), we can get:

[0107]

[0108] Wherein, REFINOUT is the reference voltage of AD7616BSTZ, here 2.5V reference voltage is provided by ADR421ARZ; CODE is the code value output by AD7616BSTZ after sampling VIN value; Vrag is the full-scale range of the actual input energy of PET circuit; Ref_5V is the reference voltage 5V; DAC_CODE is the control code value of AD5360BSTZ. In order to obtain the corresponding load current, the control code value of AD5360BSTZ can be obtained through formula (6), that is, the code value output by FPGA to control AD5360BSTZ, which is calculated as shown in formula (7):

[0109]

[0110] Example 7

[0111] As Figure 7 shown, in order to achieve the above purpose, the application provides a flow chart of a multi-channel high-precision PET circuit acquisition system. The flow chart comprises the following steps:

[0112] Step one: build a multi-channel high-precision PET circuit acquisition system

[0113] According to the system block diagram of example 1, a multi-channel high-precision PET circuit acquisition system is built. The acquisition system is placed in a fixed position, and the JTAG port of the FPGA control board is connected, and the URAT control end (including register configuration, bias and current control) is also connected. The control end adopts CP2102 circuit, and is connected with the FPGA interface for communication by using Dupont wire. At the same time, high-density connecting wire is used to connect LYSO+SiPM detector with the main control board.

[0114] Step two:

[0115] Turn on the prepared power supply to supply power to the main control board and LYSO+SiPM detector respectively, and check whether the system works normally. If the power-up is abnormal, repeat the operation of step one until the system is built normally.

[0116] Step three:

[0117] When the FPGA control board is successfully powered on, wait for a few seconds, and then the SM25QH256M type 256Mbits SPI Flash non-volatile serial Nor Flash memory is configured by the FPGA through SPI initialization, so that the multi-channel high-precision PET circuit can work normally. Then the generated circuit register configuration file is transmitted to the UART-to-SPI module in the FPGA control board through the UART communication protocol by the register configuration end in the host computer, and the UART-to-SPI module converts the UART data into SPI data; the converted SPI data is used to configure the multi-channel high-precision PET circuit in the DUT board through the SPI channel, and the circuit 64-channel different working mode is started. Then the voltage and current values of the DACs that need to be controlled are transmitted to the bias voltage register in the FPGA control board through the UART communication protocol by the bias voltage and current control end in the host computer, and the FPGA calculates the code value of the control DAC according to the value of the bias voltage register, and controls the bias voltage and current control module respectively, so as to apply voltage and current to the analog input and output port of the multi-channel high-precision PET circuit. If the system does not receive the control instruction or the control is unsuccessful, the above operation can be repeated after waiting for 50ms.

[0118] Step four:

[0119] Through the man-machine interface of the host computer, the data acquisition and processing mode is selected as shown in Example 3. The multi-channel high-precision PET circuit transmits the time TDC of the LYSO+SiPM detector to the FPGA, and transmits the collected energy signal to the energy acquisition system. The energy acquisition system converts the collected energy signal into digital signal through ADC, and transmits the converted energy digital signal to the FPGA. The FPGA transmits the energy and time TDC to the data acquisition and processing interface of the host computer through the JTAG port for display. Repeat step four until the data is completely collected and analyzed.

[0120] The application adopts the UART communication protocol, and the host computer realizes visual SPI configuration through the UART port. The data transmission has the advantages of fast data transmission and large data volume. After the PET circuit works normally, the data is returned to the JTAG port of the FPGA, and the JTAG port returns to the host computer. The PC develops a man-machine interaction interface to realize dynamic real-time display of time and energy.

[0121] The above examples further illustrate the purpose, technical solutions and advantages of the application. It should be understood that the above examples are only preferred embodiments of the application, and do not limit the application. Any modification, equivalent replacement, improvement, etc. made to the application within the spirit and principles of the application shall be included in the protection scope of the application.

Claims

1. A multi-channel high-precision PET circuit acquisition system for processing electrical signals output by a PET detector, characterized in that, The system comprises a host computer and a master control board, and the master control board comprises an FPGA control board, a DUT board, a bias programming unit, a current programming unit and an energy acquisition module, wherein: The host computer is configured to configure bias values of the bias programming unit, current values of the current programming unit and SPI channel configurations of the DUT board circuit through the FPGA control board, and collect data acquired by the DUT board through the FPGA control board; The FPGA control board is configured to control output voltage values of the bias programming unit and output voltage values and current values of the current programming unit according to DAC bias values received from the host computer, and send DUT board configuration information received from the host computer to the DUT board; The bias programming unit is configured to provide 6-way bias control for the DUT board according to the configuration information; The current programming unit is configured to provide 3-way current source control for the DUT board according to the configuration information; The energy acquisition module is configured to perform analog-to-digital conversion on energy information acquired by the DUT board, and send the converted information to the host computer through the FPGA control board; The DUT board comprises a plurality of high-precision PET circuits, each of which is configured according to DUT board configuration information received from the host computer through SPI protocol, and is configured to acquire time electrical signal information output by a PET detector through 16 channels and to acquire energy electrical signal information output by the PET detector through 64 channels.

2. The multi-channel high-precision PET circuit acquisition system according to claim 1, characterized in that, The LYSO crystal array and the SiPM array optical coupling agent are coupled with each other to form a PET detector, the LYSO crystal array is used for contacting and interacting with gamma photons, and part or all of the energy of the high-energy gamma photons is deposited in the crystal, and the crystal releases the excess energy in the form of visible light after being excited by the high-energy gamma photons, and the SiPM array is used for converting the received visible light photons into electrical signals through a photoelectric conversion array.

3. The multi-channel high-precision PET circuit acquisition system according to claim 1, characterized in that, The process of configuring bias values of the bias programming unit and current values of the current programming unit by the host computer through the FPGA control board comprises: transmitting DAC bias values to the FPGA control board through a UART communication protocol, storing the DAC bias values in a register of the FPGA control board, and controlling the bias programming unit and the current programming unit through a communication protocol of the DAC to make the bias programming unit and the current programming unit output corresponding bias and current.

4. The multi-channel high-precision PET circuit acquisition system according to claim 1, characterized in that, The process of configuring SPI channel configurations of the DUT board circuit by the host computer through the FPGA control board comprises: sending SPI channel configurations of the DUT board circuit to the FPGA control board through a UART communication protocol, converting the SPI channel configurations into SPI format by the FPGA control board, sending the SPI channel configuration information of the DUT board circuit in the format to the DUT board circuit, and configuring each channel according to the information by the DUT board circuit.

5. The multi-channel high-precision PET circuit acquisition system according to claim 1, characterized in that, The energy collection module carries out analog-digital conversion on the analog signal collected from the analog output port of the multi-channel high-precision PET circuit to generate a corresponding digital signal CODE, and the FPGA control board calculates the code value of the DAC bias voltage programming according to the current value set by the upper computer, and the code value is transmitted to the DAC bias voltage programming, so as to obtain different bias voltages, and the obtained bias voltages act on the resistance between the analog output port and the bias voltage programming of the multi-channel high-precision PET circuit, and the current value of the current programming is obtained.

6. The multi-channel high-precision PET circuit acquisition system according to claim 5, characterized in that, The energy collection module carries out digital-analog conversion on the analog signal collected from the analog output port of the multi-channel high-precision PET circuit to generate a corresponding digital signal CODE, including: Wherein, VIN is the input voltage, that is, the energy electrical signal collected from the analog output port of the multi-channel high-precision PET circuit; Vrag is the full-scale range of the actual energy input; REFINOUT is the reference voltage, and CODE is the code value obtained by the FPGA sampling ADC.

7. The multi-channel high-precision PET circuit acquisition system according to claim 5, characterized in that, The FPGA control board calculates the code value of the DAC bias voltage programming according to the current value set by the upper computer, including: Wherein, DAC_CODE is the code value of the DAC bias voltage programming; Vrag is the full-scale range of the actual energy input; REFINOUT is the first reference voltage; IREFT is the programmed current; R is the resistance value of the resistance between the analog output port and the bias voltage programming of the multi-channel high-precision PET circuit; Ref is the reference voltage of the bias voltage programming.

8. The multi-channel high-precision PET circuit acquisition system according to claim 5, characterized in that, The process of transmitting the code value to the DAC bias voltage programming to obtain different bias voltages includes: Wherein, Ref is the reference voltage of the bias voltage programming, and DAC_CODE is the code value of the DAC bias voltage programming.

9. The multi-channel high-precision PET circuit acquisition system according to claim 5, characterized in that, The process of biasing the resistance between the analog output port and the bias voltage programming of the multi-channel high-precision PET circuit to obtain the current value of the current programming includes: Wherein, IREFT is the current value obtained by the current programming; Ref is the reference voltage of the bias voltage programming, DAC_CODE is the code value of the DAC bias voltage programming; CODE is the code value obtained by the FPGA sampling ADC; Vrag is the full-scale range of the actual energy input; REFINOUT is the reference voltage of the energy collection module; R is the resistance value of the resistance between the analog output port and the bias voltage programming of the multi-channel high-precision PET circuit.

10. A method of using a multi-channel high-precision PET circuit acquisition system, characterized in that, The use of the multi-channel high-precision PET circuit collection system of claim 1 is implemented, specifically including the following steps: After the FPGA control board is powered on, the DUT board is initialized and configured through the SPI configuration information stored locally, so that the multi-channel high-precision PET circuit can work normally; The circuit register configuration file generated by the register configuration end in the upper computer is transmitted to the UART-to-SPI module in the FPGA control board through the UART communication protocol, and the UART-to-SPI module converts the UART data into SPI data; The converted SPI data is used to configure the multi-channel high-precision PET circuit in the DUT board through the SPI channel, and the circuit 64-channel different working modes are started; The voltage and current values of the DACs to be controlled are transmitted to the bias register in the FPGA control board through the bias and current control end in the host computer by the UART communication protocol, the FPGA calculates the code value of the DAC according to the value of the bias register, and the bias programming and current programming modules are controlled respectively, so that the voltage and current are applied to the multi-channel high-precision PET circuit analog input and output port. If the system does not receive a control command or the control is unsuccessful, the above operation can be repeated after waiting for 50 ms; Through the man-machine interface of the host computer, the data acquisition and processing mode is selected; the multi-channel high-precision PET circuit transmits the time information of the PET detector to the FPGA control board, and transmits the collected energy signal to the energy acquisition system; the energy acquisition system performs analog-digital conversion through the ADC, and transmits the converted energy digital signal to the FPGA control board; The FPGA control board transmits the energy and time TDC to the data acquisition and processing interface of the host computer through the JTAG port for display.

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