Digital weak light phase lock control system and method based on phase readout

Abstract

The invention relates to the technical field of space photoelectric detection, in particular to a digital weak light phase-locked control system and method based on phase readout, and the system comprises a laser interference and photoelectric conversion structure, a phase tracking readout module and a weak light phase-locked control module which are connected with one another. The laser interference and photoelectric conversion structure is used for generating a laser heterodyne interference signal based on the local laser and the weak laser, converting the laser heterodyne interference signal into an electric signal and inputting the electric signal to the phase tracking reading module; the phase tracking read-out module is used for tracking the phase of the laser heterodyne interference signal through the electric signal, calculating phase error information and inputting the phase error information to the weak light phase-locked control module; and the weak light phase lock control module is used for controlling the frequency of the local laser based on the phase error information and locking the local laser to the phase of the weak light laser. According to the invention, rapid, high-precision and long-time automatic phase locking under the extremely weak light condition is realized.

Description

Technical Field

[0001] The present invention relates to the field of space photoelectric detection technology, and in particular to a digital weak-light phase-locked control system and method based on phase readout. Background Art

[0002] Gravitational wave detection provides a new scientific tool for observing the universe. As a weak low-frequency wave, gravitational waves require extremely high sensitivity of detectors. In order to detect gravitational wave sources in the ultra-low frequency band of 0.1mHz to 1Hz, a series of space gravitational wave detection plans have been proposed at home and abroad. However, none of the above-mentioned space gravitational wave detectors are in orbit and are currently in the technical research stage.

[0003] In space gravitational wave detection, weak light phase-locking technology is a key digital optical phase-locked loop technology. Due to the existence of laser divergence angle, a millimeter-level laser beam is emitted with a divergence angle of 1 milliradian. After being transmitted over a million-kilometer arm, the spot diameter will expand to the kilometer level. However, the aperture of the satellite telescope is only at the decimeter level, so the laser power received by the satellite from the other end is very weak and phase analysis cannot be performed. An optical phase-locked loop is needed to lock the weak light phase.

[0004] There are currently two existing solutions for digital weak-light phase-locked control systems and methods. The first is direct differential phase locking, which differentiates the phase of the input heterodyne interference signal from the ideal phase generated by the digitally controlled oscillator, and inputs it into a digital optical phase-locked loop for feedback control to achieve weak-light phase locking. Although this solution has a large system bandwidth and a fast locking speed, and can better solve the problem of poor frequency stability of the interference signal, its disadvantage is that it does not suppress low-frequency noise and cannot recover gravitational wave information from higher levels of noise. The second is phase readout phase locking, which uses a phase meter to perform phase recovery on the input heterodyne interference signal, and differentiates the readout phase signal from the ideal phase generated by the digitally controlled oscillator, and inputs it into a digital optical phase-locked loop for feedback control to achieve weak-light phase locking. This solution suppresses the input signal noise through the phase meter and recovers the phase information, but because the phase meter is very sensitive to the frequency fluctuation amplitude of the heterodyne interference signal and the system bandwidth is small, it cannot stably track and lock the phase, so it cannot be used in practice. Summary of the invention

[0005] In view of this, the present invention provides a digital weak-light phase-locked control system and method based on phase readout to solve the problem that the existing digital weak-light phase-locked control technology cannot stably track and lock the phase from a higher level of noise, resulting in inability to be used in practical applications.

[0006] In a first aspect, the present invention provides a digital weak light phase-locking control system based on phase readout, the system comprising: an interconnected laser interference and photoelectric conversion structure, a phase tracking readout module and a weak light phase-locking control module;

[0007] The laser interference and photoelectric conversion structure is used to generate a laser heterodyne interference signal based on a local laser and a weak light laser, and convert the signal into an electrical signal to be input into the phase tracking readout module;

[0008] The phase tracking readout module is used to track the phase of the laser heterodyne interference signal through an electrical signal, and calculate the phase error information to input into the weak light phase locking control module;

[0009] The weak light phase locking control module is used to control the frequency of the local laser based on the phase error information, and lock the local laser to the phase of the weak light laser.

[0010] In an optional embodiment, the laser interference and photoelectric conversion structure includes: a laser group, a polarizer group, a Faraday isolator group, an attenuation plate group, a beam splitter group, a photodetector, an analog-to-digital converter, a digital-to-analog converter, a PZT drive amplifier and a PZT piezoelectric ceramic connected in sequence;

[0011] The laser group is used to emit two different lasers; the laser group includes a local laser and a weak light laser, the local laser is used to emit the local laser, and the weak light laser is used to emit the weak light laser;

[0012] The polarizer lens group, the Faraday isolator group and the attenuation plate group are combined to adjust the polarization state and intensity of the two different lasers to simulate weak light interference conditions;

[0013] The beam splitter group is used to generate the laser heterodyne interference signal and change the optical path propagation direction again to form a differential interference laser signal;

[0014] The photodetector is used to convert the differential interference laser signal into an electrical signal containing phase error information;

[0015] The analog-to-digital converter is used to collect analog electrical signals from the photodetector and convert them into digital electrical signals for input into the FPGA control structure; the FPGA control structure includes the phase tracking readout module and the weak light phase locking control module;

[0016] The digital-to-analog converter is used to collect digital electrical signals from the FPGA control structure and convert them into analog electrical signals for input into the PZT drive amplifier;

[0017] The PZT driving amplifier is used to perform gain amplification processing on the analog electrical signal and input it to the PZT piezoelectric ceramic of the local laser;

[0018] The PZT piezoelectric ceramic is used to control the frequency of the local laser based on the analog electrical signal after gain amplification processing, so as to lock the local laser to the phase of the weak light laser.

[0019] In an optional implementation, the polarizer lens group is used to adjust the polarization states of the two different lasers;

[0020] The Faraday isolator group is used to prevent reverse light from entering the laser group;

[0021] The attenuation sheet group is used to adjust the intensity of the two different lasers to simulate weak light interference conditions.

[0022] In an optional embodiment, the polarizer group includes a first polarizer and a second polarizer; the Faraday isolator group includes a first Faraday isolator and a second Faraday isolator; the attenuator group includes a first attenuator and a second attenuator; the beam splitter group includes a fully reflective beam splitter and a semi-reflective and semi-transmissive beam splitter;

[0023] The output end of the weak light laser is connected to the input end of the total reflection beam splitter through the first polarizer mirror, the first Faraday isolator, and the first attenuation plate in sequence;

[0024] The output end of the local laser is connected to the first input end of the semi-reflective and semi-transmissive beam splitter through the second polarizer mirror, the second Faraday isolator and the second attenuation plate in sequence; the output end of the total reflection beam splitter is connected to the second input end of the semi-reflective and semi-transmissive beam splitter;

[0025] The output end of the semi-reflective and semi-transmissive beam splitter is connected to the input end of the FPGA control structure through the photodetector and the analog-to-digital converter in sequence;

[0026] The output end of the FPGA control structure is connected to the input end of the local laser through the digital-to-analog converter, the PZT drive amplifier and the PZT piezoelectric ceramic in sequence.

[0027] In an optional embodiment, the first attenuation plate and the second attenuation plate are both continuous neutral density attenuation plates, and laser attenuation processing is performed by cascading two sub-attenuation plates to simulate spatial weak light signals.

[0028] In an optional embodiment, the total reflective beam splitter is used to change the optical path propagation direction of the weak light laser to generate interference;

[0029] The semi-reflective and semi-transmissive beam splitter is used to generate heterodyne interference based on the local laser and the weak light laser and change the propagation direction of the optical path again to form the differential interference laser signal.

[0030] In an optional embodiment, the phase tracking readout module includes a digital phase meter and a local digitally controlled oscillator;

[0031] The input end of the digital phase meter is connected to the first output end of the analog-to-digital converter, and the digital phase meter is used to obtain the digital electrical signal output by the analog-to-digital converter, and perform phase resolution and tracking processing on the laser heterodyne interference signal based on the digital electrical signal to read the laser heterodyne interference phase signal;

[0032] The input end of the local numerically controlled oscillator is connected to the output end of the digital phase meter, and is used to generate an ideal phase signal according to a preset frequency value, and perform differential processing on the ideal phase signal and the laser heterodyne interference phase signal to generate a phase error signal.

[0033] In an optional implementation, the weak light phase-locked control module includes a fast phase-locked loop, a phase readout loop, and an override controller;

[0034] The input end of the fast phase-locked loop is connected to the second output end of the analog-to-digital converter, and the fast phase-locked loop is used to perform a phase modulation and phase lock on the phase of the laser heterodyne interference signal based on the electrical signal containing phase error information;

[0035] The input end of the phase readout loop is connected to the output end of the local numerically controlled oscillator, the output end of the phase readout loop is connected to the first input end of the override controller, and the phase readout loop is used to perform secondary modulation and phase locking on the phase of the laser heterodyne interference signal based on the phase error signal;

[0036] The second input end of the override controller is connected to the output end of the fast phase-locked loop, and the output end of the override controller is connected to the input end of the digital-to-analog converter. The override controller is used to select a control signal output from the fast phase-locked loop and the phase readout loop to enable disturbance-free switching of the control loop of the FPGA control structure.

[0037] In a second aspect, the present invention provides a digital weak light phase-locked control method based on phase readout, the method is applied to a digital weak light phase-locked control system based on phase readout as described above, the method comprising:

[0038] Step 0, initializing various parameters in the digital weak light phase-locked control system;

[0039] Step 1, periodically scanning the laser heterodyne interference signal within a target frequency range;

[0040] Step 2: When the difference between the frequency value of the laser heterodyne interference signal and the preset frequency value is within the first target threshold range, the fast phase-locked loop is closed to perform a modulation and phase locking process, and the integral external feedback mechanism is activated in the phase readout loop to track the output of the fast phase-locked loop;

[0041] Step 3, after the primary modulation and phase locking process, when the difference between the frequency value of the laser heterodyne interference signal and the preset frequency value is within the second target threshold value range, the phase readout loop is closed to perform secondary modulation and phase locking process, and the integral external feedback mechanism is activated in the fast phase-locked loop to track the output of the closed phase readout loop; the second target threshold value is less than the first target threshold value;

[0042] Step 4: After the secondary modulation and phase locking processing, when the difference between the frequency value of the laser heterodyne interference signal and the preset frequency value is still within the second target threshold range, the integral saturation term in the phase readout loop is turned off to maintain phase locking and achieve the target phase locking accuracy.

[0043] In an optional implementation, the step 4 further includes:

[0044] When the difference between the frequency value of the laser heterodyne interference signal and the preset frequency value exceeds the second target threshold range, switching to step 3 is performed.

[0045] In a third aspect, the present invention provides a computer device, comprising: a memory and a processor, the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the above-mentioned first aspect or any corresponding embodiment thereof by executing the computer instructions. A digital weak light phase-locked control method based on phase readout.

[0046] In a fourth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the above-mentioned first aspect or any corresponding embodiment thereof. A digital weak light phase-locked control method based on phase readout.

[0047] In a fifth aspect, the present invention provides a computer program product, comprising computer instructions, wherein the computer instructions are used to enable a computer to execute a digital weak light phase-locked control method based on phase readout according to the first aspect or any corresponding embodiment thereof.

[0048] The technical solution provided by the present invention may include the following beneficial effects:

[0049] The present invention provides a digital weak-light phase-locked control system and method based on phase readout. The system realizes fast, high-precision, and long-term automatic phase locking under extremely weak light conditions through a carefully designed laser interference and photoelectric conversion structure, a phase tracking readout module, and a weak-light phase-locked control module. The present invention adopts a phase readout scheme to significantly suppress low-frequency noise, so that the residual phase noise level is further close to the requirements of intersatellite link detection. The introduction of an override controller and a fast phase-locked loop realizes fast lock-in and disturbance-free switching of the control loop, effectively overcoming the limitations of the prior art, such as the sensitivity of the phase meter to amplitude fluctuations, expanding the control bandwidth, and improving the stability and response speed of the control system. The adaptive state machine control method implemented by the present invention enables the system to realize automatic phase locking when it is turned on, and at the same time has the ability to re-lock when the system loses lock after being disturbed by the environment. In addition, the adaptive state machine control method still uses parameter self-tuning technology, which can further suppress phase noise, improve phase locking accuracy, and significantly extend the phase locking time. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0051] Figure 1 is a structural schematic diagram of a digital weak-light phase-locked control system based on phase readout according to an embodiment of the present invention;

[0052] Figure 2 is a structural schematic diagram of another digital weak-light phase-locked control system based on phase readout according to an embodiment of the present invention;

[0053] Figure 3 is a schematic diagram of a structure of an FPGA control structure according to an embodiment of the present invention;

[0054] Figure 4 is a flow chart of a digital weak light phase locking control method based on phase readout according to an embodiment of the present invention;

[0055] Figure 5 is a state transition diagram of a control method according to an embodiment of the present invention;

[0056] Figure 6 It is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention.

[0057] Among them, there are laser interference and photoelectric conversion structure-01, phase tracking readout module-02, weak light phase-locked control module-03, weak light laser-1, local laser-2, first polarizer mirror-3, second polarizer mirror-4, first Faraday isolator-5, second Faraday isolator-6, first attenuation plate-7, second attenuation plate-8, fully reflective beam splitter-9, semi-reflective and semi-transmissive beam splitter-10, photodetector-11, analog-to-digital converter-12, digital-to-analog converter-13, PZT drive amplifier-14 and PZT piezoelectric ceramic-15. DETAILED DESCRIPTION

[0058] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0059] In this embodiment, a digital weak light phase-locked control system based on phase readout is provided. Figure 1 is a structural schematic diagram of a digital weak light phase-locked control system based on phase readout according to an embodiment of the present invention. Figure 1 As shown, the system includes: a laser interference and photoelectric conversion structure 01, a phase tracking readout module 02 and a weak light phase locking control module 03 connected to each other;

[0060] The laser interference and photoelectric conversion structure 01 is used to generate a laser heterodyne interference signal based on a local laser and a weak light laser, and convert it into an electrical signal and input it into the phase tracking readout module 02;

[0061] The phase tracking readout module 02 is used to track the phase of the laser heterodyne interference signal through an electrical signal, and calculate the phase error information to input into the weak light phase locking control module 03;

[0062] The weak light phase locking control module 03 is used to control the frequency of the local laser based on the phase error information, and lock the local laser to the phase of the weak light laser.

[0063] Furthermore, the laser interference and photoelectric conversion structure 01 generates a laser heterodyne interference signal and converts it into an electrical signal to input into the FPGA control structure (including the phase tracking readout module 02 and the weak light phase-locking control module 03). The phase tracking readout module 02 tracks the heterodyne laser phase through the electrical signal and calculates the phase error information as the input signal of the control system. The override controller in the weak light phase-locking control module 03 is used for fast phase locking and disturbance-free switching of the control loop. The weak light phase-locking control module 03 uses the phase error information to control the local laser frequency and automatically locks the local laser to the extremely weak incident laser.

[0064] In an alternative embodiment, see Figure 2 Another structural schematic diagram of a digital weak light phase-locked control system based on phase readout is shown, wherein the laser interference and photoelectric conversion structure 01 comprises: a laser group, a polarizer group, a Faraday isolator group, an attenuation plate group, a beam splitter group, a photodetector 11, an analog-to-digital converter 12, a digital-to-analog converter 13, a PZT drive amplifier 14 and a PZT piezoelectric ceramic 15 connected in sequence;

[0065] The laser group is used to emit two different lasers; the laser group includes a local laser 2 and a weak light laser 1, the local laser 2 is used to emit the local laser, and the weak light laser 1 is used to emit the weak light laser;

[0066] The polarizer lens group, the Faraday isolator group and the attenuation plate group are combined to adjust the polarization state and intensity of the two different lasers to simulate weak light interference conditions;

[0067] The beam splitter group is used to generate the laser heterodyne interference signal and change the optical path propagation direction again to form a differential interference laser signal;

[0068] The photodetector 11 is used to convert the differential interference laser signal into an electrical signal containing phase error information;

[0069] The analog-to-digital converter 12 is used to collect analog electrical signals from the photodetector 11 and convert them into digital electrical signals for input into the FPGA control structure; the FPGA control structure includes the phase tracking readout module 02 and the weak light phase locking control module 03;

[0070] The digital-to-analog converter 13 is used to collect digital electrical signals from the FPGA control structure and convert them into analog electrical signals to be input into the PZT driving amplifier 14;

[0071] The PZT driving amplifier 14 is used to perform gain amplification processing on the analog electrical signal and input it to the PZT piezoelectric ceramic 15 of the local laser 2;

[0072] The PZT piezoelectric ceramic 15 is used to control the frequency of the local laser based on the analog electrical signal after gain amplification processing, so as to lock the local laser to the phase of the weak light laser.

[0073] Furthermore, the laser interference and photoelectric conversion structure 01 includes two NPRO solid lasers, one as a weak light laser 1 and the other as a local laser 2, both of which generate circularly polarized lasers with a wavelength of 1064nm. The polarization state and intensity of the laser are adjusted by a polarizer lens group, a Faraday isolator group, and a continuous neutral density attenuation plate group to simulate weak light interference conditions. A heterodyne interference signal is generated by a fully reflective beam splitter 9 and a semi-reflective and semi-transmissive beam splitter 10, which is converted into an electrical signal containing phase error information by a photodetector 11, and is collected as a digital electrical signal through an analog-to-digital converter 12 and input into an FPGA control structure. Finally, the control electrical signal is output by the FPGA control structure through a digital-to-analog converter 13, the control gain is adjusted by a PZT drive amplifier 14, and the local laser is controlled by a PZT piezoelectric ceramic 15 for phase modulation.

[0074] In an optional implementation, the polarizer lens assembly is used to adjust the polarization states of the two different lasers;

[0075] The Faraday isolator group is used to prevent reverse light from entering the laser group;

[0076] The attenuation sheet set is used to adjust the intensity of the two different lasers to simulate weak light interference conditions.

[0077] In an optional embodiment, the polarizer group includes a first polarizer 3 and a second polarizer 4; the Faraday isolator group includes a first Faraday isolator 5 and a second Faraday isolator 6; the attenuation plate group includes a first attenuation plate 7 and a second attenuation plate 8; the beam splitter group includes a fully reflective beam splitter 9 and a semi-reflective and semi-transmissive beam splitter 10;

[0078] The output end of the weak light laser 1 is connected to the input end of the total reflection beam splitter 9 through the first polarizer 3, the first Faraday isolator 5 and the first attenuation plate 7 in sequence;

[0079] The output end of the local laser 2 is connected to the first input end of the semi-reflective and semi-transmissive beam splitter 10 through the second polarizer 4, the second Faraday isolator 6 and the second attenuation plate 8 in sequence; the output end of the total reflection beam splitter 9 is connected to the second input end of the semi-reflective and semi-transmissive beam splitter 10;

[0080] The output end of the semi-reflective and semi-transmissive beam splitter 10 is connected to the input end of the FPGA control structure through the photodetector 11 and the analog-to-digital converter 12 in sequence;

[0081] The output end of the FPGA control structure is connected to the input end of the local laser 2 through the digital-to-analog converter 13 , the PZT driving amplifier 14 and the PZT piezoelectric ceramic 15 in sequence.

[0082] Further, such as Figure 2 As shown, in practical applications, the laser interference and photoelectric conversion structure 01 includes the following operating steps in sequence:

[0083] 1) Turn on the first NPRO solid-state laser as weak light laser 1, turn on the second NPRO solid-state laser as local laser 2, and both lasers generate circularly polarized lasers with a wavelength of 1064 nm;

[0084] 2) The two laser beams pass through the first polarizer 3 and the second polarizer 4 respectively. Each polarizer is composed of a quarter wave plate and a half wave plate. The quarter wave plate converts circularly polarized light into linearly polarized light, and the half wave plate adjusts the polarization state of the linearly polarized light.

[0085] 3) The two laser beams pass through the first Faraday isolator 5 and the second Faraday isolator 6 respectively, which can effectively prevent the light from the output end from propagating back to the laser, thereby protecting the laser.

[0086] 4) The two laser beams pass through the first attenuation plate 7 and the second attenuation plate 8 respectively, so as to adjust the intensity of weak light and the intensity of local light to simulate weak light interference conditions;

[0087] 5) The weak laser reaches the all-reflective beam splitter 9 and changes the direction of light propagation to produce interference;

[0088] 6) The local laser and the weak light laser reach the semi-reflective and semi-transmissive beam splitter 10, generating heterodyne interference and changing the propagation direction of the optical path again, forming a differential interference laser signal;

[0089] 7) The photodetector 11 converts the differential interference laser signal into an electrical signal containing phase error information;

[0090] 8) The analog-to-digital converter 12 collects analog electrical signals, converts them into digital electrical signals and inputs them into the FPGA control structure;

[0091] 9) The digital-to-analog converter 13 collects digital electrical signals from the FPGA control structure and converts them into analog electrical signals for output;

[0092] 10) The PZT driving amplifier 14 amplifies the analog electrical signal with a gain of 30V / V and outputs it to the PZT piezoelectric ceramic 15 of the local laser 2;

[0093] 11) The PZT piezoelectric ceramic 15 of the local laser 2 is driven by the control voltage signal and tracks and locks the phase of the interference signal by changing the local laser frequency.

[0094] In an optional embodiment, the first attenuation sheet 7 and the second attenuation sheet 8 are both continuous neutral density attenuation sheets, and the laser attenuation process is performed by cascading two sub-attenuation sheets to simulate a spatial weak light signal. Furthermore, the OD value of the continuous neutral density attenuation sheet is 4, and by cascading two attenuation sheets, a laser of the order of 100mW can be attenuated to the order of 1nW to simulate a spatial weak light signal.

[0095] In an optional embodiment, the total reflective beam splitter 9 is used to change the optical path propagation direction of the weak light laser to generate interference;

[0096] The semi-reflective and semi-transmissive beam splitter 10 is used to generate heterodyne interference based on the local laser and the weak light laser and change the propagation direction of the optical path again to form the differential interference laser signal.

[0097] In an optional implementation, the phase tracking readout module 02 includes a digital phase meter and a local digitally controlled oscillator;

[0098] The input end of the digital phase meter is connected to the first output end of the analog-to-digital converter 12, and the digital phase meter is used to obtain the digital electrical signal output by the analog-to-digital converter 12, and perform phase resolution and tracking processing on the laser heterodyne interference signal based on the digital electrical signal to read the laser heterodyne interference phase signal;

[0099] The input end of the local numerically controlled oscillator is connected to the output end of the digital phase meter, and is used to generate an ideal phase signal according to a preset frequency value, and perform differential processing on the ideal phase signal and the laser heterodyne interference phase signal to generate a phase error signal.

[0100] For further information, see Figure 3 The schematic diagram of the structure of the FPGA control structure shown in FIG. 1 includes a phase tracking readout module 02 (i.e. Figure 3The phase tracking readout system in the phase tracking readout module 02) and the weak light phase locking control module 03. The phase tracking readout module 02 includes a digital phase meter and a local digital controlled oscillator. The input end of the digital phase meter is connected to the first output end of the analog-to-digital converter 12, obtains the input digital electrical signal, performs phase resolution and tracking on the heterodyne interference signal, and reads the interference phase signal. The local digital controlled oscillator generates an ideal phase signal according to a preset frequency, and generates a phase error signal by differentially performing with the digital interference phase signal. The phase error signal is the input signal of the phase readout loop. The bandwidth of the digital phase meter used in the phase tracking readout module 02 is 100kHz-1MHz, preferably 1MHz. The phase tracking readout module 02 of this embodiment can effectively restore the interference phase information, suppress the influence of the spatial optical path and environmental factors on the low-frequency noise of the interference phase signal below the 1Hz frequency band, especially in the gravitational wave source frequency band of 0.1mHz-1mHz, and realize high-precision phase locking from local laser to weak light laser. Figure 3 The process includes: In the fast phase-locked loop, the input signal passes through Figure 3 The black dashed line depicts that the analog-to-digital converter 12 (ADC) collects and quantizes the digital voltage signal, performs differential operation with the digital control oscillator of the preset frequency, and filters out the high-frequency signal component through a low-pass filter to obtain a phase error voltage signal. The phase error voltage signal is used as the control signal input of the PID1 controller, and after the PID1 operation, it is sent to the override controller (OC) to wait for the algorithm to decide whether to use it as the output of the control system.

[0101] In the phase readout loop, the input signal is passed through Figure 3 The black solid line depicts that the analog-to-digital converter 12 (ADC) collects and quantizes the digital voltage signal, which is then input into the digital phase meter for phase tracking and resolution to accurately read out the heterodyne interference phase signal. The heterodyne interference phase signal is differentially calculated with a numerically controlled oscillator of a preset frequency to obtain a phase error voltage signal after noise is filtered out. The phase error voltage signal enters the phase readout loop as the control signal input of the PID2 controller, and is sent to the override controller (OC) after being calculated by the PID2 controller, waiting for the algorithm to decide whether to use it as the output of the control system. In the override controller, the integral external feedback is transmitted through Figure 3 As shown in the red dotted line, the integral component in the control signal output by the override controller is fed back, and the adaptive state machine control method is used to determine which loop is currently used as the closed loop. Therefore, the control signal output by the override controller is the control signal of the closed loop, which realizes the integral effect of the non-closed loop tracking the closed loop, thereby avoiding the control overshoot caused by integral saturation and ensuring that the system can smoothly transition between different control loops.

[0102] In an optional implementation, the weak light phase-locked control module 03 includes a fast phase-locked loop, a phase readout loop and an override controller;

[0103] The input end of the fast phase-locked loop is connected to the second output end of the analog-to-digital converter 12, and the fast phase-locked loop is used to perform a phase modulation and phase lock on the phase of the laser heterodyne interference signal based on the electrical signal containing phase error information;

[0104] The input end of the phase readout loop is connected to the output end of the local numerically controlled oscillator, the output end of the phase readout loop is connected to the first input end of the override controller, and the phase readout loop is used to perform secondary modulation and phase locking on the phase of the laser heterodyne interference signal based on the phase error signal;

[0105] The second input end of the override controller is connected to the output end of the fast phase-locked loop, and the output end of the override controller is connected to the input end of the digital-to-analog converter 13. The override controller is used to select a control signal output from the fast phase-locked loop and the phase readout loop to enable disturbance-free switching of the control loop of the FPGA control structure. The primary modulation and phase locking are coarse modulation and phase locking operations, and the secondary modulation and phase locking are fine modulation and phase locking operations, that is, the accuracy of the secondary modulation and phase locking is higher than that of the primary modulation and phase locking.

[0106] Further, such as Figure 3 As shown, the weak light phase-locked control module 03 includes a fast phase-locked loop, a phase readout loop and an override controller. The input end of the fast phase-locked loop is connected to the second output end of the analog-to-digital converter 12, the input signal is a digital electrical signal with phase error information output by the analog-to-digital converter 12, the output end of the fast phase-locked loop is connected to the second input end of the override controller, and the fast phase-locked loop modulates the interference laser phase once through the PID algorithm to achieve fast phase locking; the input signal of the phase readout loop is a phase error signal obtained by differentiating the interference phase signal from the ideal phase signal, the output end of the phase readout loop is connected to the first input end of the override controller, and the phase readout loop modulates the interference laser phase twice through the self-tuning PID algorithm to achieve high-precision phase locking; the input end of the override controller is connected to the output end of the fast phase-locked loop and the output end of the weak light phase-locked control system, the output end of the override controller is connected to the input end of the digital-to-analog converter 13, and the override controller selects one control signal output according to the algorithm to achieve disturbance-free switching of the control loop.

[0107] Furthermore, the digital phase meter significantly suppresses low-frequency noise and achieves high-precision phase locking by tracking the heterodyne interference signal to restore phase information. The override controller uses an integral external feedback method to suppress the integral saturation link, so that the non-closed loop tracks the integral action of the closed loop, thereby avoiding the control overshoot caused by integral saturation and ensuring smooth transition of the system between different control loops. The override controller introduced in this embodiment eliminates the sensitivity of the phase readout loop to the amplitude fluctuation of the heterodyne interference signal, ensures the stability and high precision of the weak-light phase-locked control system, and expands the tracking bandwidth of this embodiment in the gravitational wave interferometer. This embodiment can effectively overcome the sensitivity of the phase meter to amplitude fluctuations. Due to the introduction of the override controller and the fast phase-locked loop, the bandwidth of the control system is expanded, and the ability to track the high-frequency phase changes of the weak-light laser 1 is strong. At the same time, the disturbance-free switching of the control loop can make the phase readout loop enter the phase-locked state without experiencing overshoot oscillation, thereby enhancing the stability and response speed of the control system.

[0108] Furthermore, in actual application, the control system of this embodiment includes a weak-light laser spatial free optical path and a local laser free optical path, such as Figure 2 As shown, the two light paths generate heterodyne interference lasers in the semi-reflective and semi-transmissive beam splitter 10, and propagate to the photodetector 11 to be converted into analog electrical signals. First, the spatial free light path of the weak light laser is generated along the optical axis direction from the first NPRO solid laser (weak light laser 1) with a central wavelength of 1064nm, and passes through the first polarizer mirror 3, the first Faraday isolator 5, the first attenuation plate 7 and the full-reflective beam splitter 9 in sequence, and propagates to the semi-reflective and semi-transmissive beam splitter 10 to generate heterodyne interference lasers. The first polarizer mirror 3 is composed of a 1 / 4 wave plate and a 1 / 2 wave plate. The 1 / 4 wave plate converts circularly polarized light into linearly polarized light, and the 1 / 2 wave plate adjusts the polarization state of linearly polarized light. The first Faraday isolator 5 realizes optical signal isolation, prevents reflected light from returning to the laser, and protects the weak light laser 1. The first attenuation plate 7 is a continuous neutral density attenuation plate with an OD value of 4. Through cascading, it can simulate the optical power attenuation of millions of kilometers and simulate weak light interference conditions.

[0109] The local laser space free light path is generated along the optical axis direction from the NPRO solid laser (local laser 2) with a central wavelength of 1064nm, and passes through the second polarizer mirror 4, the second Faraday isolator 6 and the second attenuation plate 8 in sequence, and propagates to the semi-reflective and semi-transmissive beam splitter 10 to generate heterodyne interference laser. The second polarizer mirror 4 is composed of a 1 / 4 wave plate and a 1 / 2 wave plate. The 1 / 4 wave plate converts circularly polarized light into linearly polarized light, and the 1 / 2 wave plate adjusts the polarization state of linearly polarized light. The second Faraday isolator 6 realizes optical signal isolation, prevents reflected light from returning to the local laser 2, and protects the laser. The second attenuation plate 8 is a continuous neutral density attenuator with an OD value of 4. By adjusting the attenuation plate, the satellite local laser light power intensity can be simulated.

[0110] The laser heterodyne interference signal is converted into an analog electrical signal by a photoelectric detector 11, and the photoelectric conversion efficiency is 13 kV / W. The analog electrical signal is collected by an analog-to-digital converter 12 and input into the FPGA control structure.

[0111] During the operation of the control system, the digital-to-analog converter 13 receives the digital output signal of the FPGA control structure, converts it into an analog voltage signal, and increases the control gain through the PZT drive amplifier 14. The voltage amplification gain is 30V / V. The amplified analog voltage signal modulates the phase of the local laser 2 through the PZT piezoelectric ceramic 15 to track the phase of the weak light laser 1 and achieve phase locking at the preset heterodyne frequency.

[0112] In summary, the present embodiment provides a digital weak light phase-locked control system and method based on phase readout. The system realizes fast, high-precision, and long-term automatic phase locking under extremely weak light conditions through a carefully designed laser interference and photoelectric conversion structure 01, a phase tracking readout module 02, and a weak light phase-locked control module 03. The present embodiment adopts a phase readout scheme, which significantly suppresses low-frequency noise, so that the residual phase noise level is further close to the requirements of intersatellite link detection. The introduction of an override controller and a fast phase-locked loop realizes fast lock-in and disturbance-free switching of the control loop, effectively overcoming the limitations of the prior art, such as the sensitivity of the phase meter to amplitude fluctuations, expanding the control bandwidth, and improving the stability and response speed of the control system. The adaptive state machine control method implemented in the present embodiment enables the system to realize automatic phase locking at startup, and at the same time has the ability to re-lock when the system loses lock after being disturbed by the environment. In addition, the adaptive state machine control method still uses parameter self-tuning technology, which can further suppress phase noise, improve phase locking accuracy, and significantly extend the phase locking time.

[0113] According to an embodiment of the present invention, an embodiment of a digital weak-light phase-locked control method based on phase readout is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in an order different from that shown here.

[0114] In this embodiment, a digital weak light phase locking control method based on phase readout is provided, which can be used Figures 1 to 3 In the control system shown, Figure 4 is a flow chart of a digital weak light phase locking control method based on phase readout according to an embodiment of the present invention. Figure 4 As shown, the process includes the following steps:

[0115] Step 0: Initialize various parameters in the digital weak-light phase-locked control system.

[0116] For further information, see Figure 5 The state transition diagram of the control method shown in FIG. 1 shows, step 0 of this embodiment is the first state of the control system, and is also Figure 5 The initialization state S0 of the control system is that all parameters of the control system are initialized and set in this state. Once the initialization is completed, the control system will automatically transition to the second state.

[0117] Step 1: Periodically scan the laser heterodyne interference signal within a target frequency range. The target frequency range may be a 10 MHz bandwidth.

[0118] Further, step 1 of this embodiment is to control the second state of the system, which is also Figure 5 Scanning state S1, in this state, the FPGA control structure controls the output voltage of the digital-to-analog converter 13 (DAC) to deviate at a speed of 0.3mV / s so as to periodically scan the heterodyne interference signal within a 10MHz bandwidth. When the difference (Δf) between the frequency value of the laser heterodyne interference signal and the preset frequency value is within the 1MHz threshold range (Th1), it switches to the third state S2.

[0119] Step 2: When the difference between the frequency value of the laser heterodyne interference signal and the preset frequency value is within a first target threshold range, the fast phase-locked loop is closed to perform a modulation and phase locking process, and the integral external feedback mechanism is activated in the phase readout loop to track the output of the fast phase-locked loop. The first target threshold range may be a 1 MHz threshold range.

[0120] Further, step 2 of this embodiment is to control the third state of the system, which is also Figure 5 The coarse phase-locked state S2, in which the fast phase-locked loop is closed for phase locking, and the phase readout loop activates the integral external feedback to track the output of the closed loop to prevent integral saturation; when the difference (Δf) between the frequency value of the laser heterodyne interference signal and the preset frequency value is within the 1Hz threshold range (Th2), it is judged that the fast phase-locked loop is correctly locked, and after adjusting the time ts1, it is converted to the fourth state S3; when the difference (Δf) between the frequency value of the heterodyne interference signal and the set frequency value exceeds the 1MHz threshold range (Th1), it is judged that the fast phase-locked loop fails to lock, and after adjusting the time ts1, it is converted to the scanning state S1. If the difference (Δf) between the frequency value of the laser heterodyne interference signal and the preset frequency value is within the 1Hz threshold range (Th2) to the 1MHz threshold range (Th1), step 2 is executed cyclically.

[0121] Step 3, after the primary modulation and phase locking process, when the difference between the frequency value of the laser heterodyne interference signal and the preset frequency value is within the second target threshold value range, the phase readout loop is closed to perform secondary modulation and phase locking process, and the integral external feedback mechanism is activated in the fast phase-locked loop to track the output of the closed phase readout loop; the second target threshold value is less than the first target threshold value. The second target threshold value can be a 1 Hz threshold range.

[0122] Further, step 3 of this embodiment is the fourth state of the control system, which is also Figure 5 The phase readout phase-locked state S3, in which the phase readout loop is closed for phase locking, and the fast phase-locked loop activates the integral external feedback to track the output of the closed loop. When the difference (Δf) between the frequency value of the laser heterodyne interference signal and the preset frequency value is within the 1Hz threshold range (Th2), the phase readout loop is judged to be correctly locked. After adjusting the time ts2, it is converted to the fifth state S4. When the difference (Δf) between the frequency value of the laser heterodyne interference signal and the preset frequency value exceeds the 1MHz threshold range (Th1), it is judged that the fast phase-locked loop fails to lock. After adjusting the time ts2, it is converted to the third state S2. If the difference (Δf) between the frequency value of the laser heterodyne interference signal and the preset frequency value is within the 1Hz threshold range (Th2) to the 1MHz threshold range (Th1), step 3 is executed cyclically.

[0123] Step 4, after the secondary modulation and phase locking processing, when the difference between the frequency value of the laser heterodyne interference signal and the preset frequency value is still within the second target threshold range, the integral saturation term in the phase readout loop is turned off to maintain phase locking and achieve the target phase locking accuracy.

[0124] In an optional implementation, the step 4 further includes:

[0125] When the difference between the frequency value of the laser heterodyne interference signal and the preset frequency value exceeds the second target threshold range, the process switches to step 3.

[0126] Further, step 4 of this embodiment is the fifth state of the control system, which is also Figure 5The high-precision phase-locked state S4 is entered. In this state, the integral saturation term of the phase readout loop is turned off to maintain phase lock and achieve the highest phase lock accuracy. When the difference (Δf) between the frequency value of the laser heterodyne interference signal and the preset frequency value exceeds the 1Hz threshold range (Th2), it is converted to the third state S3, otherwise the state is maintained in a loop. In view of the complexity of the external environment, this embodiment designs a control method based on an adaptive state machine. By utilizing the advantages of flexible and adjustable parameters of the digital control system, the system state can be self-identified, thereby self-tuning the control system parameters to achieve fast, high-precision, and long-term automatic phase locking under extremely weak light interference conditions.

[0127] In summary, the present embodiment provides a digital weak light phase-locked control system and method based on phase readout. The system realizes fast, high-precision, and long-term automatic phase locking under extremely weak light conditions through a carefully designed laser interference and photoelectric conversion structure 01, a phase tracking readout module 02, and a weak light phase-locked control module 03. The present embodiment adopts a phase readout scheme, which significantly suppresses low-frequency noise, so that the residual phase noise level is further close to the requirements of intersatellite link detection. The introduction of an override controller and a fast phase-locked loop realizes fast lock-in and disturbance-free switching of the control loop, effectively overcoming the limitations of the prior art, such as the sensitivity of the phase meter to amplitude fluctuations, expanding the control bandwidth, and improving the stability and response speed of the control system. The adaptive state machine control method implemented in the present embodiment enables the system to realize automatic phase locking at startup, and at the same time has the ability to re-lock when the system loses lock after being disturbed by the environment. In addition, the adaptive state machine control method still uses parameter self-tuning technology, which can further suppress phase noise, improve phase locking accuracy, and significantly extend the phase locking time.

[0128] The embodiment of the present invention also provides a computer device, see Figure 6 , Figure 6 is a schematic diagram of the structure of a computer device provided by an optional embodiment of the present invention, such as Figure 6As shown, the computer device includes: one or more processors 610, memory 620, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components are connected to each other using different buses for communication, and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple computer devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 6 A processor 610 is taken as an example.

[0129] The processor 610 may be a central processing unit, a network processor or a combination thereof. The processor 610 may further include a hardware chip. The hardware chip may be a dedicated integrated circuit, a programmable logic device or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable logic gate array, a general purpose array logic or any combination thereof.

[0130] The memory 620 stores instructions executable by at least one processor 610, so that the at least one processor 610 executes the method shown in the above embodiment.

[0131] The memory 620 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created according to the use of the computer device, etc. In addition, the memory 620 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 620 may optionally include a memory remotely arranged relative to the processor 610, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0132] The memory 620 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive; the memory 620 may also include a combination of the above types of memory.

[0133] The computer device also includes a communication interface 630, which is used for the computer device to communicate with other devices or a communication network.

[0134] The embodiment of the present invention also provides a computer-readable storage medium. The method according to the embodiment of the present invention can be implemented in hardware, firmware, or can be implemented as a computer code that can be recorded in a storage medium, or can be implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium through a network download, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state hard disk, etc.; further, the storage medium can also include a combination of the above types of memories. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor, or hardware, the method shown in the above embodiment is implemented.

[0135] A part of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the existence of the computer program instruction in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc., and accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium accessible to the computer.

[0136] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the defined scope.

Claims

1. A digital weak light phase-locked control system based on phase readout, characterized in that: The system comprises: a laser interference and photoelectric conversion structure, a phase tracking readout module and a weak light phase locking control module connected to each other; The laser interference and photoelectric conversion structure is used to generate a laser heterodyne interference signal based on a local laser and a weak light laser, and convert the signal into an electrical signal to be input into the phase tracking readout module; The phase tracking readout module is used to track the phase of the laser heterodyne interference signal through an electrical signal, and calculate the phase error information to input into the weak light phase locking control module; The weak light phase locking control module is used to control the frequency of the local laser based on the phase error information, and lock the local laser to the phase of the weak light laser.

2. The system according to claim 1, characterized in that The laser interference and photoelectric conversion structure comprises: a laser group, a polarizing lens group, a Faraday isolator group, an attenuation plate group, a beam splitter group, a photoelectric detector, an analog-to-digital converter, a digital-to-analog converter, a PZT drive amplifier and a PZT piezoelectric ceramic connected in sequence; a digital-to-analog converter The laser group is used to emit two different lasers; the laser group includes a local laser and a weak light laser, the local laser is used to emit the local laser, and the weak light laser is used to emit the weak light laser; The polarizer lens group, the Faraday isolator group and the attenuation plate group are combined to adjust the polarization state and intensity of the two different lasers to simulate weak light interference conditions; The beam splitter group is used to generate the laser heterodyne interference signal and change the optical path propagation direction again to form a differential interference laser signal; The photodetector is used to convert the differential interference laser signal into an electrical signal containing phase error information; The analog-to-digital converter is used to collect analog electrical signals from the photodetector and convert them into digital electrical signals for input into the FPGA control structure; the FPGA control structure includes the phase tracking readout module and the weak light phase locking control module; The digital-to-analog converter is used to collect digital electrical signals from the FPGA control structure and convert them into analog electrical signals for input into the PZT drive amplifier; The PZT driving amplifier is used to perform gain amplification processing on the analog electrical signal and input it to the PZT piezoelectric ceramic of the local laser; The PZT piezoelectric ceramic is used to control the frequency of the local laser based on the analog electrical signal after gain amplification processing, so as to lock the local laser to the phase of the weak light laser.

3. The system according to claim 2, characterized in that The polarizer lens group is used to adjust the polarization states of the two different lasers; The Faraday isolator group is used to prevent reverse light from entering the laser group; The attenuation sheet group is used to adjust the intensity of the two different lasers to simulate weak light interference conditions.

4. The system according to claim 2, characterized in that The polarizer group includes a first polarizer and a second polarizer; the Faraday isolator group includes a first Faraday isolator and a second Faraday isolator; the attenuation plate group includes a first attenuation plate and a second attenuation plate; the beam splitter group includes a fully reflective beam splitter and a semi-reflective and semi-transmissive beam splitter; The output end of the weak light laser is connected to the input end of the total reflection beam splitter through the first polarizer mirror, the first Faraday isolator, and the first attenuation plate in sequence; The output end of the local laser is connected to the first input end of the semi-reflective and semi-transmissive beam splitter through the second polarizer mirror, the second Faraday isolator and the second attenuation plate in sequence; the output end of the total reflection beam splitter is connected to the second input end of the semi-reflective and semi-transmissive beam splitter; The output end of the semi-reflective and semi-transmissive beam splitter is connected to the input end of the FPGA control structure through the photodetector and the analog-to-digital converter in sequence; The output end of the FPGA control structure is connected to the input end of the local laser through the digital-to-analog converter, the PZT drive amplifier and the PZT piezoelectric ceramic in sequence.

5. The system according to claim 4, characterized in that The first attenuation sheet and the second attenuation sheet are both continuous neutral density attenuation sheets, and laser attenuation processing is performed by cascading two sub-attenuation sheets to simulate spatial weak light signals.

6. The system according to claim 4, characterized in that The total reflective beam splitter is used to change the optical path propagation direction of the weak light laser to generate interference; The semi-reflective and semi-transmissive beam splitter is used to generate heterodyne interference based on the local laser and the weak light laser and change the propagation direction of the optical path again to form the differential interference laser signal.

7. The system according to claim 2, characterized in that The phase tracking readout module includes a digital phase meter and a local digitally controlled oscillator; The input end of the digital phase meter is connected to the first output end of the analog-to-digital converter, and the digital phase meter is used to obtain the digital electrical signal output by the analog-to-digital converter, and perform phase resolution and tracking processing on the laser heterodyne interference signal based on the digital electrical signal to read the laser heterodyne interference phase signal; The input end of the local numerically controlled oscillator is connected to the output end of the digital phase meter, and is used to generate an ideal phase signal according to a preset frequency value, and perform differential processing on the ideal phase signal and the laser heterodyne interference phase signal to generate a phase error signal.

8. The system according to claim 7, characterized in that The weak light phase-locked control module includes a fast phase-locked loop, a phase readout loop and an override controller; The input end of the fast phase-locked loop is connected to the second output end of the analog-to-digital converter, and the fast phase-locked loop is used to perform a phase modulation and phase lock on the phase of the laser heterodyne interference signal based on the electrical signal containing phase error information; The input end of the phase readout loop is connected to the output end of the local numerically controlled oscillator, the output end of the phase readout loop is connected to the first input end of the override controller, and the phase readout loop is used to perform secondary modulation and phase locking on the phase of the laser heterodyne interference signal based on the phase error signal; The second input end of the override controller is connected to the output end of the fast phase-locked loop, and the output end of the override controller is connected to the input end of the digital-to-analog converter. The override controller is used to select a control signal output from the fast phase-locked loop and the phase readout loop to enable disturbance-free switching of the control loop of the FPGA control structure.

9. A digital weak light phase-locked control method based on phase readout, characterized in that: The method is applied to a digital weak-light phase-locked control system based on phase readout according to any one of claims 1 to 8, and the method comprises: Step 0, initializing various parameters in the digital weak light phase-locked control system; Step 1, periodically scanning the laser heterodyne interference signal within a target frequency range; Step 2: When the difference between the frequency value of the laser heterodyne interference signal and the preset frequency value is within the first target threshold range, the fast phase-locked loop is closed to perform a modulation and phase locking process, and the integral external feedback mechanism is activated in the phase readout loop to track the output of the fast phase-locked loop; Step 3, after the primary modulation and phase locking process, when the difference between the frequency value of the laser heterodyne interference signal and the preset frequency value is within the second target threshold value range, the phase readout loop is closed to perform secondary modulation and phase locking process, and the integral external feedback mechanism is activated in the fast phase-locked loop to track the output of the closed phase readout loop; the second target threshold value is less than the first target threshold value; Step 4: After the secondary modulation and phase locking processing, when the difference between the frequency value of the laser heterodyne interference signal and the preset frequency value is still within the second target threshold range, the integral saturation term in the phase readout loop is turned off to maintain phase locking and achieve the target phase locking accuracy.

10. The method according to claim 9, characterized in that The step 4 further includes: When the difference between the frequency value of the laser heterodyne interference signal and the preset frequency value exceeds the second target threshold range, switching to step 3 is performed.

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