10-path RS422 interface and UWB interface conversion terminal and conversion method based on FPGA

Abstract

The invention provides a 10-path RS422 interface and UWB interface conversion terminal and method based on an FPGA, belongs to the technical field of satellite wireless communication, and solves the problem that the existing RS422 interface and UWB interface conversion terminal cannot realize simultaneous multi-path RS422 interface full duplex transmission, and the conversion terminal comprises an RS422 terminal module, an interface conversion module, a UWB module and a power supply module; the RS-422 interface module is used for carrying out mutual conversion on an RS422 differential signal and a TTL (Transistor-Transistor Logic) level single-ended signal; the conversion interface module is used for splitting and synthesizing single-ended signals of TTL (Transistor-Transistor Logic) levels; the UWB module is used for receiving the synthesized TTL level single-ended signal, converting the synthesized TTL level single-ended signal into a UWB signal and performing data transmission through a UWB antenna; and the power supply module is used for supplying power to the RS422 interface chip, the main controller and the DW1000 chip.

Description

Technical Field

[0001] The invention relates to a 10-channel RS422 interface and UWB interface conversion terminal and a conversion method based on FPGA, belonging to the technical field of satellite wireless communication. Background Art

[0002] In recent years, with the increasing demand for space exploration, the number and types of space exploration payloads have gradually increased. In addition, the hardware interfaces of various payloads are different, and the transmission rates are different, which makes it difficult to conduct experiments and tests. Traditional satellite data distribution mostly uses wired data interfaces or systems, such as 1553B, CAN, SpaceWire standard bus, RS422, etc. Most of these communication standards use redundant cables to improve reliability, thereby increasing the complexity and quality of satellite harnesses. At the same time, wireless communication technology is developing rapidly, and its technical features such as cable-free and easy maintenance are very suitable for experiments and tests. The above redundant design has a more obvious impact on the quality, assembly and testing of spacecraft. Therefore, the use of wireless communication in the satellite cabin can effectively solve the problem of different transmission rates of different hardware interfaces and effectively improve the efficiency of joint debugging.

[0003] RS422 stands for "Electrical Characteristics of Balanced Voltage Digital Interface Circuits". This standard is developed from RS232. Compared with RS232, its transmission rate and transmission distance are greatly improved. And because RS422 adopts balanced drive and differential signal transmission, it solves the level offset problem of RS232 single-ended transmission, and has the characteristics of high common mode rejection ratio and strong anti-interference ability. Therefore, RS422 standard is widely used in the design of serial communication interface.

[0004] UWB (Ultra Wide Band) is an ultra-wideband wireless communication technology. Its essential difference from conventional communication systems is that it uses nanosecond narrow pulses to transmit data. Therefore, compared with narrowband systems, UWB technology has obvious advantages such as stronger anti-interference, higher transmission rate, wider bandwidth, lower power consumption, good confidentiality and higher positioning accuracy.

[0005] The RS-422 interface and UWB interface conversion terminal can realize short-distance wireless communication of the satellite payload, which can effectively improve the flexibility and adaptability of the satellite communication, reduce the weight of the cable and save costs. This topic has high application value and practical significance.

[0006] Defects and deficiencies of the existing technology: 1. In the current domestically designed RS422 interface and UWB interface conversion terminal, the single aerospace machine A sends the RS422 signal to the cableless transmission system, and the core processing unit MCU in the cableless transmission system converts the RS422 signal into a UWB signal, and then uses the UWB antenna to perform wireless transmission communication in the cabin. When facing multiple RS422 interfaces, this design can only use one cableless transmission system for each channel, which is costly and complex in structure. 2. At present, the RS422 interface and UWB interface conversion terminal designed abroad uses the independently designed VN360 UWB module, the controller of which is STM32L486, a single-core microcontroller based on the ARM Cortex-M4 core, which does not have parallel processing capabilities. Similarly, when facing multiple RS422 interfaces, only one VN360 UWB module can be used for each channel, which is costly and complex in structure.

[0007] In summary, for a RS422 interface and UWB interface conversion terminal, if multiple RS422 interfaces are required to realize full-duplex transmission at the same time, there is currently no good design solution. Summary of the invention

[0008] The present invention aims to solve the problem that the existing RS422 interface and UWB interface conversion terminal cannot realize simultaneous multi-channel RS422 interface full-duplex transmission, and further proposes a 10-channel RS422 interface and UWB interface conversion terminal and a conversion method based on FPGA.

[0009] The technical solution adopted by the present invention to solve the above problems is: the FPGA-based 10-way RS422 interface and UWB interface conversion terminal proposed by the present invention comprises:

[0010] RS-422 terminal module, interface conversion module, UWB module and power module;

[0011] The RS-422 interface module is used to convert RS422 differential signals to TTL level single-ended signals.

[0012] The conversion interface module is used to split and synthesize single-ended signals at the TTL level;

[0013] The UWB module is used to receive the synthesized 1-way TTL level single-ended signal and convert it into a UWB signal, and transmit the data through the UWB antenna;

[0014] The power module is used to supply power to the RS422 interface chip, the main controller and the DW1000 chip.

[0015] Preferably, the RS-422 terminal module includes 10 RS422 channels and 20 RS422 interface chips, the RS422 interface chip is used to convert 10 RS422 differential signals received from the 10 RS422 channels into single-ended signals at TTL levels and convert the split 10 TTL-level single-ended signals into RS422 differential signals and input them into the corresponding 10 RS422 channels.

[0016] Preferably, the interface conversion module includes a main controller, a combiner and a splitter;

[0017] The main controller uses FPGA chip to design the control logic of combiner and splitter;

[0018] The combiner is used to combine 10 TTL-level single-ended signals into 1 TTL-level signal;

[0019] The splitter is used to split 1 TTL level signal into 10 TTL level signals.

[0020] Preferably, the UWB module includes a DW1000 chip and a UWB antenna;

[0021] The DW1000 chip is connected to the main controller via the SPI bus and is used to convert TTL level single-ended signals into UWB signals;

[0022] UWB antenna is used for data transmission between UWB modules.

[0023] The FPGA-based 10-channel RS422 interface and UWB interface conversion method includes:

[0024] Step 1: The first RS422 terminal module converts 10 RS422 differential signals received from 10 RS422 channels into single-ended signals at TTL levels via the RS422 interface chip IL422E, and inputs the 10 single-ended signals at TTL levels into the first interface conversion module;

[0025] Step 2: The 10-channel TTL-level single-ended signals are synthesized into one TTL-level single-ended signal through the combiner logic designed in the FPGA chip in the first interface conversion module, and the synthesized one-channel TTL-level single-ended signal is input into the DW1000 chip of the first UWB module through the SPI bus;

[0026] Step 3: The DW1000 chip converts the received TTL level single-ended signal into a UWB signal and transmits the UWB signal through the UWB antenna in the second UWB module;

[0027] Step 4: The DW1000 chip of the second UWB module receives the transmitted UWB signal, and converts the UWB signal into a TTL level single-ended signal through the DW1000 chip in the second UWB module, and inputs the signal into the second interface conversion module;

[0028] Step 5: Split 1 TTL-level single-ended signal into 10 TTL-level single-ended signals through the splitter logic designed in the FPGA chip in the second interface conversion module, input the 10 TTL-level single-ended signals into the second RS422 terminal module, convert them into RS422 differential signals through the RS422 interface chip, and input them into the corresponding 10 RS422 channels, thus completing the conversion of the single-ended signals;

[0029] Step 6: According to the logic in step 1 to step 5, 10 RS422 differential signals are input into the second interface conversion module via the second RS422 terminal module to be synthesized into 1 TTL level single-ended signal, and are input into the first interface conversion module via the second UWB module and the first UWB module to be split into 10 TTL level single-ended signals, and the 10 TTL level single-ended signals are input into the first RS422 terminal module to be converted into RS422 differential signals and input into the corresponding 10 RS422 channels, thereby completing the conversion of single-ended signals;

[0030] Step 7: Repeat steps 1-6 to quickly switch the RS422 terminal module between sending and receiving to achieve full-duplex transmission.

[0031] The beneficial effects of the present invention are:

[0032] (1) The present invention can achieve full-duplex transmission with good performance by controlling the working mode of DW1000.

[0033] (2) The present invention uses FPGA as the main control chip, which has strong processing capability and has good processing capability for multiple RS422 interfaces. That is, it uses a combiner and splitter design to combine multiple RS422 signals into one TTL level single-ended signal or split one TTL level single-ended signal into multiple RS422 signals, and can simultaneously support the mutual conversion of up to 10 RS422 and UWB signals. Only one FPGA chip is needed for 10 RS422 signals, and both the space cost and the price cost are low. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 A structural block diagram of a 10-channel RS422 interface and UWB interface conversion terminal based on FPGA provided by the present invention;

[0035] Figure 2 A schematic diagram of a RS422 interface and UWB interface conversion terminal designed in China as background technology;

[0036] Figure 3 The schematic diagram of the VN 360 module structure of the RS422 interface and UWB interface conversion terminal designed by China Overseas for the background technology;

[0037] Figure 4 A schematic diagram of the structure of a RS422 interface and UWB interface conversion terminal designed by a foreign company for the background technology;

[0038] Figure 5 A schematic flow chart of a method for converting 10-channel RS422 interfaces to UWB interfaces based on FPGA provided by the present invention. DETAILED DESCRIPTION

[0039] Specific implementation method 1: Combination Figure 1-4 To illustrate this embodiment, Figure 1 As shown, the structure of the FPGA-based 10-channel RS422 interface and UWB interface conversion terminal described in this embodiment includes:

[0040] RS-422 terminal module, interface conversion module, UWB module and power module;

[0041] In this embodiment, the circuit is powered by 28V DC, and the RS-422 interface module includes 10 RS422 channels and 20 RS422 interface chips IL422E, which are used to convert RS422 differential signals to TTL level single-ended signals.

[0042] The interface conversion module includes: a main controller, a combiner, and a splitter. The main controller uses the FPGA chip XC7Z020-2CLG400I. This FPGA has high programmability and flexibility, can support the Verilog hardware description language, and can realize the functions of the combiner and the classifier; the combiner combines the 10 TTL-level single-ended signals into one TTL-level signal, and the splitter splits the one TTL-level signal into 10 TTL-level signals.

[0043] The UWB module includes: a DW1000 chip and a UWB antenna. The DW1000 chip is connected to the main controller via an SPI bus, and the UWB signal is sent via the UWB antenna. Meanwhile, the UWB antenna is used for data transmission between UWB modules.

[0044] The power supply part uses 28V to 5V DC-DC converter J10W24S05A, 5V to 3.3V DC-DC converter TPS74401RGWT, AMS1117-3.3, 5V to 1.8V DC-DC converter AMS1117-1.8 and isolated input chip DCR010505P, which are used to power the RS422 interface chip IL422E, FPGA and DW1000 chip respectively.

[0045] In this embodiment, the FPGA circuit is composed of XC7Z020-2CLG400I and simple peripheral circuits. The FPGA is equipped with 12 RS422 buses, 1 SPI bus and 1 JTAG interface. The FPGA is powered by DC3.3V and has 114 general I / O ports, which can well realize the design requirements proposed by the present invention.

[0046] In this implementation, the RS422 terminal module circuit is composed of 1 J30JA-66ZKW-J, 5 DCR010505P, 10 IL422E and simple peripheral circuits; J30JA-66ZKW-J is a 66-pin connector for connecting 10 RS422 channels and transmitting 10 RS422 data to IL422E. IL422E is an electrically isolated high-speed differential bus transceiver that can convert the differential signal of RS422 into a single-ended signal of TTL level; DCR010505P is a high-efficiency, input-isolated, output-regulated DCDC converter with the characteristics of high precision and low noise.

[0047] In this embodiment, the UWB module consists of 1 DW1000 chip, 1 HHM1595A1, 1 SMA and simple peripheral circuits; the DW1000 chip is a UWB RF signal transceiver chip, which has an SPI slave device interface and has the advantages of high integration, low power consumption and low cost; HHM1595A1 is a multi-layer balancer (balun), mainly used in the frequency range of 3GHz to 8GHz, which meets the design requirements proposed by the present invention; SMA is an ultra-small coaxial cable connector widely used in the RF and microwave industries, and can send UWB signals after being connected to the UWB antenna.

[0048] In this implementation, the power supply part is composed of 1 J10W24S05A, 2 TPS74401RGWT, 1 AMS1117-3.3, 1 AMS1117-1.8 and peripheral circuits; J10W24S05A is an ultra-wide voltage input 10W isolated voltage regulated DCDC module power supply, which meets the 28V voltage input requirement of this design, TPS74401RGWT is a single-output low-dropout voltage regulator with the advantage of fast transient response, AMS1117-3.3 and AMS1117-1.8 are both low-dropout linear regulators, they all have the advantages of low quiescent current, low voltage drop, high output current and thermal shutdown protection.

[0049] Through and Figure 2-4 Compared with the prior art shown in the figure, the 10-channel RS422 signal of the present invention only requires one FPGA chip, and the present invention can simultaneously support the mutual conversion of up to 10 channels of RS422 and UWB signals, has strong processing capability, and has low space cost and price cost, thus solving the problem in the prior art that simultaneous full-duplex transmission of multiple RS422 interfaces cannot be achieved.

[0050] Specific implementation method 2: Combination Figure 5 This embodiment is described as follows. Figure 5 As shown, the FPGA-based 10-way RS422 interface and UWB interface conversion method described in this embodiment includes:

[0051] S1: The first RS422 terminal module converts 10 RS422 differential signals received from 10 RS422 channels into single-ended signals at TTL level via the RS422 interface chip IL422E, and inputs the 10 single-ended signals at TTL level into the first interface conversion module;

[0052] S2: The 10-channel TTL-level single-ended signals are synthesized into one TTL-level single-ended signal through the combiner logic designed in the FPGA chip in the first interface conversion module, and the synthesized one-channel TTL-level single-ended signal is input into the DW1000 chip of the first UWB module through the SPI bus;

[0053] S3: The DW1000 chip converts the received TTL level single-ended signal into a UWB signal, and transmits the UWB signal through the UWB antenna in the second UWB module;

[0054] S4: The DW1000 chip of the second UWB module receives the transmitted UWB signal, and converts the UWB signal into a TTL level single-ended signal through the DW1000 chip in the second UWB module, and inputs the signal into the second interface conversion module;

[0055] S5: Split one TTL-level single-ended signal into 10 TTL-level single-ended signals through the splitter logic designed in the FPGA chip in the second interface conversion module, input the 10 TTL-level single-ended signals into the second RS422 terminal module, convert them into RS422 differential signals through the RS422 interface chip, and input them into the corresponding 10 RS422 channels, thus completing the conversion of single-ended signals;

[0056] S6: According to the logic in S1-S5, 10 RS422 differential signals are input into the second interface conversion module via the second RS422 terminal module to be synthesized into 1 TTL level single-ended signal, and are input into the first interface conversion module via the second UWB module and the first UWB module to be split into 10 TTL level single-ended signals, and the 10 TTL level single-ended signals are input into the first RS422 terminal module to be converted into RS422 differential signals via the RS422 interface chip and input into the corresponding 10 RS422 channels, thereby completing the conversion of single-ended signals.

[0057] S7: Repeat S1-S6 to quickly switch the RS422 terminal module between sending and receiving to achieve full-duplex transmission.

[0058] The above is only a preferred embodiment of the present invention and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment as above, it is not used to limit the present invention. Any technician familiar with this profession can make some changes or modify the technical contents disclosed above into equivalent embodiments without departing from the scope of the technical solution of the present invention. However, any simple modification, equivalent replacement and improvement made to the above embodiments without departing from the content of the technical solution of the present invention, based on the technical essence of the present invention, within the spirit and principles of the present invention, still fall within the protection scope of the technical solution of the present invention.

Claims

1. FPGA-based 10-channel RS422 interface and UWB interface conversion terminal, characterized in that: The structure of the FPGA-based 10-channel RS422 interface and UWB interface conversion terminal includes: RS-422 terminal module, interface conversion module, UWB module and power module; The RS-422 interface module is used to convert the differential signal of RS422 and the single-ended signal of TTL level into each other; The conversion interface module is used for splitting and synthesizing single-ended signals at the TTL level; The UWB module is used to receive the synthesized 1-way TTL level single-ended signal and convert it into a UWB signal, and transmit the data through the UWB antenna; The power module is used to supply power to the RS422 interface chip, the main controller and the DW1000 chip.

2. The FPGA-based 10-way RS422 interface and UWB interface conversion terminal according to claim 1, characterized in that: The RS-422 terminal module includes 10 RS422 channels and 20 RS422 interface chips. The RS422 interface chips are used to convert 10 RS422 differential signals received from the 10 RS422 channels into single-ended signals at TTL levels, and to convert the split 10 TTL-level single-ended signals into RS422 differential signals and input them into the corresponding 10 RS422 channels.

3. The FPGA-based 10-way RS422 interface and UWB interface conversion terminal according to claim 1, characterized in that: The interface conversion module includes a main controller, a combiner and a splitter; The main controller uses an FPGA chip to design the control logic of the combiner and splitter; The combiner is used to combine 10 TTL-level single-ended signals into one TTL-level signal; The splitter is used to split one TTL level signal into 10 TTL level signals.

4. The FPGA-based 10-way RS422 interface and UWB interface conversion terminal according to claim 1, characterized in that: The UWB module includes a DW1000 chip and a UWB antenna; The DW1000 chip is connected to the main controller via the SPI bus and is used to convert the TTL level single-ended signal into a UWB signal; The UWB antenna is used for data transmission between UWB modules.

5. A 10-way RS422 interface to UWB interface conversion method based on FPGA, applied to a 10-way RS422 interface to UWB interface conversion terminal based on FPGA according to any one of claims 1 to 4, characterized in that: include: Step 1: The first RS422 terminal module converts 10 RS422 differential signals received from 10 RS422 channels into single-ended signals at TTL levels via the RS422 interface chip IL422E, and inputs the 10 single-ended signals at TTL levels into the first interface conversion module; Step 2: The 10-channel TTL-level single-ended signals are synthesized into one TTL-level single-ended signal through the combiner logic designed in the FPGA chip in the first interface conversion module, and the synthesized one-channel TTL-level single-ended signal is input into the DW1000 chip of the first UWB module through the SPI bus; Step 3: The DW1000 chip converts the received TTL level single-ended signal into a UWB signal and transmits the UWB signal through the UWB antenna in the second UWB module; Step 4: The DW1000 chip of the second UWB module receives the transmitted UWB signal, and converts the UWB signal into a TTL level single-ended signal through the DW1000 chip in the second UWB module, and inputs the signal into the second interface conversion module; Step 5: Split 1 TTL-level single-ended signal into 10 TTL-level single-ended signals through the splitter logic designed in the FPGA chip in the second interface conversion module, input the 10 TTL-level single-ended signals into the second RS422 terminal module, convert them into RS422 differential signals through the RS422 interface chip, and input them into the corresponding 10 RS422 channels, thus completing the conversion of the single-ended signals; Step 6: According to the logic in step 1 to step 5, 10 RS422 differential signals are input into the second interface conversion module via the second RS422 terminal module to be synthesized into 1 TTL level single-ended signal, and are input into the first interface conversion module via the second UWB module and the first UWB module to be split into 10 TTL level single-ended signals, and the 10 TTL level single-ended signals are input into the first RS422 terminal module to be converted into RS422 differential signals and input into the corresponding 10 RS422 channels, thereby completing the conversion of single-ended signals; Step 7: Repeat steps 1-6 to quickly switch the RS422 terminal module between sending and receiving to achieve full-duplex transmission.

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