Preparation method, device and equipment of quantum state and storage medium

Abstract

The invention discloses a preparation method and device of a quantum state, equipment and a storage medium, and relates to the field of quantum. The method comprises the following steps: determining an initial quantum state of n quantum bits, wherein n is a positive integer; based on the n quantum bits and the Hamming weight k, constructing an initial first quantum state unitary transformation circuit through recursive decomposition; performing circuit depth compression on the weight allocation transformation operator based on idle quantum bits in the initial first quantum state unitary transformation circuit to obtain a first quantum state unitary transformation circuit; and acting the first quantum state unitary transformation circuit on the initial quantum state to obtain a first quantum state circuit. Idle quantum bits in an initial first quantum state unitary transformation circuit are used as auxiliary quantum bits, the operation parallelism of a quantum state preparation operator is improved through the auxiliary quantum bits, and circuit depth compression is performed on a weight distribution transformation circuit, so that the circuit depth of the first quantum state unitary transformation circuit is compressed; on this basis, the depth of the first quantum state circuit is compressed.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of quantum, and particularly to a method, apparatus, device, and storage medium for preparing a quantum state. Background Art

[0002] The Dicke state is a special quantum state and has extensive applications in various directions of quantum computing and quantum algorithms. The Dicke state of an n-qubit circuit is usually represented as where k represents that there are k qubits in the |1> state (excited state) in the system, and the remaining n - k qubits are in the |0> state (ground state). The Dicke state is a superposition state in which these excitations are symmetrically distributed among all qubits.

[0003] In the related art, the Dicke state preparation circuit framework consists of a weight distribution transformation and a relatively small Dicke state unitary matrix. In this framework, when implementing a multi-layer weight distribution transformation, due to the existence of some idle qubits, the circuit depth is relatively large. Summary of the Invention

[0004] The embodiments of the present application provide a method, apparatus, device, and storage medium for preparing a quantum state. The technical solutions are as follows:

[0005] According to one aspect of the embodiments of the present application, a method for preparing a quantum state is provided, and the method includes:

[0006] Determine the initial quantum state of n qubits, where n is a positive integer;

[0007] Based on n qubits and the Hamming weight k, construct an initial first quantum state unitary transformation circuit through recursive decomposition. The initial first quantum state unitary transformation circuit includes a recursively obtained weight distribution transformation operator and a k-qubit unitary transformation operator. Among them, the weight distribution transformation operator is used to distribute the Hamming weight of the first quantum state to multiple qubit strings, and the unitary transformation operator is used to evolve the quantum state of the qubit string to the first quantum state. The initial first quantum state unitary transformation circuit also includes idle qubits, and the idle qubits are qubits not occupied by the weight distribution transformation operator;

[0008] Based on the idle qubits in the initial first quantum state unitary transformation circuit, perform circuit depth compression on the weight distribution transformation operator to obtain a first quantum state unitary transformation circuit, and the first quantum state unitary transformation circuit is used to act on the initial quantum state to obtain a first quantum state circuit;

[0009] Act the first quantum state unitary transformation circuit on the initial quantum state to obtain a first quantum state circuit, and the first quantum state circuit includes k excited state qubits.

[0010] According to one aspect of the embodiments of the present application, there is provided an apparatus for preparing a quantum state, the apparatus comprising:

[0011] An initial quantum state acquisition module, configured to determine an initial quantum state of n quantum bits, where n is a positive integer;

[0012] A recursive decomposition module, configured to construct an initial first quantum state unitary transformation circuit by recursive decomposition based on n quantum bits and a Hamming weight k. The initial first quantum state unitary transformation circuit includes a recursively obtained weight distribution transformation operator and a k-qubit unitary transformation operator. Wherein, the weight distribution transformation operator is configured to distribute the Hamming weight of the first quantum state to multiple qubit strings, and the unitary transformation operator is configured to evolve the quantum state of the qubit string to the first quantum state. The initial first quantum state unitary transformation circuit further includes idle qubits, and the idle qubits are qubits not occupied by the weight distribution transformation operator;

[0013] A depth compression module, configured to perform circuit depth compression on the weight distribution transformation operator based on the idle qubits in the initial first quantum state unitary transformation circuit to obtain a first quantum state unitary transformation circuit, and the first quantum state unitary transformation circuit is configured to act on the initial quantum state to obtain a first quantum state circuit;

[0014] A quantum state preparation module, configured to act the first quantum state unitary transformation circuit on the initial quantum state to obtain a first quantum state circuit, and the first quantum state circuit includes k excited state qubits.

[0015] According to one aspect of the embodiments of the present application, there is provided a computer device, the computer device comprising a processor and a memory, and a computer program is stored in the memory. The computer program is loaded and executed by the processor to implement the above method.

[0016] According to one aspect of the embodiments of the present application, there is provided a computer-readable storage medium, and a computer program is stored in the readable storage medium. The computer program is loaded and executed by a processor to implement the above method.

[0017] According to one aspect of the embodiments of the present application, there is provided a computer program product, which includes a computer program stored in a computer-readable storage medium. A processor of a computer device reads the computer program from the computer-readable storage medium, and the processor executes the computer program, so that the computer device executes the above method.

[0018] The technical solutions provided by the embodiments of the present application may include the following beneficial effects:

[0019] First, based on n qubits and Hamming weight k, an initial first quantum state unitary transformation circuit is constructed through recursive decomposition. The idle qubits in the initial first quantum state unitary transformation circuit are used as auxiliary qubits, which improves the operation parallelism of the quantum state preparation operator. The circuit depth of the weight allocation transformation circuit is compressed, thereby compressing the circuit depth of the first quantum state unitary transformation circuit. On this basis, the depth of the first quantum state circuit is compressed. Brief Description of the Drawings

[0020] Figure 1 is a schematic diagram of the implementation environment of the solution provided by an embodiment of the present application;

[0021] Figure 2 is a flowchart of the method for preparing a quantum state provided by an embodiment of the present application;

[0022] Figure 3 is a schematic diagram of the Dicke state unitary matrix circuit framework provided by an embodiment of the present application;

[0023] Figure 4 is a flowchart of the method for preparing a quantum state provided by another embodiment of the present application;

[0024] Figure 5 is a schematic diagram of the grouping method of the Toffoli gate circuit provided by an embodiment of the present application;

[0025] Figure 6 is a schematic diagram of the grouping method of the Toffoli gate circuit provided by another embodiment of the present application;

[0026] Figure 7 is a block diagram of the device for preparing a quantum state provided by an embodiment of the present application;

[0027] Figure 8 is a block diagram of the device for preparing a quantum state provided by another embodiment of the present application;

[0028] Figure 9 is a block diagram of the structure of the computer device provided by an embodiment of the present application. Detailed Embodiments

[0029] Before introducing the technical solution of the present application, some terms related to the present application are explained. The following related explanations can be arbitrarily combined with the technical solution of the embodiment of the present application as an optional solution, and they all belong to the protection scope of the embodiment of the present application. The embodiment of the present application includes at least some of the following contents.

[0030] 1. Quantum computing: A computing method based on quantum logic, and the basic unit for storing data is Qubit, a quantum bit.

[0031] 2. Qubit: The basic unit of quantum computing. Traditional computers use 0 and 1 as the basic units of binary. Different from that, quantum computing can process 0 and 1 simultaneously, and the system can be in a linear superposition state of 0 and 1: |ψ> = α|0> + β|1>, where α and β represent the complex probability amplitudes of the system in 0 and 1. The square of their moduli |α| 2 , |β| 2 represent the probabilities of being in 0 and 1 respectively.

[0032] 3. Quantum state: The quantum state of a system, which can be expressed as a linear combination of various basis states. For example, for a system of 1 qubit, all possible basis states are 0 and 1, while for a system of three qubits, all possible basis states are 000, 001, 010, 011, 100, 101, 110, 111, a total of 8. Let these basis states be φ i , then the quantum state can be expressed as ∑ i c i φ i , where c i is the coefficient of the linear combination.

[0033] 4. Quantum circuit: A representation of a quantum universal computer, which represents the hardware implementation of the corresponding quantum algorithm / program under the quantum gate model. The quantum circuit acts on the quantum state to obtain a new quantum state and complete quantum computing. If the quantum circuit contains adjustable parameters of the control quantum gate, it is called a Parameterized Quantum Circuit (PQC) or a variational quantum circuit.

[0034] 5. Preparation of quantum entangled state refers to the process of making two or more quantum systems in an entangled state through a series of operations. Superconducting quantum circuits are a type of quantum system based on superconducting materials, which can be used to prepare and manipulate quantum entangled states. By precisely controlling the interaction between superconducting qubits, high-quality preparation of quantum entangled states can be achieved.

[0035] 6. Quantum circuit depth: It refers to the number of layers or depth of gate operations in a quantum circuit. A quantum circuit is used to describe the basic unit of quantum computing, which consists of qubits and quantum gates. If the quantum circuit depth is equal to the number of layers of quantum gates, it corresponds to the parallel running time of the quantum algorithm.

[0036] Due to the decoherence property of qubits, i.e., entanglement decreases with time, in order to ensure the operation effect of a quantum circuit, the smaller the depth of the quantum circuit, the better. The depth of a quantum circuit is an important indicator to measure the quality of a quantum circuit. Since the lifespan of qubits is relatively short, if a quantum circuit with a large depth is executed on a quantum device and the circuit has not been completed after the lifespan of the qubits ends, this will greatly affect the operation effect of the quantum circuit. In order to reduce the impact of an excessive quantum circuit depth on the operation effect of the quantum circuit, it is required that the quantum circuit has as small a circuit depth as possible. In the embodiments of the present application, a preparation method of Dicke states is provided That is, given an initial n-qubit quantum state |0 n >] and designing an n-qubit circuit C n such that this quantum circuit satisfies

[0037] 7. Qubit connectivity constraint: For superconducting quantum devices, two-qubit gates can only act on specific qubit pairs. There are various different types of qubit connectivity constraints, and common ones include path constraints and grid constraints. It is very important to design a quantum circuit of Dicke states under qubit connectivity constraints.

[0038] 8. Dicke states: They are a class of important entangled states and have wide applications in directions such as quantum networks, quantum game theory, and quantum algorithms. Especially for some quantum algorithms for solving combinatorial problems, such as noisy intermediate-scale quantum algorithms like variational quantum algorithms and adiabatic calculations, Dicke states are the initial quantum states of these algorithms.

[0039] Dicke states are equal-weight superpositions of all n quantum states under the Hamming weight k constraint. Exemplarily, the definition of the (n, k)-Dicke state is as follows:

[0040]

[0041] where the Hamming weight hw(x) represents the number of basis states that are 1 in the n-qubit string x, and the binomial coefficient In an n-qubit circuit in the Dicke state, each qubit is entangled with each other.

[0042] For example,

[0043]

[0044] 9. Basic symbols: [n] and [n]0 represent the integer sets {1, 2,..., n} and {0, 1, 2,..., n} respectively. For a set S, |S| represents the size of the set.

[0045] For any bit string X ∈ {0, 1}n , the Hamming weight hw(x) represents the number of 1s in the bit string x. If V represents the set of qubits, then the symbol |ψ> V represents that the |V|-qubit quantum state |ψ> is a quantum state on the set of qubits V. The symbol 0 k and 1 k respectively represent bit strings composed of k 0s and 1s. The symbol represents addition over the binary field.

[0046] 10. Dicke state unitary, also known as Dicke state unitary operator: An n-qubit Dicke state unitary satisfies where represents an (n, l)-Dicke state.

[0047] 11. Weight distribution block (WDB), also known as distribution operator: Let S1 and S2 respectively represent disjoint sets of qubits of size k. For any integers n ≥ m ≥ k, a 2k-qubit weight distribution block satisfies

[0048]

[0049] where if n - m < l - i, the binomial coefficient The weight distribution block is a transformation acting on the sets of qubits S1 and S2, whose role is to distribute l 1s on S1 to S1 and S2, and each distribution method is assigned a different weight. More specifically, when there are l 1s on S1, if i 1s and l - i 1s are respectively distributed to S2 and S1, then the weight

[0050] 12. If the circuit construction uses auxiliary qubits, the initial state of the qubits is all |0> and is also restored to |0> after the circuit ends.

[0051] 12.1 Reversible logic gate, namely the Toffoli gate. For any y ∈ {0, 1} n-1 , the n-qubit Toffoli gate Tof(y) is defined as follows. For any x ∈ {0, 1} n-1 and a ∈ {0, 1},

[0052]

[0053] That is, when the control bits x and y are equal, the target bit a is flipped; otherwise, the target bit remains unchanged. If no ancillary qubits are used, the n-qubit Toffoli gate can be implemented by a quantum circuit with depth O(n); if O(n) ancillary qubits are used, it can be implemented by a quantum circuit with depth O(log(n)).

[0054] 12.2 Summation transformation. For any x = x1x2…x n ∈{0, 1} n and t ∈{0, 1}, the summation transformation satisfies

[0055] The summation transformation can be implemented by a quantum circuit with depth O(log(n)).

[0056] 12.3 Copy transformation. For any x ∈{0, 1} n and integer p, if |x> is copied p times, the copy transformation satisfies:

[0057]

[0058] The copy transformation can be implemented by a circuit with depth O(log(p)).

[0059] 12.4 Controlled quantum state preparation. A (n, k)-controlled quantum state preparation is defined as follows:

[0060] |x>|0 k > → |x>|ψ x >, and |ψ x > is an arbitrary k-qubit quantum state. If N (N ≥ 0) ancillary qubits are used, any (n, k)-controlled quantum state preparation can be implemented by a quantum circuit with depth of a quantum circuit.

[0061] 12.5 CNOT circuit. A circuit consisting only of CNOT gates is called a CNOT circuit. Given N ≥ 0 ancillary qubits, the depth of any n-qubit CNOT circuit can be compressed to

[0062] In the embodiments of the present application, a circuit structure for preparing Dicke states with a circuit depth of O(log(k)log(n / k)+k) is proposed. The embodiments of the present application are mainly divided into two parts: (1) the circuit framework of the Dicke state preparation circuit, which is composed of a weight assignment transformation circuit and a Dicke state unitary transformation circuit; (2) in the circuit framework, some qubits are idle. In the embodiments of the present application, the idle qubits are used as auxiliary qubits to compress the weight assignment transformation circuit. In the construction of the Dicke state preparation circuit, the idle qubits are used as auxiliary qubits to construct the weight assignment transformation, so as to obtain a quantum circuit with a shallower depth.

[0063] To make the objectives, technical solutions, and advantages of the present application clearer, the embodiments of the present application will be described in further detail below with reference to the accompanying drawings.

[0064] Please refer to Figure 1 , which shows a schematic diagram of the solution implementation environment provided by an embodiment of the present application. The solution implementation environment may include: a terminal device 10 and a server 20.

[0065] The above terminal device 10 may be an electronic device such as a smart phone, a tablet computer, a notebook computer, a desktop computer, a smart speaker, a smart watch, smart home appliances, a multimedia playback device, a PC (Personal Computer), a smart robot, a vehicle-mounted terminal, a wearable device, etc. A client of a target application program may be installed in the terminal device 10, and the target application program may be any application program for preparing quantum states.

[0066] The above server 20 is used to provide background services for the client of the target application program in the terminal device 10. For example, the server 20 may be the background server of the above target application program. The above server 20 may be an independent physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, CDN (Content Delivery Network), and big data and artificial intelligence platforms. The embodiments of the present application do not limit this.

[0067] The terminal device 10 and the server 20 can communicate with each other through the network 30. The network 30 may be a wired network or a wireless network.

[0068] Exemplarily, the user initializes the initial quantum state of n qubits and configures the Hamming weight k in the client of the terminal device 10. Based on this data, the client first constructs an initial Dicke state unitary transformation circuit through recursive decomposition, and compresses the circuit depth of the weight assignment transformation circuit through the idle qubits in the initial Dicke state unitary transformation circuit, thereby obtaining a Dicke state unitary transformation circuit. The Dicke state unitary transformation circuit is applied to the initial quantum state to obtain a Dicke state circuit.

[0069] Optionally, the preparation process of the Dicke state circuit can also be completed by the server 20, and the embodiments of the present application do not limit this.

[0070] Next, the technical solution provided by the present application will be introduced and described through method embodiments.

[0071] Please refer to Figure 2 , which shows a flowchart of a method for preparing a quantum state provided by an embodiment of the present application. The execution subject of each step of this method can be Figure 1 the terminal device 10 or the server 20 in the implementation environment of the solution shown. For the sake of convenience of description, only the execution subject of each step being the "client in the terminal device 10" is introduced and described. This method may include at least one of the following steps (201 to 204):

[0072] Step 201, determining the initial quantum state of n qubits, where n is a positive integer.

[0073] The initial quantum state is used to indicate the initial basis states of each of the n qubits (such as all being 0), and the initial entanglement relationship between the n qubits (such as no entanglement). The embodiments of the present application do not limit the initial quantum state of the n qubits.

[0074] Step 202, based on n qubits and the Hamming weight k, constructing an initial first quantum state unitary transformation circuit through recursive decomposition.

[0075] Among them, the initial first quantum state unitary transformation circuit includes a recursively obtained weight assignment transformation operator and a k-qubit unitary transformation operator. The weight assignment transformation operator is used to allocate the Hamming weight of the first quantum state to multiple qubit strings, and the unitary transformation operator is used to evolve the quantum state of the qubit string to the first quantum state. The initial first quantum state unitary transformation circuit also includes idle qubits, and the idle qubits are qubits not occupied by the weight assignment transformation operator.

[0076] The weight distribution transformation operator is used to construct a weight distribution circuit, and through the weight distribution circuit, the Hamming weight of the first quantum state is distributed to multiple qubit strings. The unitary transformation operator is used to construct a unitary transformation circuit, and through the unitary transformation circuit, the quantum state of the qubit string is evolved to the first quantum state. Among them, a qubit string is a sequence composed of multiple qubits. For example, two qubits can form a qubit string, and the possible states of this string not only include "00", "01", "10" and "11" of the classical bit string, but also any superposition states of these states.

[0077] In some embodiments, the value of k is equal to the Hamming weight of the first quantum state, where the first quantum state refers to the quantum state to which n qubits need to be evolved, such as the Dicke state. For example, the above value of k is equal to the Hamming weight when n qubits are in the Dicke state. Among them, k is a positive integer.

[0078] Optionally, the idea of divide and conquer is adopted in the embodiments of the present application to construct a circuit framework. If the Dicke state unitary transformation can be realized Then first, a quantum circuit with a depth of 1 is applied to the initial quantum state |0 n >, and then the Dicke state unitary transformation is applied, and the Dicke state can be prepared.

[0079] Therefore, in the embodiments of the present application, by constructing the circuit framework of the Dicke state unitary transformation the preparation of the Dicke state is realized.

[0080] In some embodiments, n qubits are divided into qubit sets of size k, then there are a total of n / k sets (without loss of generality, assume that n / k is an integer).

[0081] For any l ∈ [k]0, the initial first quantum state unitary transformation circuit is constructed by the following recursive decomposition. First, a 2k-qubit weight distribution transformation is applied to the initial quantum state and, in parallel, a first quantum state unitary transformation of n / 2 qubits is applied For the weight distribution transformation and the first quantum state unitary transformation recursive decomposition is performed until the number of qubits of the first quantum state unitary transformation is k, and the initial first quantum state unitary transformation circuit is obtained.

[0082] Schematically, the process of constructing the initial first quantum state unitary transformation circuit by recursive decomposition is as follows:

[0083]

[0084] Without loss of generality, assume that n / 2 is an integer. First, apply a 2k-qubit weight assignment transformation (denoted as for simplicity ), and then apply two n / 2-qubit Dicke state unitary transformations in parallel That is

[0085] For adopt the same circuit framework as , that is Through layer-by-layer recursive decomposition, until the number of qubits of the first quantum state unitary transformation is reduced to k, that is, until the first quantum state unitary transformation is recursively reduced to From the above construction, it can be seen that the number of 2k-qubit weight assignment transformations obtained in each recursion is twice that of the previous time. Therefore, in the finally obtained circuit framework, the number of layers of the weight assignment transformation is log(n / k) layers in total.

[0086] Taking the realization of the first quantum state as the Dicke state as an example, as Figure 3 shown, it shows the Dicke state unitary matrix circuit framework provided by an exemplary embodiment of the present application. This circuit framework 310 is composed of log(n / k) layers of weight assignment transformations 320 and 1 layer of k-qubit Dicke state unitary transformation 330.

[0087] Step 203, based on the idle qubits in the initial first quantum state unitary transformation circuit, compress the circuit depth of the weight assignment transformation circuit to obtain the first quantum state unitary transformation circuit.

[0088] The first quantum state unitary transformation circuit is used to act on the initial quantum state to obtain the first quantum state circuit.

[0089] Based on Figure 3 the shown Dicke state unitary matrix circuit framework, it can be seen that as long as the weight assignment transformation and the k-qubit Dicke state unitary transformation are realized, the quantum circuit of the n-qubit Dicke state unitary transformation can be obtained. In the case of no auxiliary qubits, both the weight assignment transformation and the Dicke unitary transformation can be realized by a quantum circuit with a depth of O(k). However, through Figure 3 the shown circuit framework, it can be seen that when realizing the weight assignment transformation, some quantum states are idle and not used. Therefore, in the embodiments of the present application, the unused idle qubits are used as auxiliary qubits to further compress the circuit of the weight assignment transformation, thereby further compressing the depth of the quantum circuit of the n-qubit Dicke state unitary transformation.

[0090] In some embodiments, the number of idle qubits in the initial first quantum state unitary transformation circuit is determined, and based on the number of idle qubits, circuit depth compression is performed on the weight assignment transformation to obtain the first quantum state unitary transformation circuit.

[0091] Optionally, when the number of idle qubits is within the preset number requirement range, copy transformation processing is performed on the control qubits by the idle qubits; based on the copied control qubits, circuit depth compression is performed on the weight assignment transformation to obtain the first quantum state unitary transformation circuit.

[0092] In some embodiments, when the number of auxiliary qubits N < 4k, no auxiliary qubits are used. By using the circuit implementation of the above weight assignment transformation, a weight assignment transformation circuit with a depth of can be obtained.

[0093] When the number of auxiliary qubits 4k ≤ N ≤ k 2 copy transformation processing is performed on the control qubits by the idle qubits; based on the copied control qubits, circuit depth compression is performed on the weight assignment transformation.

[0094] When the number of auxiliary qubits N > k 2 during circuit depth compression of the weight assignment transformation, only k 2 auxiliary qubits are used, and the compression method is the same as that in the case of 4k ≤ N ≤ k 2 .

[0095] Step 204, the first quantum state unitary transformation circuit is applied to the initial quantum state to obtain a first quantum state circuit, and the first quantum state circuit includes k excited state qubits.

[0096] Optionally, through the first quantum state unitary transformation circuit, n qubits are operated on so that the quantum states of the n qubits evolve from the initial quantum state to the first quantum state. For example, through the technical solution provided in the embodiments of the present application, an n-qubit Dicke state unitary transformation circuit is constructed, and then the Dicke state unitary transformation circuit is applied to the n qubits, so that the quantum states of the n qubits evolve from the initial quantum state to the Dicke state.

[0097] In summary, the technical solution provided in the embodiments of the present application first constructs an initial first quantum state unitary transformation circuit based on n qubits and Hamming weight k, and uses the idle qubits in the initial first quantum state unitary transformation circuit as auxiliary qubits, which improves the operation parallelism of the quantum state preparation operator through the auxiliary qubits, performs circuit depth compression on the weight assignment transformation circuit, thereby compressing the circuit depth of the first quantum state unitary transformation circuit, and on this basis, compressing the depth of the first quantum state circuit.

[0098] The technical solution provided in this embodiment constructs an initial first quantum state unitary transformation circuit through a recursive decomposition method. The weight assignment transformation and the first quantum state unitary transformation are respectively recursively decomposed layer by layer until the number of qubits of the first quantum state unitary transformation is k, thereby realizing the construction of the first quantum state unitary transformation and the weight assignment transformation and improving the construction efficiency.

[0099] The technical solution provided in this embodiment compresses the circuit depth of the weight assignment transformation based on the number of idle qubits, avoiding the problem of low compression efficiency caused by the inability to compress the circuit depth through idle qubits when the number of idle qubits is small, and also avoiding the problem of calculation errors caused by some idle qubits being outside the application capacity range when the number of idle qubits is large.

[0100] In some embodiments, when compressing the circuit depth based on the idle qubits in the initial first quantum state unitary transformation circuit, the circuit conversion during the compression process is as follows.

[0101] For any integer t ∈ [k]0, denotes the -bit binary representation of the integer t, where proposed in the embodiments of this application circuit framework. For any l ∈ [k]0,

[0102]

[0103] where, if l = 0, then |0 k-l 10 l-1 > is defined as |0 k >.

[0104] The following is a detailed description of the circuit conversion compression process. Since the compression methods for the number of idle qubits 4k ≤ N ≤ k 2 and N > k 2 are the same, in this embodiment, the case of 4k ≤ N ≤ k 2 is taken as an example for illustration. As Figure 4 shown, step 203 above may further include the following content.

[0105] Step 2031, encoding the unary basis of length k in the weight assignment transformation operator into a binary basis of length .

[0106] The above equation (1) is implemented by the following circuit framework.

[0107]

[0108] where, |0 on the left side of the equationk-l 1 l > and |0 k > The corresponding sets of qubits are denoted as S: = {s k , s k-1 ,..., s1} and T: = {t k , t k-1 ,..., t1}.

[0109] In some embodiments, the qubits in the initial first quantum state unitary transformation circuit are flipped by controlled-NOT gates and reversible logic gates, and after the flipping, the unary basis of length k is encoded into a binary basis of length .

[0110] Schematically, without using auxiliary qubits, equation (1.1) can be implemented as follows:

[0111]

[0112] In the above construction, if the qubit s k is |1>, then use to flip the qubit t k . When j ∈ [k - 1], if the qubits s j+1 , s j are |01>, then use to flip the qubit t j . The above CNOT gates and Toffoli gates can be divided into three groups, and all the gates in each group act on different qubits, so the gates in the same group can be implemented simultaneously. Therefore, equation (1.1) can be implemented by a quantum circuit with a depth of O(1).

[0113] Equation (1.2) can be implemented by the following CNOT circuit, that is, for any l ∈ [k]0, it satisfies:

[0114]

[0115] where, in equation (1.2), the circuit |0 k-l 1 l > in equation (1.1) is converted to the all-0 state.

[0116] Based on the depth of the CNOT circuit, by using N ≥ 0 auxiliary qubits, the depth of the above CNOT circuit can be compressed to

[0117] In equation (1.3), the unary basis |0 k > in equation (1.2) is encoded into the binary basis and equation (1.3) is implemented by a CNOT circuit, so its circuit depth is also

[0118] Step 2032, based on the number N of idle qubits in the initial first quantum state unitary transformation circuit, copy and obtain control qubit(s).

[0119] For the above equation (1.4), this equation (1.4) is implemented in the following manner:

[0120]

[0121] Among them, in equation (1.4), the idle qubits are divided into parts, and the register controller in the initial first quantum state unitary transformation circuit is copied times through the copy transformation.

[0122] Register A is composed of in set S. N auxiliary qubits are divided into parts of the same size, denoted as register

[0123] The above equation (1.4.1) is a copy transformation, that is, the register controller |(l)2> A is copied times, and the auxiliary qubits are used to complete the copying of the register controller, and parallel control is achieved through the copied register controller, thereby reducing the circuit depth. The circuit depth of the copy transformation is

[0124] In equation (1.4.2), use the circuit to restore the qubits t1, t2,..., t in register T N / log(k+1) to |0>. can be implemented by a circuit with a depth of O(log(k)). Since multiple Toffoli gates act on different qubits, they can be implemented in parallel. Therefore the circuit depth of is O(log(k)). Using a similar method, all the qubits in register T can be restored to |0>. Therefore, the circuit depth of equation (1.4.2) is

[0125] Equation (1.4.3) is the inverse transformation of equation (1.4.1), so the depth is also Therefore, the circuit depth of equation (1.4) is

[0126] The circuit depth of equation (1) is

[0127] Step 2033, under the control of control qubit(s), different -qubit quantum states are generated, weight distribution is performed on the binary basis, and it is re-encoded into the unary basis.

[0128] Optionally, when controlling through the control qubit(s), by controlling the control qubit(s) to take different values, different -qubit quantum states are generated.

[0129] Combined with the above equation (2), it can be seen that in equation (2), by controlling the value of (l)2 in, different quantum state results are generated. By traversing the values of (l)2, different -qubit quantum states are generated, thereby completing the weight distribution on the binary basis.

[0130] And equation (3) is implemented as the inverse circuit of the above equations (1.4), (1.3), and (1.2), realizing the re-encoding from the binary basis back to the unary basis:

[0131]

[0132] Among them, since |0 k > occupies k idle qubits, that is, N - k idle qubits are used in equation (3), and the total depth of the circuit is , secondly, using the same circuit, the transformation where any i ≤ l and l ∈ [k]0 is realized. Finally, using a circuit composed of swap gates with a depth of O(1), the first k qubits and the last k qubits are swapped, and then the second k qubits and the last k qubits are swapped, and equation (3) can be realized. Therefore, the circuit depth of equation (3) is

[0133] Step 2034, under the control of the first unary basis and the second unary basis, the operation result of the third unary basis is obtained, and the operation result is encoded into the qubit to obtain the encoding result.

[0134] For the above formula (4), a plurality of reversible logic gates are set in the first unary basis, the second unary basis, and the third unary basis. Among them, the control bits of the reversible logic gates are set at the first specified qubit positions of the first unary basis and the second specified qubit positions of the second unary basis, and the target bits of the reversible logic gates are set at the third specified qubit positions of the third unary basis. By controlling the control bits of the plurality of reversible logic gates, the operation result of the third unary basis is obtained.

[0135] As shown in the above formula (4), |0 k-i 10 i-1 > corresponds to the unary representation of i, that is, the above-mentioned first unary basis, |0 k-l 10 l-1 > corresponds to the unary representation of l, that is, the above-mentioned second unary basis, |0 k-(l-i) 10 (l-i)-1 > corresponds to the unary representation of l - i, that is, the above-mentioned third unary basis.

[0136] Place the first control bit of the reversible logic gate at the position of 1 in the first unary basis, place the second control bit of the reversible logic gate at the position of 1 in the second unary basis, and place the target bit of the reversible logic gate at the position of 1 in the third unary basis. Since the value range of l is from 0 to k and the value range of i is from 0 to l, by traversing and controlling the value of i on the first control bit and traversing and controlling the value of l on the second control bit, the operation result of l - i on the target bit is generated.

[0137] In some embodiments, the Toffoli gates corresponding to different control bits and target bits can be controlled in parallel. That is, by placing the Toffoli gates corresponding to different control bits and target bits in the same Toffoli set, the parallel operation of the Toffoli gates can be achieved.

[0138] That is, in equation (1.4), the qubits are relabeled. The first k qubits are labeled as S := {s1, s2,..., s k}. The subsequent k qubits are labeled as T := {t1, t2,..., t k}. The last N qubits are divided into N / k parts of size k. The qubits in the first part are defined as W := {w1, w2,..., w k}. The remaining parts are defined as S j := {s 1，j , s 2，j ,..., s k，j}, T j := {t 1，j , t 2，j ,..., t k，j} and Wj := {w 1，j , w 2，j ,..., w k，j}, where for any then applying the following circuit (4.1) to the qubit sets S, T, and W, equation (4) can be realized.

[0139]

[0140] In the above equation, if is applied to S, T, W, then for any 1 ≤ i ≤ k, the basis |0 k > S |0 k-i 10 i-1 > T |0 k >w is transformed into |0 k >s|0 k-i 10 i-1 > T |0 k-i 1 i-1 > W ; and the other bases of equation (4) remain unchanged. If is applied to S, T, W, then for any 1 ≤ r < j ≤ k, the basis |0 k-r 1 r-1 > S |0 k- j 10 j-1 > T |0 k > W is transformed into |0 k-r > S |0 k-j 10 j-1 > T |0 k-(j-r) 1 (j-r)-1 > W ; and the other bases of equation (4) remain unchanged. Therefore, the above circuit (4.1) can realize equation (4). By regrouping the Toffoli gates in (4.1), it can also be expressed as the following equation (4.2).

[0141]

[0142] where, represents implementing a flip when the control bits are 0 and 1,

[0143] Figure 5 shows the way of circuit grouping. As Figure 5As shown, each square 510 represents a Toffoli gate. In each square 510, the first row represents the control bits of the Toffoli gate, and the second row represents the target bit. Each column of squares 510 has the same target bit. The Toffoli gates on the same diagonal act on different qubits (including control bits and target bits). Therefore, the Toffoli gates on the diagonal can be implemented in parallel in the same Toffoli set, and the depth of the circuit is 1 for all of them.

[0144] When partitioning and implementing Toffoli gates in parallel, first, through copy transformation, using a circuit with a depth of O(log(N / k)), the states on S, T, and W are copied times. That is, for any i ≤ l and l ∈ [k]0, the following transformation is completed:

[0145]

[0146] After the transformation is completed, the states of the qubit sets S, T, and W are the same as those of S τ , T τ , W τ The circuit (4.2) contains 3k - 3 quantum circuits C′ i (S, T, W), C″ j (S, T, W) and C″′ r (S, T, W) with a depth of 1 acting on the qubit sets S, T, and W. To implement these depth-1 circuits in parallel, in the embodiments of this application, these circuits are partitioned into groups, and each group contains depth-1 circuits. For any On the qubit sets S τ , T τ , W τ implement the τ-th group of depth-1 circuits. The depth of the circuit for the above process is

[0147] For any i ∈ [k], if the states of the qubits are all added to the qubit w i (i.e., the summation transformation), then the state of the qubit w i is the same as the state of w after applying the circuit (4.1) to |0 k-i 10 i-1 > S |0 k-l 10 l-1 > T |0 k > W . According to the summation transformation, this process can be achieved with a depth of i The state of w Circuit implementation.

[0148] Using the inverse circuit of the above transformation, all S τ , T τ , W τ The quantum states on are restored to |0>. The circuit depth is O(log(N / k)) + O(k 2 / N) = O(log(N / k) + k 2 / N).

[0149] The circuit depth of equation (4) is 2(O(log(N / k)) + O(k 2 / N)) + O(log(N / k)) = O(log(N / k) + k 2 / N).

[0150] Step 2035, generate the first quantum state unitary transformation circuit based on the encoding result.

[0151] Optionally, restore the second binary basis to the all-0 state, set 1 for the first binary basis starting from the first specified qubit position, and set 1 for the third binary basis starting from the third specified qubit position to obtain the first quantum state unitary transformation circuit.

[0152] As shown in equation (5) above, restore |0 k-l 10 l-1 > which is the second binary basis to the all-0 state. In implementation, applying the following circuit (5.1) to the qubit sets S, T, W can implement equation (5).

[0153]

[0154] In circuit (5.1), if is applied to S, T, W, for any 1 ≤ i ≤ k, the basis |0 k > S |0 k-j 10 j-1 > T |0 k-j 10 j-1 > W can be transformed into |0 k > S |0 k > T |0 k-j 10 j-1 > W ; and other bases remain unchanged.

[0155] If is applied to S, T, W, for any 1 ≤ r ≤ k, the basis |0 k-r10 r-1 > S |0 k- r 10 r-1 > T ||0 k > W can be transformed into |0 k-r 10 r-1 > S |0 k > T |0 k > W ; and the other bases remain unchanged.

[0156] If acts on S, T, W, for any 1 ≤ i < l ≤ k, the basis |0 k-i 10 i-1 > S |0 k-l 10 l-1 > T |0 k-(l-i) 10 (l-i)-1 > W can be transformed into |0 k-i 10 i-1 > S |0 k > T |0 k-(l-i) 10 (l-i)-1 > W , and the other bases remain unchanged.

[0157] Therefore, circuit (5.1) can implement equation (5). By regrouping the Toffoli gates in circuit (5.1), it can be expressed in the following form

[0158]

[0159] Figure 6 shows the grouping method of the circuit. In all C′ j , C″ r , C″′ l and C″″ i , all the Toffoli gates act on different qubits. Therefore, the depth of these circuits is 1. Therefore, similar to the implementation of circuit (4.2), using auxiliary qubits, the circuit depth of circuit (5.2) can be compressed to O(log(N / k)+k 2 / N). Among them, Figure 6In the circuit grouping shown, each block 610 represents a Toffoli gate. In each block 610, the first column represents the control bits of the Toffoli gate, and the second column represents the target bits. Each column of blocks has the same target bit. The control bits and target bits of the Toffoli gates on the same diagonal are all different and can be executed in parallel in the same set.

[0160] As shown in the above equation (6), set the |0 k-i 10 i-1 > to 1 starting from the i-th qubit, and get |0 k-i 1 i >, and, set the |0 k-(l-i) 10 (l-i)-1 > to 1 starting from the (l - i)-th qubit, and get the first quantum state unitary transformation circuit.

[0161] Among them, during the process of setting to 1, first by applying the inverse circuits of equations (1.2) and (1.1), the following transformation can be realized:

[0162]

[0163] Among them, using N - k auxiliary qubits, the circuit depth is Secondly, using the same circuit, the following transformation can be realized

[0164]

[0165] Finally, using a circuit with a depth of 1 and composed of swap gates, swap the first k qubits and the k qubits behind them. Therefore, using N - k auxiliary qubits, equation (6) can be realized by a quantum circuit with a depth of 2. of the quantum circuit.

[0166] From the circuit depths of the above equations (1) - (6), when the number of auxiliary qubits N satisfies 4k ≤ N ≤ k 2 , the circuit depth of the weight assignment transformation is:

[0167]

[0168] When the number of auxiliary bits N > k 2 , since only k 2 auxiliary qubits are used. Therefore, the circuit depth is

[0169] When implementing the Dicke state unitary transformation , first by using a quantum circuit with a depth of 1 acting on the initial quantum state |0 n >, and then applying the Dicke state unitary transformation to prepare the Dicke state. The circuit framework of the Dicke state unitary transformation consists of log(n / k) layers of weight distribution transformation and one layer of Dicke unitary transformation . For any i ∈ [log(n / k)], the i-th layer of weight distribution transformation contains 2 i-1 weight distribution transformations . The last layer of Dicke unitary transformation consists of n / k . In the i-th weight distribution transformation, a total of n - 2 i k qubits are not used, so they can be used as auxiliary qubits to implement the weight distribution transformation in this layer. Each assignment auxiliary qubit. From the implementation of the weight distribution transformation and the circuit framework, it can be seen that the depth of the quantum circuit for implementing is:

[0170]

[0171] Therefore, the depth of the circuit for preparing the Dicke state is O(log(n / k)log(k) + k).

[0172] In summary, the technical solution provided by the embodiments of the present application first constructs an initial first quantum state unitary transformation circuit based on n qubits and Hamming weight k through recursive decomposition, and uses the idle qubits in the initial first quantum state unitary transformation circuit as auxiliary qubits, which improves the operation parallelism of the quantum state preparation operator, compresses the circuit depth of the weight distribution transformation circuit, and thus compresses the circuit depth of the first quantum state unitary transformation circuit. On this basis, the depth of the first quantum state circuit is compressed.

[0173] The method provided by the embodiments of the present application copies the control bits through the idle qubits in the initial first quantum state unitary transformation circuit, thereby increasing the parallel ability of the control bits in the unitary transformation circuit, reducing the circuit depth of the weight distribution transformation circuit, and thus compressing the circuit depth of the first quantum state unitary transformation circuit.

[0174] The method provided by the embodiments of the present application converts between the binary basis and the unary basis to obtain the first unary basis corresponding to i, the second unary basis corresponding to l, and the third unary basis corresponding to l - i, thereby controlling the first unary basis and the second unary basis through the control of the reversible logic gate, and determining the operation result of l - i based on the target bit of the reversible logic gate on the basis of controlling the control bits, improving the operation efficiency of l - i.

[0175] The following is an embodiment of the apparatus of the present application, which can be used to execute the method embodiment of the present application. For details not disclosed in the apparatus embodiment of the present application, please refer to the method embodiment of the present application.

[0176] Please refer to Figure 7 , which shows a block diagram of an apparatus for preparing a quantum state provided by an embodiment of the present application. The apparatus 700 may include: an initial quantum state acquisition module 710, a recursive decomposition module 720, a depth compression module 730, and a quantum state preparation module 740;

[0177] The initial quantum state acquisition module 710 is configured to determine an initial quantum state of n quantum bits, where n is a positive integer;

[0178] The recursive decomposition module 720 is configured to construct an initial first quantum state unitary transformation circuit through recursive decomposition based on n quantum bits and Hamming weight k. The initial first quantum state unitary transformation circuit includes a recursively obtained weight distribution transformation operator and a k-qubit unitary transformation operator. Wherein, the weight distribution transformation operator is used to distribute the Hamming weight of the first quantum state to multiple qubit strings, and the unitary transformation operator is used to evolve the quantum state of the qubit string to the first quantum state. The initial first quantum state unitary transformation circuit further includes idle qubits, and the idle qubits are qubits not occupied by the weight distribution transformation operator;

[0179] The depth compression module 730 is configured to perform circuit depth compression on the weight distribution transformation operator based on the idle qubits in the initial first quantum state unitary transformation circuit to obtain a first quantum state unitary transformation circuit, and the first quantum state unitary transformation circuit is used to act on the initial quantum state to obtain a first quantum state circuit;

[0180] The quantum state preparation module 740 is configured to act the first quantum state unitary transformation circuit on the initial quantum state to obtain a first quantum state circuit, and the first quantum state circuit includes k excited state qubits.

[0181] In an alternative embodiment, as Figure 8 shown, the depth compression module 730 includes:

[0182] An encoding unit 731, configured to encode a unary base of length k in the weight distribution transformation operator into a binary base of length ;

[0183] A replication unit 732, configured to replicate and obtain control qubit qubits based on the number N of idle qubits in the initial first quantum state unitary transformation circuit;

[0184] A control unit 733, configured to generate different -qubit quantum states under the control of the control qubits, perform weight assignment on the binary basis, and re-encode it into a unary basis; under the control of the first unary basis and the second unary basis, obtain the operation result of the third unary basis, and encode the operation result into qubits to obtain an encoded result, where the first unary basis and the second unary basis correspond to the control bits of a reversible logic gate, and the third unary basis corresponds to the target bit of the reversible logic gate;

[0185] A generation unit 734, configured to generate the first quantum state unitary transformation circuit based on the encoded result.

[0186] In an optional embodiment, the encoding unit 731 is further configured to flip the qubits in the initial first quantum state unitary transformation circuit through a controlled NOT gate and a reversible logic gate; after flipping, encode the unary basis with length k into a binary basis with length .

[0187] In an optional embodiment, the copying unit 732 is further configured to divide the idle qubits into parts, and copy the register controller in the initial first quantum state unitary transformation circuit times as the control qubits.

[0188] In an optional embodiment, the control unit 733 is further configured to generate different -qubit quantum states by taking different values of the control qubits.

[0189] In an optional embodiment, the control unit 733 is further configured to set a plurality of reversible logic gates in the first unary basis, the second unary basis, and the third unary basis, where the control bits of the reversible logic gate are set at the first designated qubit position of the first unary basis and the second designated qubit position of the second unary basis, and the target bit of the reversible logic gate is set at the third designated qubit position of the third unary basis; obtain the operation result of the third unary basis by controlling the control bits of the plurality of reversible logic gates.

[0190] In an optional embodiment, the generation unit 734 is further configured to restore the second unary basis to an all-0 state; perform a set-1 operation on the first unary basis starting from the first designated qubit position, and perform a set-1 operation on the third unary basis starting from the third designated qubit position to obtain the first quantum state unitary transformation circuit.

[0191] In an alternative embodiment, the recursive decomposition module 720 is further configured to apply a 2k-qubit weight assignment transformation to the initial quantum state and, in parallel, apply a first quantum state unitary transformation on n / 2 qubits

[0192] The recursive decomposition module 720 is further configured to perform recursive decomposition on the weight assignment transformation and the first quantum state unitary transformation until the number of qubits of the first quantum state unitary transformation is k, obtaining the initial first quantum state unitary transformation circuit.

[0193] In an alternative embodiment, the depth compression module 730 is further configured to determine the number of idle qubits in the initial first quantum state unitary transformation circuit; perform circuit depth compression on the weight assignment transformation based on the number of idle qubits, obtaining the first quantum state unitary transformation circuit.

[0194] In an alternative embodiment, the depth compression module 730 is further configured to, when the number of idle qubits is within a preset number requirement range, perform a copy transformation process on the control qubits through the idle qubits; perform circuit depth compression on the weight assignment transformation based on the copied control qubits, obtaining the first quantum state unitary transformation circuit.

[0195] In summary, the technical solution provided by the embodiments of the present application first constructs an initial first quantum state unitary transformation circuit through recursive decomposition based on n qubits and Hamming weight k, and uses the idle qubits in the initial first quantum state unitary transformation circuit as auxiliary qubits, improving the operation parallelism of the quantum state preparation operator through the auxiliary qubits, performing circuit depth compression on the weight assignment transformation circuit, thereby compressing the circuit depth of the first quantum state unitary transformation circuit, and on this basis compressing the depth of the first quantum state circuit.

[0196] It should be noted that, when implementing its functions, the device provided in the above embodiments is only illustrated by dividing the above functional modules. In practical applications, the above functions can be allocated to different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. In addition, the device provided in the above embodiments and the method embodiments belong to the same concept, and the specific implementation process thereof can be found in the method embodiments and will not be elaborated here.

[0197] Please refer to Figure 9, which shows the structural block diagram of a computer device provided by an embodiment of the present application. This computer device can be used to implement the method for preparing quantum states provided in the above embodiment, and specifically may include the following content.

[0198] The computer device 900 includes a central processing unit (such as a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), and an FPGA (Field Programmable Gate Array), etc.) 901, a system memory 904 including a RAM (Random-Access Memory) 902 and a ROM (Read-Only Memory) 903, and a system bus 905 connecting the system memory 904 and the central processing unit 901. The computer device 900 also includes a basic input / output system (Input Output System, I / O system) 906 for facilitating the transfer of information between various components within the server, and a mass storage device 907 for storing an operating system 913, application programs 914, and other program modules 915.

[0199] The basic input / output system 906 includes a display 908 for displaying information and input devices 909 such as a mouse and a keyboard for user input. Among them, both the display 908 and the input devices 909 are connected to the central processing unit 901 through an input / output controller 910 connected to the system bus 905. The basic input / output system 906 may also include an input / output controller 910 for receiving and processing inputs from multiple other devices such as a keyboard, a mouse, or an electronic stylus. Similarly, the input / output controller 910 also provides outputs to a display screen, a printer, or other types of output devices.

[0200] The mass storage device 907 is connected to the central processing unit 901 through a mass storage controller (not shown) connected to the system bus 905. The mass storage device 907 and its associated computer-readable medium provide non-volatile storage for the computer device 900. That is to say, the mass storage device 907 may include a computer-readable medium (not shown) such as a hard disk or a CD-ROM (Compact Disc Read-Only Memory) drive.

[0201] Without loss of generality, the computer-readable medium may include a computer storage medium and a communication medium. The computer storage medium includes volatile and non-volatile, removable and non-removable media implemented by any method or technology for storing information such as computer-readable instructions, data structures, program modules, or other data. The computer storage medium includes RAM, ROM, EPROM (Erasable Programmable Read-Only Memory), EEPROM (Electrically Erasable Programmable Read-Only Memory), flash memory or other solid-state storage technologies, CD-ROM, DVD (Digital Video Disc) or other optical storage, magnetic tape cartridges, tapes, disk storage or other magnetic storage devices. Of course, those skilled in the art will know that the computer storage medium is not limited to the above several types. The above system memory 904 and mass storage device 907 can be collectively referred to as memory.

[0202] According to an embodiment of the present application, the computer device 900 can also run on a remote computer on the network through a network such as the Internet. That is, the computer device 900 can be connected to the network 912 through the network interface unit 911 connected to the system bus 905. Or rather, the network interface unit 911 can also be used to connect to other types of networks or remote computer systems (not shown).

[0203] The memory further includes a computer program, which is stored in the memory and configured to be executed by one or more processors to implement the above method for preparing a quantum state.

[0204] In some embodiments, a computer-readable storage medium is also provided. A computer program is stored in the storage medium, and when the computer program is executed by a processor, it is used to implement the above method for preparing a quantum state.

[0205] Optionally, the computer-readable storage medium may include: ROM (Read-Only Memory), RAM (Random Access Memory), SSD (Solid State Drives), or optical discs, etc. Among them, the random access memory may include ReRAM (Resistance Random Access Memory) and DRAM (Dynamic Random Access Memory).

[0206] In some embodiments, a computer program product is further provided. The computer program product includes a computer program stored in a computer-readable storage medium. A processor of a computer device reads the computer program from the computer-readable storage medium, and the processor executes the computer program, so that the computer device executes the above-mentioned method for preparing a quantum state.

[0207] It should be noted that, before and during the process of collecting relevant data of a user, a prompt interface, a pop-up window or voice prompt information can be displayed in the embodiments of the present application. The prompt interface, the pop-up window or the voice prompt information is used to prompt the user that their relevant data is currently being collected, so that the present application only starts to execute the relevant steps of obtaining the user's relevant data after obtaining the confirmation operation of the user on the prompt interface or the pop-up window. Otherwise (that is, when the confirmation operation of the user on the prompt interface or the pop-up window is not obtained), the relevant steps of obtaining the user's relevant data are ended, that is, the relevant data of the user is not obtained. In other words, all user data collected by the present application is processed strictly in accordance with the requirements of relevant national laws and regulations. Obtaining the informed consent or separate consent of the personal information subject is carried out under the condition that the user agrees and authorizes, and subsequent data use and processing behaviors are carried out within the scope of laws and regulations and the authorization of the personal information subject, and the collection, use and processing of relevant user data need to comply with the relevant laws, regulations and standards of relevant countries and regions. For example, the parameters, quantum circuits, energies, etc. involved in the present application are obtained under full authorization.

[0208] It should be understood that "a plurality of" mentioned herein refers to two or more. "And / or" describes the association relationship of associated objects and indicates that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally represents an "or" relationship between the associated objects before and after. In addition, the step numbers described in this article only exemplarily show a possible execution sequence between steps. In some other embodiments, the above steps may not be executed in the order of the numbers. For example, two steps with different numbers are executed simultaneously, or two steps with different numbers are executed in the reverse order of the illustration. The embodiments of the present application do not limit this.

[0209] The above are only exemplary embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for preparing a quantum state, characterized in that, The method includes: Determining an initial quantum state of n qubits, where n is a positive integer; Based on the n qubits and Hamming weight k, constructing an initial first quantum state unitary transformation circuit through recursive decomposition. The initial first quantum state unitary transformation circuit includes a recursively obtained weight distribution transformation operator and a k-qubit unitary transformation operator. Among them, the weight distribution transformation operator is used to allocate the Hamming weight of the first quantum state to multiple qubit strings, and the unitary transformation operator is used to evolve the quantum state of the qubit string to the first quantum state. The initial first quantum state unitary transformation circuit also includes idle qubits, and the idle qubits are qubits not occupied by the weight distribution transformation operator; Based on the idle qubits in the initial first quantum state unitary transformation circuit, performing circuit depth compression on the weight distribution transformation operator to obtain a first quantum state unitary transformation circuit, which is used to act on the initial quantum state to obtain a first quantum state circuit; Acting the first quantum state unitary transformation circuit on the initial quantum state to obtain a first quantum state circuit, where the first quantum state circuit includes k excited state qubits, and k is a positive integer.

2. The method according to claim 1, wherein The performing circuit depth compression on the weight distribution transformation operator based on the idle qubits in the initial first quantum state unitary transformation circuit to obtain a first quantum state unitary transformation circuit includes: Encode the unary basis of length k in the weight assignment transformation operator into a binary basis of length ; Based on the number N of idle qubits in the initial first quantum state unitary transformation circuit, copies of control qubit are obtained; ​ Under the control of the control qubit, different -qubit quantum states are generated, weight distribution is performed on the binary basis, and it is recoded into a unary basis; Under the control of the first binary basis and the second binary basis, obtaining the operation result of the third binary basis and encoding the operation result into qubits to obtain an encoding result, where the first binary basis and the second binary basis correspond to the control bits of reversible logic gates, and the third binary basis corresponds to the target bit of the reversible logic gate; Generating the first quantum state unitary transformation circuit based on the encoding result.

3. The method according to claim 2, wherein Encoding the unary basis of length k in the weight assignment transformation operator into a binary basis of length includes: Flipping the qubits in the initial first quantum state unitary transformation circuit through controlled NOT gates and reversible logic gates; Encode a unary base of length k into a binary base of length after flipping.

4. The method according to claim 2, wherein Based on the number N of idle qubits in the initial first quantum state unitary transformation circuit, copy to obtain control qubit bits, including: Divide the idle qubits into parts, and copy the register controller in the initial first quantum state unitary transformation circuit times as the control qubit.

5. The method according to claim 2, characterized in that, Under the control of the control qubits, different -qubit quantum states are generated, including: By controlling different values of the control qubit, different -qubit quantum states are generated.

6. The method according to claim 2, wherein The obtaining the operation result of the third binary basis under the control of the first binary basis and the second binary basis includes: Setting a plurality of reversible logic gates in the first binary basis, the second binary basis, and the third binary basis, where the control bits of the reversible logic gates are set at the first designated qubit positions of the first binary basis and the second designated qubit positions of the second binary basis, and the target bits of the reversible logic gates are set at the third designated qubit positions of the third binary basis; Obtaining the operation result of the third binary basis by controlling the control bits of the plurality of reversible logic gates.

7. The method according to claim 6, characterized in that The generating the first quantum state unitary transformation circuit based on the encoding result includes: Restoring the second binary basis to the all-0 state; Performing a set-1 process on the first binary basis starting from the first designated qubit position, and performing a set-1 process on the third binary basis starting from the third designated qubit position to obtain the first quantum state unitary transformation circuit.

8. The method according to any one of claims 1 to 7, characterized in that, The constructing an initial first quantum state unitary transformation circuit through recursive decomposition based on the n qubits and Hamming weight k includes: Act on the initial quantum state with a 2k-qubit weight assignment transformation And, act in parallel with a first quantum state unitary transformation of n / 2 qubits For the weight assignment transformation and the first quantum state unitary transformation perform recursive decomposition until the number of qubits of the first quantum state unitary transformation is k, to obtain the initial first quantum state unitary transformation circuit.

9. The method according to any one of claims 1 to 7, characterized in that, The idle qubits in the initial first quantum state unitary transformation circuit perform circuit depth compression on the weight assignment transformation circuit to obtain a first quantum state unitary transformation circuit, including: Determine the number of idle qubits in the initial first quantum state unitary transformation circuit; Perform circuit depth compression on the weight assignment transformation based on the number of idle qubits to obtain the first quantum state unitary transformation circuit.

10. The method according to claim 9, characterized in that, The performing circuit depth compression on the weight assignment transformation based on the number of idle qubits to obtain the first quantum state unitary transformation circuit includes: When the number of idle qubits is within a preset number requirement range, perform a copy transformation process on the control qubits through the idle qubits; Perform circuit depth compression on the weight assignment transformation based on the copied control qubits to obtain the first quantum state unitary transformation circuit.

11. A device for preparing a quantum state, characterized in that, The device includes: An initial quantum state acquisition module, configured to determine the initial quantum state of n qubits, where n is a positive integer; A recursive decomposition module, configured to construct an initial first quantum state unitary transformation circuit based on n qubits and Hamming weight k through recursive decomposition. The initial first quantum state unitary transformation circuit includes a recursively obtained weight assignment transformation operator and a k-qubit unitary transformation operator. The weight assignment transformation operator is used to distribute the Hamming weight of the first quantum state to multiple qubit strings, and the unitary transformation operator is used to evolve the quantum state of the qubit string to the first quantum state. The initial first quantum state unitary transformation circuit further includes idle qubits, and the idle qubits are qubits not occupied by the weight assignment transformation operator; A depth compression module, configured to perform circuit depth compression on the weight assignment transformation operator based on the idle qubits in the initial first quantum state unitary transformation circuit to obtain a first quantum state unitary transformation circuit, and the first quantum state unitary transformation circuit is used to act on the initial quantum state to obtain a first quantum state circuit; A quantum state preparation module, configured to act the first quantum state unitary transformation circuit on the initial quantum state to obtain a first quantum state circuit, and the first quantum state circuit includes k excited state qubits.

12. A computer device, characterized in that, The computer device includes a processor and a memory. A computer program is stored in the memory, and the computer program is loaded and executed by the processor to implement the method according to any one of claims 1 to 10 above.

13. A computer-readable storage medium, characterized in that, A computer program is stored in the computer-readable storage medium, and the computer program is loaded and executed by the processor to implement the method according to any one of claims 1 to 10 above.

14. A computer program product, characterized in that, The computer program product includes a computer program. The computer program is stored in a computer-readable storage medium, and the processor reads and executes the computer program from the computer-readable storage medium to implement the method according to any one of claims 1 to 10.

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