1200V SiC groove type MOSFET integrating super junction and shield grid technology

Abstract

The invention belongs to the technical field of power semiconductors, and relates to a 1200V SiC trench-type MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) integrated with a super junction and shield gate technology, which comprises an N + substrate layer, a drift region positioned above the N + substrate layer, and a trench gate structure and a source structure positioned above the drift region, compared with a conventional SiC trench type MOSFET with a P-type shielding layer, the SiC trench type MOSFET with the P-type shielding layer has the advantages that the peak electric field of the gate oxide layer is reduced, and the reliability of the device is ensured; the drift region adopts a super-junction structure, so that the electric field distribution is optimized, the blocking capability of the device is improved, the high doping concentration of the drift region can be adopted while the high breakdown voltage is maintained, the specific on-resistance of the device is remarkably reduced, and the conduction loss of the device is reduced; a shield gate structure is adopted, and the overlapping area of the gate and the drain is reduced, so that the gate-drain capacitance and the gate-drain charge are reduced, the switching speed of the device is improved, and the dynamic loss of the device is reduced. The performance is excellent in the high-voltage and high-frequency field.

Description

Technical Field

[0001] The present invention relates to a 1200V SiC trench MOSFET integrating superjunction and shield gate technologies, belonging to the technical field of power semiconductors. Background Art

[0002] Due to the advantages of high breakdown field strength, high thermal conductivity, wide bandgap, etc., SiC has received extensive attention in the fields of high-voltage, high-temperature, and high-frequency power electronic devices. The MOSFET prepared based on it exhibits extremely excellent characteristics, so it is widely used in fields such as electric vehicles, rail transit, smart grids, and aerospace. The SiC trench MOSFET adopts a trench structure, and the conductive channel is changed from transverse to longitudinal, effectively reducing the area of the device. However, in addition to facing the reliability problem of the gate oxide layer, the SiC trench MOSFET also has the constraint relationship between the breakdown voltage and the specific on-resistance, as well as the dynamic loss problem caused by the large gate-drain capacitance, increasing the power consumption of the device and restricting the application of the device in the high-voltage high-frequency field. Summary of the Invention

[0003] In order to overcome the deficiencies in the prior art, the purpose of the present invention is to provide a 1200V SiC trench MOSFET integrating superjunction and shield gate technologies. The technical features adopted include: (1) Superjunction structure, N-type doped columns and P-type doped columns are alternately arranged in the drift region to optimize the electric field distribution, allowing a drift region with a high doping concentration to reduce the specific on-resistance while maintaining a high breakdown voltage. (2) Shield gate structure, a shield gate connected to the source is arranged under the control gate to reduce the overlapping area between the gate and the drain, thereby significantly reducing the gate-drain capacitance and gate-drain charge, and reducing the dynamic loss of the device. (3) Composite structure collaborative optimization, the superjunction reduces the static loss, the shield gate reduces the dynamic loss, and the P-type shielding layer improves the reliability of the device, realizing the improvement of comprehensive performance. The ultimate goal is: while ensuring high gate oxide reliability, high breakdown voltage, and low on-resistance, it can have a higher switching speed and reduce the dynamic loss of the device.

[0004] To achieve the above-mentioned invention object and solve the problems existing in the prior art, the technical solution adopted by the present invention is as follows: A 1200V SiC trench MOSFET integrating superjunction and shield gate technologies, which includes an N+ substrate layer, a drift region located above the N+ substrate layer, and a trench gate structure and a source structure located above the drift region; a first conductive material forming an ohmic contact with the N+ substrate layer is provided below the N+ substrate layer, and the first conductive material is led out as the drain; the drift region is composed of alternately arranged first and second N-type strip regions, first, second, and third P-type strip regions, first, second, and third P-type shielding layers, and first and second current spreading layers; the trench gate structure is located above the second P-type shielding layer and includes first and second insulating dielectric layers located at the bottom and side walls of the trench, a shield gate and a control gate in the trench, and a third insulating dielectric layer between the shield gate and the control gate in the trench. A second conductive material forming an ohmic contact with the control gate is provided at the top of the control gate, and the second conductive material is led out as the gate; the source structure is located at the top of the drift region and on both sides of the trench gate structure, and includes first and second P-type base regions, and first and second P+ source regions and first and second N+ source regions arranged horizontally at the top thereof; third and fourth conductive materials forming an ohmic contact with the first and second P+ source regions and the first and second N+ source regions are provided at the top of the first and second P+ source regions and the first and second N+ source regions, and the third and fourth conductive materials are led out as the source.

[0005] The first, second, and third P-type shielding layers are short-circuited to the source.

[0006] The shield gate in the trench is short-circuited to the source.

[0007] The doping concentrations of the first, second, and third P-type strip regions are the same as those of the first and second N-type strip regions.

[0008] The doping concentrations of the first, second, and third P-type shielding layers are higher than those of the first and second N-type strip regions.

[0009] The doping concentrations of the first and second current spreading layers are higher than those of the first and second N-type strip regions.

[0010] The widths of the first, second, and third P-type shielding layers are the same as those of the first, second, and third P-type strip regions.

[0011] The semiconductor material used for the MOSFET is SiC.

[0012] The beneficial effects of the present invention are as follows: A 1200V SiC trench MOSFET integrating superjunction and shield gate technologies. Compared with the traditional SiC trench MOSFET with a P-type shielding layer, the present invention reduces the peak electric field of the gate oxide layer, ensuring the reliability of the device; the drift region adopts a superjunction structure, optimizing the electric field distribution, improving the blocking ability of the device, enabling a higher doping concentration in the drift region while maintaining a high breakdown voltage, significantly reducing the specific on-resistance of the device, and reducing the conduction loss of the device; a shield gate structure is adopted, reducing the overlap area between the gate and the drain, reducing the gate-drain capacitance and gate-drain charge, improving the switching speed of the device, and reducing the dynamic loss of the device. It has excellent performance in the high-voltage and high-frequency fields. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a schematic structural diagram of a traditional SiC trench MOSFET with a P-type shielding layer.

[0014] Figure 2 is a schematic structural diagram of Embodiment 1.

[0015] Figure 3 is a schematic structural diagram of Embodiment 2.

[0016] In the figure: 1. The first conductive material, 1a. The second conductive material, 1b. The third conductive material, 1c. The fourth conductive material, 2. N+ substrate layer, 3. The first N-type strip region, 3a. The second N-type strip region, 4. The first P-type strip region, 4a. The second P-type strip region, 4b. The third P-type strip region, 5. The first P-type shielding layer, 5a. The second P-type shielding layer, 5b. The third P-type shielding layer, 6. The first insulating dielectric layer, 6a. The second insulating dielectric layer, 6b. The third insulating dielectric layer, 7. The shield gate in the trench, 8. The first current spreading layer, 8a. The second current spreading layer, 9. The first P-type base region, 9a. The second P-type base region, 10. Control gate, 11. The first P+ source region, 11a. The second P+ source region, 12. The first N+ source region, 12a. The second N+ source region, 13. N-type buffer layer. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0017] The present invention will be further described below in conjunction with the embodiments. Embodiment 1

[0018] As Figure 2As shown in the figure, a 1200V SiC trench MOSFET integrating superjunction and shield gate technologies includes an N+ substrate layer 2, a drift region above the N+ substrate layer 2, and a trench gate structure and a source structure above the drift region; a first conductive material 1 is provided below the N+ substrate layer 2 and forms an ohmic contact with the N+ substrate layer 2, and the first conductive material 1 is led out as the drain; the drift region is composed of alternately arranged first and second N-type strip regions 3 and 3a, first, second, and third P-type strip regions 4, 4a, and 4b, first, second, and third P-type shielding layers 5, 5a, and 5b, and first and second current spreading layers 8 and 8a; the trench gate structure is located above the second P-type shielding layer 5a and includes first and second insulating dielectric layers 6 and 6a located at the bottom and side walls of the trench, a shield gate 7 and a control gate 10 in the trench, and a third insulating dielectric layer 6b between the shield gate 7 and the control gate 10 in the trench. A second conductive material 1a is provided at the top of the control gate 10 and forms an ohmic contact with the control gate 10, and the second conductive material 1a is led out as the gate; the source structure is located at the top of the drift region and on both sides of the trench gate structure and includes first and second P-type base regions 9 and 9a, and first and second P+ source regions 11 and 11a and first and second N+ source regions 12 and 12a arranged horizontally at the top of the first and second P-type base regions 9 and 9a; a third conductive material 1b is provided at the top of the first P+ source region 11 and the first N+ source region 12 and forms an ohmic contact with them, and a fourth conductive material 1c is provided at the top of the second P+ source region 11a and the second N+ source region 12a and forms an ohmic contact with them. The third conductive material 1b and the fourth conductive material 1c are led out as the source.

[0019] The first, second, and third P-type shielding layers 5, 5a, and 5b are short-circuited to the source.

[0020] The shield gate 7 in the trench is short-circuited to the source.

[0021] The doping concentrations of the first, second, and third P-type strip regions 4, 4a, and 4b are the same as those of the first and second N-type strip regions 3 and 3a.

[0022] The doping concentrations of the first, second, and third P-type shielding layers 5, 5a, and 5b are higher than those of the first and second N-type strip regions 3 and 3a.

[0023] The doping concentrations of the first and second current spreading layers 8 and 8a are higher than those of the first and second N-type strip regions 3 and 3a.

[0024] The widths of the first, second, and third P-type shielding layers 5, 5a, and 5b are the same as those of the first, second, and third P-type strip regions 4, 4a, and 4b.

[0025] The semiconductor material used for the MOSFET is SiC.

[0026] Compared with the traditional SiC trench MOSFET with a P-type shielding layer, this embodiment integrates a superjunction and a shield gate structure. By optimizing the electric field distribution in the drift region with the superjunction structure, the specific on-resistance is reduced while maintaining a high breakdown voltage. The shield gate structure significantly reduces the gate-drain capacitance and gate-drain charge by reducing the overlapping area between the gate and the drain, thereby improving the dynamic characteristics and achieving a co-optimization of the static and dynamic losses. The P-type shielding layer reduces the peak electric field in the gate oxide layer and improves the reliability of the device. Embodiment 2

[0027] As Figure 3 shown, compared with Embodiment 1, the difference in this embodiment is that an N-type buffer layer 13 is provided between the drift region and the N+ substrate layer 2, which can reduce the process complexity while ensuring that the static characteristics do not degrade.

Claims

1. A 1200V SiC trench MOSFET integrating superjunction and shielded gate technologies, which includes an N+ substrate layer, a drift region located above the N+ substrate layer, and a trench gate structure and a source structure located above the drift region; a first conductive material forming an ohmic contact with the N+ substrate layer is provided below the N+ substrate layer, and the first conductive material is led out as the drain; the drift region is composed of alternately arranged first and second N-type strip regions, first, second, and third P-type strip regions, first and second P-type shielding layers, and first and second current spreading layers; the trench gate structure is located above the second P-type shielding layer and includes first and second insulating dielectric layers located at the bottom and sidewalls of the trench, a shielded gate and a control gate in the trench, and a third insulating dielectric layer between the shielded gate and the control gate in the trench. A second conductive material forming an ohmic contact with the control gate is provided at the top of the control gate, and the second conductive material is led out as the gate; the source structure is located at the top of the drift region and on both sides of the trench gate structure and includes first and second P-type base regions, and first and second P+ source regions and first and second N+ source regions arranged horizontally at the top thereof; third and fourth conductive materials forming an ohmic contact with the first and second P+ source regions and the first and second N+ source regions are provided at the top of the first and second P+ source regions and the first and second N+ source regions, and the third and fourth conductive materials are led out as the source.

2. The 1200V SiC trench MOSFET integrating superjunction and shield gate technology according to claim 1, wherein The first, second, and third P-type shielding layers are short-circuited with the source.

3. The 1200V SiC trench MOSFET integrating superjunction and shield gate technology according to claim 1, wherein The shielded gate in the trench is short-circuited with the source.

4. The 1200V SiC trench MOSFET integrating super junction and shield gate technologies according to claim 1, characterized in that, The doping concentrations of the first, second, and third P-type strip regions are the same as those of the first and second N-type strip regions.

5. The 1200V SiC trench MOSFET integrating superjunction and shield gate technologies according to claim 1, characterized in that, The doping concentration of the first, second, and third P-type shielding layers is higher than that of the first and second N-type strip regions.

6. The 1200V SiC trench MOSFET integrating super junction and shield gate technologies according to claim 1, characterized in that, The doping concentration of the first and second current spreading layers is higher than that of the first and second N-type strip regions.

7. The 1200V SiC trench MOSFET integrating superjunction and shielded gate technology according to claim 1, characterized in that, The widths of the first, second, and third P-type shielding layers are the same as those of the first, second, and third P-type strip regions.

8. The 1200V SiC trench MOSFET integrating superjunction and shield gate technologies according to claim 1, characterized in that, The semiconductor material used for the MOSFET is SiC.

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