Computing processing module finished product monitoring method and system

Abstract

The invention relates to the technical field of integrated circuit board finished product detection, in particular to a computing processing module finished product monitoring method and system, and the method comprises the steps: scanning a plurality of computing processing module finished products passing through a finished product conveying belt in real time through a linear array laser scanner disposed above the finished product conveying belt, and carrying out the real-time monitoring of the plurality of computing processing module finished products; further obtaining a spectrum pattern corresponding to each calculation processing module finished product; identifying local spectrum patterns corresponding to the plurality of chip assemblies in the spectrum pattern; and sequentially detecting whether each local spectrum pattern has a plane flaw, if so, evaluating the damaged surface of the plane flaw, and evaluating the damage degree of the damaged chip assembly based on the proportion of the damaged surface. According to the monitoring method, the spectral pattern representing the height information is generated in real time through the linear array laser scanner, the local areas of the multiple chip assemblies are accurately recognized in combination with the RGB color threshold value and the image feature extraction algorithm, interference caused by dense arrangement of the multiple assemblies is effectively avoided, and the positioning precision and the anti-noise capacity of plane defect detection are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of finished product detection of integrated circuit boards, and more particularly, to a method and system for monitoring finished products of a computing and processing module. Background Art

[0002] With the improvement of the integration level of electronic devices, the production quality detection of finished products of computing and processing modules faces higher requirements. Traditional detection methods mostly rely on manual visual inspection or single vision technology means. For example, conventional machine vision is used to detect whether the number of chip components on a circuit board is complete. Manual detection has low efficiency and is easily affected by subjective factors; traditional machine vision technology has insufficient sensitivity to planar defects with small height differences (such as fine scratches and warping). Especially in the scenario where multiple chip components are densely arranged, it is difficult to accurately locate local defects and judge slightly defective products (such as slightly damaged but functionally normal chip edges), resulting in directly judging slightly defective products as unqualified products and causing waste of resources. Summary of the Invention

[0003] The purpose of the present invention is to provide a method and system for monitoring finished products of a computing and processing module to improve the problem that it is difficult to accurately locate and analyze local defects based on machine vision as described above.

[0004] To achieve the above purpose, the embodiments of the present application provide the following technical solutions: On the one hand, the embodiments of the present application provide a method for monitoring finished products of a computing and processing module. The method includes: using a line array laser scanner disposed above a finished product conveyor belt to scan multiple finished products of the computing and processing module passing by in real time, thereby obtaining a spectral pattern corresponding to each finished product of the computing and processing module. The color in the spectral pattern is used to represent the height information of the upper surface of the finished product of the computing and processing module. The finished product of the computing and processing module includes a PCB board and multiple chip components disposed on the PCB board; based on a preset plurality of RGB color thresholds and an image feature extraction algorithm of a color class, identifying a plurality of local spectral patterns corresponding to the chip components in the spectral pattern; sequentially detecting whether each local spectral pattern has a planar defect. If so, evaluating the damaged surface of the planar defect and evaluating the damage degree of the damaged chip component based on the proportion of the damaged surface; if the damage degree is lower than a preset threshold, testing the function parameters corresponding to the damaged chip component, and determining the corresponding finished product of the computing and processing module as a slightly defective product when the function parameters are all within the preset threshold range.

[0005] Optionally, detecting whether each local spectral pattern has a planar defect. If so, evaluating the damaged surface of the planar defect includes: The image feature extraction algorithm based on color classes identifies multiple non-planar texture features in the local spectral pattern, eliminates the standard non-planar texture features, and further obtains multiple non-planar texture features corresponding to the planar defects, denoted as defective texture features; Based on the geometric features of the defective texture features, the multiple defective texture features are divided into strip-shaped defective texture features and block-shaped defective texture features; The strip-shaped defective texture features are sequentially segmented according to a preset horizontal or vertical unit length to obtain multiple unit strip-shaped defective texture features. A segmentation line is constructed based on the two ends of the unit strip-shaped defective texture features, and then the unit strip-shaped defective texture features are segmented into upward convex texture curves and / or downward convex texture curves; Calculate the translation amount of the upward convex texture curve and / or downward convex texture curve in the normal direction of the segmentation line based on the convexity of the upward convex texture curve and / or downward convex texture curve, and obtain the unit strip-shaped defective texture features after translation correction based on the translation amount; Construct a rectangular surface with a unit length based on the highest point and the lowest point of the unit strip-shaped defective texture features after translation correction. Multiple rectangular surfaces with a unit length constitute the damaged surface corresponding to the strip-shaped defective texture features, where the heights of the upper side and the bottom side of the rectangular surface correspond to the highest point and the lowest point respectively.

[0006] Optionally, after dividing the multiple defective texture features into strip-shaped defective texture features and block-shaped defective texture features, it further includes: Construct a virtual defect cavity based on the color gradient change of the block-shaped defective texture features, and construct a depth vertical reference line based on the deepest point in the virtual defect cavity; Taking the depth vertical reference line as the rotation central axis, find multiple first correction points on the upper edge curve of the virtual defect cavity according to a preset unit angle, calculate the cross-section magnification coefficient of the virtual defect cavity at the first correction point based on the horizontal distance from each first correction point to the depth vertical reference line, and reconstruct a second virtual defect cavity based on the corrected cross-sections corresponding to the multiple first correction points, so as to obtain the damaged surface and damaged depth corresponding to the block-shaped defective texture features.

[0007] Optionally, evaluating the damage degree of the damaged chip component based on the proportion of the damaged surface includes: Determine the packaging parameters corresponding to the current chip component based on the position information of the local spectral pattern in the spectral pattern. The packaging parameters include the SMD packaging layer thickness and the chip size parameters; Construct a high-risk coverage layer corresponding to the chip component based on the chip size parameters and the SMD packaging layer thickness, and divide a risk area and a risk thickness threshold on the upper surface of the chip component based on the high-risk coverage layer; Mark the part of the damaged surface corresponding to the strip-shaped defective texture features that is located in the risk area divided on the upper surface as the first damaged surface; Mark the part of the damaged surface corresponding to the strip flaw texture feature that is not located in the upper surface division risk area as the second damaged surface; When the damage depth of the second virtual defect cavity is less than the risk thickness threshold, calculate the simulated volume of the second virtual defect cavity based on the damaged surface and damage depth corresponding to the block flaw texture feature; Comprehensively evaluate the damage degree of the damaged chip component through a weighted algorithm based on the proportion of the first damaged surface in the upper surface of the chip component, the proportion of the second damaged surface in the upper surface of the chip component, and the proportion of the simulated volume in the entire non-high-risk coverage layer volume.

[0008] In a second aspect, the present embodiment provides a computing processing module finished product monitoring system, and the system includes: A first computing module, configured to use a line array laser scanner disposed above the finished product conveyor belt to scan multiple computing processing module finished products passing by on the finished product conveyor belt in real time, so as to obtain a spectral pattern corresponding to each computing processing module finished product, and the color in the spectral pattern is used to characterize the height information of the upper surface of the computing processing module finished product; An identification module, configured to identify local spectral patterns corresponding to multiple chip components in the spectral pattern based on a preset plurality of RGB color thresholds and an image feature extraction algorithm of a color class; A determination module, configured to sequentially detect whether there are planar flaws in each local spectral pattern. If so, evaluate the damaged surface of the planar flaw, and evaluate the damage degree of the damaged chip component based on the proportion of the damaged surface. If the damage degree is lower than a preset threshold, test the functional parameters corresponding to the damaged chip component, and determine that the corresponding computing processing module finished product is a slightly flawed product when the functional parameters are all within the preset threshold range.

[0009] The beneficial effects of the present invention are as follows: The present invention generates a spectral pattern representing height information in real time through a line array laser scanner, combines RGB color thresholds and an image feature extraction algorithm to accurately identify local areas of multiple chip components, effectively avoids interference caused by dense arrangement of multiple components, and improves the positioning accuracy and anti-noise ability of planar flaw detection; Secondly, a dual determination mechanism of the proportion of the damaged surface and functional parameter testing is adopted to verify the electrical performance while detecting appearance flaws, avoid misjudging and scrapping slightly flawed products with intact functions, and significantly reduce production costs and resource waste.

[0010] Other features and advantages of the present invention will be described in the subsequent specification, and part of them will become obvious from the specification, or be understood by implementing the embodiments of the present invention. The objectives and other advantages of the present invention can be achieved and obtained through the structures specifically pointed out in the written specification, claims, and drawings. Description of the Drawings

[0011] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following accompanying drawings only show some embodiments of the present invention and should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related accompanying drawings can also be obtained based on these drawings.

[0012] Figure 1 It is a schematic flowchart of a method for monitoring the finished products of a computing and processing module described in the embodiments of the present invention. Specific embodiments

[0013] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Usually, the components of the embodiments of the present invention described and shown in the accompanying drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed present invention, but merely represents the selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

[0014] It should be noted that similar reference numerals or letters represent similar items in the following accompanying drawings. Therefore, once an item is defined in one accompanying drawing, it does not need to be further defined and explained in subsequent accompanying drawings. At the same time, in the description of the present invention, terms such as "first" and "second" are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.

[0015] Embodiment 1:

[0016] As Figure 1 shown, this embodiment provides a method for monitoring the finished products of a computing and processing module. The method includes step S100, step S200, step S300, and step S400.

[0017] Step S100: Through a linear array laser scanner disposed above the finished product conveyor belt, multiple finished products of the computing and processing module passing by on the finished product conveyor belt are scanned in real time, and thus a spectral pattern corresponding to each finished product of the computing and processing module is obtained. The color in the spectral pattern is used to characterize the height information of the upper surface of the finished product of the computing and processing module. The finished product of the computing and processing module includes a PCB board and multiple chip components disposed on the PCB board; Step S200: Based on a preset plurality of RGB color thresholds and combined with an image feature extraction algorithm for color classes, identify local spectral patterns corresponding to a plurality of chip components in the spectral pattern; Step S300: Sequentially detect whether there are planar defects in each local spectral pattern. If so, evaluate the damaged surface of the planar defect, and evaluate the damage degree of the damaged chip component based on the proportion of the damaged surface; The specific implementation method is as follows: Step S310: Based on the image feature extraction algorithm for color classes, identify a plurality of non-planar texture features in the local spectral pattern, and eliminate standard non-planar texture features, thereby obtaining a plurality of non-planar texture features corresponding to the planar defect, denoted as defective texture features. When there are obvious defects on the upper surface of the chip component, it is usually divided into two types. One is a strip-shaped defect corresponding to a crack, and the other is a block-shaped defect with a small piece falling off, which appears as a strip-shaped or block-shaped different-color band in the spectral pattern; Step S320: Based on the geometric features of the defective texture features, divide the plurality of defective texture features into strip-shaped defective texture features and block-shaped defective texture features. The processing logics of the strip-shaped defective texture features and the block-shaped defective texture features are completely different; I. The processing method for strip-shaped defective texture features is as follows: Step S330: Sequentially divide the strip-shaped defective texture features into segments according to a preset horizontal or vertical unit length to obtain a plurality of unit strip-shaped defective texture features. Based on the two end points of the unit strip-shaped defective texture feature, construct a segmentation line, and then divide the unit strip-shaped defective texture feature into an upward convex texture curve and / or a downward convex texture curve. Later, adjust the convexity of the curve based on the convexity of the upward convex texture curve and / or the downward convex texture curve, thereby increasing the construction of the damaged surface and making the damaged surface better reflect the impact of the strip-shaped crack on the chip component; Step S340: Calculate the translation amount of the upward convex texture curve and / or the downward convex texture curve in the normal direction of the segmentation line based on the convexity of the upward convex texture curve and / or the downward convex texture curve, and perform a translation operation on the upward convex texture curve and / or the downward convex texture curve based on the translation amount, thereby obtaining a unit strip-shaped defective texture feature after translation correction; Among them, the calculation method for calculating the translation amount of the upward convex texture curve and / or the downward convex texture curve in the normal direction of the segmentation line based on the convexity of the upward convex texture curve and / or the downward convex texture curve can be: Represent this section of the curve with a discrete curve point sequence: , N is the total number of curve points, is the coordinate of the i-th point; Translation vector calculation formula: ; Among them, T is the translation vector, is the proportionality coefficient, is the curvature of the i-th point; is the normal direction of the i-th point; ; is the index of the point with the maximum curvature, that is, the index of the point with the largest absolute value of curvature; is the first derivative of the curve at the i-th point, is the second derivative of the curve at the i-th point, is the parameter for finding the maximum value of the subsequent expression; ; where is the curvature of the i-th point; is the normal direction of the i-th point, is the first derivative of the point with the largest absolute value of curvature, used to calculate the curvature and normal direction, is the second derivative of the point with the largest absolute value of curvature, is the component in the y-axis direction, is the component in the x-axis direction, represents rotating the tangent vector at the point with the largest absolute value of curvature counterclockwise by 90°; Step S350: Construct a rectangle with a unit length based on the highest point and the lowest point of the texture feature of the unit bar-shaped flaw after translation correction. The rectangle is the unit damage surface corresponding to the texture feature of the unit bar-shaped flaw, and the damage surfaces corresponding to the texture features of the bar-shaped flaws are composed of multiple rectangles with a unit length. The heights of the upper and lower sides of the rectangle correspond to the highest point and the lowest point respectively.

[0018] II. The processing method for the texture feature of the block-shaped flaw can be: Step S360: Construct a virtual defect cavity based on the color gradient change of the texture feature of the block-shaped flaw, and construct a depth vertical reference line based on the deepest point in the virtual defect cavity. The depth vertical reference line is perpendicular to the upper surface of the chip component; Step S370: Using the depth vertical reference line as the rotation central axis, find multiple first correction points on the upper edge curve of the virtual defect cavity at a preset unit angle, calculate the cross-section magnification factor of the virtual defect cavity at each first correction point based on the horizontal distance from each first correction point to the depth vertical reference line, and reconstruct a second virtual defect cavity based on the corrected cross-sections corresponding to the multiple first correction points, so as to obtain the damage surface and damage depth corresponding to the texture feature of the block-shaped flaw.

[0019] Based on the above damage evaluation methods for the texture features of the bar-shaped flaw and the block-shaped flaw, the evaluation method for the comprehensive damage degree can be: Step S380: Determine the packaging parameters corresponding to the current chip component based on the position information of the local spectral pattern in the spectral pattern. The packaging parameters include the SMD packaging layer thickness and the chip size parameter; Step S390: Construct a high-risk coverage layer corresponding to the chip component based on the chip size parameter and the SMD packaging layer thickness, and divide a risk area and a risk thickness threshold on the upper surface of the chip component based on the high-risk coverage layer. The risk area is the vertical mapping area of the high-risk coverage layer on the upper surface of the chip component, and the risk thickness threshold is the thickness value obtained by subtracting the minimum chip protection layer thickness from the SMD packaging layer thickness. The minimum chip protection layer thickness is calculated through a preset working condition simulation experiment based on the chip size parameter, and these parameters can be written into the detection device through experiments before production; Step S3100: Mark the part of the damaged surface corresponding to the strip flaw texture feature that is located in the risk area divided on the upper surface as the first damaged surface; Step S3110: Mark the part of the damaged surface corresponding to the strip flaw texture feature that is not located in the risk area divided on the upper surface as the second damaged surface; Step S3120: When the damage depth of the second virtual defect cavity is less than the risk thickness threshold, calculate the simulated volume of the second virtual defect cavity based on the damaged surface and the damage depth corresponding to the block flaw texture feature. The second virtual defect cavity is a virtual inverted cone-shaped cavity with the damaged surface as the top surface and the damage depth as the depth. The simulated volume is the volume of this type of inverted cone-shaped cavity, and its calculation method is to bring the constructed second virtual defect cavity model into AutoCAD Civil 3D for calculation; Step S3130: Comprehensively evaluate the damage degree of the damaged chip component through a weighted algorithm based on the proportion of the first damaged surface in the upper surface of the chip component, the proportion of the second damaged surface in the upper surface of the chip component, and the proportion of the simulated volume in the volume of the entire non-high-risk coverage layer. The non-high-risk coverage layer is the area of the chip component excluding the high-risk coverage layer.

[0020] Step S400: If the damage degree is lower than the preset threshold, test the function parameters corresponding to the damaged chip component, and determine that the corresponding computing and processing module finished product is a slightly defective product when the function parameters are all within the preset threshold range; If the damage degree is greater than or equal to the preset threshold, directly determine it as a defective product. Most of these are cracks or defective points concentrated in the risk area. Even if the function test passes, there is still a relatively high risk of failure during later use compared to a normal processor.

[0021] Embodiment 2:

[0022] This embodiment provides a monitoring system for computing and processing module finished products, and the system includes: A first calculation module, configured to use a linear laser scanner disposed above the finished product conveyor belt to scan in real time a plurality of finished products of calculation and processing modules passing through the finished product conveyor belt, so as to obtain a spectral pattern corresponding to each finished product of the calculation and processing module, and the color in the spectral pattern is used to characterize the height information of the upper surface of the finished product of the calculation and processing module; An identification module, configured to identify local spectral patterns corresponding to a plurality of chip components in the spectral pattern based on a plurality of preset RGB color thresholds and an image feature extraction algorithm of a color class; A determination module, configured to sequentially detect whether there are planar defects in each local spectral pattern. If so, evaluate the damaged surface of the planar defect, and evaluate the damage degree of the damaged chip component based on the proportion of the damaged surface; If the damage degree is lower than a preset threshold, test the functional parameters corresponding to the damaged chip component, and determine that the corresponding finished product of the calculation and processing module is a slightly defective product when the functional parameters are all within the preset threshold range.

[0023] It should be noted that regarding the device in the above embodiments, the specific manners in which each module performs operations have been described in detail in the embodiments related to the method, and will not be elaborated herein.

[0024] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A finished product monitoring method for a computing processing module, characterized in that, The method includes: By means of a linear laser scanner disposed above the finished product conveyor belt, multiple finished products of computing and processing modules passing through the finished product conveyor belt are scanned in real time, so as to obtain a spectral pattern corresponding to each finished product of the computing and processing module. The colors in the spectral pattern are used to characterize the height information of the upper surface of the finished product of the computing and processing module. The finished product of the computing and processing module includes a PCB board and multiple chip components disposed on the PCB board; Based on a preset plurality of RGB color thresholds and an image feature extraction algorithm of the color class, multiple local spectral patterns corresponding to the chip components are identified in the spectral pattern; Each local spectral pattern is sequentially detected to determine whether there is a planar flaw. If there is, the damaged surface of the planar flaw is evaluated, and the damage degree of the damaged chip component is evaluated based on the proportion of the damaged surface; If the damage degree is lower than the preset threshold, the functional parameters corresponding to the damaged chip component are tested. If the functional parameters are all within the preset threshold range, the corresponding finished product of the computing and processing module is determined to be a slightly defective product.

2. The finished product monitoring method for the computing and processing module according to claim 1, wherein Detect whether there is a planar flaw in each local spectral pattern. If there is, evaluate the damaged surface of the planar flaw, including: Based on the image feature extraction algorithm of the color class, multiple non-planar texture features in the local spectral pattern are identified, and the standard non-planar texture features are removed, so as to obtain multiple non-planar texture features corresponding to the planar flaw, which are denoted as flaw texture features; Based on the geometric features of the flaw texture features, the multiple flaw texture features are divided into strip flaw texture features and block flaw texture features; The strip flaw texture features are sequentially segmented according to a preset horizontal or vertical unit length to obtain multiple unit strip flaw texture features. Based on the two ends of the unit strip flaw texture features, a segmentation line is constructed, and then the unit strip flaw texture features are segmented into upper convex texture curves and / or lower convex texture curves; Based on the convexity degree of the upper convex texture curve and / or the lower convex texture curve, the translation amount of the upper convex texture curve and / or the lower convex texture curve in the normal direction of the segmentation line is calculated, and the unit strip flaw texture features after translation correction are obtained based on the translation amount; Based on the highest point and the lowest point of the unit strip flaw texture features after translation correction, a rectangular surface with a unit length is constructed. Multiple rectangular surfaces with a unit length constitute the damaged surface corresponding to the strip flaw texture feature, where the heights of the upper side and the lower side of the rectangular surface respectively correspond to the highest point and the lowest point.

3. The finished product monitoring method for the computing and processing module according to claim 2, wherein After the multiple flaw texture features are divided into strip flaw texture features and block flaw texture features, it further includes: Based on the color gradient change of the block flaw texture feature, a virtual defect cavity is constructed, and a depth vertical reference line is constructed based on the deepest point in the virtual defect cavity; Taking the depth vertical reference line as the rotation central axis, multiple first correction points are found on the upper edge curve of the virtual defect cavity according to a preset unit angle. Based on the horizontal distance from each first correction point to the depth vertical reference line, the cross-section magnification coefficient of the virtual defect cavity at the first correction point is calculated, and based on the corrected cross-sections corresponding to the multiple first correction points, a second virtual defect cavity is reconstructed, so as to obtain the damaged surface and the damage depth corresponding to the block flaw texture feature.

4. The finished product monitoring method for the computing and processing module according to claim 3, wherein Evaluating the damage degree of the damaged chip component based on the proportion of the damaged surface, including: Determine the packaging parameters corresponding to the current chip component based on the position information of the local spectral pattern in the spectral pattern, where the packaging parameters include the thickness of the SMD packaging layer and the chip size parameter; Construct a high-risk coverage layer corresponding to the chip component based on the chip size parameter and the thickness of the SMD packaging layer, and divide the risk area and the risk thickness threshold on the upper surface of the chip component based on the high-risk coverage layer; Mark the part of the damaged surface corresponding to the strip-shaped flaw texture feature that is located within the risk area divided on the upper surface as the first damaged surface; Mark the part of the damaged surface corresponding to the strip-shaped flaw texture feature that is not located within the risk area divided on the upper surface as the second damaged surface; When the damage depth of the second virtual defect cavity is less than the risk thickness threshold, calculate the simulated volume of the second virtual defect cavity based on the damaged surface and the damage depth corresponding to the block-shaped flaw texture feature; Comprehensively evaluate the damage degree of the damaged chip component through a weighted algorithm based on the proportion of the first damaged surface in the upper surface of the chip component, the proportion of the second damaged surface in the upper surface of the chip component, and the proportion of the simulated volume in the volume of the entire non-high-risk coverage layer.

5. A finished product monitoring system for a computing and processing module, characterized in that, The system includes: A first calculation module, which is used to scan multiple calculation processing module products passing by on the finished product conveyor belt in real time through a line array laser scanner disposed above the finished product conveyor belt, so as to obtain the spectral pattern corresponding to each calculation processing module product, and the color in the spectral pattern is used to characterize the height information of the upper surface of the calculation processing module product; An identification module, which is used to identify the local spectral patterns corresponding to multiple chip components in the spectral pattern based on a preset plurality of RGB color thresholds and an image feature extraction algorithm for color classes; A determination module, which is used to sequentially detect whether there are planar flaws in each local spectral pattern. If so, evaluate the damaged surface of the planar flaw and evaluate the damage degree of the damaged chip component based on the proportion of the damaged surface; If the damage degree is lower than the preset threshold, test the functional parameters corresponding to the damaged chip component, and determine that the corresponding calculation processing module product is a slightly flawed product when the functional parameters are all within the preset threshold range.

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