Matching system capable of automatically adjusting impedance, radio frequency system and impedance matching method

Abstract

The invention relates to a matching system capable of automatically adjusting impedance, a radio frequency system and an impedance matching method, an inverted L-shaped matching network circuit in which an inductor is connected in series with a second adjustable capacitor and a first adjustable capacitor is connected in parallel is adopted to replace a traditional impedance matcher, the number of series elements is reduced to two (the inductor and the second adjustable capacitor), and only one parallel element (the first adjustable capacitor) is adopted. The circuit complexity is remarkably reduced, the adjustable capacitor is used for replacing a fixed capacitor / inductor, dynamic impedance adjustment is achieved, and debugging redundancy caused by traditional multi-element combination is avoided; a signal acquisition unit, a signal processing unit and a signal execution unit are integrated on a main control board, a data interaction path is shortened (for example, voltage and current signals are directly converted by an analog-to-digital converter and then processed by the processing unit), communication delay in a traditional separated design is eliminated, and the processing unit calculates and generates a capacitance adjustment amount instruction. And the execution unit respectively adjusts the capacitance values of the first adjustable capacitor and the second adjustable capacitor, so that impedance matching between the radio frequency source and the load is realized.

Description

Technical Field

[0001] This application relates to the field of impedance matchers, and specifically to a matching system, a radio frequency system, and an impedance matching method for automatically adjusting impedance. Background Art

[0002] In practical applications, radio frequency systems often encounter problems of impedance matching imbalance between cascaded circuits of various parts, which will seriously affect the transmission of signals or energy. Therefore, optimal impedance matching is an essential task. The impedance of the plasma chamber is also different in different production processes and is easily affected by environmental factors. For this situation, realizing high-precision and high-speed automatic impedance matching is a necessary means to ensure the uniformity and stability of the plasma. Impedance matching is an important part of microwave electronics, mainly used for the transmission of signals or energy so that all microwave signals can be transmitted to the load point without signal or energy reflection, thereby improving the transmission efficiency. That is, the purpose of matching is to ensure the effective transmission of signals or energy from the "signal source" to the "load".

[0003] In the related art, the structures of traditional impedance matchers are relatively complex, and a large number of series and parallel components are used, which makes the impedance matcher large in size and difficult to meet the requirements of miniaturized electronic devices. Moreover, due to the design of multiple components, debugging and maintenance are cumbersome, and it is easily affected by external factors, resulting in performance fluctuations. In addition, the sampling device, algorithm device, and execution device of the impedance matcher are separated from each other, and the data interaction efficiency is low, which will directly affect the performance. Summary of the Invention

[0004] This application provides a matching system, a radio frequency system, and an impedance matching method for automatically adjusting impedance, which can solve the technical problems in the related art that the structures of traditional impedance matchers are relatively complex, difficult to meet the requirements of miniaturized electronic devices, and due to the design of multiple components, debugging and maintenance are cumbersome, and their sampling device, algorithm device, and execution device are separated from each other, and the data interaction efficiency is low, which will directly affect the performance.

[0005] In a first aspect, an embodiment of this application provides a matching system for automatically adjusting impedance, including:

[0006] An inverted L-shaped matching network circuit, which includes an inductor, a first adjustable capacitor, and a second adjustable capacitor. The inductor and the second adjustable capacitor are in series and are both used to be connected in series in the loop between the radio frequency source and the load. The first adjustable capacitor is used to be connected in parallel in the loop between the radio frequency source and the load, and the first adjustable capacitor is in parallel with the inductor;

[0007] The main control board integrates a collection unit, a processing unit, and an execution unit. The collection unit is used to connect to the output end of the radio frequency source, detect voltage and current signals in real time, and output digital signals through an analog-to-digital converter. The processing unit is used to receive the digital signals output by the analog-to-digital converter, calculate and generate capacitance adjustment commands for the first adjustable capacitor and the second adjustable capacitor. The execution unit is connected to the first adjustable capacitor and the second adjustable capacitor, and is used to adjust the capacitance values of the first adjustable capacitor and the second adjustable capacitor respectively according to their capacitance adjustment commands, so as to achieve impedance matching between the radio frequency source and the load.

[0008] Combined with the first aspect, in an embodiment, the collection unit includes a radio frequency dedicated sensor, which is used to connect to the output end of the radio frequency source, detect voltage and current signals in real time, and output digital signals through an analog-to-digital converter.

[0009] Combined with the first aspect, in an embodiment, the processing unit includes a system-on-chip field programmable gate array, which is connected between the collection unit and the execution unit. The system-on-chip field programmable gate array is used to receive the digital signals output by the analog-to-digital converter, obtain the frequency domain information of the voltage and current signals by using the Fourier transform algorithm, and generate capacitance adjustment commands for the first adjustable capacitor and the second adjustable capacitor.

[0010] Combined with the first aspect, in an embodiment, the execution unit includes a motor drive chip, which is connected to the processing unit, and drive motors are electrically connected between the motor drive chip and the first adjustable capacitor and the second adjustable capacitor respectively.

[0011] In a second aspect, an embodiment of the present application provides a radio frequency system, which includes:

[0012] A radio frequency source, in the circuit of which a load is connected in series;

[0013] An inverted L-shaped matching network circuit, which includes an inductor, a first adjustable capacitor, and a second adjustable capacitor. The inductor and the second adjustable capacitor are connected in series in the circuit between the radio frequency source and the load, the first adjustable capacitor is connected in parallel in the circuit between the radio frequency source and the load, and the first adjustable capacitor is connected in parallel with the inductor;

[0014] The main control board integrates a collection unit, a processing unit, and an execution unit. The collection unit is connected to the output end of the radio frequency source, and real-time detects voltage and current signals, and outputs digital signals through an analog-to-digital converter. The processing unit is used to receive the digital signals output by the analog-to-digital converter, calculate and generate capacitance adjustment commands for the first adjustable capacitor and the second adjustable capacitor. The execution unit is connected to the first adjustable capacitor and the second adjustable capacitor, and the execution unit is used to adjust the capacitance values of the first adjustable capacitor and the second adjustable capacitor respectively according to their capacitance adjustment commands, so as to achieve impedance matching between the radio frequency source and the load.

[0015] In a third aspect, an embodiment of the present application provides an impedance matching method for an automatic impedance adjustment matching system as described in some of the above embodiments, which includes the following steps:

[0016] Use the collection unit to collect the voltage and current signals at the output end of the radio frequency source in real time, and convert them into digital signals through an analog-to-digital converter;

[0017] Use the processing unit to process the collected digital signals, and calculate and generate capacitance adjustment commands for the first adjustable capacitor and the second adjustable capacitor;

[0018] Based on the capacitance adjustment commands of the first adjustable capacitor and the second adjustable capacitor, use the execution unit to adjust the capacitance values of the first adjustable capacitor and the second adjustable capacitor respectively, so as to achieve impedance matching between the radio frequency source and the load.

[0019] Combined with the third aspect, in an implementation manner, the step of using the processing unit to process the collected digital signals and calculate and generate capacitance adjustment commands for the first adjustable capacitor and the second adjustable capacitor includes:

[0020] Use the processing unit to perform Fourier transform algorithm transformation and data preprocessing on the collected digital signals;

[0021] Synchronously perform frequency discrimination, amplitude discrimination, and phase discrimination processing on the processed digital signals to obtain the carrier frequency information, amplitude magnitude, and phase information of the digital signals;

[0022] According to the calculated frequency, amplitude, and phase, calculate the input impedance, reflection coefficient, and standing wave ratio;

[0023] If the reflection coefficient or the standing wave ratio exceeds the preset threshold value, then calculate and generate capacitance adjustment position commands for the first adjustable capacitor and the second adjustable capacitor based on the capacitance values of the current first adjustable capacitor and the second adjustable capacitor.

[0024] In combination with the third aspect, in one embodiment, after calculating and generating the capacitance adjustment position commands for the first adjustable capacitor and the second adjustable capacitor based on the capacitance values of the current first adjustable capacitor and the second adjustable capacitor if the reflection coefficient or the standing wave ratio exceeds a preset threshold value, the method further includes:

[0025] Repeat the steps of collecting the voltage and current signals at the output end of the RF source, as well as conversion, processing, parameter extraction, and impedance parameter calculation. If the calculated reflection coefficient or standing wave ratio still exceeds the preset threshold value, continue to calculate and generate the capacitance adjustment position commands for the first adjustable capacitor and the second adjustable capacitor based on the capacitance values of the current first adjustable capacitor and the second adjustable capacitor; otherwise, end the adjustment process.

[0026] In combination with the third aspect, in one embodiment, the use of the processing unit to perform Fourier transform algorithm transformation and data preprocessing on the collected digital signals includes:

[0027] Use the processing unit to perform Fourier transform algorithm transformation, filtering, and DC component removal processing on the collected digital signals.

[0028] In combination with the third aspect, in one embodiment, the use of the processing unit to perform Fourier transform algorithm transformation, filtering, and DC component removal processing on the collected digital signals includes:

[0029] The sampling rate of the Fourier transform algorithm matches the frequency of the output signal of the RF source, and the filtering process includes band-pass filtering.

[0030] The beneficial effects brought by the technical solutions provided by the embodiments of the present application include:

[0031] An inverted L-shaped matching network circuit with an inductor in series with the second adjustable capacitor and the first adjustable capacitor in parallel is adopted to replace the traditional impedance matcher, reducing the series elements to 2 (inductor, second adjustable capacitor) and the parallel element to only 1 (first adjustable capacitor), significantly reducing the circuit complexity. By replacing fixed capacitors / inductors with adjustable capacitors, dynamic impedance adjustment is achieved, avoiding the debugging redundancy brought by traditional multi-element combinations; integrating the signal acquisition, processing, and execution units on a single main control board shortens the data interaction path (such as directly converting the voltage and current signals by the analog-to-digital converter and then processing them by the processing unit), eliminating the communication delay in the traditional separate design. The processing unit calculates and generates the capacitance adjustment amount commands, and the execution unit adjusts the capacitance values of the first adjustable capacitor and the second adjustable capacitor respectively to achieve impedance matching between the RF source and the load. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] To more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0033] Figure 1 It is a schematic structural diagram of an inverted L-shaped matching network circuit;

[0034] Figure 2 It is a schematic structural diagram of a matching system for automatically adjusting impedance installed in a radio frequency system.

[0035] In the figure: 1. Radio frequency source; 2. Load; 3. First adjustable capacitor; 4. Second adjustable capacitor; 5. Inductor; 6. Main control board; 61. Acquisition unit; 62. Driving motor. Specific implementation manners

[0036] In order to enable those skilled in the art of this technology to better understand the solutions of the present application, the following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, rather than all embodiments. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0037] The embodiments of the present application provide a matching system for automatically adjusting impedance, a radio frequency system, and an impedance matching method, which can solve the technical problems in the related art that the structures of traditional impedance matchers are relatively complex, difficult to meet the requirements of miniaturized electronic devices, and due to the design of multiple components, debugging and maintenance are cumbersome, and their sampling device, algorithm device, and execution device are separated from each other, and the data interaction efficiency is low, which will directly affect the performance.

[0038] In the first aspect, as Figure 1 and Figure 2As shown in the figure, the present application provides an impedance matching system with automatic adjustment, including: an inverted L-shaped matching network circuit, which includes an inductor 5, a first adjustable capacitor 3 and a second adjustable capacitor 4. The inductor 5 and the second adjustable capacitor 4 are in series, and both are used to be connected in series in the loop between the RF source 1 and the load 2. The first adjustable capacitor 3 is used to be connected in parallel in the loop between the RF source 1 and the load 2, and the first adjustable capacitor 3 is in parallel with the inductor 5; a main control board 6, which integrates a collection unit 61, a processing unit and an execution unit. The collection unit 61 is used to be connected to the output end of the RF source 1, detect voltage and current signals in real time, and output digital signals through an analog-to-digital converter. The processing unit is used to receive the digital signals output by the analog-to-digital converter, calculate and generate capacitance adjustment amount instructions for the first adjustable capacitor 3 and the second adjustable capacitor 4. The execution unit is connected to the first adjustable capacitor 3 and the second adjustable capacitor 4. The execution unit is used to adjust the capacitance values of the first adjustable capacitor 3 and the second adjustable capacitor 4 respectively according to its capacitance adjustment amount instructions, so as to achieve impedance matching between the RF source 1 and the load 2.

[0039] In this embodiment, the combination of the inductor 5, the first adjustable capacitor 3 and the second adjustable capacitor 4 is used to achieve impedance matching between the RF source 1 and the load 2. Among them, the inductor 5 and the second adjustable capacitor 4 are connected in series in the loop between the RF source 1 and the load 2, playing a role in adjusting impedance; while the first adjustable capacitor 3 is connected in parallel in this loop, forming a parallel relationship with the inductor 5, further enhancing the flexibility and accuracy of impedance matching; the main control board 6, as the core control unit of the system, integrates the collection unit 61, the processing unit and the execution unit. The collection unit 61 can detect the voltage and current signals at the output end of the RF source 1 in real time, and convert these analog signals into digital signals through an analog-to-digital converter, providing an accurate data basis for the processing unit. The processing unit is responsible for receiving these digital signals and calculating the capacitance adjustment amount instructions for the first adjustable capacitor 3 and the second adjustable capacitor 4 through complex algorithms. The execution unit then adjusts the capacitance values of the two adjustable capacitors accurately according to these instructions, so as to achieve impedance matching. Through the impedance matching system with automatic adjustment, the matching efficiency between the RF source 1 and the load 2 has been significantly improved. The system can detect and adjust the capacitance value in real time, ensuring the best impedance matching effect under different working conditions, thereby improving the transmission efficiency of RF signals and the overall performance of the system; traditional impedance matching methods often require manual adjustment of capacitance values, which is not only cumbersome to operate but also difficult to achieve the best matching effect. However, the impedance matching system with automatic adjustment provided by the present application can intelligently adjust the capacitance value, reducing the energy consumption and loss of the system and improving the energy utilization efficiency; since the system can detect and adjust the capacitance value in real time, it can cope with various complex working conditions and environmental changes, which enhances the stability and reliability of the system, ensuring the stable transmission of RF signals and the long-term stable operation of the system.

[0040] In combination with the first aspect, in one embodiment, the acquisition unit 61 includes a dedicated RF sensor, which is used to connect to the output end of the RF source 1, detect voltage and current signals in real time, and output digital signals through an analog-to-digital converter.

[0041] In this embodiment, in the acquisition unit 61, a dedicated RF sensor is introduced. This sensor is designed specifically for the RF environment and has the characteristics of high precision, high sensitivity, and fast response. The dedicated RF sensor is directly connected to the output end of the RF source 1, and can detect voltage and current signals in the RF signal in real time and accurately. The voltage and current signals detected by the dedicated RF sensor are analog signals. For subsequent digital processing, the system integrates an analog-to-digital converter (ADC). The analog-to-digital converter converts the analog signals output by the dedicated RF sensor into digital signals, providing accurate and reliable data input for the processing unit.

[0042] In combination with the first aspect, in one embodiment, the processing unit includes a system-on-chip field programmable gate array, which is connected between the acquisition unit 61 and the execution unit. The system-on-chip field programmable gate array is used to receive the digital signals output by the analog-to-digital converter, obtain the frequency-domain information of the voltage and current signals by using the Fourier transform algorithm, and generate capacitance adjustment instructions for the first adjustable capacitor 3 and the second adjustable capacitor 4.

[0043] In this embodiment, the processing unit uses a System on Chip Field Programmable Gate Array (abbreviated as SoC FPGA in English), which is a single-chip solution that integrates a processor system (such as an ARM processor) and programmable logic (such as an FPGA). The SoC FPGA is connected between the acquisition unit 61 and the execution unit. As the core processing unit of the system, it is responsible for receiving the digital signal output by the analog-to-digital converter and performing subsequent processing and calculations. Inside the SoC FPGA, the Fourier transform algorithm is used to process the received digital signal. The Fourier transform is a mathematical method that converts a time-domain signal into a frequency-domain signal and can reveal the spectral characteristics of the signal. Through the Fourier transform algorithm, the system can analyze the spectral characteristics of the radio frequency signal and calculate the capacitance adjustment amount instructions for the first adjustable capacitor 3 and the second adjustable capacitor 4 according to these characteristics. The SoC FPGA technology combines the flexibility of the processor and the high-speed parallel processing ability of the FPGA, enabling the system to quickly process and analyze radio frequency signals, improving the processing speed and real-time performance. This enables the system to calculate the capacitance adjustment amount instructions more timely and transmit them to the execution unit for capacitance value adjustment, thereby achieving faster impedance matching. The programmability of the SoC FPGA enables the system to be customized and optimized according to different application requirements. Through programming, the Fourier transform algorithm or other processing algorithms can be easily updated or modified to adapt to different radio frequency signal characteristics or impedance matching requirements. The application of the Fourier transform algorithm enables the system to more accurately analyze the spectral characteristics of the radio frequency signal, thereby calculating more accurate capacitance adjustment amount instructions, which improves the accuracy and stability of impedance matching and ensures the efficient transmission of radio frequency signals and the stable operation of the system. The SoC FPGA technology integrates the processor and programmable logic, simplifies the system design, reduces the complexity and cost of the system, making the impedance matching system with automatic adjustment more economical, practical, and easier to promote and apply.

[0044] Combined with the first aspect, in an embodiment, the execution unit includes a motor driver chip. The motor driver chip is connected to the processing unit, and drive motors 62 are electrically connected between the motor driver chip and the first adjustable capacitor 3 and the second adjustable capacitor 4 respectively.

[0045] In this embodiment, the motor driver chip is connected to the processing unit, receives the capacitance adjustment amount instructions sent by the processing unit, and controls the operation of the drive motor 62 according to these instructions. The motor driver chip is connected to the drive motor 62 through electrical connections between it and the first adjustable capacitor 3 and the second adjustable capacitor 4 respectively. After the processing unit calculates the capacitance adjustment amount instructions, it sends these instructions to the motor driver chip through electrical connections. After receiving the instructions, the motor driver chip controls the operation of the drive motor 62 to drive the rotation or movement of the adjustable capacitor, thereby changing its capacitance value and achieving impedance matching.

[0046] In a second aspect, as Figure 2 shown, an embodiment of the present application provides a radio frequency system, which includes: a radio frequency source 1, a load 2 is connected in series in the circuit of the radio frequency source 1; an inverted L-shaped matching network circuit, which includes an inductor 5, a first adjustable capacitor 3 and a second adjustable capacitor 4, the inductor 5 and the second adjustable capacitor 4 are connected in series in the circuit between the radio frequency source 1 and the load 2, the first adjustable capacitor 3 is connected in parallel in the circuit between the radio frequency source 1 and the load 2, and the first adjustable capacitor 3 is connected in parallel with the inductor 5; a main control board 6, which is integrated with a collection unit 61, a processing unit and an execution unit, the collection unit 61 is connected to the output end of the radio frequency source 1, and is used to detect voltage and current signals in real time, and output digital signals through an analog-to-digital converter, the processing unit is used to receive the digital signals output by the analog-to-digital converter, calculate and generate capacitance adjustment amount instructions for the first adjustable capacitor 3 and the second adjustable capacitor 4, the execution unit is connected to the first adjustable capacitor 3 and the second adjustable capacitor 4, and the execution unit is used to adjust the capacitance values of the first adjustable capacitor 3 and the second adjustable capacitor 4 respectively according to their capacitance adjustment amount instructions, so as to achieve impedance matching between the radio frequency source 1 and the load 2.

[0047] In this embodiment, the radio frequency source 1 is a device that generates radio frequency signals. A load 2 is connected in series in its circuit. The inverted L-shaped matching network circuit includes a matching network composed of an inductor 5, a first adjustable capacitor 3, and a second adjustable capacitor 4. The inductor 5 and the second adjustable capacitor 4 are connected in series in the circuit between the radio frequency source 1 and the load 2. The first adjustable capacitor 3 is connected in parallel to the circuit between the radio frequency source 1 and the load 2 and is in parallel with the inductor 5. The main control board 6 integrates an acquisition unit 61, a processing unit, and an execution unit. The acquisition unit 61 is connected to the output terminal of the radio frequency source 1 and is used to detect the voltage and current signals in the radio frequency signal in real time, and convert the detected analog signal into a digital signal through an analog-to-digital converter for subsequent processing. The processing unit receives the digital signal output by the analog-to-digital converter and calculates and generates capacitance adjustment commands for the first adjustable capacitor 3 and the second adjustable capacitor 4 using a specific algorithm (such as the Fourier transform algorithm). The execution unit is connected to the first adjustable capacitor 3 and the second adjustable capacitor 4 and adjusts the capacitance values of the first adjustable capacitor 3 and the second adjustable capacitor 4 respectively according to the capacitance adjustment commands generated by the processing unit. When the radio frequency source 1 generates a radio frequency signal, the acquisition unit 61 detects the voltage and current signals in the radio frequency signal in real time. After these signals are converted into digital signals by the analog-to-digital converter, they are transmitted to the processing unit. The processing unit calculates and generates capacitance adjustment commands for the first adjustable capacitor 3 and the second adjustable capacitor 4 using the algorithm. The execution unit adjusts the capacitance values of the first adjustable capacitor 3 and the second adjustable capacitor 4 according to these commands, thereby adjusting the impedance characteristics of the inverted L-shaped matching network circuit. By continuously adjusting the capacitance value, the impedance matching between the radio frequency source 1 and the load 2 reaches the optimal state, thereby realizing the efficient transmission of radio frequency signals. This radio frequency system realizes the impedance matching between the radio frequency source 1 and the load 2 by automatically adjusting the capacitance value in the matching network, improves the efficiency and stability of radio frequency signal transmission, and reduces signal reflection and energy loss caused by impedance mismatch.

[0048] In a third aspect, the present application provides an impedance matching method for an impedance automatic adjustment matching system as described above, which includes the following steps:

[0049] S100: Use the acquisition unit 61 to collect the voltage and current signals at the output terminal of the radio frequency source 1 in real time and convert them into digital signals through an analog-to-digital converter;

[0050] S200: Use the processing unit to process the collected digital signals and calculate and generate capacitance adjustment commands for the first adjustable capacitor 3 and the second adjustable capacitor 4;

[0051] S300: Based on the capacitance adjustment commands for the first adjustable capacitor 3 and the second adjustable capacitor 4, use the execution unit to adjust the capacitance values of the first adjustable capacitor 3 and the second adjustable capacitor 4 respectively to achieve impedance matching between the radio frequency source 1 and the load 2.

[0052] In this embodiment, S100 acquires the real-time voltage and current signals at the output end of the RF source 1. The acquisition unit 61 (a dedicated RF sensor, such as a voltage-current sensor) is used to acquire the voltage and current signals at the output end of the RF source 1 in real time. These analog signals are then converted into digital signals by an analog-to-digital converter (ADC) for subsequent digital processing; S200 calculates the capacitance adjustment amount according to the acquired digital signals. The processing unit (such as an SoC FPGA or other embedded processor) receives the digital signals output by the ADC and applies specific algorithms (such as Fourier transform, impedance matching algorithm, etc.) for processing. The processing unit calculates the capacitance adjustment amount instructions for the first adjustable capacitor 3 and the second adjustable capacitor 4 according to the algorithms; S300 adjusts the capacitance value to achieve impedance matching. The execution unit (such as a motor drive chip and the drive motor 62 it controls) receives the capacitance adjustment amount instructions generated by the processing unit. The execution unit adjusts the capacitance values of the first adjustable capacitor 3 and the second adjustable capacitor 4 respectively according to the instructions. By adjusting the capacitance value, the impedance characteristics of the matching network are changed, so that the impedance between the RF source 1 and the load 2 reaches a matching state, thereby improving the transmission efficiency and stability of the RF signal.

[0053] Combined with the third aspect, in an implementation manner, in S200, it includes the following steps:

[0054] S201: Use the processing unit to perform Fourier transform algorithm transformation and data preprocessing on the acquired digital signals;

[0055] S202: Synchronously perform frequency discrimination, amplitude discrimination, and phase discrimination processing on the processed digital signals to obtain the carrier frequency information, amplitude magnitude, and phase information of the digital signals;

[0056] S203: Calculate the input impedance, reflection coefficient, and standing wave ratio according to the calculated frequency, amplitude, and phase;

[0057] S204: If the reflection coefficient or the standing wave ratio exceeds the preset threshold value, calculate and generate the capacitance adjustment position instructions for the first adjustable capacitor 3 and the second adjustable capacitor 4 based on the current capacitance values of the first adjustable capacitor 3 and the second adjustable capacitor 4.

[0058] In this embodiment, S201 converts the time-domain signal into a frequency-domain signal for subsequent analysis. The processing unit applies the Fourier transform algorithm (FFT) to the acquired digital signal to convert the time-domain signal into a frequency-domain signal, and performs preprocessing operations such as filtering and denoising on the converted frequency-domain signal to improve the signal quality; S202 extracts the carrier frequency, amplitude, and phase information of the digital signal. The processing unit performs synchronous frequency discrimination, amplitude discrimination, and phase discrimination on the preprocessed digital signal to obtain the carrier frequency information, amplitude magnitude, and phase information of the digital signal. These information are the basis for calculating the input impedance, reflection coefficient, and standing wave ratio in the subsequent steps; S203 evaluates the impedance matching degree between the RF source 1 and the load 2. The processing unit calculates the input impedance, reflection coefficient, and standing wave ratio according to the results obtained from the frequency discrimination, amplitude discrimination, and phase discrimination using relevant formulas or algorithms. The input impedance reflects the impedance relationship between the RF source 1 and the load 2; the reflection coefficient represents the reflection degree of the RF signal at the load 2 end; the standing wave ratio is a form of manifestation of the reflection coefficient and is used to evaluate the quality of impedance matching; S204 the processing unit determines whether the reflection coefficient or the standing wave ratio exceeds the preset threshold value. If the reflection coefficient or the standing wave ratio exceeds the preset threshold value, it indicates that the impedance matching is poor and the capacitance value needs to be adjusted. The processing unit calculates and generates the capacitance adjustment position instructions for the first adjustable capacitor 3 and the second adjustable capacitor 4 based on the current capacitance values of the first adjustable capacitor 3 and the second adjustable capacitor 4, and the preset impedance matching algorithm or look-up table. By adjusting the capacitance value, the impedance characteristics of the matching network are changed to make the impedance between the RF source 1 and the load 2 reach a better matching state.

[0059] Combined with the third aspect, in one implementation, after S204, the following steps are further included:

[0060] S205: Repeat the steps of collecting the voltage and current signals at the output end of the RF source 1, conversion, processing, parameter extraction, and impedance parameter calculation. If the calculated reflection coefficient or standing wave ratio still exceeds the preset threshold value, continue to calculate and generate the capacitance adjustment position instructions for the first adjustable capacitor 3 and the second adjustable capacitor 4 based on the current capacitance values of the first adjustable capacitor 3 and the second adjustable capacitor 4, otherwise end the adjustment process.

[0061] In this embodiment, by repeatedly executing the signal sampling, parameter extraction, and impedance calculation steps, real-time monitoring of the state of the output end of the RF source 1 is formed. This process uses a polling mechanism to continuously obtain voltage / current signals to ensure the timeliness of parameter update; when the reflection coefficient or the standing wave ratio exceeds the preset threshold value, the system generates an adjustment instruction based on the current capacitance values of the first / second adjustable capacitors. This conditional judgment mechanism is similar to the principle of loss value convergence detection in model training, and both trigger subsequent operations through a preset threshold value; if the calculated parameters return to the normal range, the adjustment process is terminated. This design refers to the convergence determination criterion in the iterative optimization algorithm, effectively avoiding invalid adjustment loops and improving the system response efficiency.

[0062] In combination with the third aspect, in one embodiment, in S201, the following steps are included:

[0063] S201-1: Use the processing unit to perform Fourier transform algorithm transformation, filtering, and DC component removal on the collected digital signal.

[0064] In this embodiment, the processing unit in S201-1 applies the Fourier transform algorithm (FFT) to the collected digital signal, converts the time-domain signal into a frequency-domain signal for subsequent analysis, extracts the frequency components of the digital signal, provides a basis for subsequent filtering and DC component removal. The processing unit performs filtering on the frequency-domain signal after Fourier transform to remove unwanted frequency components or noise, improves the signal quality, reduces the influence of noise on subsequent processing. The processing unit detects and removes the DC component in the signal, that is, the average value or offset of the signal, eliminates the interference of the DC component on signal processing, and ensures the accuracy of subsequent processing.

[0065] In combination with the third aspect, in one embodiment, in S201, the following steps are included:

[0066] S201-2: The sampling rate of the Fourier transform algorithm matches the frequency of the output signal of the RF source 1, and the filtering process includes band-pass filtering.

[0067] In this embodiment, the sampling rate of the Fourier transform algorithm is matched to ensure that the sampling rate of the Fourier transform algorithm matches the frequency of the output signal of the RF source 1, so as to ensure that the transformed frequency-domain signal can accurately reflect the frequency components of the original time-domain signal, improve the accuracy of frequency-domain analysis, and provide a reliable basis for subsequent processing; band-pass filtering performs band-pass filtering on the frequency-domain signal after Fourier transform, only retains the signal components within the frequency range of interest, removes unwanted frequency components, reduces noise interference, and improves the signal quality.

[0068] In summary, for Figure 1 the shown inverted L-shaped matching network circuit, the following calculation and derivation can be made. If the measured input impedance Z in = R + jX, assuming the output impedance of the RF source 1 (RFG) is then the RF generator and the load 2 are matched. In this case, the output impedance of the matching network is:

[0069]

[0070] Let

[0071]

[0072] Then

[0073]

[0074] Because is conjugate-matched with the load impedance, the load impedance is

[0075]

[0076] wherein, the real part and the imaginary part are respectively:[[]]

[0077]

[0078] Actually, the output impedance of the RFG is R g = 50 Ω. The matching condition can only be achieved when Z in = 50 Ω. Assuming that the values of two tuning capacitors C'1 and C'2 can be accurately controlled, in this case, the output impedance of the matching network is:[[]]

[0079]

[0080] Due to conjugate matching, the load impedance is

[0081]

[0082] Real part

[0083]

[0084] Imaginary part

[0085]

[0086] Substituting formula (10) into formula (6) gives

[0087]

[0088] Solving gives

[0089]

[0090] Substituting formulas (11)(13) into formula (7) gives

[0091]

[0092] Solving gives

[0093]

[0094] So far, the adjustable capacitance value C′1 of the first adjustable capacitor 3 and the adjustable capacitance value C′2 of the second adjustable capacitor 4 of the inverted L-shaped matching network circuit can be obtained. Different capacitance values of the adjustable capacitor correspond to different positions of the driving motor 62 to rotate. There is a mapping relationship between them. The design concept is to ensure that impedance adjustment can be automatically and quickly performed when the load 2 fluctuates, that is, to adjust the size of the target capacitance value, so as to ensure the conjugate matching effect and minimize signal reflection. When the device is working, the adjustment of the capacitance value is mainly controlled by using the driving motor 62.

[0095] Generally, we need to detect various parameters of impedance matching to provide data support for our control strategy. The formulas for each parameter are as follows.

[0096] Z in = R + jX (16)

[0097]

[0098] P rfl = P fwd - P load (23)

[0099] Among them, Z in is the input impedance, R is the real part of the impedance, X is the imaginary part of the impedance, Γ is the reflection coefficient, VSWR is the voltage standing wave ratio, P load is the load impedance, P fwd is the forward power, P rfl is the reverse power, is the phase angle in the reflection coefficient.

[0100] In summary, the impedance matching method of the impedance automatic adjustment matching system of the present application is fully described as follows.

[0101] S1: Start to sense and sample the output signal of the radio frequency source 1 to obtain the voltage and current information after signal conversion;

[0102] S2: Use an analog-to-digital converter (ADC device) to perform analog-to-digital conversion on the signal with analog characteristics, and then send it to the main control board 6 for algorithm processing;

[0103] S3: The main control board 6 is a fully integrated system-on-chip field programmable gate array (SoC FPGA). The central processing unit CPU and the programmable logic device FPGA are integrated inside the chip. After synchronously processing the input voltage and current data, the main control board 6 simultaneously performs FFT frequency domain transformation to obtain frequency domain information;

[0104] S4: The main control board 6 performs data preprocessing on the input data in the frequency domain, mainly filtering and removing the DC component of the signal;

[0105] S5: Perform frequency discrimination, amplitude discrimination, and phase discrimination on signal synchronization to obtain the carrier frequency information, amplitude magnitude, and phase information of the signal;

[0106] S6: Calculate the input impedance, reflection coefficient, standing wave ratio, etc., and the direct parameters of the impedance matching adjustment algorithm based on the calculated frequency, amplitude, and phase;

[0107] S7: Judge the current reflection coefficient or standing wave ratio parameter, and decide whether to perform impedance adjustment according to the set size of the adjustment threshold value;

[0108] S8: If it is judged that adjustment is required, directly calculate the data C′1 and C′2 of the new tuning capacitor value according to the current tuning capacitor value and the analytical formula;

[0109] S9: Drive the motor 62 to adjust the first adjustable capacitor 3 and the second adjustable capacitor 4 to their respective corresponding positions of C′1 and C′2;

[0110] S10: If after adjustment, it is found from the adjusted new device state that the reflection coefficient still exceeds the threshold value, continue to perform the same algorithm adjustment; otherwise, end the adjustment process, but the device still observes the state at any time and is ready to perform a new adjustment process at any time, so as to ensure that the impedance can be tracked in real time and quickly.

[0111] In the description of the present application, it should be noted that the orientation or positional relationship indicated by terms such as "upper" and "lower" is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present application. Unless otherwise clearly specified and defined, the terms "installation", "connection", and "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the internal communication of two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0112] It should be noted that in this application, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variation thereof is intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements not only includes those elements but also includes other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the phrase "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising said element.

[0113] The above are only specific embodiments of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application will not be limited to these embodiments shown herein, but rather will be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. An impedance automatically adjustable matching system, characterized in that Comprising: An inverted L-shaped matching network circuit, which includes an inductor (5), a first adjustable capacitor (3) and a second adjustable capacitor (4). The inductor (5) and the second adjustable capacitor (4) are in series and are both used to be connected in series in the loop between the radio frequency source (1) and the load. The first adjustable capacitor (3) is used to be connected in parallel in the loop between the radio frequency source (1) and the load, and the first adjustable capacitor (3) is in parallel with the inductor (5); A main control board (6), which integrates an acquisition unit (61), a processing unit and an execution unit. The acquisition unit (61) is used to connect to the output end of the radio frequency source (1), detect voltage and current signals in real time, and output digital signals through an analog-to-digital converter. The processing unit is used to receive the digital signals output by the analog-to-digital converter, calculate and generate capacitance adjustment amount instructions for the first adjustable capacitor (3) and the second adjustable capacitor (4). The execution unit is connected to the first adjustable capacitor (3) and the second adjustable capacitor (4), and the execution unit is used to adjust the capacitance values of the first adjustable capacitor (3) and the second adjustable capacitor (4) respectively according to their capacitance adjustment amount instructions, so as to achieve impedance matching between the radio frequency source (1) and the load.

2. The impedance automatically adjustable matching system according to claim 1, wherein The acquisition unit (61) includes a radio frequency dedicated sensor, and the radio frequency dedicated sensor is used to connect to the output end of the radio frequency source (1), detect voltage and current signals in real time, and output digital signals through an analog-to-digital converter.

3. The impedance automatically adjustable matching system according to claim 1, wherein The processing unit includes a system-on-chip field programmable gate array, and the system-on-chip field programmable gate array is connected between the acquisition unit (61) and the execution unit. The system-on-chip field programmable gate array is used to receive the digital signals output by the analog-to-digital converter, obtain the frequency domain information of the voltage and current signals by using the Fourier transform algorithm, and generate capacitance adjustment amount instructions for the first adjustable capacitor (3) and the second adjustable capacitor (4).

4. The impedance automatically adjustable matching system according to claim 1, wherein The execution unit includes a motor drive chip, and the motor drive chip is connected to the processing unit, and drive motors (62) are electrically connected between the motor drive chip and the first adjustable capacitor (3) and the second adjustable capacitor (4) respectively.

5. A radio frequency system, characterized in that, It comprises: A radio frequency source (1), and a load is connected in series in the loop of the radio frequency source (1); An inverted L-shaped matching network circuit, which includes an inductor (5), a first adjustable capacitor (3) and a second adjustable capacitor (4). The inductor (5) and the second adjustable capacitor (4) are connected in series in the loop between the radio frequency source (1) and the load. The first adjustable capacitor (3) is connected in parallel in the loop between the radio frequency source (1) and the load, and the first adjustable capacitor (3) is in parallel with the inductor (5); Main control board (6), which integrates a collection unit (61), a processing unit, and an execution unit. The collection unit (61) is connected to the output end of the radio frequency source (1) to detect voltage and current signals in real time, and outputs digital signals through an analog-to-digital converter. The processing unit is used to receive the digital signals output by the analog-to-digital converter, calculate and generate capacitance adjustment amount instructions for the first adjustable capacitor (3) and the second adjustable capacitor (4). The execution unit is connected to the first adjustable capacitor (3) and the second adjustable capacitor (4), and the execution unit is used to adjust the capacitance values of the first adjustable capacitor (3) and the second adjustable capacitor (4) respectively according to its capacitance adjustment amount instructions, so as to achieve impedance matching between the radio frequency source (1) and the load.

6. An impedance matching method for an automatic impedance-adjusting matching system according to any one of claims 1-4, characterized in that, It includes the following steps: Use the collection unit (61) to collect the voltage and current signals at the output end of the radio frequency source (1) in real time, and convert them into digital signals through an analog-to-digital converter; Use the processing unit to process the collected digital signals, and calculate and generate capacitance adjustment amount instructions for the first adjustable capacitor (3) and the second adjustable capacitor (4); Based on the capacitance adjustment amount instructions of the first adjustable capacitor (3) and the second adjustable capacitor (4), use the execution unit to adjust the capacitance values of the first adjustable capacitor (3) and the second adjustable capacitor (4) respectively, so as to achieve impedance matching between the radio frequency source (1) and the load.

7. The impedance matching method of the automatic impedance adjustment matching system according to claim 6, characterized in that The use of the processing unit to process the collected digital signals, and calculate and generate capacitance adjustment amount instructions for the first adjustable capacitor (3) and the second adjustable capacitor (4) includes: Use the processing unit to perform Fourier transform algorithm transformation and data preprocessing on the collected digital signals; Synchronously perform frequency discrimination, amplitude discrimination, and phase discrimination processing on the processed digital signals to obtain the carrier frequency information, amplitude magnitude, and phase information of the digital signals; According to the calculated frequency, amplitude, and phase, calculate the input impedance, reflection coefficient, and standing wave ratio; If the reflection coefficient or the standing wave ratio exceeds the preset threshold value, then based on the capacitance values of the current first adjustable capacitor (3) and the second adjustable capacitor (4), calculate and generate capacitance adjustment position instructions for the first adjustable capacitor (3) and the second adjustable capacitor (4).

8. The impedance matching method of the automatic impedance adjustment matching system according to claim 7, characterized in that After the step of if the reflection coefficient or the standing wave ratio exceeds the preset threshold value, then based on the capacitance values of the current first adjustable capacitor (3) and the second adjustable capacitor (4), calculate and generate capacitance adjustment position instructions for the first adjustable capacitor (3) and the second adjustable capacitor (4), it further includes: Repeat the steps of collecting the voltage and current signals at the output end of the radio frequency source (1), conversion, processing, parameter extraction, and impedance parameter calculation. If the calculated reflection coefficient or standing wave ratio still exceeds the preset threshold value, continue to calculate and generate capacitance adjustment position instructions for the first adjustable capacitor (3) and the second adjustable capacitor (4) based on the capacitance values of the current first adjustable capacitor (3) and the second adjustable capacitor (4), otherwise end the adjustment process.

9. The impedance matching method of the automatic impedance-adjusting matching system according to claim 7, characterized in that the use of the processing unit to perform Fourier transform algorithm transformation and data preprocessing on the collected digital signals includes: using the processing unit to perform Fourier transform algorithm transformation, filtering, and DC component removal processing on the collected digital signals.

10. The impedance matching method of the automatic impedance-adjusting matching system according to claim 7, characterized in that the use of the processing unit to perform Fourier transform algorithm transformation, filtering, and DC component removal processing on the collected digital signals includes: the sampling rate of the Fourier transform algorithm matches the output signal frequency of the RF source (1), and the filtering process includes band-pass filtering.

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